Pre-distortion calibration method and device for digital-to-analog converter and transmitter using device

Abstract

According to the embodiment of the invention, a pre-distortion calibration method and device for a digital-to-analog converter and a transmitter using the device are provided. The pre-distortion calibration device for the digital-to-analog converter comprises an error calculation module which calculates the pre-distortion of the digital-to-analog converter according to the ratio of the output of each current source in a most significant bit module of the digital-to-analog converter to the sum of the outputs of all current sources in a least significant bit module of the digital-to-analog converter. Calculating an accumulative error of a current source of the corresponding most significant bit module for each thermometer code greater than 0 used by the most significant bit module; and the calibration module adds the least significant bit part of the to-be-input data of the digital-to-analog converter into a predetermined offset, and calculates the calibrated least significant bit part according to the accumulative error corresponding to the thermometer code of the most significant bit part of the to-be-input data. Embodiments of the present disclosure correct non-linear errors of a digital-to-analog converter by changing binary codes of an LSB portion by making pre-distortion in a digital domain.

Description

Technical Field

[0001] The present disclosure relates to high-speed communication, and in particular to a pre-distortion calibration method and device for a digital-to-analog converter and a transmitter using the device. Background Art

[0002] With the rapid development of chip technology, the performance requirements for digital-analog interface circuits are constantly increasing. For example, high-speed SERDES (serializer / deserializer) technology has developed to single-channel 112GHz / 224GHz nodes. In high-speed interface circuits, the digital-to-analog converter (DAC) is one of the key modules, and its performance directly affects the signal quality and transmission accuracy of the system.

[0003] Current steering DAC has been widely used in the field of high-speed communication and data conversion due to its high speed and high precision. The basic working principle of current steering DAC is to control the on and off of the switch through a digital control signal to determine whether the current of different current sources flows through the load, thereby generating a corresponding output voltage. However, in the actual chip manufacturing process, due to process deviations, the output current of the current source often has errors, resulting in nonlinear problems of the DAC. Therefore, in the existing current steering DAC design, the thermometer code control method is usually used to encode the high bits of the DAC. However, this method can only effectively reduce the differential non-linearity (DNL) error, and cannot significantly improve the integral non-linearity (INL) error.

[0004] In the transmitter circuit of the communication system (such as the transmitter circuit of WiFi and high-speed SERDES), the integral nonlinearity error has a significant impact on the system performance, causing signal distortion, reducing the accuracy of data transmission, and thus affecting the overall performance of the system. Therefore, how to effectively reduce the integral nonlinearity error of the DAC and improve the accuracy of digital-to-analog conversion is an important issue that needs to be solved by those skilled in the art. Summary of the invention

[0005] In view of the problems existing in the prior art, embodiments of the present disclosure provide a method and device for pre-distortion calibration of a digital-to-analog converter.

[0006] The first aspect of the disclosed embodiment provides a pre-distortion calibration device for a digital-to-analog converter, which includes an error calculation module, which calculates the cumulative error of the current source of the most significant bit module corresponding to each thermometer code greater than 0 used by the most significant bit module according to the ratio between the output of each current source in the most significant bit module of the digital-to-analog converter and the sum of the outputs of all current sources in the least significant bit module; a calibration module, which adds a predetermined offset to the least significant bit part of the data to be input to the digital-to-analog converter, and calculates the calibrated least significant bit part according to the cumulative error corresponding to the thermometer code of the most significant bit part of the data to be input, wherein the most significant bit module of the digital-to-analog converter is controlled using the thermometer code, and the least significant bit module is controlled using the binary code. The calibrated least significant bit part replaces the least significant bit part of the data to be input, and is used to control the least significant bit module of the digital-to-analog converter.

[0007] The pre-distortion calibration device of the disclosed embodiment calculates the cumulative error of the current source of the most significant bit module corresponding to the thermometer code, and accordingly changes the binary codeword of the least significant bit to pre-compensate the error of the current source of the most significant bit module. This method makes the analog circuit part easier to implement, and the signal-to-noise distortion ratio after correction is significantly improved.

[0008] Optionally, according to the pre-distortion calibration device of the first aspect of the present disclosure, the error calculation module calculates the current share of the most significant bit module output relative to the unit current for each thermometer code based on the ratio between the output of each current source in the most significant bit module and the sum of the outputs of all current sources in the least significant bit module, and the difference between the current share and the ideal current share corresponding to the thermometer code is taken as the cumulative error.

[0009] Optionally, the error calculation module may calculate the cumulative error of the current source corresponding to each thermometer code greater than 0 of the most significant bit module of the digital-to-analog converter by the following equation:

[0010]

[0011] Where N is the number of bits of the thermometer code corresponding to the most significant bit module, M+1 is the number of bits of the binary code corresponding to the least significant bit module, i=0,1,…N-1, Gi represents the cumulative error of the current source of the most significant bit module, and Pj is the ratio between the output of the jth current source in the most significant bit module and the sum of the outputs of all current sources in the least significant bit module.

[0012] Optionally, according to the pre-distortion calibration device of the first aspect of the present disclosure, the least significant bit portion of the calculation calibration includes when the thermometer code of the most significant bit portion of the data to be input is greater than 0, the least significant bit portion of the data to be input with a predetermined offset minus the cumulative error corresponding to the thermometer code rounded. The data to be input refers to the data to be input to the digital-to-analog converter, and its least significant bit portion is adjusted according to the predetermined cumulative error, and then used as the least significant bit portion of the calibration to replace the least significant bit portion of the original input data, and the output of the current source of the least significant bit module is controlled, thereby compensating for the current source error in the most significant bit module. In the digital-to-analog converter, the most significant bit portion of the data to be input is converted from binary code to thermometer code for controlling the most significant bit module.

[0013] Optionally, according to the pre-distortion calibration device of the first aspect of the present disclosure, the digital-to-analog converter includes a measuring module for measuring the ratio between the output of each current source in the most significant bit module and the sum of the outputs of all current sources in the least significant bit module, and the measuring module includes a first current-to-voltage conversion circuit, a second current-to-voltage conversion circuit, and an analog-to-digital converter, wherein the first current-to-voltage conversion circuit receives the outputs of all current sources in the least significant bit module, and the voltage outputted by the first current-to-voltage conversion circuit serves as the reference voltage of the analog-to-digital converter; the second current-to-voltage conversion circuit is connected to a current source in the most significant bit module, and the voltage outputted by the second current-to-voltage conversion circuit serves as the input voltage of the analog-to-digital converter, and the analog-to-digital converter outputs the ratio of the input voltage to the reference voltage. The measuring module can quickly and accurately obtain the ratio between the output of each current source in the most significant bit module and the sum of the outputs of all current sources in the least significant bit module.

[0014] Optionally, the digital-to-analog converter includes the redundant branch, which includes a current source whose current magnitude is the same as the current source corresponding to the highest bit of the least significant bit part except the redundant branch. The redundant branch can improve the linearity and dynamic performance of the digital-to-analog converter and improve the accuracy of calibration.

[0015] A second aspect of an embodiment of the present disclosure provides a pre-distortion calibration method for a digital-to-analog converter, comprising measuring the ratio between the output of each current source in a most significant bit module of the digital-to-analog converter and the sum of the outputs of all current sources in a least significant bit module, wherein the most significant bit module is controlled using a thermometer code, the least significant bit module is controlled using a binary code, and the least significant bit module includes a redundant branch; based on the ratio between the output of each current source in the most significant bit module and the sum of the outputs of all current sources in the least significant bit module, calculating the cumulative error of the current source of the most significant bit module corresponding to each thermometer code greater than 0; adding a predetermined offset to the least significant bit portion of the data to be input to the digital-to-analog converter, and calculating the calibrated least significant bit portion based on the cumulative error corresponding to the thermometer code of the most significant bit portion of the data to be input.

[0016] Optionally, according to the second aspect of the embodiment of the present disclosure, the ratio between the output of each current source in the most significant bit module of the digital-to-analog converter and the sum of the outputs of all current sources in the least significant bit module is measured, including converting the outputs of all current sources in the least significant bit module through a first current-to-voltage conversion circuit and then inputting them into the analog-to-digital converter as its reference voltage, converting the output of a current source in the most significant bit module through a second current-to-voltage conversion circuit and then inputting them into the analog-to-digital converter as its input voltage, and the analog-to-digital converter outputs the ratio of the input voltage to the reference voltage.

[0017] Optionally, according to the second aspect of the embodiment of the present disclosure, the current share of the most significant bit module output relative to the unit current is calculated for each thermometer code based on the ratio between the output of each current source in the most significant bit module and the sum of the outputs of all current sources in the least significant bit module, and the difference between the current share and the ideal current share corresponding to the thermometer code is taken as the cumulative error.

[0018] Optionally, according to the second aspect of the embodiment of the present disclosure, calculating the least significant bit portion of the calibration includes subtracting the accumulated error corresponding to the thermometer code from the least significant bit portion of the data to be input with a predetermined offset when the thermometer code of the most significant bit portion of the data to be input is greater than 0. Optionally, the redundant branch includes a current source, the current magnitude of which is the same as the current source corresponding to the most significant bit of the least significant bit portion except the redundant branch.

[0019] Optionally, a third aspect of the present disclosure provides a serializer / deserializer transmitter, which includes a feedforward equalizer, a pre-distortion calibration device as described above, a multiplexer and a digital-to-analog converter connected in sequence, the serializer / deserializer transmitter also includes a clock generation circuit, which provides a corresponding clock signal for the feedforward equalizer, the pre-distortion calibration device, the multiplexer and the digital-to-analog converter, wherein the digital-to-analog converter includes a measurement module, which measures the ratio between the output of each current source in the most significant bit module of the digital-to-analog converter and the sum of the outputs of all current sources in the least significant bit module.

[0020] It is not necessary to achieve all the advantages described above at the same time for any device implementing the present disclosure. Other features and advantages of the present disclosure will be described in the subsequent description embodiments, and partly become apparent from the description embodiments, or be understood by implementing the present disclosure. The purposes and advantages of the embodiments of the present disclosure can be realized and obtained by the structures indicated in the description, claims and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure.

[0022] Figure 1 It is a structural schematic diagram of a current steering digital-to-analog converter in the prior art;

[0023] Figure 2 is a structural schematic diagram of a current-steering digital-to-analog converter according to an embodiment of the present disclosure;

[0024] Figure 3 According to an embodiment of the present disclosure, Figure 2 A circuit diagram of the output of the current source of the first bit t0 in the MSB portion of the digital-to-analog converter shown;

[0025] Figure 4 According to an embodiment of the present disclosure, Figure 2 A circuit diagram of the output of the current source of the second bit t1 in the MSB portion of the digital-to-analog converter shown;

[0026] Figure 5 is a flow chart of calculating the cumulative error of the current source corresponding to each bit in the MSB part according to an embodiment of the present disclosure;

[0027] Figure 6 is a flow chart of a method for pre-distortion calibration of a digital-to-analog converter based on the accumulated error of a current source according to an embodiment of the present disclosure;

[0028] Figure 7is a structural schematic diagram of a SerDes transmitter using the predistortion calibration device of an embodiment of the present disclosure;

[0029] Figure 8 It is the simulation waveform diagram of the signal-to-noise-distortion ratio before and after correction. DETAILED DESCRIPTION

[0030] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. The various different embodiments can be combined with each other to form other embodiments not shown in the following description. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0031] Unless otherwise defined, the technical terms or scientific terms used herein shall have the usual meanings understood by persons of ordinary skill in the field to which the present disclosure belongs. The words "first", "second" and similar words used in the present disclosure specification and claims do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "one" do not necessarily indicate a quantity restriction. Words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0032] Figure 1 FIG. 1 shows a schematic diagram of the structure of a 7-bit current-steering digital-to-analog converter in the prior art. Figure 1In the figure, the current steering digital-to-analog converter 10 includes 7 switches corresponding to the 7-bit binary input code (d06, d05, d04, d03, d02, d01, d00) and a current source connected to each switch. The above current sources are connected in parallel and then connected to the load R0 to generate an output voltage. The high bit of the input code is called the MSB (Most Significant Bit) part, and the low bit is called the LSB (Least Significant Bit) part. Vdd0 is the power supply voltage, and Vout0 is the voltage of the analog output. Each bit of the binary input code has only two states, 0 and 1. In the 0 state, the corresponding switch is disconnected, and the corresponding branch is not conducting. In the 1 state, the corresponding switch is closed, and the current of the corresponding branch will flow through the load. Therefore, by controlling the on and off of the switch, it is determined whether the current of different current sources flows through the load, and finally the output voltage is generated.

[0033] The current source corresponding to the MSB part of the current steering digital-to-analog converter can be controlled by thermometer code, and the current source corresponding to the LSB part can be controlled by binary code. For example, Figure 1 The two bits d06 and d05 shown are the MSB part, which can be represented by a three-bit thermometer code. However, the thermometer code itself cannot solve the error of integral nonlinearity. Generally speaking, the current source corresponding to the LSB part is more accurate, so the calibration of the digital-to-analog converter is mainly for the current source of the MSB part.

[0034] Figure 2 2 is a schematic diagram of a digital-to-analog converter according to an embodiment of the present disclosure. The digital-to-analog converter 20 exemplarily corresponds to 7-bit data, which includes a 5-bit LSB part and a 2-bit MSB part. The MSB part is converted into a three-bit thermometer code. Each bit of the MSB part and the LSB part corresponds to a branch of a current source, and each branch is connected in parallel. Figure 2 As shown, the circuit corresponding to the MSB part is the MSB module 21, and the circuit corresponding to the LSB part is the LSB module 22. The MSB part uses a three-bit thermometer code (t2, t1, t0) to represent a 2-bit binary code, and the corresponding branch currents are all 32I, where I is a unit current source. The 5 bits of the LSB part are d0, d1, d2, d3, and d4 from low to high, corresponding to branch currents of 1I, 2I, 4I, 8I, and 16I, respectively. This embodiment adds a redundant branch as part of the LSB module 22, which is connected in parallel with other branches and can be located between the branch of the LSB module and the branch of the MSB module. It is controlled by binary code and is marked as a5 in the figure. The current source of this branch is the same as the current source of the branch corresponding to the highest bit d4 of the LSB part, that is, 16I. The redundant branch can also use other current source values, or can include more than one branch.

[0035] The added redundant bits can provide redundancy for digital pre-distortion calibration of the DAC, and the current source error of the MSB module can be compensated by pre-distortion of the LSB part in the digital domain. In order to perform pre-distortion calibration, the cumulative error of the current source corresponding to each bit in the MSB module is first obtained, and its reference Figure 3-5 This is explained in detail below.

[0036] like Figure 5 As shown, first, in step 51 , the sum of the output of each current source in the MSB module 21 and the current source output of the LSB module 22 is detected. Figure 3 and Figure 4 The measurements are shown Figure 2 The circuit diagram of the output of each current source in the MSB module of the digital-to-analog converter is shown.

[0037] Figure 3 The measurement circuit 23 shown includes a first current-voltage conversion circuit 231, a second current-voltage conversion circuit 232, and an analog-to-digital converter (ADC) 233. The sum of the current sources of the LSB module 22 is input to the first current-voltage conversion circuit 231, which is converted into a voltage to be input to the analog-to-digital converter 233 as a reference voltage Vref of the analog-to-digital converter 233. The output of a current source of the MSB module 21 is connected to the second current-voltage conversion circuit 232, which is converted into a voltage to be input to the analog-to-digital converter 233 as an input voltage Vin of the analog-to-digital converter 233.

[0038] Figure 3 and Figure 4 The measurement circuit structures of the two modules are the same, and the difference between them is that the outputs of two different current sources of the MSB module are measured. Figure 3 The current source corresponding to the first bit t0 of the MSB part of the circuit shown is connected to the second current-to-voltage conversion circuit 232; Figure 4 In the circuit shown, a current source corresponding to the second bit t1 of the MSB portion is connected to the second current-voltage conversion circuit 232 .

[0039] The ratio of the output of each current source of the MSB module to the sum of the outputs of the current sources of the LSB module is obtained by obtaining the ratio of the input voltage Vin to the reference voltage Vref, which can be implemented by the analog-to-digital converter 233. Figure 3 The analog-to-digital converter 233 determines the ratio of the current source corresponding to t0 to the sum of the current sources of the LSB modules by determining the ratio of the input voltage Vin to the reference voltage Vref, which is recorded as P0. Figure 4The analog-to-digital converter 233 determines the ratio of the current source corresponding to t1 to the sum of the current sources of the LSB module by determining the ratio of the input voltage Vin to the reference voltage Vref, which is recorded as P1. Similarly, the current source of the highest bit of the MSB module is connected to the second current-voltage conversion circuit 232, and the converted voltage is used as the input voltage Vin of the analog-to-digital converter 233, and the ratio P2 of the current source corresponding to t2 to the sum of the current sources of the LSB module can be obtained. Under ideal conditions, P0, P1 and P2 are all 32 / 47.

[0040] In step 52, the predistortion calibration device (see Figure 7 ) calculates the cumulative error of the current source corresponding to each thermometer code in the MSB part, and the cumulative error can be measured by the number or multiple of the unit current source. Based on P0, P1 and P2 obtained in the above manner, the cumulative error of the current source of the MSB module is calculated. Since the thermometer code of the MSB part is 3 bits, the LSB part is 6 bits, and the 6th bit is the same as the 5th bit current as a redundant bit, that is, 16I, the calculation method of the cumulative error is as follows:

[0041] G0=P0*47-32

[0042] G1=(P0+P1)*47-64

[0043] G2=(P0+P1+P2)*47-96

[0044] Round G0, G1, and G2, for example, by rounding them off, and convert them into binary form. G0, G1, and G2 correspond to the thermometer codes in ascending order (excluding thermometer codes where all bits are 0). For example, Figure 2-Figure 4 In the example, the mapping relationship between the 3-bit thermometer code and the 2-bit binary code is 00→000, 01→001, 10→011, 11→111, then G0, G1, and G2 correspond to the thermometer codes of 001, 011, and 111, respectively.

[0045] The above methods are not limited to Figure 2The 7-bit digital-to-analog converter shown in the figure can be used for digital-to-analog converters with various bit numbers. The ratio of the current source of the MSB module to the sum of the current sources of the LSB module can be used to obtain the current share of the MSB module relative to the unit current. Subtracting it from the ideal current share can obtain the cumulative error corresponding to the thermometer code. The current source of the LSB module can be regarded as an ideal current source for ease of calculation. If the thermometer code of the MSB part of the digital-to-analog converter is N bits, and the binary code of the LSB part is M+1 bits, the current source size of the redundant bits included therein is equal to the current source size corresponding to the highest bit of the LSB part excluding the redundant bits. Based on step 51, N proportional values, namely P0 to PN-1, will be obtained. The method for calculating the cumulative error of the current source corresponding to each thermometer code according to the N proportional values ​​is as follows:

[0046]

[0047] Where i=0,1,…N-1, Gi represents the cumulative error of the current source of the MSB module, and Pj is the proportional value. Each Gi corresponds to a thermometer code. For example, for a standard thermometer code, the thermometer code corresponding to Gi is 1 at i+1 and all bits to the right. Gi (for example, by rounding) will be converted to binary form and applied during the calibration process.

[0048] If the redundant bit current source is different from the above example, it is necessary to replace The current magnitude of the current source replaced with the redundant bit (i.e., the number of parts or multiples relative to the unit current).

[0049] Figure 6 The flowchart of the method for pre-distortion calibration of the digital-to-analog converter according to the accumulated error of the current source of the MSB module is shown. The method will be described below in conjunction with an example of a digital-to-analog converter for 7-bit data.

[0050] In step 61, the calibration module of the pre-distortion calibration device receives the binary code to be input to the digital-to-analog converter, converts the MSB part of the input signal into a thermometer code, and increases the LSB part by an offset. Figure 2-4 In the embodiment shown, the calibration module receives a 7-bit binary input signal (d6, d5, d4, d3, d2, d1, d0), of which the MSB part is d6 and d5, and the rest is the LSB part. The 2 bits of the MSB part are converted into a 3-bit thermometer code (t2, t1, t0), and the 5-bit binary code (d4, d3, d2, d1, d0) of the LSB part is added with an offset of 8 (binary is 1000) to obtain the offset binary code for the LSB part.

[0051] In step 62, it is determined whether the thermometer code is equal to 0, that is, whether the thermometer code is 000. If it is determined to be yes, in step 64, the binary code after the offset is kept unchanged as the LSB part of the calibration; if it is determined to be no, step 63 is executed to subtract the accumulated error corresponding to the thermometer code from the binary code of the LSB part after the offset as the LSB part of the calibration. For example, Figure 2-4 In the example shown, if the thermometer code is 001, the binary code of the LSB part is subtracted by G0 after offset, and the result is d4d3d2d1d0+1000-G0; if the thermometer code is 011, the binary code of the LSB part is subtracted by G1 after offset, and the result is d4d3d2d1d0+1000-G1; similarly, if the thermometer code is 111, the binary code is changed to d4d3d2d1d0+1000-G2.

[0052] In step 65, the calibration module outputs a calibrated binary code, wherein the LSB portion of the binary code is replaced by the calibrated LSB portion obtained in step 63 or step 64, and the MSB portion remains unchanged. In the above method, the calibration module performs pre-distortion calibration on the LSB portion, and the calibrated binary code is input as an input signal to the LSB module to control the current source of the LSB module.

[0053] The above method is not limited to a DAC using a 7-bit binary input signal, but can be used for DACs of various digits. The offset can be determined based on the maximum cumulative error so that the binary code of the LSB part minus the cumulative error will not have a negative value. Figure 2-4 In the embodiment shown, when the maximum cumulative error is not more than +7 and not less than -8, the offset value is set to 8, which is half of the LSB highest bit d4. If the cumulative error is within -4 to +3, the offset value can also be set to 4.

[0054] Due to the addition of redundant bits, for the same input binary code, there may be more than one corresponding relationship in the LSB part, that is, there may be two current control methods, which will not affect the accuracy of the digital-to-analog converter output.

[0055] The calibration scheme proposed in the present disclosure can significantly improve the performance of the digital-to-analog converter. Taking a 7-bit digital-to-analog converter as an example, to verify the effect of the scheme, a Monte Carlo simulation was performed under the condition that the minimum current unit has a 16% mismatch. Figure 8The signal-to-noise-distortion ratio (SNDR) curves before and after calibration obtained by simulation are shown, where the dotted line is the SNDR curve before calibration and the solid line is the SNDR curve after calibration. Compared with before calibration, the SNDR after calibration is significantly improved, and the SNDR of the digital-to-analog converter is improved by about 1.8 dB on average. Therefore, the embodiments of the present disclosure can effectively suppress the nonlinear distortion caused by current source mismatch in the digital-to-analog converter.

[0056] The embodiment of the present disclosure calculates the size of the current source of the MSB module encoded using the thermometer code, pre-distorts the codeword of the LSB part in the digital domain, and uses the pre-distorted codeword to control the current source of the LSB module, thereby compensating for the error of the current source of the MSB module, thereby calibrating the nonlinear error of the digital-to-analog converter. The embodiment of the present disclosure adopts a digital domain pre-distortion calibration method and device, which can improve the nonlinear characteristics of the digital-to-analog converter, especially the integral nonlinear error, without relying on a complex Volterra series. At the same time, since only one current source needs to be added in the analog domain, the circuit implementation is simple and low cost.

[0057] Figure 7 A schematic diagram of the structure of a SerDes (serializer / deserializer) transmitter using a digital-to-analog converter according to an embodiment of the present disclosure is shown. The SerDes transmitter includes a feedforward equalizer (FFE) 71, a predistortion calibration device 72, a multiplexer 73, a digital-to-analog converter 74, a load 75, a clock generation module (not shown), and a first frequency divider 76 and a second frequency divider 77 for providing a clock signal to the feedforward equalizer (FFE) 71, the predistortion calibration device 72, and the multiplexer 73.

[0058] The parallel digital signal is input to FFE 71, and FFE 71 compensates the digital signal to suppress channel attenuation and nonlinear distortion, and sends the compensated digital signal to the pre-distortion calibration device 72. The pre-distortion calibration device 72 includes the error calculation module and the calibration module described above, wherein the error calculation module is used to calculate the cumulative error of the current source of the most significant bit module corresponding to each thermometer code greater than 0, and the calibration module performs pre-distortion calibration on the data to be input to the DAC, that is, calculates the least significant bit part of the calibration. The pre-distortion calibration device 72 can be implemented in the digital domain of the chip. The calibrated digital signal is input to the multiplexer 73. Compared with the digital signal input to the pre-distortion calibration device 72, the most significant bit part of the calibrated digital signal remains unchanged, and the least significant bit part is the least significant bit part of the above calibration. The multiplexer converts the calibrated digital signal from a parallel digital signal to a serial digital signal for transmission to the digital-to-analog converter. Specifically, the multiplexer 73 may include one or a plurality of cascaded multiplexers to convert the parallel digital signal into a high-speed serial digital signal. For example, 64 input parallel digital signals may be sequentially converted into one serial digital signal via a 64:4 multiplexer and a 4:1 multiplexer.

[0059] The digital-to-analog converter 74 receives the serial digital signal and converts it into an analog signal. The digital-to-analog converter 74 may use a digital-to-analog converter including the redundant current source and the measurement module in the above-mentioned embodiment of the present disclosure, for example, Figure 2-Figure 6 The digital-to-analog converter described above feeds back the measurement result of the measurement module to the pre-distortion calibration device 72, so that the pre-distortion calibration device 72 implements the pre-distortion calibration of the signal to be input to the digital-to-analog converter.

[0060] The load 75 is connected to the output end of the SerDes transmitter to reduce reflection and signal attenuation. For example, the output end may adopt a commonly used 50Ω matching impedance.

[0061] The clock signals of each part of the SerDes transmitter can be provided by a clock generating circuit. The main clock signal driving the digital-to-analog converter is divided by the first frequency divider 76 and input to the multiplexer 73; then, the signal is further divided by the second frequency divider 77 and provided to the FFE 71 and the pre-distortion calibration device 72. It should be noted that the clock signal providing method of the SerDes transmitter is not limited to this, and an independent clock circuit can also be used to provide clock signals for one or more modules respectively.

[0062] The above are merely exemplary embodiments of the present disclosure and are not intended to limit the protection scope of the present disclosure. The protection scope of the present disclosure is determined by the appended claims.

Claims

1. A predistortion calibration device for a digital-to-analog converter, characterized in that: include: an error calculation module, which calculates the cumulative error of the current source of the most significant bit module corresponding to each thermometer code greater than 0 used by the most significant bit module according to the ratio between the output of each current source in the most significant bit module of the digital-to-analog converter and the sum of the outputs of all current sources in the least significant bit module; a calibration module, which adds a predetermined offset to the least significant bit portion of the input data of the digital-to-analog converter, and calculates the least significant bit portion of the calibration according to the accumulated error corresponding to the thermometer code of the most significant bit portion of the input data, The most significant bit module of the digital-to-analog converter is controlled using a thermometer code, and the least significant bit module is controlled using a binary code.

2. The predistortion calibration device according to claim 1, characterized in that: The predetermined offset is determined according to the maximum accumulated error.

3. The predistortion calibration device according to claim 1, characterized in that: The error calculation module calculates the current share of the most significant bit module output relative to the unit current for each thermometer code based on the ratio between the output of each current source in the most significant bit module and the sum of the outputs of all current sources in the least significant bit module, and the difference between the current share and the ideal current share corresponding to the thermometer code is taken as the cumulative error.

4. The predistortion calibration device according to claim 1, characterized in that: The error calculation module calculates the cumulative error of the current source corresponding to each thermometer code greater than 0 of the most significant bit module of the digital-to-analog converter through the following equation: ， Where N is the number of bits of the thermometer code corresponding to the most significant bit module, M+1 is the number of bits of the binary code corresponding to the least significant bit module, i=0,1,…N-1, Gi represents the cumulative error of the current source of the most significant bit module, and Pj is the ratio between the output of the jth current source in the most significant bit module and the sum of the outputs of all current sources in the least significant bit module.

5. The predistortion calibration device according to claim 1 or 3, characterized in that: The calculation of the least significant bit portion of the calibration includes, when the thermometer code of the most significant bit portion of the data to be input is greater than 0, subtracting the accumulated error corresponding to the thermometer code from the least significant bit portion of the data to be input with a predetermined offset.

6. The predistortion calibration device according to claim 1, characterized in that: The digital-to-analog converter includes a measuring module for measuring the ratio between the output of each current source in the most significant bit module and the sum of the outputs of all current sources in the least significant bit module. The measuring module includes a first current-voltage conversion circuit, a second current-voltage conversion circuit and an analog-to-digital converter, wherein the first current-voltage conversion circuit receives the outputs of all current sources in the least significant bit module, and its output voltage serves as a reference voltage of the analog-to-digital converter; the second current-voltage conversion circuit is connected to a current source in the most significant bit module, and its output voltage serves as an input voltage of the analog-to-digital converter, and the analog-to-digital converter outputs the ratio of the input voltage to the reference voltage.

7. The predistortion calibration device according to claim 1 or 4, characterized in that: The digital-to-analog converter includes a redundant branch, which includes a current source, the current magnitude of which is the same as that of a current source corresponding to the most significant bit of the least significant bit part except the redundant branch.

8. A predistortion calibration method for a digital-to-analog converter, characterized in that: include measuring a ratio between an output of each current source in a most significant bit module of a digital-to-analog converter and a sum of outputs of all current sources in a least significant bit module, wherein the most significant bit module is controlled using a thermometer code, the least significant bit module is controlled using a binary code, and the least significant bit module includes a redundant branch; Calculate the cumulative error of the current source of the most significant bit module corresponding to each thermometer code greater than 0 according to the ratio between the output of each current source in the most significant bit module and the sum of the outputs of all current sources in the least significant bit module; A predetermined offset is added to the least significant bit portion of the data to be input to the digital-to-analog converter, and the least significant bit portion of the calibration is calculated based on the accumulated error corresponding to the thermometer code of the most significant bit portion of the data to be input.

9. The predistortion calibration method for a digital-to-analog converter according to claim 8, characterized in that The method for measuring the ratio between the output of each current source in the most significant bit module of the digital-to-analog converter and the sum of the outputs of all current sources in the least significant bit module comprises converting the outputs of all current sources in the least significant bit module through a first current-to-voltage conversion circuit and then inputting them into the analog-to-digital converter as its reference voltage, converting the output of a current source in the most significant bit module through a second current-to-voltage conversion circuit and then inputting them into the analog-to-digital converter as its input voltage, and the analog-to-digital converter outputs the ratio of the input voltage to the reference voltage.

10. The predistortion calibration method for a digital-to-analog converter according to claim 8, characterized in that The current share of the most significant bit module output relative to the unit current is calculated for each thermometer code based on the ratio between the output of each current source in the most significant bit module and the sum of the outputs of all current sources in the least significant bit module, and the difference between the current share and the ideal current share corresponding to the thermometer code is taken as the cumulative error.

11. The predistortion calibration method for a digital-to-analog converter according to any one of claims 8 to 10, characterized in that: The calculation of the least significant bit portion of the calibration includes, when the thermometer code of the most significant bit portion of the data to be input is greater than 0, subtracting the accumulated error corresponding to the thermometer code from the least significant bit portion of the data to be input with a predetermined offset.

12. The predistortion calibration method for a digital-to-analog converter according to claim 8, characterized in that The redundant branch includes a current source, the current magnitude of which is the same as that of the current source corresponding to the most significant bit of the least significant bit part except the redundant branch.

13. A serializer / deserializer transmitter, characterized in that The serializer / deserializer transmitter comprises a feedforward equalizer, a predistortion calibration device as claimed in any one of claims 1 to 7, a multiplexer and a digital-to-analog converter connected in sequence, and the serializer / deserializer transmitter also comprises a clock generating circuit, which provides a corresponding clock signal for the feedforward equalizer, the predistortion calibration device, the multiplexer and the digital-to-analog converter, wherein the digital-to-analog converter comprises a measuring module, which measures the ratio between the output of each current source in the most significant bit module of the digital-to-analog converter and the sum of the outputs of all current sources in the least significant bit module.

14. The serializer / deserializer transmitter of claim 13, wherein The pre-distortion calibration device receives the digital signal output by the feedforward equalizer, and outputs a calibrated digital signal to the multiplexer. Compared with the digital signal received by the pre-distortion calibration device, the most significant bit portion thereof remains unchanged, and the least significant bit portion is the least significant bit portion of the calibration.

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