Electronic device for calibration and calibration method thereof

Abstract

The invention provides an electronic device for calibration and a calibration method thereof. An electronic device includes: a first electronic device including a signal generator configured to generate signals for a first calibration using a first pattern and a second calibration using a random pattern; and a second electronic device. The second electronic device includes: a signal processor configured to process reception data transmitted from the first electronic device; a pattern generator configured to generate pattern data for a second calibration; a resynchronization point generator configured to generate resynchronization point data during a second calibration period to recover the noisy clock signal; and a calibration actuator configured to perform a second calibration using the received data, the pattern data, and the resynchronization point data.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of Korean Patent Application No. 10-2023-0151503, filed on November 6, 2023, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety for all purposes. Technical Field

[0003] The following description relates to an electronic device and a calibration method thereof for performing calibration before transmitting real data between different electronic devices. Background Art

[0004] Various protocols are being used and developed for communication between different electronic devices. C-PHY is one such protocol. C-PHY is an interface designed to achieve high data throughput in environments with limited data transfer speeds, making it particularly suitable for mobile applications.

[0005] The C-PHY supports a calibration function. Both the first electronic device (transmitter) and the second electronic device (receiver) should support the calibration function. When the first electronic device transmits data for calibration to the second electronic device, the second electronic device performs calibration.

[0006] The calibration process involves finding an appropriate delay value for a delay circuit within a clock recovery device of the second electronic device. Upon completion of the calibration, the delay step with the highest margin is selected from among all the delay steps of the delay circuit, thereby ensuring that the clock signal is properly generated in the clock recovery device.

[0007] Electronic devices perform preamble calibration before transmitting actual data. The preamble period defined in the C-PHY specification has a relatively simple pattern, resulting in relatively low jitter characteristics. Preamble calibration involves repeating a simple pattern of '3' or '1'. Therefore, even if an anomaly exists in the recovered clock signal after performing preamble calibration, the device can receive normal data after a certain period of time.

[0008] After performing preamble calibration, additional calibration can be performed using an alternative pattern, a random pattern, or a user-defined pattern. For reference, this specification specifies the pattern received by the second electronic device during the additional calibration period by selecting one of the alternative pattern, random pattern, or user-defined pattern, and the alternative pattern can also be specified as a PRBS9 pattern.

[0009] When performing such additional calibration, jitter characteristics may be introduced during the additional calibration period, which may cause the clock signal to be incorrectly generated and subsequently cause data to be incorrectly received. Generally, if the recovered clock signal is inaccurately generated during the additional calibration, recovering it is limited.

[0010] The above information is presented as background information only to assist with an understanding of the present disclosure. No determination has been made, and no assertion is made, as to whether any of the above might be applicable as prior art with respect to the present disclosure. Summary of the Invention

[0011] This summary is provided to introduce a series of concepts in a simplified form, which will be further described in the detailed description below. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0012] In one general aspect, an electronic device includes: a first electronic device including a signal generator configured to generate signals for a first calibration using a first pattern and a second calibration using a random pattern; and a second electronic device. The second electronic device includes: a signal processor configured to process received data transmitted from the first electronic device; a pattern generator configured to generate pattern data for the second calibration; a resynchronization point generator configured to generate resynchronization point data to recover a noisy clock signal during the second calibration; and a calibration executor configured to perform the second calibration using the received data, the pattern data, and the resynchronization point data.

[0013] When the random pattern is received, the second electronic device may perform the second calibration after performing the first calibration.

[0014] The second electronic device may further include: a clock recoverer configured to receive the first signal to the third signal from the first electronic device and recover the clock signal using the final calibration value received from the calibration executor; and a data recoverer configured to receive the first signal to the third signal from the first electronic device, receive the recovered clock signal from the clock recoverer, and output a delayed first received signal, a delayed second received signal, and a delayed third received signal.

[0015] The electronic device may further include a storage unit configured to store resynchronization point data, wherein the resynchronization point data includes two consecutive sets of PRBS9.

[0016] The calibration executor may perform a first-order calibration of the second calibration using the reception data and the pattern data, and perform a second-order calibration of the second calibration using the reception data and the resynchronization point data.

[0017] The calibration executor may include: a comparison unit configured to compare received data with pattern data; a resynchronization execution unit configured to, when data synchronization does not match as a result of the comparison, perform a resynchronization process using the received data and resynchronization point data to search for a resynchronization point; and a calibration logic unit configured to, when the resynchronization process is completed, continue to perform a second calibration starting from the point at which the resynchronization process was completed.

[0018] The calibration executor may provide matching resynchronization point data to the pattern generator in response to completing the resynchronization process.

[0019] In response to the resynchronization execution unit not completing the resynchronization process, the calibration logic unit may perform the resynchronization process again after changing the delay step size of the delay circuit in the clock recovery.

[0020] The calibration executor may perform a resynchronization process on all delay steps of the delay circuit in the clock recovery included in the second calibration period.

[0021] The first electronic device and the second electronic device may be configured to execute a data transmission mode and a calibration execution mode. The data transmission mode and the calibration execution mode may be set by the second electronic device.

[0022] In another general aspect, an electronic device includes a first electronic device and a second electronic device. The second electronic device performs an alternative calibration upon receiving a random pattern from the first electronic device after performing preamble calibration. In the alternative calibration, in response to a synchronization mismatch between received data transmitted from the first electronic device and pattern data generated by the second electronic device, the second electronic device performs a resynchronization process using resynchronization point data generated at the resynchronization point and the received data to search for a resynchronization point.

[0023] In response to completing the resynchronization process, alternative calibration may continue.

[0024] In response to completing the resynchronization process, the second electronic device may perform uploading of the matching resynchronization point data.

[0025] The resynchronization process may be performed for all delay steps during the alternate calibration period.

[0026] In response to the resynchronization process not being completed at a predetermined delay step during the resynchronization process, the delay step may be changed to a next delay step and then the resynchronization process may be performed again.

[0027] In response to a synchronization match between the received data and the pattern data, a resynchronization process may not be performed.

[0028] In another general aspect, a calibration method for an electronic device includes: performing preamble calibration using a first electronic device and a second electronic device; after performing the preamble calibration, checking a random pattern from the first electronic device using the second electronic device; performing an alternative calibration in response to the random pattern being confirmed; checking for the occurrence of a noisy clock signal during the alternative calibration; performing a resynchronization process to restore the alternative calibration to normal in response to the occurrence of the noisy clock signal; and continuing to perform the alternative calibration in response to completing the resynchronization process.

[0029] Performing the substitute calibration may include comparing data synchronization between reception data transmitted from the first electronic device and pattern data of the second electronic device; and continuing to perform the substitute calibration if the data synchronization matches as a result of the comparison.

[0030] Performing the resynchronization process may include comparing reception data transmitted from the first electronic device with pre-generated resynchronization point data; and completing the resynchronization process if the data synchronization matches as a result of the comparison.

[0031] The calibration method may include: changing a delay step size in response to a data synchronization mismatch; searching for a resynchronization point at the changed delay step size; and performing a resynchronization process again using the searched resynchronization point.

[0032] Other features and aspects will be apparent from the following detailed description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 A timing diagram illustrating the operation of recovering the clock signal during a calibration period is shown.

[0034] Figure 2 A timing diagram illustrating the operation of an anomalous or noisy clock signal during a calibration period relevant to the present disclosure is shown.

[0035] Figure 3 A block diagram is shown for explaining an electronic device for calibration according to an example of the present disclosure.

[0036] Figure 4 Shows the display Figure 3 Block diagram of the calibration actuator.

[0037] Figure 5 A flowchart illustrating a process of displaying an operation mode between a first electronic device and a second electronic device is shown.

[0038] Figure 6 A flow chart showing a process for recovering a clock signal in the event of an anomalous or noisy clock signal occurring during performance of additional calibration in accordance with the present disclosure is shown.

[0039] Figure 7 and Figure 8 A timing diagram is shown during an alternative calibration process according to an example of the present disclosure.

[0040] Figure 9 A timing diagram is shown that illustrates a resynchronization process in the event of an anomalous or noisy clock when performing an alternative calibration, according to an example of the present disclosure.

[0041] Throughout the drawings and detailed description, like reference numerals refer to like elements. The drawings may not be to scale, and the relative sizes, proportions, and depictions of elements in the drawings may be exaggerated for clarity, illustration, and convenience. DETAILED DESCRIPTION

[0042] Hereinafter, although examples of the present disclosure will be described in detail with reference to the accompanying drawings, it should be noted that the examples are not limited to the same.

[0043] The following detailed description is provided to help the reader gain a comprehensive understanding of the methods, devices and / or systems described herein. However, after understanding the present disclosure, various changes, modifications and equivalents of the methods, devices and / or systems described herein will be apparent. For example, the order of operations described herein is merely an example and is not limited to those described herein, but as will be apparent after understanding the present disclosure, can be changed except for operations that must appear in a specific order. In addition, for increased clarity and brevity, descriptions of features known in the art may be omitted.

[0044] The features described herein may be embodied in different forms and should not be construed as being limited to the examples described herein. Rather, the examples described herein have been provided merely to illustrate some of the many possible ways to implement the methods, devices, and / or systems described herein, which will be apparent after understanding this disclosure.

[0045] Throughout the specification, when an element such as a layer, a region, or a substrate is described as being “on,” “connected to,” or “coupled to” another element, it may be directly “on,” “connected to,” or “coupled to” the other element, or one or more other elements may be present therebetween. In contrast, when an element is described as being “directly on,” “directly connected to,” or “directly coupled to” another element, there may be no other elements therebetween.

[0046] As used herein, the term "and / or" includes any one and any combination of any two or more of the associated listed items; similarly, "at least one of" includes any one and any combination of any two or more of the associated listed items.

[0047] Although terms such as "first," "second," and "third" may be used herein to describe various components, parts, regions, layers, or sections, these components, parts, regions, layers, or sections are not limited by these terms. Rather, these terms are used only to distinguish one component, part, region, layer, or section from another component, part, region, layer, or section. Thus, without departing from the teachings of the present examples, a first component, a first part, a first region, a first layer, or a first section mentioned in the examples described herein may also be referred to as a second component, a second part, a second region, a second layer, or a second section.

[0048] In order to facilitate the description of the relationship of one element to another element as shown in the figures, spatially relative terms such as "above", "upper", "below", "lower", etc. may be used herein. In addition to the orientations depicted in the figures, such spatially relative terms are also intended to include different orientations of the device in use or operation. For example, if the device in the figure is turned over, an element described as "above" or "upper" relative to another element will then be "below" or "lower" relative to the other element. Therefore, depending on the spatial orientation of the device, the term "above" includes both the orientations of "above" and "below". The device can also be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially relative terms used herein will be interpreted accordingly.

[0049] The terms used herein are only used to describe various examples and are not used to limit the present disclosure. The articles "a", "an" and "the" are also intended to include plural forms unless the context clearly indicates otherwise. The terms "comprise", "include", and "have" specify the presence of the stated features, numbers, operations, components, elements and / or combinations thereof, but do not exclude the presence or addition of one or more other features, numbers, operations, components, elements and / or combinations thereof.

[0050] Due to manufacturing techniques and / or tolerances, variations in the shapes shown in the drawings may occur. Therefore, the examples described herein are not limited to the specific shapes shown in the drawings but include variations in shapes that occur during manufacturing.

[0051] Herein, it should be noted that with respect to examples, for example, with respect to what an example may include or implement, the use of the term “may” means that there is at least one example that includes or implements such feature, and all examples are not limited thereto.

[0052] The features of the examples described herein may be combined in various ways, as will be apparent after understanding the present disclosure. In addition, although the examples described herein have multiple configurations, other configurations are possible, as will be apparent after understanding the present disclosure.

[0053] Terms such as "part" or "portion" used herein to indicate a portion mean that the component can represent a device that can include a specific function, software that can include a specific function, or a combination of a device and software that can include a specific function, but is not necessarily limited to the functions expressed. This is provided only to help more generally understand one or more examples herein. A person of ordinary skill in the art to which one or more examples belong can make various modifications and changes based on these descriptions.

[0054] In addition, it should be noted that all electrical signals used herein are examples, and when an inverter or the like is additionally provided in the circuit according to one or more embodiments, the signs of all electrical signals to be described below may be reversed. Therefore, the scope of the present embodiment is not limited to the direction of the signal.

[0055] Figure 1 A timing diagram illustrating the operation of recovering the clock signal during a calibration period is shown.

[0056] Reference Figure 1 , illustrates that the second electronic device (receiver) generates a recovered clock (RCLK) signal based on received signals S12, S23, and S31 and a reset signal. The first rising edge of the recovered clock (RCLK) occurs in response to a transition in received signal S12 (t1), and the first falling edge occurs in response to the reset signal (t3). The pulse width PW1 of the recovered clock (RCLK) is related to the eye-opening region included in the data reception period.

[0057] The first falling edge occurring after the first rising edge of the recovered clock (RCLK) is generated using a delay circuit that is typically used to recover a clock signal from the received signal S12 , S23 , S31 .

[0058] Figure 2 A timing diagram illustrating the operation of an anomalous or noisy clock signal during a calibration period relevant to the present disclosure is shown.

[0059] After performing preamble calibration, a more complex pattern, such as a random pattern instead of a simple pattern, may be received during an alternative calibration period.

[0060] Then, jitter elements such as channel fading or inter-symbol interference (ISI) may be added during the alternative calibration period. Figure 1Compared to reference Figure 2 Assuming that the next reception signal S23 is received at time t3-1, an abnormal second rising edge of the recovery clock (RCLK) may be generated at time t3-1 due to delays caused by jitter and other factors. Subsequently, the problem of the second electronic device (receiver) incorrectly receiving data occurs.

[0061] Figure 3 A block diagram is shown for explaining an electronic device for calibration according to an example of the present disclosure.

[0062] Reference Figure 3 , an electronic device according to the present disclosure may include a first electronic device 100 and a second electronic device 200. The first electronic device 100 is a transmitter, which may be an application processor (AP).

[0063] The second electronic device 200 is a receiver, which may be an integrated circuit (IC).

[0064] The first electronic device 100 may include a signal generator 110 , a first transmitter 120 , a second transmitter 130 , and a third transmitter 140 .

[0065] The signal generator 110 may generate first data and second data. The first data may be data for preamble calibration. The second data may be data for performing additional calibration using a substitution pattern, a random pattern, or a user-defined pattern.

[0066] The first transmitter 120, the second transmitter 130, and the third transmitter 140 can be connected to the first signal line SL1, the second signal line SL2, and the third signal line SL3 via the first transmission terminal 121, the second transmission terminal 131, and the third transmission terminal 141, respectively. The first transmitter 120, the second transmitter 130, and the third transmitter 140 can transmit signals based on one of various communication protocols. For example, the first transmitter 120, the second transmitter 130, and the third transmitter 140 can transmit signals based on the C-PHY protocol established during the Mobile Industry Processor Interface (MIPI) era.

[0067] The first electronic device 100 can transmit signals to the second electronic device 200 via the first signal line SL1, the second signal line SL2, and the third signal line SL3. The first signal line SL1, the second signal line SL2, and the third signal line SL3 form a channel and can transmit signals associated with each other, for example, signals that transition (or switch) in association with each other. Although the example shows the formation of a single channel, it should be understood that the first electronic device 100 and the second electronic device 200 can communicate via two or more channels.

[0068] The second electronic device 200 can receive signals through the first signal line SL1, the second signal line SL2, and the third signal line SL3. The second electronic device 200 can be configured to include a first receiver 210, a second receiver 220, a third receiver 230, a data recovery device 240, a clock recovery device 242, a signal processor 244, a pattern generator 246, a resynchronization point generator 248, a storage unit 249, and a calibration executor 250.

[0069] The first receiver 210 , the second receiver 220 , and the third receiver 230 may receive signals from the first signal line SL1 , the second signal line SL2 , and the third signal line SL3 through the first receiving terminal 211 , the second receiving terminal 221 , and the third receiving terminal 231 , respectively.

[0070] The first receiver 210 may output the difference between the signal received from the first receiving terminal 211 via the first signal line SL1 and the signal received from the second receiving terminal 221 via the second signal line SL2 as a first signal S1. The second receiver 220 may output the difference between the signal received from the second receiving terminal 221 via the second signal line SL2 and the signal received from the third receiving terminal 231 via the third signal line SL3 as a second signal S2. The third receiver 230 may output the difference between the signal received from the third receiving terminal 231 via the third signal line SL3 and the signal received from the first receiving terminal 211 via the first signal line SL1 as a third signal S3.

[0071] The clock recovery device 242 may receive the first signal S1, the second signal S2, the third signal S3, and the final calibration value, and may recover the clock signal CLK using the final calibration value to receive real data.

[0072] The data recovery device 240 may receive the first signal S1, the second signal S2, the third signal S3, and the clock signal CLK. The data recovery device 240 may then latch the delayed first signal DS1, the delayed second signal DS2, and the delayed third signal DS3 synchronized with the clock signal CLK, and output the latched results as the delayed first reception signal RS1, the delayed second reception signal RS2, and the delayed third reception signal RS3.

[0073] After receiving the delayed first reception signal RS1, the delayed second reception signal RS2, the delayed third reception signal RS3 and the clock signal CLK, the signal processor 244 may operate in response to the delayed first reception signal RS1, the delayed second reception signal RS2 and the delayed third reception signal RS3. The signal processed by the signal processor 244 is provided as reception data (i.e., recovered data) to the calibration executor 250.

[0074] The pattern generator 246 may receive the clock signal CLK recovered by the clock recovery unit 242. After performing the preamble calibration, the pattern generator 246 may generate pattern data for performing additional calibration. The pattern generator 246 may transmit the pattern data to the calibration executor 250. The additional calibration may involve an alternative calibration or a user-defined calibration. The alternative calibration is referred to as a pseudo-random binary sequence (PRBS).

[0075] If a data transmission failure occurs due to an abnormal or noisy clock signal while performing additional calibration, the resynchronization point generator 248 may generate resynchronization point data to continue performing the additional calibration. A resynchronization process may be desired to continue the additional calibration, and for this resynchronization process, the resynchronization point generator 248 provides the resynchronization point data to the calibration executor 250. During the resynchronization process, a comparison is performed between the resynchronization point data and the recovered data, and even during this resynchronization process, the pattern generator 246 may continue to provide pattern data to the calibration executor 250.

[0076] Once the resynchronization process is complete, the calibration executor 250 may provide the pattern generator 246 with matching resynchronization point data obtained from the resynchronization point data received from the resynchronization point generator 248. Thus, the second electronic device 200 may monitor the data transmitted by the first electronic device 100 using the resynchronization point data and, if the data is successfully received, proceed to perform additional calibration.

[0077] In addition, information about the generated resynchronization point data may be stored in the storage unit 249 , such as a nonvolatile memory.

[0078] When the second electronic device 200 becomes able to successfully receive data, the calibration executor 250 may perform additional calibration. The calibration executor 250 may receive the reception data (recovery data) from the signal processor 244, the pattern data from the pattern generator 246, and the resynchronization point data from the resynchronization point generator 248.

[0079] Figure 4 Shows the display Figure 3 A block diagram of the calibration executor 250 is shown.

[0080] Reference Figure 4 The calibration executor 250 may include a comparison unit 252 , a resynchronization execution unit 254 , and a calibration logic unit 256 .

[0081] Comparison unit 252 can compare the recovered data with the pattern data. The comparison result can indicate whether the data synchronization matches. Based on the comparison result, a data pass signal or a data fail signal can be transmitted to calibration logic unit 256. If the data synchronization does not match and the data fail signal is present, comparison unit 252 sends a resynchronization request signal to resynchronization execution unit 254.

[0082] The resynchronization execution unit 254 may receive the restored data and the resynchronization point data. If the restored data and the pattern data are out of sync due to an abnormal or noisy clock signal during the additional calibration, the resynchronization execution unit 254 may perform a resynchronization process using the restored data and the pre-stored resynchronization point data according to a resynchronization request signal. The resynchronization request signal is generated based on the comparison result of the comparison unit 252.

[0083] When performing alternative calibration according to the present disclosure, one or more PRBS9 data sequences may be used as resynchronization point data. The resynchronization point data may be defined by one or more consecutive sets of PRBS9 data for resynchronization accuracy and may be stored in a storage unit 249, such as a non-volatile memory or register. Depending on the properties of the storage unit 249, multiple resynchronization points may be varied to store the resynchronization point data.

[0084] The resynchronization process of the resynchronization execution unit 254 may involve moving from the corresponding delay step where the abnormal or noisy clock signal occurred to the next delay step (e.g., the second delay step) and comparing the recovered data with the resynchronization point data. If the resynchronization process is not performed during the second delay step, the resynchronization process may continue by moving to the next delay step (e.g., the third delay step) and performing the resynchronization process. Even during this resynchronization process, the pattern generator 246 may transmit the pattern data to the calibration executor 250.

[0085] When the resynchronization process is complete, the calibration executor 250 may upload the matching resynchronization point data to the pattern generator 246 .

[0086] When the resynchronization process is completed, the resynchronization execution unit 254 transmits a resynchronization completion signal to the comparison unit 252 , and the comparison unit 252 starts comparing the restored data with the pattern data.

[0087] The calibration logic unit 256 may receive a resynchronization pass / fail signal based on the resynchronization process result from the resynchronization execution unit 254. If the calibration logic unit 256 receives the resynchronization pass signal, it determines that normal data can be received in the corresponding delay step and continues to perform additional calibration.

[0088] On the other hand, if the calibration logic unit 256 receives a resynchronization failure signal, it determines that normal data cannot be received in the corresponding delay step, so it moves to the next delay step and performs the resynchronization process again.

[0089] According to the present disclosure, the performance modes between the first electronic device 100 and the second electronic device 200 can be classified into the following four modes:

[0090] ① First mode: normal data transmission mode (calibration not performed mode).

[0091] ② Second mode: preamble calibration mode (calibration execution mode).

[0092] ③The third mode: alternative calibration mode (calibration execution mode).

[0093] ④Fourth mode: User-defined calibration mode (calibration execution mode).

[0094] The sequence for each of the four performance modes is configured as follows.

[0095] The normal data transmission mode, the first mode, consists of “preamble '3'+sync word+data.” The normal data transmission mode does not perform calibration and may be a mode for transmitting data only.

[0096] The preamble calibration pattern, the second pattern, consists of "calibration preamble '1' + sync word + data". The second pattern performs calibration using a simple pattern of repeated '1'.

[0097] On the other hand, the alternative calibration mode (third mode) or the user-defined calibration mode (fourth mode) is a calibration mode using a random pattern that may be relevant to the present disclosure. The sequence of the alternative calibration mode may be "calibration preamble '1' + alternative calibration + synchronization word + data", and the sequence of the user-defined calibration mode may be "calibration preamble '1' + user-defined calibration + synchronization word + data".

[0098] According to the present disclosure, after performing preamble calibration, additional calibration is performed using an alternative sequence (third mode) or a user-defined sequence (fourth mode). The alternative sequence or user-defined sequence allows for successful calibration by resolving issues caused by abnormal or noisy clock signals, which may occur due to random patterns rather than simple patterns.

[0099] The calibration execution mode can be set by the first electronic device 100 as a transmitter, but can also be set by the second electronic device 200 as a receiver. In other words, the second electronic device 200 can allow only preamble calibration or additional calibration in addition to preamble calibration.

[0100] Figure 5 A flowchart illustrating a process of displaying an operation mode between a first electronic device and a second electronic device is shown.

[0101] In the first electronic device 100 and the second electronic device 200, the second electronic device 200 may set an operation mode (S100). Before the operation mode starts, the second electronic device 200 may be configured to operate a normal data transmission mode or a calibration execution mode.

[0102] In the operation mode, when the normal data transmission mode is set (S102), the device can receive the '3' symbol and receive real data (S104, S300).

[0103] On the other hand, when the calibration execution mode is set (S110), preamble calibration can be performed (S112). Subsequently, the second electronic device 200 determines whether mode information for performing additional calibration, such as an alternative sequence or a user-defined sequence, is transmitted after performing preamble calibration (S114). As a result of the determination, if it is determined that such mode information has not been received (No in S114), the second electronic device 200 can continue the process of receiving real data (S300).

[0104] During the determination process, if an alternative sequence or a user-defined sequence is detected, additional calibration may be performed (S116). While performing the additional calibration, it may be desirable to continuously monitor for the occurrence of an abnormal or noisy clock signal (S118). During the additional calibration, if no abnormal or noisy clock signal occurs (No in S118), the process of receiving real data is performed after the additional calibration (S120, S122, S124, S126, S300) is completed.

[0105] However, when an abnormal or noisy clock signal occurs during the determination process (Yes in S118), it is impossible to receive real data, and therefore, it is impossible to perform additional calibration, so a resynchronization process may be performed, which is a process of returning to a normal calibration process (S200). In this example, real data can be received only after the resynchronization process is completed. Figure 6 As shown, restoration to the normal calibration process is achieved through the resynchronization process of the present disclosure.

[0106] Figure 6 A flow chart showing recovery to a normal calibration process in the event of an abnormal or noisy clock signal occurring during execution of additional calibration according to the present disclosure is shown. After performing preamble calibration, if an alternative sequence or a user-defined sequence is detected, the second electronic device 200 performs additional calibration (S116).

[0107] During the execution of the additional calibration, the calibration executor 250 of the second electronic device 200 determines whether the clock signal is abnormally generated. The abnormal or noisy clock signal may include an example of synchronization mismatch between the recovery data transmitted by the first electronic device 100 and the pattern data of the second electronic device 200.

[0108] If, according to the judgment process, no abnormal or noisy clock signal is present (No in S118), additional calibration is continued as described above (S120), and when the additional calibration is completed (S122), real data can be received (S300). On the other hand, if an abnormal or noisy clock signal is present (Yes in S118), a resynchronization process is performed according to the resynchronization request (S214).

[0109] The resynchronization process may be a process in which the resynchronization execution unit 254 resynchronizes the restored data with the resynchronization point data. The resynchronization process changes the delay step other than the delay step in which the current mismatch of data synchronization occurs, moves to the next delay step (e.g., the second delay step), and then executes (S216). Subsequently, a process of comparing the resynchronization point data with the restored data received from the first electronic device 100 to search for a resynchronization point is executed (S218).

[0110] Based on the comparison process, when it is determined that the data synchronization between the recovered data and the resynchronization point data matches (yes in S220), it is determined that data can be received normally from this point on, and the additional calibration is continued (S120). The additional calibration can be performed for all delay steps included in the calibration period. All delay steps in the delay step are delay values ​​of the delay circuit present in the clock recovery device 242 of the second electronic device 200. When the execution of the additional calibration is completed (S122), a suitable calibration value is determined therein (S124). After all calibration processes are completed (S126), the final calibration value determined above is used to receive real data (S300).

[0111] However, if the data synchronization does not match during the resynchronization process (No in S220), the resynchronization at the corresponding delay step is considered to have failed. Therefore, the delay step is changed and the process moves to the next delay step (S216).

[0112] The subsequent resynchronization process involves comparing the restored data received from the first electronic device 100 with the resynchronization point data mentioned above, and depending on whether the data synchronization matches, continuing the calibration, or performing the resynchronization process again in the next delay step.

[0113] Figure 7 and Figure 8A timing diagram is shown during an alternative calibration process according to an example of the present disclosure. Figure 7 The synchronization between the transmitted data (TX side) and the received data (RX side) is shown. Figure 8 It shows a case where the synchronization between the transmitted data (TX side) and the received data (RX side) does not match.

[0114] like Figure 7 As shown, when the clock signal is generated normally, the synchronization between the transmitted data and the received data matches, and calibration can be performed normally. Figure 8 As shown, when an abnormal or noisy clock signal appears at time T1, the synchronization between the transmitted data and the received data does not match. Therefore, after the start of time T1, it can be determined that all received data are erroneous.

[0115] Figure 9 A timing diagram is shown that illustrates a resynchronization process in the event of an anomalous or noisy clock when performing an alternative calibration, according to an example of the present disclosure.

[0116] Reference Figure 9 At time T1, by comparing the recovered data with the pattern data, it is possible to detect that an abnormal or noisy clock signal has occurred at time T1, and resynchronization is performed to initiate the resynchronization process. When the resynchronization process is executed, the delay step size is changed, and then a resynchronization point is searched for at the changed delay step size. For example, starting at time T2, an adjacent resynchronization point is searched for by comparing the resynchronization point data with the recovered data.

[0117] If according to the resynchronization process, for example at point T3, the received recovery data matches the resynchronization point data, it is determined that data can be received normally from then on, and additional calibration is continued.

[0118] Therefore, it can be seen that when data is not received due to an abnormal or noisy clock signal occurring during an alternative calibration after performing preamble calibration, the present disclosure can normally receive data through a resynchronization process.

[0119] An object of the present disclosure is to provide an electronic device for calibration and a calibration method thereof to restore a clock signal abnormally generated during an alternative calibration period.

[0120] According to the present disclosure, after preamble code calibration is performed between the first electronic device and the second electronic device, due to the emergence of a random pattern, during the performance of an alternative calibration, even if an abnormal clock signal occurs, the clock signal can be recovered through a resynchronization process, which has the effect of preventing the problem of not being able to receive data.

[0121] Although the present disclosure includes specific examples, it will be apparent after understanding the disclosure of this application that various changes in form and detail can be made in these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein are to be considered illustrative only and not for purposes of limitation. The description of features or aspects in each example should be considered applicable to similar features or aspects in other examples. Suitable results can be obtained if the described techniques are performed in a different order, and / or if components in the described systems, architectures, devices, or circuits are combined in different ways, and / or replaced or supplemented by other components or their equivalents. Therefore, the scope of the present disclosure is defined not by the specific embodiments but by the claims and their equivalents, and all changes within the scope of the claims and their equivalents should be interpreted as being included in the present disclosure.

Claims

1. An electronic device, comprising: a first electronic device comprising a signal generator configured to generate signals for a first calibration using a first pattern and a second calibration using a random pattern; as well as The second electronic device comprises: a signal processor configured to process received data transmitted from the first electronic device; a pattern generator configured to generate pattern data for the second calibration; a resynchronization point generator configured to generate resynchronization point data to recover a noisy clock signal during a second calibration period; and A calibration executor is configured to perform the second calibration using the received data, the pattern data and the resynchronization point data.

2. The electronic device according to claim 1, in, The second electronic device performs the second calibration after performing the first calibration in response to receiving the random pattern.

3. The electronic device according to claim 1, in, The second electronic device further includes: a clock recovery device configured to: receive the first signal to the third signal from the first electronic device, and recover the clock signal using the final calibration value received from the calibration executor; and A data recovery device, the data recovery device being configured to: receive the first signal to the third signal from the first electronic device, receive the recovered clock signal from the clock recovery device, and output a delayed first received signal, a delayed second received signal, and a delayed third received signal.

4. The electronic device according to claim 1, further comprising: a storage unit configured to store the resynchronization point data, The resynchronization point data includes two consecutive sets of PRBS9.

5. The electronic device according to claim 1, in, The calibration executor performs a first-order calibration of the second calibration using the reception data and the pattern data, and performs a second-order calibration of the second calibration using the reception data and the resynchronization point data.

6. The electronic device according to claim 1, in, The calibration actuator comprises: a comparing unit configured to compare the received data with the pattern data; a resynchronization execution unit configured to: when data synchronization does not match as a result of the comparison, perform a resynchronization process using the received data and the resynchronization point data to search for a resynchronization point; and A calibration logic unit is configured to: when the resynchronization process is completed, continue to perform the second calibration from the point where the resynchronization process is completed.

7. The electronic device according to claim 6, in, The calibration executor provides matching resynchronization point data to the pattern generator in response to completion of the resynchronization process.

8. The electronic device according to claim 6, in, In response to the resynchronization execution unit not completing the resynchronization process, the calibration logic unit performs the resynchronization process again after changing a delay step size of a delay circuit in the clock recovery.

9. The electronic device according to claim 1, in, The calibration executor performs the resynchronization process on all delay steps of the delay circuit in the clock recovery included in a second calibration period.

10. The electronic device according to claim 1, in, The first electronic device and the second electronic device are configured to execute a data transmission mode and a calibration execution mode, and The data transmission mode and the calibration execution mode are set by the second electronic device.

11. An electronic device comprising: a first electronic device and a second electronic device, wherein the second electronic device performs an alternative calibration upon receiving a random pattern from the first electronic device after performing preamble calibration; Wherein, in the alternative calibration, in response to a synchronization mismatch between received data transmitted from the first electronic device and pattern data generated by the second electronic device, in order to search for a resynchronization point, the second electronic device performs a resynchronization process using the resynchronization point data generated at the resynchronization point and the received data.

12. The electronic device according to claim 11, in, Responsive to the resynchronization process being completed, the alternative calibration is continued.

13. The electronic device according to claim 11, in, In response to the resynchronization process being completed, the second electronic device executes uploading of matching resynchronization point data.

14. The electronic device according to claim 11, in, The resynchronization process is performed for all delay steps during the alternate calibration period.

15. The electronic device according to claim 11, in, In response to the resynchronization process not being completed at a predetermined delay step during the resynchronization process, the delay step is changed to a next delay step, and then the resynchronization process is performed again.

16. The electronic device according to claim 11, in, In response to a synchronization match between the received data and the pattern data, the resynchronization process is not performed.

17. A calibration method for an electronic device, comprising: performing preamble calibration using the first electronic device and the second electronic device; After performing the preamble calibration, checking a random pattern from the first electronic device using the second electronic device; performing an alternative calibration in response to the random pattern being identified; checking for the presence of a noisy clock signal during said alternative calibration; performing a resynchronization process to restore the alternative calibration to normal in response to the noisy clock signal occurring; as well as The substitute calibration is continued in response to the resynchronization process being completed.

18. The calibration method according to claim 17, in, Performing the alternative calibration comprises: comparing data synchronization between reception data transmitted from the first electronic device and mode data of the second electronic device; and If the data synchronously match as a result of the comparison, the alternative calibration is continued.

19. The calibration method according to claim 17, in, Executing the resynchronization process includes: comparing the received data transmitted from the first electronic device with pre-generated resynchronization point data; and If the data synchronization matches as a result of the comparison, the resynchronization process is completed.

20. The calibration method according to claim 19, further comprising: changing a delay step size in response to the data synchronization mismatch; Searching for a resynchronization point at the changed delay step; as well as The resynchronization process is performed again using the searched resynchronization point.

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