Interleaving method and communication device

Abstract

The invention provides an interleaving method applied to channel coding and a communication device, bits in a first bit sequence to be interleaved are divided into X groups based on the fact that the number R and X of energy levels contained in a modulation symbol are smaller than or equal to R, and then bit interleaving and modulation are carried out on the first bit sequence based on the X groups. Qm bits contained in each modulation symbol are from X groups of the first bit sequence, at least two bits in the Qm bits are from the same group of the X groups, and the relative positions of the at least two bits in the first bit sequence before interleaving and the second bit sequence after interleaving are not changed, the hardware complexity of interleaving can be reduced on the premise of keeping the interleaving performance basically unchanged.

Description

Technical Field

[0001] The present application relates to the field of channel coding, and more specifically, to an interleaving method in channel coding and a related communication device. Background Art

[0002] Low density parity check (LDPC) is a channel coding scheme that is very close to the Shannon limit. It has the characteristics of good performance and low complexity. It has been identified by the 3rd generation partnership project (3GPP) as the data channel coding scheme for the 5th generation (5G) mobile networks.

[0003] In order to improve the decoding performance, LDPC currently generally uses row-column bit interleaving to map the LDPC system bits to the high-energy level bits of quadrature amplitude modulation (QAM), thereby protecting the LDPC system bits. By using row-column interleaving, even if the final decoding of LDPC cannot achieve the correctness of the overall coded bits, the correctness of the information bits can be improved. However, the hardware implementation process of the row-column interleaving process is complex, and in high-throughput scenarios, it will seriously affect the overall decoding rate and become a bottleneck for the system decoding throughput. Summary of the invention

[0004] The present application provides an interleaving method and a communication device, which can reduce the hardware complexity of interleaving while keeping the interleaving performance basically unchanged.

[0005] In a first aspect, an interleaving method is provided, the method comprising: obtaining a first bit sequence to be interleaved, the first bit sequence comprising X groups, X being less than or equal to R, R being the number of energy levels contained in a modulation symbol, and X and R being positive integers; performing bit interleaving on the first bit sequence to obtain a second bit sequence; mapping bits in the second bit sequence to quadrature amplitude modulation (QAM) symbols, each QAM symbol comprising Q m bits, the Q m bits come from the X groups, the Q m At least two bits among the X bits are from the same group of the X groups, and the relative positions of the at least two bits in the first bit sequence and the second bit sequence remain unchanged; and the QAM symbol is output.

[0006] In the technical solution of the present application, the bits in the first bit sequence to be interleaved are divided into X groups based on the number R of energy levels contained in the modulation symbol, the first bit sequence is bit interleaved based on the X groups, and the interleaved second bit sequence is mapped to the QAM symbol. m bits come from X groups of the first bit sequence, and the Q m At least two bits among the X bits come from the same group of the X groups, and the relative positions of the at least two bits in the first bit sequence before interleaving and the second bit sequence after interleaving remain unchanged, which can reduce the hardware complexity of interleaving while keeping the interleaving performance basically unchanged.

[0007] In certain implementations of the first aspect, the Q m At least two bits of the Q bits are from the same group of the X groups, including: m Two bits of the bits are from the same group of the X groups, and the two bits correspond to two bit positions of the same energy level in the QAM symbol.

[0008] This implementation method makes little change to the existing row-column interleaving scheme, and the scheme improvement is simple. The complexity of the improved interleaving scheme can be reduced by half compared with the row-column interleaving. For example, the system quantization bit width (hereinafter referred to as system bit width) is reduced by half.

[0009] In certain implementations of the first aspect, X=2, the Q m At least two bits of the Q bits are from the same group of the X groups, including: m Two of the bits are from the first of the X groups, and the Q m The remaining Q m -2 bits are from a second group of the X groups, the two bits of the first group corresponding to the two bit positions with the lowest energy level in the QAM symbol.

[0010] This implementation can greatly reduce the complexity of interleaving, while the interleaving performance remains basically unchanged.

[0011] In certain implementations of the first aspect, X=2, the Q m At least two bits of the Q bits are from the same group of the X groups, including: m A bits of the bits are from the first group of the X groups, and the Q m The remaining Q m - A bits are from a second group of the X groups, the A bits of the first group corresponding to the first A bit positions in the QAM symbol in order from low to high energy.

[0012] This implementation method can reduce the complexity of interleaving and make the interleaving performance more stable.

[0013] In certain implementations of the first aspect, before interleaving the first bit sequence to obtain a second bit sequence, the method further includes: determining A; interleaving the first bit sequence to obtain a second bit sequence, including: when A is equal to or greater than 1, performing the bit interleaving on the first bit sequence to obtain the second bit sequence.

[0014] In a second aspect, a deinterleaving method is provided, the method comprising: obtaining a QAM symbol to be demodulated; demodulating the QAM symbol to obtain a first information sequence; deinterleaving the first information sequence to obtain a second information sequence, wherein the LLR information in the second information sequence includes X groups, each QAM symbol includes Q m LLR information, the Q m LLR information comes from X groups of the second information sequence, and the Q m At least two LLR information among the LLR information are from the same group among the X groups, the relative positions of the at least two LLR information in the first information sequence and the second information sequence remain unchanged, X is less than or equal to R, R is the number of energy levels contained in a modulation symbol, and X and R are both positive integers; and outputting the second information sequence.

[0015] The beneficial technical effects of the method of the second aspect can be referred to the description of the first aspect and will not be elaborated here.

[0016] In certain implementations of the second aspect, the Q m At least two LLR information in the LLR information are from the same group in the X groups, including: m Two pieces of LLR information in the LLR information come from the same group in the X groups, and the two pieces of LLR information correspond to two bit positions with the same energy level in the QAM symbol.

[0017] In the implementation of the second aspect, those skilled in the art should understand that the bits (which may include systematic bits and check bits) sent by the encoding device are embodied as LLR information at the decoding device. m The LLR information can correspond to the Q contained in the QAM symbol. m bit positions, and each LLR information indicates the probability that the bit at the corresponding bit position is 0 or 1. This description is also applicable to other implementations of the second aspect, and will not be repeated below.

[0018] In certain implementations of the second aspect, X=2, the Q m At least two of the LLR information in the X groups are from the same group of the X groups, including: m Two of the LLR information are from the first group of the X groups, and the Q m The remaining Q in the LLR information m -2 LLR information are from the second group of the X groups, and the two LLR information of the first group correspond to the two bit positions with the lowest energy level in the QAM symbol.

[0019] In certain implementations of the second aspect, X=2, the Q m At least two of the LLR information in the X groups are from the same group of the X groups, including: m A of the LLR information are from the first group of the X groups, and the Q m The remaining Q in the LLR information m - A LLR information comes from the second group of the X groups, and the A LLR information of the first group corresponds to the first A bit positions in the QAM symbol in order from low to high energy.

[0020] In certain implementations of the second aspect, before deinterleaving the first information sequence to obtain the second information sequence, the method further includes: determining A; deinterleaving the first information sequence to obtain the second information sequence includes: when A is equal to or greater than 1, deinterleaving the first information sequence to obtain the second information sequence.

[0021] In certain implementations of the first aspect or the second aspect, A is determined according to a code rate.

[0022] In this implementation, the value of A can be calculated first, and then bit interleaving can be performed when the value of A is greater than or equal to 1. Interleaving or not can be flexibly selected based on different transmission parameters (such as code rate, or the transmission ratio of the core matrix and the extended matrix, etc.), and the interleaving complexity and the interleaving requirements of different transmission scenarios can be taken into account.

[0023] In one example, A is determined according to the following formula: A = round ((1-bit rate) × Q m ), round represents the rounding function.

[0024] In certain implementations of the first aspect or the second aspect, A is determined according to a sending ratio of a core matrix and an extended matrix.

[0025] In one example, A is determined according to the following formula:

[0026] A = round (number of columns of the extended matrix / (number of columns sent by the core matrix + number of columns sent by the extended matrix) × Q m ), round represents the rounding function.

[0027] In a third aspect, a communication device is provided, wherein the communication device has the function of implementing the method of the first aspect or the second aspect, or the method in any possible implementation of the first aspect or the second aspect. The function can be implemented by hardware, or can be implemented by hardware executing corresponding software. The hardware or software includes one or more units corresponding to the above functions.

[0028] In a fourth aspect, the present application provides a communication device, comprising at least one processor, wherein the at least one processor is coupled to at least one memory, wherein the at least one memory is used to store a computer program or instruction, and the at least one processor is used to call and run the computer program or instruction from the at least one memory, so that the communication device executes the method in the first aspect or any possible implementation thereof, or executes the method in the second aspect or any possible implementation thereof.

[0029] In one example, the communication device described in the third aspect or the fourth aspect may be an encoding device or a decoding device.

[0030] In a fifth aspect, the present application provides a communication device, including a communication interface and a circuit, wherein the communication interface is used to receive a first bit sequence to be interleaved, and input the first bit sequence to the circuit; the circuit performs bit interleaving on the first bit sequence based on the interleaving method provided by the present application, and maps a second bit sequence obtained by bit interleaving to a QAM symbol; the communication interface is also used to output the modulated QAM symbol. Exemplarily, the communication device in the fifth aspect is a coding device

[0031] In a sixth aspect, a communication device is provided, comprising a communication interface and a circuit, wherein the communication interface is used to receive a QAM symbol to be demodulated and input the QAM symbol to the circuit; the circuit demodulates the QAM symbol based on the deinterleaving method provided in the present application to obtain a first information sequence, and deinterleaves the first information sequence to obtain a second information sequence; the communication interface is also used to output the second information sequence. Furthermore, the circuit can also be used to determine information bits based on the second information sequence; and the communication interface is also used to output the information bits. Exemplarily, the communication device of the sixth aspect is a decoding device.

[0032] In a seventh aspect, the present application provides a computer-readable storage medium, in which computer instructions are stored. When the computer instructions are executed on a computer, the method in the first aspect or any possible implementation thereof is implemented, or the method in the second aspect or any possible implementation thereof is implemented.

[0033] In an eighth aspect, the present application provides a computer program product, comprising a computer program code, which, when executed on a computer, enables the method in the first aspect or any possible implementation thereof to be implemented, or enables the method in the second aspect or any possible implementation thereof to be implemented.

[0034] In a ninth aspect, the present application provides a wireless communication system, comprising a communication device as in any one of aspects 3 to 6, such as an encoding device and / or a decoding device. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 This is an example of systematic bit protection for LDPC.

[0036] Figure 2 Schematic diagram of row-column interleaved reading and writing.

[0037] Figure 3 Schematic diagram of achieving row-column interleaving through memory splicing.

[0038] Figure 4 Schematic diagram of a system architecture applicable to an embodiment of the present application.

[0039] Figure 5 A schematic flow chart of the interleaving method and deinterleaving method provided in the present application.

[0040] Figure 6 A schematic diagram of the interleaving process of Example 1 provided in this application.

[0041] Figure 7 A schematic diagram of the interleaving process of Example 2 provided in this application.

[0042] Figure 8 A schematic diagram of the interleaving process of Example 3 provided in this application.

[0043] Fig. 9 This is a performance simulation comparison chart of the bit interleaving method and the row-column interleaving method provided in this application.

[0044] Fig.10 A schematic structural diagram of a communication device provided in this application.

[0045] Fig.11A schematic structural diagram of another communication device provided in this application.

[0046] Fig.12 A schematic structural diagram of yet another communication device provided in the present application. DETAILED DESCRIPTION

[0047] The technical solution in this application will be described below in conjunction with the accompanying drawings.

[0048] In order to facilitate understanding of the technical solutions provided by the present application, a brief introduction is given to the relevant technologies or concepts involved in the embodiments of the present application.

[0049] Quasi-cyclic low-density parity-check codes (QC-LDPC) are a type of structured LDPC whose check matrix can be decomposed into a z×z all-zero matrix and a cyclic shift matrix, where the cyclic shift matrix is ​​obtained by cyclically shifting the z×z identity matrix to the right. The matrix before expansion is called the basis matrix, and the tanner graph corresponding to the basis matrix is ​​called the basegraph (BG). The fifth generation (5G) LDPC defines two basegraphs, BG1 and BG2. The selection of BG1 and BG2 is based on the transport block (TB) and the target code rate of the first transmission. For a given lifting size z, the expansion can obtain the check matrix.

[0050] Quadrature amplitude modulation (QAM) is a high-order modulation. A QAM symbol can carry multiple bits of information. For example, a 64QAM symbol carries 6 bits of information. A 128QAM symbol carries 8 bits of information. The higher the modulation order of QAM, the more bits can be transmitted by a symbol. In high-order modulation, the reliability of the bits carried by a QAM symbol is different, or the energy of the bits is different. For example, a 256QAM symbol can contain 8 bits, of which the first two bits have the highest energy and reliability, the third and fourth bits have the second highest reliability, and the fifth and sixth bits have even lower reliability.

[0051] Figure 1This is an example of systematic bit protection for LDPC. The purpose of information bit protection for LPDC is to map the systematic bits of LDPC to the bit positions of high energy levels of QAM symbols. For example, the information length of LDPC is 8448, and the transmission length is 12672, which is an LDPC with a code rate of 2 / 3. In the coding protocol of the new radio (NR), BG1 coding is used, and the selected lifting size is 384, so there are 22 information columns, each of which includes 384 bits. The NR protocol stipulates that the first two columns are punctured, so the number of check columns should be 12672 / 3840-(22-2)=13 columns, such as Figure 1 As shown in Figure 1. The core check column includes 4 columns, and the extended check column includes 9 columns. These 13 columns are used as the check columns of the LDPC. After the first two columns are punctured and not sent, there are 20 columns left for the system bit, plus 13 check columns, resulting in 33 columns for transmission. The column indexes of these 33 transmission columns are as follows: Figure 1 3 to 35. 22 information columns / 33 transmission columns = 2 / 3, which is the code rate of this LDPC.

[0052] In addition, 5G stipulates that rate matching is performed after LDPC encoding to obtain the transmission sequence, which usually needs to be bit interleaved. Bit interleaving is to scramble the bit order after rate matching in order to combat burst interference. After interleaving, the original burst interference may become a random single interference, which is conducive to decoding. In the modulation mode using high-order modulation, the effect of interleaving is more obvious.

[0053] The most commonly used interleaving method is row-column interleaving, which rearranges the bit order by writing rows and reading columns. Assume that the transmission sequence obtained after rate matching is represented as e, and the sequence obtained after interleaving is recorded as sequence f. If row-column interleaving is used, the relationship between sequence f and sequence e can be as follows:

[0054]

[0055] Among them, E represents the transmission length, Q m represents the number of bits contained in each modulation symbol, j represents the index of the QAM symbol, and i represents the index of the bit position contained in each QAM symbol. For a bit sequence with a transmission length of E, the number of QAM symbols is E / Q m Therefore, the value of j ranges from 0 to E / Q m -1. If the number of bits contained in a QAM symbol is Q m , then the value of i ranges from 0 to Q m -1.

[0056] The relationship between sequence e and sequence f shows that the position index in sequence e is i·E / Qm +j bits, after bit interleaving, have position index i+j·Q in sequence f. m .

[0057] Based on the above introduction, we can know that if Q m =6, then there are 3 energy levels. According to the relationship formula between the transmitted sequence e and the interleaved sequence f, it can be seen that the 3rd to 13th columns of the system bits are mapped to the 1st and 2nd bit positions of the QAM symbol, which are the two bit positions with the highest energy; the 14th to 24th columns of the system bits are mapped to the 3rd and 4th bit positions of the QAM symbol, which are the two bit positions with the second highest energy; the 3rd and 4th columns of the core check column and all the columns of the extended check column, that is, the 25th to 35th columns are mapped to the 5th and 6th bit positions of the QAM symbol, which are the two bit positions with the lowest energy. In other words, the 1st bit position of each QAM symbol is a bit from the first 192 bits from the 3rd to 8th columns, and the 2nd bit position is a bit from the 193rd to 13th bits from the 8th column. The 3rd bit position of each QAM symbol is a bit from the first 192 bits in columns 14 to 19, and the 4th bit position is a bit from the 193rd bit in column 19 to a bit in column 24. The 5th bit position of each QAM symbol is a bit from the first 192 bits in columns 25 to 30, and the 6th bit position is a bit from the 193rd bit in column 30 to a bit in column 35.

[0058] Figure 2 This is a schematic diagram of row-column interleaved reading and writing. Figure 2 , when the transmitter performs interleaving, it writes row by row in the order of address 0, address 1, address 2, ..., address 7. Then read out by column, specifically, first read the bit at the first bit position of each address, then read the bit at the second bit position of each address, and so on. It can be seen that the transmitter writes 8 bits and reads 1 bit when interleaving. The read and write method of row and column interleaving seems simple, but in fact there is no memory that can support such an operation. When the receiver performs deinterleaving, it has 8 log-likelihood ratio (LLR) inputs and 1 LLR output, which will inhibit the speed of deinterleaving and thus affect the overall decoding rate. The throughput bottleneck of the decoder may shift from decoding to deinterleaving, especially in ultra-high throughput scenarios. In addition, high-order modulation methods make the deinterleaving process more complicated and become a system bottleneck. If you want to increase the speed of deinterleaving, you need to consume a lot of hardware resources. For example, if you want to support 8-bit writing and 8-bit reading in parallel, you need to expand the bit width of the memory, such as Figure 3 .

[0059] Figure 3 The figure is a schematic diagram of realizing row-column interleaving by splicing memories. For example, by splicing 8 memories together, 8-bit writing and 8-bit reading can be achieved. However, this method will greatly increase the hardware cost. For example, if 24 LLRs need to be read and written in parallel, assuming that each LLR has a quantization bit width of 8 bits, a total bit width of 24×8×8=1536 bits is required, and the hardware cost is very high.

[0060] Based on the above technical status, the present application provides an interleaving method, a deinterleaving method and a corresponding communication device in channel coding, so as to reduce the complexity of bit interleaving while keeping the interleaving performance basically unchanged.

[0061] Figure 4 Schematic diagram of a system architecture applicable to an embodiment of the present application. Figure 4 The system architecture may include an encoding device and a decoding device. The encoding device is not limited to one or more, and the decoding device is not limited to one or more. Exemplarily, one of the encoding device and the decoding device may be a network device, and the other may be a terminal device.

[0062] The terminal device in the embodiment of the present application includes various communication kits (communication kits) with wireless communication functions, which may include, for example, antennas, power supply templates, cables, and wireless fidelity (WiFi) modules, etc.), handheld devices, vehicle-mounted devices, or other processing devices connected to a wireless modem, and may specifically refer to user equipment (UE), users, access terminals, user units, user stations, mobile stations, mobile stations, remote stations, remote terminals, mobile devices, user terminals, terminals, wireless communication devices, user agents, user devices, wireless modems, machine type communication devices, or other processing devices connected to wireless modems. It may also be a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, a wireless terminal in industrial control, a terminal in self-driving, a terminal in remote medical, a terminal in smart grid, a terminal in transportation safety, a terminal in smart city, a terminal in smart home, or a terminal device in a future communication network. Of course, the terminal device in this application may also refer to a chip, a modem, a system on a chip (SoC) that is mainly responsible for related communication functions in the device, or a communication platform that may include a radio frequency (RF) part, etc.

[0063] The network device in the embodiment of the present application may include, but is not limited to: a next-generation base station (gNodeB, gNB) in a fifth-generation (5th generation, 5G) communication system, a base station in a sixth-generation (6th generation, 6G) mobile communication system, a base station in a future mobile communication system, an access point (AP) in a wireless fidelity (WiFi) system, a wireless relay node, a wireless backhaul node, a transmission point (TP) or a transmission reception point (TRP), an evolved node B (evolved node B, eNB) in a long-term evolution (LTE) system, a network device in a non-terrestrial network (NTN) communication system, etc. The network device may also be one or a group (i.e., multiple) antenna panels of a base station. In addition, the network device may also be a network node constituting a gNB or TP, such as a baseband unit (BBU), a centralized unit (CU), a distributed unit (DU), or a radio unit (RU). Alternatively, the network device may also be a device-to-device (D2D) communication system, a machine-to-machine (M2M) communication system, an Internet of Things (IoT), an Internet of Vehicles communication system, or a device that performs network-side functions in other communication systems, without limitation.

[0064] In the embodiments of the present application, the device for realizing the terminal function may be a terminal, or a device capable of supporting the terminal to realize the corresponding function, such as a chip (or a chip system) or a circuit, which may be installed in the terminal. In addition, the device for realizing the function of a network device may be a network device, or a device capable of supporting the network device to realize the corresponding function, such as a chip (or a chip system) or a circuit, which may be installed in the network device. Optionally, the chip system may include a chip, or include a chip and other discrete devices.

[0065] exist Figure 4 In the system architecture shown, in uplink communication, the encoding device is a terminal device and the decoding device is a network device. In downlink communication, the encoding device is a network device and the decoding device is a terminal device.

[0066] Figure 5A schematic flow chart of the interleaving method and deinterleaving method provided in the present application. Among them, steps 510 to 540 in method 500 can be performed by an encoding device, or by a device (such as a chip, a chip system or a circuit, etc.) applied to the encoding device; steps 550 to 580 can be performed by a decoding device, or by a device (such as a chip, a chip system or a circuit, etc.) applied to the decoding device. The following is an illustration of the encoding device and the decoding device as examples.

[0067] In addition, the technical solution of the present application can be applied to the QAM modulation method, but it is also applicable to some other modulation methods. For example, pulse amplitude modulation (PAM), phase shift keying (PSK) modulation, etc. The following first introduces the application of the technical solution of the present application in QAM modulation, and then introduces the application in other modulation methods.

[0068] 510. The encoding device obtains a first bit sequence to be interleaved, where the first bit sequence includes X groups, where X is less than or equal to R (X≤R), where R is the number of energy levels included in a modulation symbol, and both X and R are positive integers.

[0069] As introduced above, in high-order modulation, the energy of the bits contained in a modulation symbol is different. In QAM modulation, there are two bits with the same energy. For example, in QAM64, the energy of the first bit position and the second bit position is the same, the energy of the third bit position and the fourth bit position is the same, and the energy of the fifth bit position and the sixth bit position is the same. Therefore, it can be said that the bits contained in a modulation symbol of QAM64 correspond to three energy levels. In some other modulation methods, the energy of each bit in a modulation symbol may be different. For example, the energy of each bit contained in a symbol in PAM modulation is different. For another example, in PSK modulation, depending on the number of PSK modulation constellations, there can be two or one bit of one energy level.

[0070] In the present application, the bits in the first bit sequence can be divided into X groups, and X can be equal to or less than the number R of energy levels contained in a modulation symbol. For example, for QAM64, a modulation symbol contains 6 bits, which are divided into 3 energy levels, and the bits in the first bit sequence can be divided into three groups, or less than three groups. In one example, every two bits of the same energy level can be grouped together, so that they can be divided into three groups. In another example, the two bits with the lowest energy level can be grouped together, and the 4 bits corresponding to the remaining two energy levels can be grouped together, for a total of two groups. Corresponding to QAM 32, a modulation symbol contains 5 bits, the two bits with the lowest energy level can be grouped together, and the remaining 3 bits can be grouped together, for a total of two groups.

[0071] Examples 2 to 4 below will provide some specific methods for grouping the first bit sequence, as described below for details.

[0072] 520. The encoding device performs bit interleaving on the first bit sequence to obtain a second bit sequence.

[0073] Based on the X groups included in the first bit sequence, bit interleaving is performed on the first bit sequence to obtain a second bit sequence.

[0074] 530. The encoding device maps the bits in the second bit sequence to QAM symbols, each QAM symbol including Q m bits, the Q m bits come from X groups, the Q m At least two bits among the X bits are from the same group of the X groups, and the relative positions of the at least two bits in the first bit sequence and the second bit sequence remain unchanged.

[0075] According to the above Figure 2 As shown in the row-column interleaving diagram, in the row-column interleaving, the bit sequence to be interleaved is actually divided into Q m groups, each group occupies 1 bit in any modulation symbol. For example, the length of the bit sequence to be interleaved is 16, and the indexes corresponding to the bit positions are 0 to 15 (or 1 to 16, and the following explanation is based on the indexes 0 to 15). Assuming QAM16 is used, then Q m =4. According to the row-column interleaving rule, the 16 bits are divided into 4 groups, and each modulation symbol contains one bit from each of the 4 groups. For example, modulation symbol 1: bit position 1, bit position 5, bit position 9, and bit position 13. Modulation symbol 2: bit position 2, bit position 6, bit position 10, and bit position 14. Modulation symbol 3: bit position 3, bit position 7, bit position 11, and bit position 15. Modulation symbol 4: bit position 4, bit position 8, bit position 12, and bit position 16.

[0076] In the embodiment of the present application, QAM16 is also used. According to the principle of X≤R, it is assumed that the first bit sequence to be interleaved is divided into two groups, that is, X=R=2, and each modulation symbol continues to contain two 2 bits, but at least two bits in each modulation symbol come from the same group of the two groups. For example, each modulation symbol contains 4 bits, of which two bits come from the first group and the other two bits come from the second group. For example, modulation symbol 1: bit position 1, bit position 2, bit position 9 and bit position 10. Modulation symbol 2: bit position 3, bit position 4, bit position 11 and bit position 12. Modulation symbol 3: bit position 5, bit position 6, bit position 13 and bit position 4. Modulation symbol 4: bit position 7, bit position 8, bit position 15 and bit position 16.

[0077] It can be seen that the Q contained in a modulation symbol m At least two bits among the X bits are from the same group of the X groups. Furthermore, the relative positions of the at least two bits from the same group in the first bit sequence and the second bit sequence remain unchanged.

[0078] It should be noted that the relative positions of the at least two bits in the first bit sequence or the second bit sequence refer to the relative positions of the at least two bits with respect to each other, rather than the relative positions of the at least two bits in the first bit sequence or the second bit sequence. Continuing with the above example, for example, the two bits corresponding to bit position 1 and bit position 2 contained in modulation symbol 1 come from the same group, and the bits of these two bit positions are always located before bit position 2 in the first bit sequence before interleaving or in the second bit sequence after interleaving, and the relative position remains unchanged. Similarly, the two bits corresponding to bit position 9 and bit position 10 in modulation symbol 1 come from the same group, and in the first bit sequence before interleaving or in the second bit sequence after interleaving, bit position 9 is always located before bit position 10, and the relative position remains unchanged.

[0079] In fact, a modulation symbol contains Q m At least two bits of the X bits come from the same group of the X groups, and the relative positions of the at least two bits in the first bit sequence and the second bit sequence remain unchanged, which means that the order of the at least two bits is not disrupted during the interleaving, or the at least two bits are bundled together as a whole during the interleaving process, and the whole does not change in the first bit sequence before the interleaving and the second bit sequence after the interleaving, or the at least two bits are not interleaved internally. This can reduce the hardware complexity of bit interleaving.

[0080] 540. The encoding device outputs QAM symbols.

[0081] After the encoding device completes bit interleaving and modulation, it outputs the modulated QAM symbols.

[0082] 550. The decoding device obtains the QAM symbol to be demodulated.

[0083] 560. The decoding device demodulates the QAM symbol to obtain a first information sequence.

[0084] The first information sequence is a sequence of LLR information obtained after demodulation, wherein each LLR information represents the probability that the bit at the corresponding bit position is 0 or 1.

[0085] 570. The decoding device deinterleaves the first information sequence to obtain a second information sequence.

[0086] The second information sequence is a sequence of LLR information.

[0087] 580. The decoding device outputs a second information sequence.

[0088] Steps 540 to 580 describe the process of demodulation and deinterleaving. In addition, the decoding device can also determine the information bits according to the second information sequence to complete decoding.

[0089] The LLR information in the second information sequence includes X groups, and each QAM symbol contains Q m LLR information, the Q m LLR information comes from X groups of the second information sequence, and the Q m At least two LLR information among the LLR information come from the same group among the X groups, and the relative positions of the at least two LLR information in the first information sequence and the second information sequence remain unchanged, X is less than or equal to R (X≤R), R is the number of energy levels contained in a modulation symbol, and X and R are both positive integers.

[0090] In steps 550 to 580, the demodulation and deinterleaving processes performed by the decoding device are respectively the inverse processes of the modulation and interleaving performed by the encoding device, and the principle is the same as that of the encoding device. At the decoding device end, the LLR information obtained after demodulating the QAM symbol corresponds to the bits at the encoding device end, specifically including the system bits and the check bits. Based on the description of the encoding device side, those skilled in the art can know how to demodulate and deinterleave at the decoding device side, which will not be described in detail.

[0091] Based on the above description of the technical solution, it can be known that in the technical solution of the present application, the complexity of bit interleaving can be reduced by grouping the bit sequence to be interleaved based on the number of energy levels contained in the modulation symbol and performing bit interleaving on the basis of the grouping. Moreover, according to the performance simulation, it can be known that the interleaving method of the present application can ensure that the performance of bit interleaving remains basically unchanged. In other words, the complexity of interleaving is reduced without reducing the performance of bit interleaving.

[0092] Several specific examples of applying the technical solution provided by this application in QAM modulation are given below.

[0093] In the following example, it is assumed that the I path and Q path in the QAM symbol each contain q bits, so each QAM symbol contains 2q bits, Q m =2q, q is a positive integer. Every two bits of the 2q bits will be mapped to two bit positions with the same energy on the QAM symbol.

[0094] Example 1

[0095] The two bits mapped to the same energy level in the first bit sequence to be interleaved are bundled together for bit interleaving. The first bit sequence is divided into X=Q m / 2 groups.

[0096] Specifically, after the modulation order is determined, the number of bits Q that can be contained in a modulation symbol is m It is known that the energy of every two bit positions in a QAM symbol is the same, so the Q bits belonging to a modulation symbol in the first bit sequence are m The bits are divided into groups of two bits each, so that the Q m bits will be divided into Q m / 2 groups. The groups with the same index of all modulation symbols are one group, so X = Q m / 2 groups. Therefore, in Example 1, the first bit sequence is divided into X groups, X = Q m / 2.

[0097] For example, the bit interleaving algorithm of Example 1 may be as follows:

[0098]

[0099] In this algorithm, E represents the length of the first bit sequence, Q mrepresents the number of bits contained in each modulation symbol, e represents the first bit sequence before interleaving, and f represents the second bit sequence obtained after interleaving. j represents the index of the QAM symbol, and i represents the position index of the bit contained in each QAM symbol. For the first bit sequence of length E, the number of QAM symbols is E / Q m Therefore, the value of j ranges from 0 to E / Q m -1. If the number of bits contained in a QAM symbol is Q m , then the value of i ranges from 0 to Q m -1.

[0100] It can be seen that in Example 1, during the bit interleaving process, every two adjacent bits in the first bit sequence are bundled together. For example, given a value of j, the position index in sequence e is i·2·E / Q m +j·2 and the position index is The two bit positions of are adjacent. After the bits at these two bit positions are interleaved, they are located at positions indexed as i·2+j·Q in sequence f. m The sum position index is i·2+1+j·Q m The two adjacent bit positions of , and the relative positions of the bits at these two bit positions in sequence 2 and sequence f also remain unchanged.

[0101] Compared with the interleaving method in the prior art, in the bit interleaving method provided in Example 1, if the number of bits contained in a QAM symbol is Q m , while in QAM modulation, Q m bits correspond to Q m / 2 energy levels, each energy level corresponds to 2 bits. The first bit sequence is mapped to this Q m The two bits of each energy level of / 2 energy levels are bundled together, so the first bit sequence is divided into X=Q m / 2 groups. Compared with the row-column interleaving method, the bit sequence to be interleaved is divided into Q m The groups are evenly interleaved. The grouping method of the first bit sequence in Example 1 reduces the number of groups into which the first bit sequence is divided by half.

[0102] Figure 6 Schematic diagram of the bit interleaving process of Example 1 provided in this application. Assuming that 24 LLRs are read and written, and the quantization bit width of each LLR is 8 bits, the bit interleaving scheme of Example 1 is adopted, and the required system bit width is 24×4×8=768 bits. Compared with Figure 3 The row-column interleaving shown in reduces the system bit width by half.

[0103] Example 2

[0104] The two bits to be mapped to the lowest energy level in the first bit sequence to be interleaved are bundled together, and the remaining bits are bundled together for bit interleaving. The first bit sequence is divided into two groups, ie, X=2.

[0105] Specifically, after the modulation order is determined, the number of bits Q that can be contained in a modulation symbol is m It is known that the energy of every two bit positions in a QAM symbol is the same. Therefore, the Q bits belonging to a modulation symbol in the first bit sequence are m The two bits corresponding to the lowest energy among the bits are divided into a group, and the remaining Q m -2 bits are divided into a group. In this way, each modulation symbol contains Q m bits will be divided into two groups. The group of two bits corresponding to the lowest energy of all modulation symbols is regarded as one group, and the other group of all modulation symbols is regarded as one group, and X=2 groups will be obtained. Therefore, in Example 2, the first bit sequence is divided into X groups, X=2.

[0106] For example, the bit interleaving algorithm of Example 2 may be as follows:

[0107]

[0108] In this algorithm, the meaning of each letter is as described in Example 1 and will not be repeated here.

[0109] In Example 2, two bits corresponding to the lowest energy level in the sequence to be interleaved are bundled together, and the remaining bits are bundled together for bit interleaving.

[0110] If a QAM symbol contains Q bits m , and Q m bits correspond to Q m / 2 energy levels, each energy level corresponds to 2 bits. m The / 2 energy levels include a lowest energy level, and the two bits with the lowest energy level in the first bit sequence are grouped together, and the other bits are grouped together. Therefore, in Example 2, the first bit sequence is divided into two groups, X=2.

[0111] Figure 7 Schematic diagram of the bit interleaving process of Example 2 provided in this application. Assuming that 24 LLRs are read and written, and the quantization bit width of each LLR is 8 bits, the system bit width required by Example 2 is 24×2×8=384 bits. Figure 3 The row-column interleaving shown in can reduce the system bit width. Moreover, compared with the method of Example 1, the system bit width is further reduced.

[0112] Example 3

[0113] The first A bits of the first bit sequence to be interleaved are bundled together in order of energy from low to high, and the other bits are bundled together for bit interleaving. The first bit sequence is divided into two groups, X=2.

[0114] Specifically, after the modulation order is determined, the number of bits Q that can be contained in a modulation symbol is m First, calculate A and convert the Q of a modulation symbol in the first bit sequence into m The first A bits in the order of energy from low to high are divided into a group, and the remaining Q bits in the modulation symbol are m -A bits are divided into a group so that each modulation symbol contains Q m bits are divided into two groups. The group where the A bits of all modulation symbols belong is one group, and the other group where all modulation symbols belong is another group, and X=2 groups will be obtained. Therefore, in Example 3, the first bit sequence is divided into X groups, X=2.

[0115] In one example, the value of A can be selected according to the bit rate.

[0116] For example, A is determined according to the following formula (1):

[0117] A=round((1-bit rate)•Q m ) (1)

[0118] Among them, round represents a rounding function. Optionally, round can also be replaced by a ceil function or a floor function. The ceil function is an upward rounding function, and the floor function is a downward rounding function.

[0119] Figure 8 Schematic diagram of the bit interleaving process of Example 3 provided in this application. Figure 8 , taking QAM64 as an example, Q m =6, assuming the code rate is 1 / 2, the information bit length K = 8448, then the information column is 22 columns, and the total number of columns sent is 44. The information column sends 20 columns, plus 4 core check columns, which is 24 columns. Therefore, the extended check column is 20 columns. Substituting into the above formula (1), A = round (1-1 / 2) · 6 = 3. The first 3 bits in the first bit sequence in order from low to high energy are bundled together into a group, and the other bits are bundled together into a group. In this example, the first 3 bits in order from low to high energy are a group, and the remaining Q m- A = 6 - 3 = 3 bits form a group. The group containing the 3 bits with lower energy in the first bit sequence forms one group, and the remaining groups form another group, thereby dividing the first bit sequence into two groups.

[0120] For example, the algorithm for example 3-bit interleaving can be as follows:

[0121]

[0122]

[0123] In Example 3, assuming that 24 LLRs are read and written, and the quantization bit width of each LLR is 8 bits, the required system bit width is 24×2×8=384 bits. Figure 3 The row-column interleaving shown in can reduce the system bit width. Compared with the above example 2, the interleaving is more flexible and has better interleaving performance.

[0124] Example 4

[0125] The first A bits of the first bit sequence to be interleaved are bundled together in order of energy from low to high, and the other bits are bundled together for bit interleaving. The first bit sequence is divided into two groups, X=2.

[0126] In Example 4, the process of dividing the first bit sequence into X groups is the same as that in Example 3, and is not described in detail. The difference is that the value of A can be selected according to the transmission ratio of the core matrix and the extended matrix.

[0127] For example, A is determined according to the following formula (2):

[0128] A = round ((number of columns in the extended matrix / (number of columns sent by the core matrix + number of columns sent by the extended matrix) · Q m ) (2)

[0129] The core matrix in LDPC includes columns corresponding to the systematic bits and core check bits, and the extended matrix is ​​the column corresponding to the raptor codes. In 5G LDPC, the biggest difference between the extended matrix and the core matrix is ​​that the column degree of the extended check bits corresponding to the extended matrix is ​​1, that is, the column corresponding to the base graph has only one check node.

[0130] Among them, round represents a rounding function. Optionally, round can also be replaced by a ceil function or a floor function.

[0131] The bit interleaving algorithm in Example 4 is the same as that in Example 3 and will not be described here. The difference is that A represents a different meaning. If the solution of Example 4 is adopted, similarly, if the quantization bit width of each LLR is 8 bits, the required system bit width is 24×2×8=384 bits. It can be seen that compared with row-column interleaving, the system bit width can be reduced and the interleaving performance is better.

[0132] It should be noted that in Examples 3 and 4, the bits in the first bit sequence are divided into X groups, X=2, that is, divided into two groups. m A bits out of the 1 bits come from the first group, and the remaining (Q m -A) bits come from the second group. If A=0 in the above formula (1) or formula (2), it can be found that the first bit sequence will have only one group, which means that the first bit sequence will not be bit interleaved. Therefore, in Example 3 or Example 4, before bit interleaving, A is calculated according to formula (1) or formula (2), and when A is greater than or equal to 1 (or, not equal to 0), bit interleaving is performed. If the calculated result is A=0, it can be further determined that the first bit sequence will not be bit interleaved.

[0133] For the modulation modes of QAM32 and QAM128, the above-mentioned Examples 2, 3 and 4 are also fully applicable and compatible and will not be elaborated on again.

[0134] The above is an example of the application of the technical solution of the present application in QAM modulation. The following introduces the application in other modulation modes.

[0135] PAM modulation can be understood as a separate QAM modulation. For example, the joint modulation of two PAM8s on the I / Q paths is a QAM64 modulation. In one implementation, A can be calculated according to the method in Example 3 or Example 4 above to determine the grouping method of the first bit sequence, and then bit interleaving and mapping can be performed based on X groups. In another implementation, the bits in the first bit sequence can also be divided into two groups according to the method in Example 2 above, one group corresponding to the bits with the lowest energy, and the other group corresponding to bits with other energies. It should be noted that the difference between PAM and QAM is that in PAM, there is only one bit with the lowest energy in each symbol, while in QAM, there are two bits with the lowest energy in each symbol. Therefore, if the grouping method of Example 2 is applied to PAM, the first bit sequence is divided into two groups, one group is a bit with the lowest energy, and the other group is the remainder of other energies in the PAM symbol (Q m -1) bits.

[0136] For PSK modulation, one implementation is to calculate A according to the method in Example 3 or Example 4, determine the grouping method of the first bit sequence, and then perform bit interleaving and mapping. In another implementation, the first bit sequence may be divided into two groups according to the method in Example 2. However, in PSK modulation, due to the different number of PSK modulation constellations, the bits with the lowest energy may be one or two. Therefore, one possible grouping method is: one group contains the bit with the lowest energy, and the other group contains the remaining (Q m -1) bits. Another possible grouping is: one group contains the two bits with the lowest energy, and the other group contains the remaining (Q m -2) bits.

[0137] The above is a detailed description of the application of the technical solution provided by the present application in different high-order modulations. Compared with the "uniform interleaving" of row and column interleaving in the prior art, the bit interleaving method in the embodiment of the present application is no longer uniform interleaving, and the order of some bits in the first bit sequence to be interleaved is not disrupted during the interleaving process. Specifically, it can be achieved by the grouping method of the bits in the first bit sequence provided in the embodiment of the present application, thereby reducing the hardware complexity of the interleaving.

[0138] Fig. 9 This is a performance simulation comparison chart of the interleaving method provided in the present application and the interleaving method in the prior art. Fig. 9 The performance curves of "no interleaving", the "row-column interleaving" scheme of the prior art, and the interleaving scheme provided by the present application (such as the "simplified interleaving" in the legend) are shown. The simulation takes QAM64 and QAM256 as examples, and divides the bit sequence to be interleaved into two groups. For QAM64, one group is 4 bits and the other group is 2 bits. For QAM256, one group is 6 bits and the other group is 2 bits. It can be seen that compared with row-column interleaving, the simplified interleaving scheme of the present application, under the same signal-to-noise ratio (SNR), the block error rate (BLER) remains basically unchanged. However, compared with row-column interleaving, the simplified interleaving method provided by the present application has a lower hardware implementation complexity.

[0139] The interleaving method or deinterleaving method provided by the present application is described in detail above. The communication device provided by the present application is introduced below.

[0140] See also Fig.10 , the present application provides a communication device 1000.

[0141] The communication device 1000 may be a coding device, or a device applied to a coding device and capable of realizing the corresponding functions of the coding device in the embodiment of the method of the present application, such as a chip, a chip system or a circuit, etc. Alternatively, the communication device 1000 may be a decoding device, or a device applied to a decoding device and capable of realizing the corresponding functions of the decoding device in the embodiment of the method of the present application, such as a chip, a chip system or a circuit, etc.

[0142] Optionally, the communication device 1000 includes a processing module 1001, which can be a processor, a processing board, a processing unit, or a processing device. When the communication device 1000 is a coding device or a device applied to a coding device, the processing module 1001 is used to perform bit interleaving on the first bit sequence to be interleaved to obtain a second bit sequence, and to map the bits in the second bit sequence to a QAM symbol. The specific process can refer to the detailed description of the interleaving process in the method embodiment, which will not be repeated here. When the communication device 1000 is a decoding device or a device applied to a decoding device, the processing module 1001 is used to demodulate the QAM symbol to be demodulated to obtain a first information sequence, and to deinterleave the first information sequence to obtain a second information sequence. The specific process can refer to the description of the deinterleaving process in the method embodiment, which will not be repeated here.

[0143] Optionally, the communication device 1000 further includes a communication module 1002, which may also be referred to as a transceiver module, a transceiver, a transceiver, or a transceiver device, etc., for performing receiving (or inputting) and / or sending (or outputting) operations. For example, when the communication device 1000 is an encoding device or a device applied to an encoding device, the communication module 1002 may be used to obtain a first bit sequence to be interleaved, output modulated QAM symbols, etc. When the communication device 1000 is a decoding device or a device applied to a decoding device, the communication module 1002 may be used to obtain a QAM symbol to be demodulated, and output a second information sequence, etc.

[0144] In addition, it should be noted that the aforementioned communication module and / or processing module can be implemented by a virtual module, for example, the processing module can be implemented by a software function unit or a virtual device, and the communication module can be implemented by a software function or a virtual device. Alternatively, the processing module or the communication module can also be implemented by a physical device, for example, if the device is implemented using a chip / circuit (such as an integrated circuit or a logic circuit, etc.). The communication module can be an input-output circuit and / or a communication interface, performing input operations (corresponding to the aforementioned receiving operations) and output operations (corresponding to the aforementioned sending operations); the processing module is an integrated processor or microprocessor or circuit (such as an integrated circuit, a logic circuit, etc.).

[0145] The division of modules in this application is schematic and is only a logical function division. There may be other division methods in actual implementation. In addition, each functional module in each example of this application may be integrated into one processor, or may exist physically separately, or two or more modules may be integrated into one module. The above-mentioned integrated modules may be implemented in the form of hardware or in the form of software functional modules.

[0146] like Fig.11 The present application also provides a communication device 1100. The communication device 1100 includes at least one processor 1110, which implements the functions of the encoding device or decoding device described in the above method embodiments.

[0147] Optionally, the processor 1110 is coupled to a memory, and the memory may be located within the communication device, or the memory may be integrated with the processor, or the memory may be located outside the communication device. The communication device 1100 may also include at least one memory 1120. The memory 1120 stores the computer programs, instructions, or data necessary for implementing any of the above method embodiments; the processor 1110 may execute the computer programs, instructions, or data stored in the memory 1120 to complete the interleaving method or deinterleaving method of any of the above embodiments.

[0148] Optionally, the communication device 1100 may further include a communication interface 1130, and the communication device 1100 may exchange information with other devices through the communication interface 1130. Exemplarily, the communication interface 1130 may be a transceiver, circuit, bus, module, pin, or other types of interfaces.

[0149] The coupling in this application is an indirect coupling or communication connection between devices, units or modules, which can be electrical, mechanical or other forms, and is used for information exchange between devices, units or modules. The processor 1110 may cooperate with the memory 1120 and the communication interface 1130. The specific connection medium between the above-mentioned processor 1110, memory 1120 and communication interface 1130 is not limited in this application.

[0150] like Fig.12 , the present application also provides a chip (or chip system). The chip (or chip system) 30 may include a circuit 31 and an input / input interface 32. The circuit 31 may be a logic circuit, an integrated circuit, etc., and the input / output interface 32 may also be an input / output circuit, or an interface circuit, which can input information (or receive information) and output information (or send information). Optionally, the chip system may be composed of chips, or may include chips and other discrete devices. The chip 30 may be used to execute the methods performed by the encoding device or the decoding device in each embodiment of the present application.

[0151] In addition, the present application also provides a computer-readable storage medium, in which computer instructions are stored. When the computer instructions are run on a computer, the operations and / or processing performed by the encoding device or decoding device in each method embodiment of the present application are executed.

[0152] The present application also provides a computer program product, which includes computer program code or instructions. When the computer program code or instructions are run on a computer, the operations and / or processing performed by the encoding device or decoding device in the various method embodiments of the present application are executed.

[0153] In addition, the present application also provides a chip, the chip including a processor. A memory for storing a computer program is provided independently of the chip, and the processor is used to execute the computer program stored in the memory, so that the operation and / or processing performed by the encoding device or the decoding device in any method embodiment is executed.

[0154] Furthermore, the chip may further include a communication interface. The communication interface may be an input / output interface, or an interface circuit, etc. Furthermore, the chip may further include a memory.

[0155] The present application provides a communication system, including the encoding device and the decoding device in the above method embodiment.

[0156] In this application, the processor may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component, and may implement or execute the methods, steps, and logic block diagrams disclosed in this application. A general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of the method disclosed in this application may be directly embodied as being executed by a hardware processor, or may be executed by a combination of hardware and software modules in the processor.

[0157] The memory may be a non-volatile memory, such as a hard disk drive (HDD) or a solid-state drive (SSD), or a volatile memory, such as a random-access memory (RAM). The memory is any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory in the present application may also be a circuit or any other device that can realize a storage function, for storing program instructions and / or data.

[0158] The technical solution provided in this application can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in this application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a terminal device, an access network device or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, computer, server or data center to another website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (digital subscriber line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more available media integrated. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a digital video disc (DVD)), or a semiconductor medium, etc.

[0159] In the present application, under the premise of no logical contradiction, the examples may reference each other, for example, the methods and / or terms between method embodiments may reference each other, for example, the functions and / or terms between device embodiments may reference each other, for example, the functions and / or terms between device examples and method examples may reference each other.

[0160] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0161] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0162] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0163] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0164] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0165] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0166] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. An interleaving method, characterized in that: include: Obtain a first bit sequence to be interleaved, where the first bit sequence includes X groups, where X is less than or equal to R, where R is the number of energy levels included in a modulation symbol, and both X and R are positive integers; Performing bit interleaving on the first bit sequence to obtain a second bit sequence; The bits in the second bit sequence are mapped onto quadrature amplitude modulation (QAM) symbols, each of which contains Q m bits, the Q m bits come from the X groups, the Q m At least two bits of the X bits are from the same group of the X groups, and the relative positions of the at least two bits in the first bit sequence and the second bit sequence remain unchanged; Output modulated QAM symbols.

2. The method according to claim 1, characterized in that The Q m At least two of the bits are from the same group of the X groups, including: The Q m Two bits of the bits are from the same group of the X groups, and the two bits correspond to two bit positions of the same energy level in the QAM symbol.

3. The method according to claim 1, characterized in that X=2, Q m At least two of the bits are from the same group of the X groups, including: The Q m Two of the bits are from the first of the X groups, and the Q m The remaining Q m -2 bits are from a second group of the X groups, the two bits of the first group corresponding to the two bit positions with the lowest energy level in the QAM symbol.

4. The method according to claim 1, characterized in that: X=2, Q m At least two of the bits are from the same group of the X groups, including: The Q m A bits of the A bits are from the first group of the X groups, and the Q m The remaining Q m - A bits are from a second group of the X groups, the A bits of the first group corresponding to the first A bit positions in the QAM symbol in order from low to high energy.

5. The method according to claim 4, characterized in that Before interleaving the first bit sequence to obtain the second bit sequence, the method further includes: Determine said A; Interleaving the first bit sequence to obtain a second bit sequence includes: When A is equal to or greater than 1, the first bit sequence is bit interleaved to obtain the second bit sequence.

6. The method according to claim 4 or 5, characterized in that: The A is determined according to the code rate.

7. The method according to any one of claims 4 to 6, characterized in that The A is determined according to the following formula: A = round((1-bit rate) × Q m ), round represents the rounding function.

8. The method according to claim 6 or 7, characterized in that: The A is determined according to the sending ratio of the core matrix and the extended matrix.

9. The method according to claim 8, characterized in that The A is determined according to the following formula: A = round (number of columns of the extended matrix / (number of columns sent by the core matrix + number of columns sent by the extended matrix) × Q m ), round represents the rounding function.

10. A deinterleaving method, characterized in that: include: Obtain the QAM symbol to be demodulated; Demodulating the QAM symbol to obtain a first information sequence; Deinterleave the first information sequence to obtain a second information sequence, wherein the log-likelihood ratio (LLR) information in the second information sequence includes X groups, and each QAM symbol includes Q m LLR information, the Q m LLR information comes from X groups of the second information sequence, and the Q m At least two LLR information among the LLR information are from the same group among the X groups, and the relative positions of the at least two LLR information in the first information sequence and the second information sequence remain unchanged, X is less than or equal to R, R is the number of energy levels included in a modulation symbol, and X and R are both positive integers; Output the second information sequence.

11. The method according to claim 10, characterized in that The Q m At least two LLR information among the LLR information are from the same group among the X groups, including: The Q m Two pieces of LLR information in the LLR information come from the same group in the X groups, and the two pieces of LLR information correspond to two bit positions with the same energy level in the QAM symbol.

12. The method according to claim 10, characterized in that X=2, Q m At least two LLR information among the LLR information are from the same group of the X groups, including: The Q m Two of the LLR information are from the first group of the X groups, and the Q m The remaining Q in the LLR information m -2 LLR information are from the second group of the X groups, and the two LLR information of the first group correspond to the two bit positions with the lowest energy level in the QAM symbol.

13. The method according to claim 10, characterized in that X=2, Q m At least two LLR information among the LLR information are from the same group of the X groups, including: The Q m A of the LLR information are from the first group of the X groups, and the Q m The remaining Q in the LLR information m - A LLR information comes from the second group of the X groups, and the A LLR information of the first group corresponds to the first A bit positions in the QAM symbol in order from low to high energy.

14. The method according to claim 13, characterized in that Before deinterleaving the first information sequence to obtain the second information sequence, the method further includes: Determine said A; The deinterleaving the first information sequence to obtain a second information sequence includes: When A is equal to or greater than 1, the first information sequence is deinterleaved to obtain the second information sequence.

15. The method according to claim 13 or 14, characterized in that The A is determined according to the code rate.

16. The method according to any one of claims 13 to 15, characterized in that The A is determined according to the following formula: A = round((1-bit rate) × Q m ), round represents the rounding function.

17. The method according to claim 13 or 14, characterized in that The A is determined according to the sending ratio of the core matrix and the extended matrix.

18. The method according to claim 17, characterized in that The A is determined according to the following formula: A = round (number of columns of the extended matrix / (number of columns sent by the core matrix + number of columns sent by the extended matrix) × Q m ), round represents the rounding function.

19. A communication device, characterized in that: include: A communication module, configured to obtain a first bit sequence to be interleaved, wherein the first bit sequence includes X groups, where X is less than or equal to R, where R is the number of energy levels contained in a modulation symbol, and both X and R are positive integers; Processing modules for: Performing bit interleaving on the first bit sequence to obtain a second bit sequence; The bits in the second bit sequence are mapped onto quadrature amplitude modulation (QAM) symbols, each of which contains Q m bits, the Q m bits come from the X groups, the Q m At least two bits of the X bits are from the same group of the X groups, and the relative positions of the at least two bits in the first bit sequence and the second bit sequence remain unchanged; The communication module is also used to output the modulated QAM symbols.

20. A communication device, characterized in that: include: A communication module, used for obtaining QAM symbols to be demodulated; Processing modules for: Demodulating the QAM symbol to obtain a first information sequence; Deinterleave the first information sequence to obtain a second information sequence, wherein the LLR information in the second information sequence includes X groups, each QAM symbol contains Qn LLR information, the Qn LLR information comes from the X groups of the second information sequence, and the Q m At least two LLR information among the LLR information are from the same group among the X groups, and the relative positions of the at least two LLR information in the first information sequence and the second information sequence remain unchanged, X is less than or equal to R, R is the number of energy levels included in a modulation symbol, and X and R are both positive integers; The communication module is further used to output the second information sequence.

21. A communication device, characterized in that: It includes a communication interface and a circuit, wherein the communication interface is used to receive a first bit sequence to be interleaved and input the first bit sequence to the circuit; the circuit is used to execute the method as described in any one of claims 1 to 9, bit interleave the first bit sequence to obtain a second bit sequence, and map the second bit sequence to a QAM symbol; the communication interface is also used to output the modulated QAM symbol.

22. A communication device, characterized in that: It includes a communication interface and a circuit, wherein the communication interface is used to receive QAM symbols to be demodulated and input the QAM symbols to be demodulated to the circuit; the circuit is used to execute the method as described in any one of claims 10-18, demodulate the QAM symbols to be demodulated to obtain a first information sequence, and deinterleave the first information sequence to obtain a second information sequence; the communication interface is also used to output the second information sequence.

23. A communication device, characterized in that: The method comprises a module or a unit for executing the method according to any one of claims 1 to 18.

24. A communication device, characterized in that: include: A processor, the processor is coupled to the memory, and the processor is used to execute the computer program or instructions stored in the memory, so that the communication device performs the method according to any one of claims 1 to 18.

25. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions. When the computer instructions are executed on a computer, the method according to any one of claims 1 to 18 is implemented.

26. A wireless communication system, characterized in that: Comprising a communication device as claimed in claim 21 and claim 22.

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