Fast recovery diode chip and preparation method thereof

Abstract

The invention belongs to the technical field of diode chips, and particularly relates to a fast recovery diode chip and a preparation method thereof. According to the preparation method of the fast recovery diode chip, the first axial life control area is added below the P area and used for reducing the concentration of unbalanced carriers injected into the I area from the P area, and the purpose of reducing Irrm and ta is achieved. Besides, a second axial life control area is added above the back N area, the center of the injection area is selected as the junction of the N area and the I area, the proton irradiation processing effect at the junction is the best, the influence on the reverse recovery time of the device is the largest, and only the H + injection dosage at the junction needs to be adjusted through the process, so that the cost is reduced. Therefore, the reverse recovery time of the diode can be controlled, the tb is adjustable, and the self-definition degree of device characteristics is high.

Description

Technical Field

[0001] The invention belongs to the technical field of diode chips, and in particular relates to a fast recovery diode chip and a preparation method thereof. Background Art

[0002] PIN diode is a special type of diode, whose structure consists of three layers: P-type semiconductor, intrinsic semiconductor (I-type) and N-type semiconductor. PIN diode presents low impedance when forward biased and high impedance when reverse biased. This characteristic makes it widely used in microwave circuits and control circuits.

[0003] As a bipolar device, the minority carrier lifetime of the PIN diode has a significant impact on its reverse recovery characteristics. When forward conducting, the P and N regions of the PIN diode will move toward the intrinsic region (I region) (see Figure 1 ) injects a large number of unbalanced carriers (electrons and holes), which form stored charges in region I, producing a conductivity modulation effect, which reduces the forward voltage drop of the diode. When the diode switches from the forward conduction state to the reverse biased state, these stored unbalanced carriers need a certain amount of time to recombine or be swept out of region I. The minority carrier lifetime refers to the average time that unbalanced minority carriers exist in the semiconductor. In PIN diodes, the length of the minority carrier lifetime directly affects the speed of the reverse recovery process. If the minority carrier lifetime is short, then during the reverse recovery process, the stored unbalanced carriers can recombine or be swept out of region I faster, thereby reducing the reverse recovery time. On the contrary, if the minority carrier lifetime is long, then the stored unbalanced carriers take longer to recombine or be swept out of region I, resulting in an increase in the reverse recovery time.

[0004] The existing minority carrier lifetime control technologies are mainly based on Pt diffusion and electron irradiation, but as global lifetime control, each has its own defects. The PIN diode products using Pt diffusion technology have poor temperature coefficient of forward voltage drop, which is not conducive to the parallel operation of terminal modules. In addition, the diffusion concentration and diffusion depth of Pt diffusion technology itself are poorly controllable, and the individual performance of finished devices is prone to large differences.

[0005] However, the energy level defects formed by electron irradiation technology are too close to the bandgap center, and as a global lifetime control technology, the defects it forms are spread throughout the entire device, causing a significant increase in the reverse leakage current of the finished device. Especially under high temperature conditions, it will seriously affect the junction temperature characteristics of the PIN diode and reduce the reliability of the device. Therefore, devices prepared by electron irradiation perform poorly in the terminal application market. Summary of the invention

[0006] The object of the present invention is to provide a fast recovery diode chip and a preparation method thereof.

[0007] In a first aspect, the present application provides a method for preparing a fast recovery diode chip, comprising:

[0008] Step S1, oxidation and photolithography of the P-implantation region;

[0009] Step S2, P-type impurity ion implantation: implanting P-type ions into the active area and the terminal area;

[0010] Step S3, P-impurity pushing: placing the silicon wafer in a high-temperature diffusion furnace to push the P-type impurities, thereby forming a P-doped active region P region;

[0011] Step S4, proton irradiation processing: using a low-energy proton implanter to perform proton irradiation from the front of the device, and the implanted ions are H+;

[0012] Step S5, Pt diffusion processing: sputtering a layer of Pt film on the device surface, corroding the Pt film, and then diffusing the Pt-Si compound formed on the device surface through a high-temperature furnace tube, thereby forming the first axial life control area;

[0013] Step S6, forming a front metal electrode layer;

[0014] Step S7, back side thinning;

[0015] Step S8, proton irradiation processing: using a high-energy proton implanter, proton irradiation processing is performed from the back of the device, the implanted ions are H+, and the implantation center is the junction of the N area and the I area;

[0016] Step S9, proton irradiation defect annealing: use an oven or furnace tube to perform proton irradiation defect annealing on the device to inject H+ into shallow thermal donor defects. After the annealing is completed, the second axial lifetime control area is processed;

[0017] Step S10: back side metallization.

[0018] In some embodiments of the present application, in step S1, the method of oxidizing and photolithography the P-implantation area includes: cleaning the silicon wafer with N-region and I-region epitaxy and then oxidizing it to form a field oxide layer on the front side of the silicon wafer, and then photolithography and etching a P-implantation window on the front side of the silicon wafer.

[0019] In some embodiments of the present application, in step S2, the ion implantation energy is 60-150 KeV, and the implantation dose is 5E12-5E14.

[0020] In some embodiments of the present application, in step S3, the junction depth is 4-6 um.

[0021] In some embodiments of the present application, in step S4, the implantation dose is 1e11-1e14, the implantation depth is 10um-40um, and the implantation bandwidth is 5-25um.

[0022] In some embodiments of the present application, in step S5, the film thickness of the Pt film is The diffusion temperature is 750°C to 900°C.

[0023] In some embodiments of the present application, in step S6, the method for forming the front metal electrode layer includes: depositing a layer of Al film with a thickness of 4 to 5 um on the front side of the device, photolithography, and etching.

[0024] In some embodiments of the present application, in step S7, the method for back side thinning includes: thinning the back side of the silicon wafer by using a grinder or sandblasting to a thickness of 150 to 250 um.

[0025] In some embodiments of the present application, in step S10, the back metallization method includes: forming a back metal layer on the back of the silicon wafer by evaporation or sputtering to form a cathode metal layer; the thickness of the back metal layer is

[0026] In a second aspect, the present application provides a fast recovery diode chip, which is prepared using the method for preparing a fast recovery diode chip as described above.

[0027] The beneficial effects of the present invention are as follows: the preparation method of the fast recovery diode chip of the present invention reduces the non-equilibrium carrier concentration injected from the P region to the I region by adding a first axial lifetime control region below the P region, thereby achieving the purpose of reducing the reverse repetitive peak current Irrm and the storage time ta. In addition, by adding a second axial lifetime control region above the back N region, the center of the injection region is selected as the junction of the N region and the I region, where the effect of proton irradiation processing is best and the impact on the reverse recovery time of the device is the greatest, and through this process, only the H+ injection dose here needs to be adjusted to control the size of the diode reverse recovery time, so that the fall time tb is adjustable and the device characteristics are highly customized.

[0028] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention are realized and obtained by the structures particularly pointed out in the description and the drawings.

[0029] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0031] Figure 1 This is a schematic diagram of a PIN diode;

[0032] Figure 2 is a schematic diagram of a fast recovery diode chip of the present application;

[0033] Figure 3 This is a comparison chart of the reverse recovery characteristics of the diode chip prepared by the present application and the general process.

[0034] In the figure:

[0035] 1 is the oxide layer; 2 is the P region; 3 is the first axial lifetime control region; 4 is the front metal electrode layer; 5 is the second axial lifetime control region; 6 is the N region; 7 is the back metal layer; 8 is the I region. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0037] The present application provides a fast recovery diode chip and a method for preparing the same, which are described in detail below. It should be noted that the description order of the following embodiments does not limit the preferred order of the embodiments of the present application. In the following embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the relevant description of other embodiments.

[0038] In some embodiments, a method for preparing a fast recovery diode chip is provided, comprising:

[0039] Step S1, oxidation and photolithography of P-implantation area: After cleaning the silicon wafer with N-region and I-region epitaxy, oxidation treatment is performed to form a field oxide layer on the front side of the silicon wafer, and then a P-implantation window is formed on the front side of the silicon wafer by photolithography and etching;

[0040] Step S2, P-type impurity ion implantation: use an ion implanter to implant P-type ions into the active area and the terminal area; the ion implantation energy is 60 to 150 KeV, and the implantation dose is 5E12 to 5E14;

[0041] Step S3, P- impurity advancement: placing the silicon wafer in a high-temperature diffusion furnace to advance the P-type impurities, thereby forming a P-doped active region P region with a junction depth of 4 to 6 um;

[0042] Step S4, proton irradiation processing: use a low-energy proton implanter to perform proton irradiation from the front of the device, use H+ as the implanted ion, use 1e11-1e14 as the implanted dose, the implanted depth is 10um-40um, and the implanted bandwidth is 5-25um; the implanted bandwidth can be increased by multiple H+ implantations;

[0043] Step S5, Pt processing: sputter a Pt film on the device surface with a film thickness of After the Pt film is corroded, the Pt-Si compound formed on the device surface is diffused through a high-temperature furnace tube, wherein the diffusion temperature is 750°C to 900°C, and thus the first axial life control area is formed;

[0044] Step S6, forming a front metal electrode layer: depositing a layer of Al film with a thickness of 4 to 5 μm on the front of the device, photolithography, etching, and alloying to form a front metal electrode layer;

[0045] Step S7, back side thinning: thinning the back side of the silicon wafer to a desired thickness by using a grinding machine or sandblasting; for example, the silicon wafer may be thinned to 150-250 um;

[0046] Step S8, proton irradiation processing: use a high-energy proton implanter to perform proton irradiation processing from the back of the device, use H+ ions for implantation, and the implantation center is the junction of the N area and the I area; the implantation bandwidth and the H+ ion implantation dose are determined by the tb value required by the device;

[0047] Step S9, proton irradiation defect annealing: use an oven or furnace tube to perform proton irradiation defect annealing on the device, and the annealing temperature is selected to be the temperature at which H+ is injected to form shallow thermal donor defects after annealing. After the annealing is completed, the second axial lifetime control area is processed.

[0048] Step S10, back metallization: a back metal layer is formed on the back of the silicon wafer by evaporation or sputtering to form a cathode metal layer. The thickness of the back metal layer is At this point, the fast recovery diode chip is ready. Figure 2 .

[0049] See also Figure 2 and Figure 3In some embodiments, by adding a first axial lifetime control region below the front P region, it can be used to reduce the non-equilibrium carrier concentration injected from the P region to the I region, thereby achieving the purpose of reducing Irrm and ta.

[0050] Furthermore, the various parameters selected in this application, including H+ implantation dose, implantation depth, implantation bandwidth, Pt diffusion temperature, etc., can achieve that the H+ ions implanted by protons preferentially form interstitial defects, and then the heavy metal defects diffused by Pt into the device body can form substitutional defects at the intermittent defects formed by H+ ions. In the first axial lifetime control region finally formed, the defect type that plays a role in minority carrier lifetime control is the heavy metal deep energy level defect formed by the expansion of Pt. The heavy metal deep energy level defect is far from the center of the bandgap, so that even if the lifetime control region is close to the PN junction, the reverse leakage of the device will not be too high, and the locally formed heavy metal defects will not affect the high-temperature parallel characteristics of the device like the globally formed heavy metal defects, realizing the localization of the global lifetime control technology.

[0051] In some embodiments, by adding a second axial lifetime control region above the N region on the back side of the fast recovery diode chip, the center of the injection region is selected as the junction of the N region and the I region, where the proton irradiation process has the best effect and has the greatest impact on the reverse recovery time of the device. In addition, through this process, only the H+ injection dose here needs to be adjusted to control the size of the diode reverse recovery time, thereby achieving adjustable tb (see Figure 3 ), the device characteristics are highly customized. The defect type that mainly plays a role in minority carrier lifetime control in the second axial lifetime control region is H+ ion defect. Although this energy level defect is close to the center of the bandgap like the energy level defect formed by electron irradiation, the second axial lifetime control region of the present application is far away from the PN junction, and a suitable annealing temperature is selected, so the reverse leakage of the device finally formed will not increase significantly.

[0052] It should be noted that the various devices selected in this application (components whose specific structures are not described) are all universal standard parts or components known to technical personnel in this field, and their structures and principles can be known to technical personnel through technical manuals or through conventional experimental methods.

[0053] In the description of the embodiments of the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0054] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0055] Based on the above ideal embodiments of the present invention, the relevant staff can make various changes and modifications without departing from the technical concept of the present invention through the above description. The technical scope of the present invention is not limited to the contents of the specification, and its technical scope must be determined according to the scope of the claims.

Claims

1. A method for preparing a fast recovery diode chip, characterized in that: include: Step S1, oxidation and photolithography of the P-implantation region; Step S2, P-type impurity ion implantation: implanting P-type ions into the active area and the terminal area; Step S3, P-impurity pushing: placing the silicon wafer in a high-temperature diffusion furnace to push the P-type impurities, thereby forming a P-doped active region P region; Step S4, proton irradiation processing: using a low-energy proton implanter to perform proton irradiation from the front of the device, and the implanted ions are H+; Step S5, Pt diffusion processing: sputtering a layer of Pt film on the device surface; after the Pt film is corroded, the Pt-Si compound formed on the device surface is diffused through a high-temperature furnace tube, thereby forming the first axial life control area; Step S6, forming a front metal electrode layer; Step S7, back side thinning; Step S8, proton irradiation processing: using a high-energy proton implanter, proton irradiation processing is performed from the back of the device, the implanted ions are H+, and the implantation center is the junction of the N area and the I area; Step S9, proton irradiation defect annealing: use an oven or furnace tube to perform proton irradiation defect annealing on the device to inject H+ into shallow thermal donor defects. After the annealing is completed, the second axial lifetime control area is processed; Step S10: back side metallization.

2. The method for preparing a fast recovery diode chip according to claim 1, characterized in that: In step S1, the method of oxidizing and photolithography the P-implantation area includes: cleaning the silicon wafer with N-region and I-region epitaxy and then oxidizing it to form a field oxide layer on the front side of the silicon wafer, and then photolithography and etching a P-implantation window on the front side of the silicon wafer.

3. The method for preparing a fast recovery diode chip according to claim 1, characterized in that: In the step S2, the ion implantation energy is 60-150 KeV, and the implantation dose is 5E12-5E14.

4. The method for preparing a fast recovery diode chip according to claim 1, characterized in that: In the step S3, the junction depth is 4-6 um.

5. The method for preparing a fast recovery diode chip according to claim 1, characterized in that: In the step S4, the injection dose is 1e11-1e14, the injection depth is 10um-40um, and the injection bandwidth is 5-25um.

6. The method for preparing a fast recovery diode chip according to claim 1, characterized in that: In step S5, the film thickness of the Pt film is The diffusion temperature is 750°C to 900°C.

7. The method for preparing a fast recovery diode chip according to claim 1, characterized in that: In the step S6, the method for forming the front metal electrode layer includes: depositing a layer of Al film with a thickness of 4 to 5 um on the front of the device, photolithography, and etching.

8. The method for preparing a fast recovery diode chip according to claim 1, characterized in that: In the step S7, the method for back thinning includes: thinning the back of the silicon wafer by using a grinder or sandblasting to a thickness of 150-250 um.

9. The method for preparing a fast recovery diode chip according to claim 1, characterized in that: In step S10, the back metallization method includes: forming a back metal layer on the back of the silicon wafer by evaporation or sputtering to form a cathode metal layer; the thickness of the back metal layer is 10. A fast recovery diode chip, characterized in that: The fast recovery diode chip is prepared by the method for preparing the fast recovery diode chip as described in any one of claims 1 to 9.

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