Manufacturing method of p-GaN type E-Mode HEMT device

Abstract

The invention discloses a manufacturing method of a p-GaN type E-Mode HEMT (High Electron Mobility Transistor) device. The manufacturing method comprises the following steps: providing a gallium nitride substrate; growing an epitaxial layer on the gallium nitride substrate; injecting Mg ions on the surface of the epitaxial layer by using a high-energy ion implanter; the method comprises the following steps of: performing long-time annealing for a first time length in the atmosphere of NH3 and a first high temperature value to finish primary annealing, and performing rapid annealing for a second time length in the atmosphere of second low temperature value and N2 to finish secondary annealing after the primary annealing is finished, so as to eliminate Mg-H bonds formed in the NH3 atmosphere, the first time length is greater than the second time length, and the second time length is greater than the second time length. The first high temperature value is greater than the second low temperature value; and forming a gate dielectric layer and an electrode on the epitaxial layer. Compared with the prior art, the method has the advantages that the damage to the surface of the epitaxial layer and the passivation of Mg < 2 + > can be effectively reduced while high magnesium ion implantation is provided, and the activation efficiency of Mg < 2 + > is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductors, and in particular to a method for manufacturing a p-GaN type E-Mode HEMT device. Background Art

[0002] GaN High Electron Mobility Transistor (GaN HEMT) has been a hot topic in the research of GaN devices in recent years. In the field of power electronics, GaN has strong application prospects in consumer electronic equipment fast chargers, new clean energy vehicle charging piles, and big data processing centers due to its advantages such as high efficiency, low loss, and excellent frequency characteristics. The performance advantages of GaN HEMT are mainly concentrated in two aspects: ① The 2DEG concentration at the AlGaN / GaN HEMT heterojunction interface is high, and because the GaN layer is used as the channel layer and the AlGaN layer is used as the barrier layer to provide electrons, the electrons and the impurities that provide the electrons are spatially separated, so that the electron mobility is greatly improved from the influence of impurity scattering. ② Due to the wide bandgap and high temperature resistance of GaN-based devices, AlGaN / GaN HEMT can operate under high temperature, strong electric field, and high power without significant degradation of the device's DC characteristics. With the adoption of GaN HEMT devices by Chinese smartphone manufacturer Xiaomi in its 65W fast charger in 2020, power GaN has ushered in its first milestone in the mass smartphone market.

[0003] Enhancement mode (E-mode) devices (often referred to as normally-off devices) require an external positive gate voltage to generate channel electrons for the device to work properly, and do not require an additional negative voltage bias to turn off the device. This can significantly improve the complexity of circuit design, while reducing static power consumption and switching losses in the off state of the circuit. The realization of GaN enhancement mode devices makes it possible for GaN to replace complementary Si-based CMOS in digital logic circuit applications. Commonly used E-mode HEMT methods include: recessed gate structure, fluorine ion implantation technology, P-type cap layer technology, and Cascode structure. Among them, PGaN technology has high repeatability and is suitable for large-scale industrial production. It is also the most widely used enhancement mode in the industry. Intrinsic GaN (AlGaN) material is an n-type semiconductor. When a PGaN cap layer is grown on the AlGaN barrier layer in the gate region, a PN junction structure is formed. The PN junction has a built-in electric field, which plays a role in pulling up the energy band and depleting the two-dimensional electron gas under the gate, forming an enhancement mode (normally-off) GaN HEMT device.

[0004] There are two main methods for obtaining PGaN in the industry: epitaxial growth of PGaN and Mg ion implantation. 2+ Activation rate and other issues: Device RestrictionMg 2+ Doping efficiency: When growing Mg-doped P-type GaN in MOCVD, the most commonly used MO source is cyclopentadienyl magnesium (Cp2Mg). Cp2Mg is usually difficult to be doped into GaN crystals. During the LED epitaxy process, engineers will first pass Mg source through the stainless steel reaction chamber to make Mg 2+ and Fe in stainless steel 3+ , Mn 2+ 、Ni 2+ Plasma replacement occurs, filling the entire reaction chamber with Mg 2 + , thereby improving the doping efficiency during the subsequent growth of PGaN, which is called Mg 2+ However, the mainstream MOCVD for growing power devices is the Axitron G5 series, which has a reaction chamber composed of graphite parts, so it cannot use Mg 2+ Memory effect to increase Mg 2+ Doping efficiency; Mg 2+ Low activation rate: Mg 2+ The low activation rate is mainly due to two factors ① The process of MOCVD growth of PGaN is H2 atmosphere, whether it is H2 used as carrier gas or H2 decomposed from NH3 source, Mg 2+ Mg-H bonds are easily formed in H2 atmosphere, thereby binding free holes, resulting in low hole concentration and low mobility, which is called Mg 2+ Of course, as early as 1993, Shuji Nakamura proposed that high temperature annealing in N2 atmosphere could be used to break Mg-H bonds and activate Mg 2+ , but until now, Mg in PGaN 2+ The activation efficiency is still <1%.

[0005] ② Defects generated during epitaxial growth can also bind Mg 2+ The GaN on GaN homoepitaxially grown GaN has a dislocation density of 10 5 However, GaN single crystal substrates are expensive and are currently used for mass production of GaN power devices. LED epitaxy uses sapphire substrates, and the dislocation density of the grown GaN is around 10 7However, the poor heat dissipation of sapphire limits its use in high-voltage power devices. The mainstream GaN HEMT currently uses Si substrates. First, Si substrates have good thermal conductivity. Second, based on the mature design and process of Si-based devices, GaN on Si is conducive to achieving more integrated device design and circuit design. The epitaxial dislocation density of power devices grown on Si substrates with large lattice mismatch is much higher. 9 This is also the main reason why it is more difficult to activate PGaN on power devices.

[0006] Therefore, compared with epitaxial growth PGaN, Mg ion implantation PGaN saves time and effort, and has a high doping concentration (<10 19 cm 3 ). However, due to the large size of Mg ions and the high injection energy, the GaN lattice will be greatly damaged after injection, and it usually requires high-temperature annealing of GaN above 1100 degrees Celsius to repair it. The main problems with post-injection repair are: Expensive equipment: Traditional ion implantation annealing furnaces can quickly heat up to over 1200°C and are usually used for Si and SiC devices. However, for GaN, it will begin to decompose after the temperature exceeds 800°C without protective gas. Some researchers have found that the use of laser pulse annealing furnaces can slow down the decomposition of GaN, but the annealing equipment has strict requirements and must be repeatedly heated and cooled at a temperature of 800-1400°C and a cycle of less than 100s. In addition, high-temperature and high-pressure annealing furnaces can also effectively slow down the decomposition, but the temperature must be higher than 1200°C and the pressure must reach 1GPa. Not only is the equipment rare, but there are also great safety risks.

[0007] Complex process: In order to solve the problem of high-temperature GaN decomposition, some researchers use a nitride capping layer on the GaN surface to supplement N atoms for GaN to inhibit decomposition. However, polycrystalline SiN or AlN deposited by conventional plasma enhanced chemical vapor deposition (PECVD) or low pressure chemical vapor deposition (LPCVD) cannot withstand high temperatures above 1200°C, and single crystal SiN or AlN grown by MOCVD or MBE is difficult to remove. The process is difficult to control and complex, which is not conducive to mass production in the industry.

[0008] Therefore, there is an urgent need for a method for manufacturing a p-GaN E-Mode HEMT device that can solve the above problems. Summary of the invention

[0009] The purpose of the present invention is to provide a method for high-performance Mg ion implantation of p-GaN type HEMT devices, which can effectively reduce the damage to the epitaxial layer surface and the Mg 2+ passivation, increasing Mg 2+ activation efficiency.

[0010] In order to achieve the above-mentioned purpose, the present invention provides a method for manufacturing a p-GaN type E-Mode HEMT device, comprising: providing a gallium nitride substrate; growing an epitaxial layer on the gallium nitride substrate; using a high-energy ion implanter to implant Mg ions on the surface of the epitaxial layer; performing a long annealing of a first duration in an atmosphere of NH3 and a first high temperature value to complete a primary annealing to repair the damage to the epitaxial layer caused by the Mg ion implantation; after the primary annealing is completed, performing a rapid annealing of a second duration in an atmosphere of a second low temperature value and N2 to complete a secondary annealing, thereby eliminating the Mg-H bonds formed in the NH3 atmosphere, the first duration being more than 50 times the second duration, and the first high temperature value being greater than the second low temperature value; forming a gate dielectric layer and an electrode on the epitaxial layer.

[0011] Preferably, the first high temperature value is 1100-1250 degrees Celsius, and the first time length is 1-2 hours; the second low temperature value is 800-950 degrees Celsius, and the second time length is 60-120 seconds.

[0012] Preferably, the long annealing is performed at normal pressure or low pressure, and the rapid annealing is performed at normal pressure.

[0013] Preferably, the gate dielectric layer is an Al2O3 dielectric layer, a SiO2 dielectric layer, a HfO2 dielectric layer or a SiN dielectric layer.

[0014] Preferably, after forming a gate dielectric layer and an electrode on the epitaxial layer, rapid annealing is performed at a third low temperature value for a third time so that an ohmic contact is formed between the source and the drain, the third low temperature value is less than the second low temperature value, and the third time is less than or equal to the second time.

[0015] Preferably, before injecting Mg ions, the first solution is used to clean the surface particles and oxides of the epitaxial layer, and after cleaning, photoresist is evenly coated and then exposed and developed; after injecting Mg ions, cleaning is also performed to remove the photoresist.

[0016] Specifically, the first solution is a 5:1:1 solution of H2SO4, H2O2, and H2O in a volume ratio of 5:1:1.

[0017] Preferably, when a high-energy ion implanter is used to implant Mg ions into the epitaxial layer, the Mg ions are implanted multiple times, and during the multiple implantations, the implantation dose and / or the implantation energy are successively reduced to ensure the implantation depth and uniformity of the magnesium ions.

[0018] Specifically, when Mg ions are implanted in the epitaxial layer using a high-energy ion implanter, the implantation dose and the implantation energy are 3.3E13 cm -2 / 25keV、3.8E13cm -2 / 10keV, the ion implantation temperature is 500℃, and the implantation angle is 7°.

[0019] Preferably, growing an epitaxial layer on the gallium nitride substrate specifically comprises: sequentially growing a gallium nitride buffer layer, an unintentionally doped first gallium nitride layer, an aluminum nitride insertion layer, an AlGaN barrier layer and an unintentionally doped second gallium nitride layer on the gallium nitride substrate; and injecting Mg ions into the surface of the epitaxial layer using a high-energy ion implanter specifically comprises: injecting Mg ions into the unintentionally doped second gallium nitride layer using a high-energy ion implanter.

[0020] Specifically, the thickness of the gallium nitride buffer layer is 50 nm, the thickness of the first gallium nitride layer is 200 nm, the thickness of the aluminum nitride insertion layer is 1 nm, the thickness of the AlGaN barrier layer is 15 nm, and the thickness of the second gallium nitride layer is 70 nm.

[0021] Compared with the prior art, the present invention can increase the amount of magnesium ions injected after magnesium ions are injected, and then use high temperature and long-term annealing in an NH3 atmosphere to repair the magnesium ion injection damage while effectively reducing the Mg 2+ The Mg-H bonds formed in the NH3 atmosphere are then eliminated by low-temperature rapid annealing. That is, the present invention uses low-temperature rapid annealing after high-temperature annealing to eliminate a small amount of Mg-H bonds, thereby increasing the Mg 2+ The activation efficiency is improved and the damage rate of the epitaxial layer is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 and Figure 2 It is a schematic flow chart of the method for manufacturing a p-GaN type E-Mode HEMT device of the present invention.

[0023] Figure 3 It is a flow chart of the method for manufacturing a p-GaN type E-Mode HEMT device of the present invention. DETAILED DESCRIPTION

[0024] In order to explain the technical content, structural features, achieved objectives and effects of the present invention in detail, the following is a detailed description in conjunction with the implementation methods and the accompanying drawings.

[0025] refer to Figures 1 to 3 The present invention discloses a method for manufacturing a p-GaN type E-Mode HEMT device, comprising steps S1 to S5.

[0026] S1, providing a gallium nitride substrate 10. The gallium nitride substrate 10 is a gallium nitride semi-insulating substrate (GaN single crystal substrate), with a thickness of 500 μm and a resistivity of 7E8 Ω / cm2.

[0027] S2 , growing an epitaxial layer 20 on the gallium nitride substrate 10 .

[0028] Growing the epitaxial layer 20 on the gallium nitride substrate 10 specifically includes: sequentially growing a gallium nitride buffer layer 21 , an unintentionally doped first gallium nitride layer 22 , an aluminum nitride insertion layer 23 , an AlGaN barrier layer 24 and an unintentionally doped second gallium nitride layer 25 on the gallium nitride substrate 10 .

[0029] Among them, the thickness of the gallium nitride buffer layer 21 is 50nm, the thickness of the first gallium nitride layer 22 is 200nm, the thickness of the aluminum nitride insertion layer 23 is 1nm, the thickness of the AlGaN barrier layer 24 is 15nm, the Al component is 21% to 23%, and in this embodiment, the Al component is 22%, and the thickness of the second gallium nitride layer 25 is 70nm.

[0030] In this embodiment, the epitaxial layer 20 is grown on the gallium nitride substrate 10 by using a metal organic chemical vapor deposition (MOCVD) method.

[0031] S3, using a high energy ion implanter to implant Mg ions on the surface of the epitaxial layer 20. Specifically, using a high energy ion implanter to implant Mg ions into the unintentionally doped second gallium nitride layer 25, the second gallium nitride layer 25 forms a P-GaN layer, thereby transforming the epitaxial layer 20 into a P-type epitaxial layer 20a.

[0032] Preferably, when a high-energy ion implanter is used to implant Mg ions into the epitaxial layer, the Mg ions are implanted multiple times, and during multiple implantations, the implantation dose and / or the implantation energy are successively reduced to ensure the implantation depth and uniformity of the Mg ions. When a high-energy ion implanter is used to implant Mg ions into the epitaxial layer 20, the implantation dose and the implantation energy are successively 3.3E13cm -2 / 25keV、3.8E13cm -2 / 10keV, the ion implantation temperature is 500℃, and the implantation angle is 7°.

[0033] Before injecting Mg ions, step S3a is also included, in which particles and oxides on the surface of the epitaxial layer 20 are cleaned with a first solution, and after cleaning, photoresist is evenly coated and then exposed and developed; after injecting Mg ions, cleaning is also performed to remove the photoresist.

[0034] Among them, the first solution is a 5:1:1 solution of H2SO4, H2O2, and H2O in a volume ratio of 5:1:1.

[0035] S4, performing long annealing for a first time in an atmosphere of NH 3 and a first high temperature value.

[0036] The first high temperature value is 1100-1250 degrees Celsius, and the first time length is 1-2 hours. In this embodiment, annealing is performed at 1200°C in an NH3 atmosphere for 1 hour, wherein the higher the temperature, the shorter the annealing time.

[0037] Preferably, the long-term annealing is carried out at normal pressure or low pressure (e.g. 200mba). S5, using a rapid annealing furnace to perform rapid annealing for a second time period under a second low temperature value and N2 atmosphere to eliminate Mg-H bonds formed in the NH3 atmosphere, the first time period is more than 50 times the second time period, and the first high temperature value is greater than the second low temperature value.

[0038] Wherein, the second low temperature value is 800-950 degrees Celsius, and the second time length is 60-120 seconds.

[0039] S6 , forming a gate dielectric layer 30 and an electrode 40 on the epitaxial layer 20 .

[0040] Wherein, the gate dielectric layer is an Al2O3 dielectric layer, a SiO2 dielectric layer, a HfO2 dielectric layer or a SiN dielectric layer, etc.

[0041] The electrode 40 includes a gate G, a source S, and a drain D.

[0042] Preferably, after forming a gate dielectric layer and an electrode on the epitaxial layer 20, rapid annealing is performed for a third period of time at a third low temperature value using a rapid annealing furnace so that an ohmic contact is formed between the source S and the drain D, and the third low temperature value is less than the second low temperature value, and the third period of time is less than or equal to the second period of time.

[0043] Among them, the third low temperature value is 800 degrees Celsius, and the third time length is 60 seconds.

[0044] The above disclosure is only the preferred embodiment of the present invention, which certainly cannot be used to limit the scope of rights of the present invention. Therefore, equivalent changes made according to the scope of the patent application of the present invention are still within the scope covered by the present invention.

Claims

1. A method for manufacturing a p-GaN E-Mode HEMT device, characterized in that: include: Providing gallium nitride substrates; growing an epitaxial layer on the gallium nitride substrate; Implanting Mg ions on the surface of the epitaxial layer using a high energy ion implanter; Performing a long annealing for a first time in an atmosphere of NH3 and a first high temperature value to complete an annealing to repair the epitaxial layer damage caused by the Mg ion implantation; After the first annealing is completed, a second time period of rapid annealing is performed in a second low temperature value and N2 atmosphere to complete the second annealing, so as to eliminate the Mg-H bonds formed in the NH3 atmosphere, wherein the first time period is greater than the second time period, and the first high temperature value is greater than the second low temperature value; A gate dielectric layer and an electrode are formed on the epitaxial layer.

2. The method for manufacturing a p-GaN E-Mode HEMT device according to claim 1, characterized in that: The first duration is more than 50 times the second duration.

3. The method for manufacturing a p-GaN E-Mode HEMT device according to claim 1, characterized in that: The first high temperature value is 1100-1250 degrees Celsius, and the first time length is 1-2 hours; the second low temperature value is 800-950 degrees Celsius, and the second time length is 60-120 seconds.

4. The method for manufacturing a p-GaN type E-Mode HEMT device according to claim 1, characterized in that: The long annealing is performed at normal pressure or low pressure, and the rapid annealing is performed at normal pressure.

5. The method for manufacturing a p-GaN type E-Mode HEMT device according to claim 1, characterized in that: The gate dielectric layer is an Al2O3 dielectric layer, a SiO2 dielectric layer, a HfO2 dielectric layer or a SiN dielectric layer.

6. The method for manufacturing a p-GaN type E-Mode HEMT device according to claim 1, characterized in that: After forming a gate dielectric layer and an electrode on the epitaxial layer, rapid annealing is performed at a third low temperature value for a third time period, wherein the third low temperature value is less than the second low temperature value, and the third time period is less than or equal to the second time period.

7. The method for manufacturing a p-GaN type E-Mode HEMT device according to claim 1, characterized in that: Before injecting Mg ions, the first solution is used to clean the surface particles and oxides of the epitaxial layer. After cleaning, photoresist is evenly coated and then exposed and developed. After injecting Mg ions, cleaning is also performed to remove the photoresist.

8. The method for manufacturing a p-GaN type E-Mode HEMT device according to claim 7, characterized in that: The first solution is a 5:1 solution of H2SO4, H2O2, and H2O in a volume ratio of 5:1:

1.

9. The method for manufacturing a p-GaN type E-Mode HEMT device according to claim 1, characterized in that: When Mg ions are implanted into the epitaxial layer using a high energy ion implanter, the Mg ions are implanted multiple times, and during the multiple implantations, the implantation dose and / or the implantation energy are sequentially reduced.

10. The method for manufacturing a p-GaN type E-Mode HEMT device according to claim 9, characterized in that: When Mg ions are implanted in the epitaxial layer using a high energy ion implanter, the implantation dose and the implantation energy are 3.3E13 cm -2 / 25keV、3.8E13cm -2 / 10keV, the ion implantation temperature is 500℃, and the implantation angle is 7°.

11. The method for manufacturing a p-GaN type E-Mode HEMT device according to claim 1, characterized in that: Growing an epitaxial layer on the gallium nitride substrate specifically includes: sequentially growing a gallium nitride buffer layer, an unintentionally doped first gallium nitride layer, an aluminum nitride insertion layer, an AlGaN barrier layer, and an unintentionally doped second gallium nitride layer on the gallium nitride substrate; and injecting Mg ions into the surface of the epitaxial layer using a high-energy ion implanter specifically includes: injecting Mg ions into the unintentionally doped second gallium nitride layer using a high-energy ion implanter.

12. The method for manufacturing a p-GaN type E-Mode HEMT device according to claim 11, characterized in that: The thickness of the gallium nitride buffer layer is 50 nm, the thickness of the first gallium nitride layer is 200 nm, the thickness of the aluminum nitride insertion layer is 1 nm, the thickness of the AlGaN barrier layer is 15 nm, and the thickness of the second gallium nitride layer is 70 nm.

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