Display panel, manufacturing method of display panel and display device

Abstract

The invention provides a display panel, a manufacturing method of the display panel and a display device.The display panel comprises a substrate, a light shielding layer, a second pole plate, a first source-drain electrode layer and a second source-drain electrode layer, the light shielding layer comprises a first pole plate, the first source-drain electrode layer comprises a conductive electrode, and the second source-drain electrode layer is arranged on the side, away from the substrate, of the first source-drain electrode layer. The second source and drain electrode layer comprises a third electrode plate, the third electrode plate in the second source and drain electrode layer serves as a capacitance electrode, the third electrode plate extends towards the direction of the second electrode plate, and the third electrode plate is electrically connected with the first electrode plate in the light shielding layer through a conductive electrode in the first source and drain electrode layer. The third polar plate, the second polar plate and the first polar plate are overlapped to form a capacitor, so that a metal layer which is originally used as a capacitor electrode can be omitted, the film layer structure of the display panel is simplified, a photomask is omitted, the process yield of the display panel can be improved, and the production cost of the display panel can be reduced.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel, a method for manufacturing a display panel, and a display device. Background Art

[0002] In the field of display technology, liquid crystal display (LCD) technology and active matrix organic light-emitting diode (AMOLED) display technology have been widely used due to their many advantages such as thin body, high image quality, power saving and no radiation.

[0003] At present, liquid crystal display panels and organic light-emitting diode display panels have complex structures, a large number of film layers, and require a large number of masks, which not only increases time and material costs, but also leads to a low process yield of the display panels.

[0004] Therefore, it is necessary to provide a display panel, a method for manufacturing a display panel, and a display device to improve this defect. Summary of the invention

[0005] The embodiments of the present application provide a display panel, a method for manufacturing a display panel, and a display device, which can simplify the structure of the display panel, improve the process yield of the display panel, and reduce the production cost of the display panel.

[0006] In order to achieve the above object, according to a first aspect of the present application, a display panel is provided, comprising:

[0007] substrate;

[0008] A light shielding layer, disposed on one side of the substrate, the light shielding layer comprising a first electrode plate;

[0009] A second electrode plate is arranged on a side of the light shielding layer away from the substrate;

[0010] A first source-drain electrode layer, disposed on a side of the light shielding layer away from the substrate, the first source-drain electrode layer comprising a conductive electrode; and

[0011] A second source-drain electrode layer, disposed on a side of the first source-drain electrode layer away from the substrate;

[0012] Among them, the second source and drain layer includes a third electrode plate, which is extended in the direction of the second electrode plate. The third electrode plate is electrically connected to the first electrode plate through the conductive electrode. Along the thickness direction of the display panel, the third electrode plate overlaps with the second electrode plate and the first electrode plate to form a capacitor.

[0013] Optionally, the display panel further includes a passivation layer, which is arranged on a side of the first source and drain layer away from the substrate, and a portion of the passivation layer corresponding to the second electrode plate is recessed toward the second electrode plate to form a groove, and the third electrode plate portion is arranged in the groove.

[0014] Optionally, the third electrode plate includes:

[0015] A main body, arranged at the bottom of the groove;

[0016] A first connecting portion, disposed on a side wall of the groove, the first connecting portion being connected to the main body;

[0017] The second connection portion is disposed on the passivation layer at the periphery of the groove, one end of the second connection portion is connected to the first connection portion, and the other end of the second connection portion is connected to the conductive electrode.

[0018] Optionally, the display panel also includes an interlayer dielectric layer, which is partially arranged between the second electrode plate and the first source and drain layer, and a first opening is formed on the part of the interlayer dielectric layer corresponding to the second electrode plate. The passivation layer is continuously arranged along the bottom and side walls of the first opening, and is recessed above the first opening to form the groove.

[0019] Optionally, the display panel further comprises a first planar layer, wherein the first planar layer is disposed on the passivation layer, and the second source and drain electrode layer is partially disposed on the first planar layer;

[0020] A second opening is formed in a portion of the first flat layer corresponding to the third electrode plate, and an orthographic projection of the third electrode plate on the substrate is located within an orthographic projection of the second opening on the substrate.

[0021] Optionally, the display panel further includes a second planar layer, wherein the second planar layer is disposed on the first planar layer and the second source and drain electrode layer and fills the second opening.

[0022] Optionally, the material of the first planar layer includes polyimide, and the material of the second planar layer includes acrylate.

[0023] Optionally, the display panel further includes a first active layer, the first active layer is arranged on a side of the light shielding layer away from the substrate, a material of the first active layer includes an oxide semiconductor material, and the first active layer includes the second electrode plate.

[0024] Optionally, the display panel further includes:

[0025] A first active layer is disposed on a side of the light shielding layer away from the substrate, wherein the material of the first active layer includes an oxide semiconductor material;

[0026] The gate layer is arranged on a side of the first active layer away from the substrate, and the gate layer includes the second electrode plate.

[0027] Optionally, the display panel further includes:

[0028] a first gate insulating layer, disposed on the substrate and the first active layer;

[0029] A second active layer is disposed on the first gate insulating layer, wherein a material of the second active layer includes a silicon semiconductor material;

[0030] a second gate insulating layer, disposed on the first gate insulating layer and the second active layer, and the gate layer is disposed on the second gate insulating layer;

[0031] Part of the first gate insulating layer and the second gate insulating layer are disposed between the second electrode plate and the first electrode plate.

[0032] Optionally, the display panel further includes:

[0033] A first active layer, disposed on a side of the light shielding layer away from the substrate, the first active layer comprising the second electrode plate;

[0034] The gate layer is arranged on a side of the first active layer away from the substrate, and the gate layer includes a fourth electrode plate. Along the thickness direction of the display panel, the third electrode plate and the fourth electrode plate, the second electrode plate and the first electrode plate are overlapped to form the capacitor.

[0035] Optionally, the display panel further includes:

[0036] a first gate insulating layer, disposed on the substrate and the first active layer;

[0037] a second active layer, disposed on the first gate insulating layer;

[0038] a second gate insulating layer, disposed on the first gate insulating layer and the second active layer, and the gate layer is disposed on the second gate insulating layer;

[0039] Part of the first gate insulating layer and the second gate insulating layer are arranged between the second electrode plate and the fourth electrode plate.

[0040] Optionally, the display panel includes a display area and a gate drive circuit area arranged outside the display area, the gate drive circuit area is provided with a gate drive circuit, and the second source and drain layer includes a signal bus, and the signal bus is arranged in the gate drive circuit area.

[0041] Optionally, the display area is provided with a plurality of first transistors, and the gate driving circuit includes a plurality of second transistors;

[0042] The first transistor includes a first active portion, and a material of the first active portion includes an oxide semiconductor material; the second transistor includes a second active portion, and a material of the second active portion includes an oxide semiconductor material or a silicon semiconductor material.

[0043] According to a second aspect of the present application, a method for manufacturing a display panel is provided, for manufacturing the display panel as described above, the method for manufacturing the display panel comprising the following steps:

[0044] forming a light shielding layer on the substrate, wherein the light shielding layer comprises a first electrode plate;

[0045] forming a second electrode plate on a side of the light shielding layer away from the substrate;

[0046] forming a first source-drain electrode layer and a second source-drain electrode layer on a side of the light shielding layer away from the substrate, wherein the first source-drain electrode layer comprises a conductive electrode, and the second source-drain electrode layer comprises a third electrode plate;

[0047] The third electrode plate is extended toward the second electrode plate, and is electrically connected to the first electrode plate through the conductive electrode. Along the thickness direction of the display panel, the third electrode plate overlaps with the second electrode plate and the first electrode plate to form a capacitor.

[0048] Optionally, forming the first source-drain electrode layer and the second source-drain electrode layer on a side of the light shielding layer away from the substrate comprises the following steps:

[0049] An interlayer dielectric layer is formed on a side of the light shielding layer away from the substrate, wherein a first opening is formed on the interlayer dielectric layer;

[0050] forming the first source-drain electrode layer on the interlayer dielectric layer;

[0051] forming a passivation layer on the interlayer dielectric layer and the first source-drain electrode layer, wherein the passivation layer is continuously disposed along the bottom and sidewalls of the first opening and a groove is formed above the first opening;

[0052] forming a first flat layer on the passivation layer, wherein a second opening is formed at a portion of the first flat layer corresponding to the groove;

[0053] The second source-drain electrode layer is formed on the first planar layer, and the third electrode portion is formed in the groove.

[0054] According to a third aspect of the present application, a display device is provided, comprising the display panel as described above.

[0055] In the display panel of the embodiment of the present application, the third electrode in the second source and drain layer is used as a capacitor electrode, and the third electrode is extended in the direction of the second electrode. The third electrode is electrically connected to the first electrode in the light shielding layer through the conductive electrode in the first source and drain layer, so that the third electrode overlaps with the second electrode and the first electrode to form a capacitor. Therefore, a metal layer originally used as a capacitor electrode can be omitted, thereby simplifying the film layer structure of the display panel, and can also save a mask and a corresponding patterning process, thereby improving the process yield of the display panel and reducing the production cost of the display panel.

[0056] Other features and advantages of the present application will be described in detail in the subsequent detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can obtain other drawings based on these drawings without creative work.

[0058] In order to more completely understand the present application and its beneficial effects, the following description will be given in conjunction with the accompanying drawings, wherein the same figure numbers represent the same parts in the following description.

[0059] Figure 1 A schematic diagram of the structure of a first display panel provided in an embodiment of the present application;

[0060] Figure 2 A schematic diagram of the structure of a second display panel provided in an embodiment of the present application;

[0061] Figure 3 A schematic structural diagram of a third display panel provided in an embodiment of the present application;

[0062] Figure 4 A schematic structural diagram of a fourth display panel provided in an embodiment of the present application;

[0063] Figure 5 A flow chart of a first method for manufacturing a display panel provided in an embodiment of the present application;

[0064] Figures 6a to 6dA schematic diagram of a first method for manufacturing a display panel provided in an embodiment of the present application;

[0065] Figure 7 A schematic diagram of the structure of a display device provided in an embodiment of the present application.

[0066] Description of reference numerals:

[0067] 10. substrate; 11. buffer layer; 12. light shielding layer; 121. first electrode plate; 13. second electrode plate; 14. first source-drain electrode layer; 141. conductive electrode; 15. second source-drain electrode layer; 150. third electrode plate; 151. main body; 152. first connecting portion; 153. second connecting portion; 154. signal bus; 155. terminal; 16. capacitor; 17. passivation layer; 171. groove; 18. interlayer dielectric layer; 181. first opening; 19. first flat layer; 191. second opening;

[0068] 20, second flat layer; 21, first active layer; 22, first gate insulating layer; 23, second active layer; 24, second gate insulating layer; 25, gate layer; 251, fourth plate; 26, anode layer; 27, first pixel definition layer; 28, second pixel definition layer;

[0069] T1, a first transistor; T1A, a first active portion; T2, a second transistor; T2A, a second active portion;

[0070] AA, display area; GOA, gate drive circuit area; BA, binding area;

[0071] 100. Display panel; 200. Housing; 1000. Display device. DETAILED DESCRIPTION

[0072] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0073] An embodiment of the present application provides a display panel, which includes a substrate, a light-shielding layer, a second electrode plate, a first source-drain electrode layer and a second source-drain electrode layer. The light-shielding layer is arranged on one side of the substrate. The light-shielding layer includes a first electrode plate. The second electrode plate is arranged on a side of the light-shielding layer away from the substrate. The first source-drain electrode layer is arranged on a side of the light-shielding layer away from the substrate. The first source-drain electrode layer includes a conductive electrode. The second source-drain electrode layer is arranged on a side of the first source-drain electrode layer away from the substrate. The second source-drain electrode layer includes a third electrode plate. The third electrode plate extends in the direction of the second electrode plate. The third electrode plate is electrically connected to the first electrode plate through the conductive electrode. Along the thickness direction of the display panel, the third electrode plate overlaps with the second electrode plate and the first electrode plate to form a capacitor.

[0074] In the display panel of the embodiment of the present application, the third electrode in the second source and drain layer is used as a capacitor electrode, and the third electrode is extended in the direction of the second electrode. The third electrode is electrically connected to the first electrode in the light shielding layer through the conductive electrode in the first source and drain layer, so that the third electrode overlaps with the second electrode and the first electrode to form a capacitor. Therefore, a metal layer originally used as a capacitor electrode can be omitted, thereby simplifying the film layer structure of the display panel, and can also save a mask and a corresponding patterning process, thereby improving the process yield of the display panel and reducing the production cost of the display panel.

[0075] See also Figure 1 , Figure 1 A schematic diagram of the structure of a first display panel provided in an embodiment of the present application, wherein the display panel 100 includes a substrate 10, a light shielding layer 12, a second electrode plate 13, a first source-drain electrode layer 14, and a second source-drain electrode layer 15. The light shielding layer 12 is disposed on one side of the substrate 10, the light shielding layer 12 includes a first electrode plate 121, and the second electrode plate 13 is disposed on a side of the light shielding layer 12 away from the substrate 10. The first source-drain electrode layer 14 is disposed on a side of the light shielding layer 12 away from the substrate 10, the first source-drain electrode layer 14 includes a conductive electrode 141, the second source-drain electrode layer 15 is disposed on a side of the first source-drain electrode layer 14 away from the substrate 10, and the second source-drain electrode layer 15 includes a third electrode plate 150, the third electrode plate 150 is extended toward the direction of the second electrode plate 13, the third electrode plate 150 is electrically connected to the first electrode plate 121 through the conductive electrode 141, and along the thickness direction of the display panel, the third electrode plate 150 overlaps with the second electrode plate 13 and the first electrode plate 121 to form a capacitor 16.

[0076] It should be noted that the related technology is to add a second gate layer on the gate layer on the basis of the existing film layer structure, so as to use the second gate layer as a capacitor electrode to participate in forming a capacitor. This will not only make the film layer structure of the display panel more complicated, but also require an additional photomask and corresponding processes, which will increase the time cost and material cost, and will also reduce the yield of the display panel, and ultimately increase the production cost of the display panel.

[0077] In an embodiment of the present application, the third electrode 150 in the second source-drain layer 15 is used as a capacitor electrode, and the third electrode 150 is extended toward the direction of the second electrode 13. The third electrode 150 is electrically connected to the first electrode 121 in the light-shielding layer 12 through the conductive electrode 141 in the first source-drain layer 14, so that the third electrode 150 overlaps with the second electrode 13 and the first electrode 121 to form a capacitor 16. Therefore, a metal layer originally used as a capacitor electrode can be omitted, thereby simplifying the film structure of the display panel, and saving a mask and a corresponding patterning process, thereby improving the process yield of the display panel and reducing the production cost of the display panel.

[0078] It should be noted that the overlapping arrangement of the third electrode plate 150, the second electrode plate 13 and the first electrode plate 121 means that the third electrode plate 150, the second electrode plate 13 and the first electrode plate 121 are respectively arranged in different film layers, and the orthographic projection of the third electrode plate 150 on the substrate 10 overlaps with the orthographic projection of the second electrode plate 13 on the substrate 10 and the orthographic projection of the first electrode plate 121 on the substrate 10, so that not only can the capacitor 16 be formed, but also the capacitance of the capacitor 16 can be increased.

[0079] In some embodiments, see Figure 1 The display panel 100 further includes a passivation layer 17 , which is disposed on a side of the first source / drain electrode layer 14 away from the substrate 10 . The portion of the passivation layer 17 corresponding to the second electrode plate 13 is recessed toward the second electrode plate 13 and forms a groove 171 , and a portion of the third electrode plate 150 is disposed in the groove 171 .

[0080] See also Figure 1 The cross-sectional shape of the groove 171 is an inverted trapezoid. The passivation layer 17 is recessed toward the second electrode plate 13 to form a groove 171, and the third electrode plate 150 is partially disposed in the groove 171 so that the third electrode plate 150 can be extended toward the second electrode plate 13. In this way, the distance between the third electrode plate 150 and the second electrode plate 13 can be reduced, thereby simplifying the film layer structure of the display panel and optimizing the capacitor structure, thereby increasing the capacitance of the capacitor.

[0081] In some embodiments, see Figure 1 The third electrode 150 includes a main body 151, a first connecting part 152 and a second connecting part 153. The main body 151 is arranged at the bottom of the groove 171, the first connecting part 152 is arranged on the side wall of the groove 171, the first connecting part 152 is connected to the main body 151, and the second connecting part 153 is arranged on the passivation layer 17 outside the groove 171. One end of the second connecting part 153 is connected to the first connecting part 152, and the other end of the second connecting part 153 is connected to the conductive electrode 141.

[0082] In some embodiments, see Figure 1 The main body 151 is the main part of the third electrode 150 that participates in forming the capacitor structure. The main body 151 is flatly arranged on the passivation layer 17 at the bottom of the groove 171, and is arranged opposite to the second electrode 13. The lower surface of the passivation layer 17 is in direct contact with the upper surface of the second electrode 13, and the upper surface of the passivation layer 17 is in direct contact with the lower surface of the main body 151 of the third electrode 150. The first connecting portion 152 is inclined and arranged on the side wall of the groove 171, and the second connecting portion 153 is flatly arranged on the passivation layer 17 outside the groove 171. In this way, the distance between the third electrode 150 and the second electrode 13 can be reduced, so that the capacitor structure can be optimized while simplifying the film structure of the display panel, thereby increasing the capacitance of the capacitor.

[0083] In some embodiments, see Figure 1 The display panel 100 also includes an interlayer dielectric layer 18, and a portion of the interlayer dielectric layer 18 is disposed between the second electrode plate 13 and the first source and drain electrode layer 14. A first opening 181 is formed in a portion of the interlayer dielectric layer 18 corresponding to the second electrode plate 13. The passivation layer 17 is continuously disposed along the bottom and sidewalls of the first opening 181, and is recessed above the first opening 181 to form a groove 171.

[0084] In some embodiments, see Figure 1 , a plurality of first openings 181 are formed on the interlayer dielectric layer 18, and the cross-sectional shape of the first opening 181 is an inverted trapezoid. In the thickness direction of the display panel, the first opening 181 is arranged opposite to the second electrode 13, and the first opening 181 penetrates the interlayer dielectric layer 18 and exposes at least part of the upper surface of the second electrode 13. The passivation layer 17 is partially arranged on the surface of the interlayer dielectric layer 18 away from the substrate, and the other part of the passivation layer 17 is continuously arranged along the bottom and sidewall of the first opening 181, and is recessed above the first opening 181 to form a groove 171. By forming the first opening 181 on the interlayer dielectric layer 18, and recessing the passivation layer 17 above the first opening 181 to form a groove 171, so as to facilitate the distance between the third electrode 150 in the second source and drain layer 15 and the second electrode 13 located thereunder, it is possible to simplify the film structure of the display panel while optimizing the capacitor structure, thereby increasing the capacitance of the capacitor.

[0085] In some embodiments, see Figure 1The display panel 100 further includes a first flat layer 19, which is disposed on the passivation layer 17, and a portion of the second source-drain electrode layer 15 is disposed on the first flat layer 19. A second opening 191 is formed on a portion of the first flat layer 19 corresponding to the third electrode plate 150, and an orthographic projection of the third electrode plate 150 on the substrate 10 is located within an orthographic projection of the second opening 191 on the substrate 10. Since the manufacturing process of the second source-drain electrode layer 15 is after the manufacturing process of the first flat layer 19, by providing the second opening 191 on the first flat layer 19, and making the second opening 191 face the first opening 181, it is convenient to form the third electrode plate 150 in the groove 171, thereby simplifying the film structure of the display panel and optimizing the capacitor structure, thereby increasing the capacitance of the capacitor.

[0086] In some embodiments, see Figure 1 Along the thickness direction of the first flat layer 19, the second opening 191 penetrates the first flat layer 19 and exposes the passivation layer 17 and the groove 171. The diameter of the second opening 191 or the diameter of the circumscribed circle of the second opening 191 is larger than the diameter of the first opening 181 or the diameter of the circumscribed circle of the first opening 181. This makes it easier for the third electrode 150 to be formed on the passivation layer 17 at the bottom of the second opening 191.

[0087] In some embodiments, see Figure 1 The display panel 100 further includes a second planar layer 20 , which is disposed on the first planar layer 19 and the second source-drain electrode layer 15 and fills the second opening 191 .

[0088] In some embodiments, the material of the first planar layer 19 includes polyimide, and the material of the second planar layer 20 includes acrylate. By selecting polyimide as the material of the first planar layer 19, the yield of the half-mask photolithography process can be ensured. By optimizing the material of the second planar layer 20 and selecting acrylate as the material of the second planar layer 20, the light sensitivity of the second planar layer 20 can be improved, and the exposure process time of the second planar layer 20 can be reduced, so that not only the process efficiency can be improved, but also the flatness of the second planar layer 20 can be improved.

[0089] In some embodiments, see Figure 1 The display panel 100 further includes a first active layer 21, which is disposed on a side of the light shielding layer 12 away from the substrate 10, and a material of the first active layer 21 includes an oxide semiconductor material, and the first active layer 21 includes a second electrode 13. Selecting the second electrode 13 in the first active layer 21 as a capacitor electrode does not increase the film structure of the display panel, nor does it increase the number of photomasks, which is beneficial to improving the yield of the display panel and reducing the production cost of the display panel.

[0090] In some embodiments, see Figure 1 The display panel 100 also includes a buffer layer 11, a first gate insulating layer 22, a second active layer 23, a second gate insulating layer 24 and a gate layer 25. The buffer layer 11 is arranged on the substrate 10 and the light shielding layer 12, the first active layer 21 and the first gate insulating layer 22 are both arranged on the buffer layer 11, the second active layer 23 is arranged on the first gate insulating layer 22, the second gate insulating layer 24 is arranged on the first gate insulating layer 22 and the second active layer 23, and the gate layer 25 is arranged on the second gate insulating layer 24.

[0091] The material of the first active layer 21 includes an oxide semiconductor material, which may be indium gallium zinc oxide. The material of the second active layer 23 includes a silicon semiconductor material, which may be amorphous silicon or polycrystalline silicon.

[0092] In some embodiments, see Figure 1 The display panel 100 includes a display area AA and a gate drive circuit area GOA disposed at the periphery of the display area AA, the gate drive circuit area GOA is provided with a gate drive circuit, and the second source and drain electrode layer 15 includes a signal bus 154, and the signal bus 154 is disposed in the gate drive circuit area GOA. By arranging the signal bus 154 above the gate drive circuit in the gate drive circuit area GOA, the frame width of the display panel 100 can be reduced, thereby achieving a narrow frame effect. On this basis, the third electrode plate of the second source and drain electrode layer 15 is used to form a capacitor with the first electrode plate 121 and the second electrode plate 13, thereby reducing the frame width of the display panel, optimizing the capacitor structure, simplifying the film layer structure of the display panel, and saving a photomask and a corresponding process, thereby improving the process yield of the first die panel and reducing the production cost of the display panel.

[0093] In some embodiments, see Figure 1 The display area AA is provided with a plurality of first transistors T1, the gate driving circuit includes a plurality of second transistors T2, the first transistor T1 includes a first active portion T1A, the material of the first active portion T1A includes a silicon semiconductor material; the second transistor T2 includes a second active portion T2A, the material of the second active portion T2A includes a silicon semiconductor material.

[0094] In some embodiments, see Figure 1 , the first active layer 21 includes a first active portion T1A, and the second active layer 23 includes a second active portion T2A.

[0095] In some embodiments, see Figure 1 , the bonding area BA is provided with a terminal 155 , and the second source and drain layer 15 includes the terminal 155 .

[0096] In some embodiments, see Figure 1The display panel 100 is an organic light emitting diode display panel, and the display panel 100 also includes an anode layer 26, a first pixel definition layer 27 and a second pixel definition layer 28. The anode layer 26 is arranged on the second flat layer 20, and the first pixel definition layer 27 and the second pixel definition layer 28 are sequentially stacked on the second flat layer 20 and the anode layer 26.

[0097] In some embodiments, the display panel 100 further includes a light emitting layer, a cathode and an encapsulation layer (not shown in the figure). Figure 1 The structure of the capacitor in the display panel is merely illustrated, and does not represent the film structure of the display panel 100 in actual applications.

[0098] In some other embodiments, the type of the display panel 100 is not limited to the organic light emitting diode display panel in the above embodiments, and the display panel 100 may also be a liquid crystal display panel or a micro light emitting diode display panel.

[0099] In some embodiments, see Figure 2 , Figure 2 A schematic diagram of the structure of a second display panel provided in an embodiment of the present application, which has a structure similar to Figure 1 The structures of the display panels shown are substantially the same, with the difference being that the display panel 100 is provided with a first active layer 21 , while the display panel 100 is not provided with a second active layer 23 .

[0100] Specifically, see Figure 2 The first active layer 21 includes a first active portion T1A and a second active portion T2A, and the materials of the first active portion T1A and the second active portion T2A both include oxide semiconductor materials, that is, the first transistor T1 in the display area AA and the second transistor T2 in the gate driving circuit area GOA are both oxide transistors. Figure 1 On the basis of the embodiment shown, one more photomask originally used for etching to form the second active layer 23 is reduced. Figure 2 The illustrated embodiment can further simplify the film layer structure of the display panel and further reduce the production cost of the display panel.

[0101] In some embodiments, see Figure 2 The display panel 100 is provided with only one gate insulating layer, namely, a first gate insulating layer 22 . The first gate insulating layer 22 is provided on the first active layer 21 , and the gate 25 is provided on the first gate insulating layer 22 .

[0102] In some embodiments, see Figure 3 , Figure 3 A schematic diagram of the structure of a third display panel provided in an embodiment of the present application, which has a structure similar to Figure 1The structures of the display panels shown are substantially the same, with the difference being that the gate layer 25 includes a second electrode plate 13 .

[0103] Specifically, see Figure 3 , the gate layer 25 includes the second electrode plate 13, that is, the material of the second electrode plate 13 is the same as that of the gate layer 25, both are metal or alloy, and the second electrode plate 13 and the gate layer 25 can share the same mask and be prepared by the same process. Figure 1 and Figure 2 The embodiment shown, Figure 3 The illustrated embodiment uses the gate layer 25 as the second electrode. Compared with semiconductor materials, metals or alloys have lower resistance, which can further increase the capacitance of the capacitor 16 .

[0104] In some embodiments, see Figure 3 The first gate insulating layer 22 and the second gate insulating layer 24 are partially disposed between the second electrode plate 13 and the first electrode plate 121 .

[0105] In some embodiments, see Figure 4 , Figure 4 A schematic diagram of the structure of a fourth display panel provided in an embodiment of the present application, which has a structure similar to Figure 1 The structures of the display panels shown are substantially the same, except that the gate layer 25 includes a fourth electrode plate 251, and the third electrode plate 150 overlaps with the fourth electrode plate 251, the second electrode plate 13, and the first electrode plate 121 to form a capacitor 16. In this way, not only can the film structure of the display panel be simplified and the capacitance of the capacitor be increased, but also a photomask and a corresponding patterning process can be saved, thereby improving the process yield of the display panel and reducing the production cost of the display panel.

[0106] Specifically, see Figure 4 The first active layer 21 includes a second electrode plate 13, the second electrode plate 13 is arranged on the first electrode plate 121, the fourth electrode plate 251 is arranged between the second electrode plate 13 and the third electrode plate 150, the first gate insulating layer 22 and the second gate insulating layer 24 are partially stacked and arranged between the second electrode plate 13 and the fourth electrode plate 251, the first gate insulating layer 22 is partially arranged on the surface of the second electrode plate 13 away from the substrate 10, and the fourth electrode plate 251 is arranged on the surface of the second gate insulating layer 24 away from the first gate insulating layer 22.

[0107] According to the display panel provided in the above embodiments of the present application, the embodiments of the present application also provide a method for manufacturing a display panel, which is used to manufacture a display panel provided in any of the above embodiments. Figure 5 as well as Figures 6a to 6d , Figure 5A flowchart of a method for manufacturing a first display panel provided in an embodiment of the present application, Figures 6a to 6d A schematic diagram of a first method for manufacturing a display panel provided in an embodiment of the present application, wherein the method for manufacturing a display panel comprises the following steps:

[0108] Step S1 : forming a light shielding layer 12 on a substrate 10 , wherein the light shielding layer 12 includes a first electrode plate 121 .

[0109] See also Figure 6a A light shielding layer 12 is formed on the substrate 10 , and the light shielding layer 12 includes a patterned first electrode plate 121 and a light shielding portion. A buffer layer 11 is also formed on the substrate 10 , and the buffer layer 11 covers the light shielding layer 12 .

[0110] Step S2 , forming a second electrode plate 13 on a side of the light shielding layer 12 away from the substrate 10 .

[0111] See also Figure 6a , step S2 includes: forming a first active layer 21, a first gate insulating layer 22, a second active layer 23, a second gate insulating layer 24 and a gate layer 25 on the buffer layer 11 in sequence, the first active layer 21 includes a second electrode 13, that is, the second electrode 13 is made of the same material as the first active layer 21, and the second electrode 13 and the first active layer 21 are prepared simultaneously using the same process.

[0112] Step S3 , forming a first source-drain electrode layer 14 and a second source-drain electrode layer 15 on a side of the light shielding layer 12 away from the substrate 10 , wherein the first source-drain electrode layer 14 includes a conductive electrode 141 , and the second source-drain electrode layer 15 includes a third electrode plate 150 .

[0113] See also Figure 6a , Figure 6b as well as Figure 6c Step S3 includes: forming an interlayer dielectric layer 18 on a side of the light shielding layer 12 away from the substrate 10, and forming a first opening 181 on the interlayer dielectric layer 18; forming a first source-drain electrode layer 14 on the interlayer dielectric layer 18; forming a passivation layer 17 on the interlayer dielectric layer 18 and the first source-drain electrode layer 14, the passivation layer 17 is continuously arranged along the bottom and sidewalls of the first opening 181, and is recessed above the first opening 181 to form a groove 171; forming a first flat layer 19 on the passivation layer 17, and forming a second opening 191 on a portion of the first flat layer 19 corresponding to the groove 171; forming a second source-drain electrode layer 15 on the first flat layer 19, and a third electrode 150 is partially formed in the groove 171.

[0114] See also Figure 6cThe third electrode plate 150 extends toward the second electrode plate 13 and is electrically connected to the first electrode plate 121 through the conductive electrode 141. Along the thickness direction of the display panel, the third electrode plate 150 overlaps with the second electrode plate 13 and the first electrode plate 121 to form a capacitor.

[0115] In some embodiments, see Figure 6d The method for manufacturing a display panel also includes: step S4: forming an anode layer 26, a first pixel definition layer 27, a second pixel definition layer 28, a light-emitting layer, a cathode layer and an encapsulation layer (not shown in the figure) on the first planar layer 19 and the second source and drain layer 15 in sequence.

[0116] According to the display panel provided in the above embodiment of the present application, the embodiment of the present application further provides a display device, see Figure 7 , Figure 7 The structure diagram of the display device provided in the embodiment of the present application is as follows. The display device 1000 includes a display panel 100 and a housing 200. The display panel 100 is disposed on the housing 200. The display device 1000 can be the display panel provided in any of the above embodiments. The display device provided in the embodiment of the present application can achieve the same technical effect as the display panel provided in any of the above embodiments, which will not be described in detail here.

[0117] Beneficial effects of the embodiments of the present application: The embodiments of the present application provide a display panel, a method for manufacturing a display panel, and a display device, wherein the display panel includes a substrate, a light-shielding layer, a second electrode plate, a first source-drain electrode layer, and a second source-drain electrode layer, wherein the light-shielding layer includes a first electrode plate, the first source-drain electrode layer includes a conductive electrode, the second source-drain electrode layer is arranged on a side of the first source-drain electrode layer away from the substrate, and the second source-drain electrode layer includes a third electrode plate, and the third electrode plate in the second source-drain electrode layer is used as a capacitor electrode, so that the third electrode plate is extended toward the direction of the second electrode plate, and the third electrode plate is electrically connected to the first electrode plate in the light-shielding layer through the conductive electrode in the first source-drain electrode layer, so that the third electrode plate overlaps with the second electrode plate and the first electrode plate to form a capacitor, thereby eliminating a metal layer originally used as a capacitor electrode, thereby simplifying the film layer structure of the display panel, and saving a photomask and a corresponding patterning process, thereby improving the process yield of the display panel and reducing the production cost of the display panel.

[0118] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0119] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0120] The embodiments, implementation methods and related technical features of the present application can be combined and replaced with each other without conflict.

[0121] The above are only preferred embodiments of the present application and do not constitute any form of limitation to the present application. However, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. A display panel, characterized in that: include: substrate; A light shielding layer, disposed on one side of the substrate, the light shielding layer comprising a first electrode plate; A second electrode plate is arranged on a side of the light shielding layer away from the substrate; A first source-drain electrode layer, disposed on a side of the light shielding layer away from the substrate, the first source-drain electrode layer comprising a conductive electrode; as well as A second source-drain electrode layer, disposed on a side of the first source-drain electrode layer away from the substrate; Among them, the second source and drain layer includes a third electrode plate, which is extended in the direction of the second electrode plate. The third electrode plate is electrically connected to the first electrode plate through the conductive electrode. Along the thickness direction of the display panel, the third electrode plate overlaps with the second electrode plate and the first electrode plate to form a capacitor.

2. The display panel according to claim 1, wherein: The display panel further includes a passivation layer, which is arranged on a side of the first source and drain layer away from the substrate. The portion of the passivation layer corresponding to the second electrode plate is recessed toward the second electrode plate to form a groove, and the third electrode plate is partially arranged in the groove.

3. The display panel according to claim 2, wherein: The third electrode plate comprises: A main body, arranged at the bottom of the groove; A first connecting portion, disposed on a side wall of the groove, the first connecting portion being connected to the main body; The second connection portion is disposed on the passivation layer at the periphery of the groove, one end of the second connection portion is connected to the first connection portion, and the other end of the second connection portion is connected to the conductive electrode.

4. The display panel according to claim 2, wherein: The display panel also includes an interlayer dielectric layer, which is partially arranged between the second electrode plate and the first source and drain layer. A first opening is formed on the part of the interlayer dielectric layer corresponding to the second electrode plate. The passivation layer is continuously arranged along the bottom and side walls of the first opening and is recessed above the first opening to form the groove.

5. The display panel according to claim 4, wherein: The display panel further includes a first planar layer, wherein the first planar layer is disposed on the passivation layer, and a portion of the second source and drain electrode layer is disposed on the first planar layer; A second opening is formed in a portion of the first flat layer corresponding to the third electrode plate, and an orthographic projection of the third electrode plate on the substrate is located within an orthographic projection of the second opening on the substrate.

6. The display panel according to claim 5, wherein: The display panel further includes a second planar layer, which is disposed on the first planar layer and the second source-drain electrode layer and fills the second opening.

7. The display panel according to claim 6, wherein: The material of the first planar layer includes polyimide, and the material of the second planar layer includes acrylate.

8. The display panel according to claim 1, wherein: The display panel further includes a first active layer, which is disposed on a side of the light shielding layer away from the substrate, a material of the first active layer includes an oxide semiconductor material, and the first active layer includes the second electrode plate.

9. The display panel according to claim 1, wherein: The display panel further includes: A first active layer is disposed on a side of the light shielding layer away from the substrate, wherein the material of the first active layer includes an oxide semiconductor material; The gate layer is arranged on a side of the first active layer away from the substrate, and the gate layer includes the second electrode plate.

10. The display panel according to claim 9, wherein: The display panel further includes: a first gate insulating layer, disposed on the substrate and the first active layer; A second active layer is disposed on the first gate insulating layer, wherein a material of the second active layer includes a silicon semiconductor material; a second gate insulating layer, disposed on the first gate insulating layer and the second active layer, and the gate layer is disposed on the second gate insulating layer; Part of the first gate insulating layer and the second gate insulating layer are disposed between the second electrode plate and the first electrode plate.

11. The display panel according to claim 1, wherein: The display panel further includes: A first active layer, disposed on a side of the light shielding layer away from the substrate, the first active layer comprising the second electrode plate; The gate layer is arranged on a side of the first active layer away from the substrate, and the gate layer includes a fourth electrode plate. Along the thickness direction of the display panel, the third electrode plate and the fourth electrode plate, the second electrode plate and the first electrode plate are overlapped to form the capacitor.

12. The display panel according to claim 11, wherein: The display panel further includes: a first gate insulating layer, disposed on the substrate and the first active layer; a second active layer, disposed on the first gate insulating layer; a second gate insulating layer, disposed on the first gate insulating layer and the second active layer, and the gate layer is disposed on the second gate insulating layer; Part of the first gate insulating layer and the second gate insulating layer are arranged between the second electrode plate and the fourth electrode plate.

13. The display panel according to any one of claims 1 to 12, characterized in that: The display panel includes a display area and a gate driving circuit area arranged outside the display area, the gate driving circuit area is provided with a gate driving circuit, and the second source and drain layer includes a signal bus, and the signal bus is arranged in the gate driving circuit area.

14. The display panel according to claim 13, wherein: The display area is provided with a plurality of first transistors, and the gate driving circuit includes a plurality of second transistors; The first transistor includes a first active portion, and a material of the first active portion includes an oxide semiconductor material; the second transistor includes a second active portion, and a material of the second active portion includes an oxide semiconductor material or a silicon semiconductor material.

15. A method for manufacturing a display panel, characterized in that: Used to manufacture the display panel according to any one of claims 1 to 14, the manufacturing method of the display panel comprises the following steps: forming a light shielding layer on the substrate, wherein the light shielding layer comprises a first electrode plate; forming a second electrode plate on a side of the light shielding layer away from the substrate; forming a first source-drain electrode layer and a second source-drain electrode layer on a side of the light shielding layer away from the substrate, wherein the first source-drain electrode layer comprises a conductive electrode, and the second source-drain electrode layer comprises a third electrode plate; The third electrode plate is extended toward the second electrode plate, and is electrically connected to the first electrode plate through the conductive electrode. Along the thickness direction of the display panel, the third electrode plate overlaps with the second electrode plate and the first electrode plate to form a capacitor.

16. The method for manufacturing a display panel according to claim 15, wherein: The forming of the first source-drain electrode layer and the second source-drain electrode layer on the side of the light shielding layer away from the substrate comprises the following steps: An interlayer dielectric layer is formed on a side of the light shielding layer away from the substrate, wherein a first opening is formed on the interlayer dielectric layer; forming the first source-drain electrode layer on the interlayer dielectric layer; forming a passivation layer on the interlayer dielectric layer and the first source-drain electrode layer, wherein the passivation layer is continuously disposed along the bottom and sidewalls of the first opening and a groove is formed above the first opening; forming a first flat layer on the passivation layer, wherein a second opening is formed at a portion of the first flat layer corresponding to the groove; The second source-drain electrode layer is formed on the first planar layer, and the third electrode portion is formed in the groove.

17. A display device, characterized in that: Comprising the display panel as claimed in any one of claims 1 to 14.

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