Display panel, display panel manufacturing method and display device

By using the third electrode of the second source-drain layer as the capacitor electrode in the display panel, the film structure is simplified, the process yield is improved, and the production cost is reduced, while the capacitance of the capacitor is optimized.

CN119947443BActive Publication Date: 2025-11-14GUANGZHOU CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
CN202510121539.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-01-24
Publication Date
2025-11-14
Estimated Expiration
2045-01-24

AI Technical Summary

Technical Problem

Liquid crystal display panels and organic light-emitting diode display panels have complex structures and a large number of film layers, resulting in low process yields and high costs.

Method used

By using the third electrode in the second source-drain layer as a capacitor electrode and extending it toward the second electrode, and electrically connecting it to the first electrode in the light-shielding layer through a conductive electrode, a metal layer that was originally used as a capacitor electrode is eliminated, simplifying the film structure of the display panel.

Benefits of technology

The simplified film structure of the display panel improved the process yield, reduced production costs, and optimized the capacitance of the capacitor.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119947443B_ABST
    Figure CN119947443B_ABST
Patent Text Reader

Abstract

This application provides a display panel, a method for manufacturing the display panel, and a display device. The display panel includes a substrate, a light-shielding layer, a second electrode plate, a first source-drain layer, and a second source-drain layer. The light-shielding layer includes the first electrode plate, and the first source-drain layer includes conductive electrodes. The second source-drain layer is disposed on the side of the first source-drain layer away from the substrate. The second source-drain layer includes a third electrode plate. By using the third electrode plate in the second source-drain layer as a capacitor electrode, the third electrode plate is extended toward the second electrode plate. The third electrode plate is electrically connected to the first electrode plate in the light-shielding layer through the conductive electrodes in the first source-drain layer, so that the third electrode plate, the second electrode plate, and the first electrode plate overlap to form a capacitor. Therefore, a metal layer that originally served as a capacitor electrode can be eliminated, thereby simplifying the film structure of the display panel and saving a photomask, thereby improving the process yield of the display panel and reducing the production cost of the display panel.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display panel, a method for manufacturing the display panel, and a display device. Background Technology

[0002] In the field of display technology, liquid crystal display (LCD) technology and active matrix organic light-emitting diode (AMOLED) display technology have been widely used due to their many advantages, such as thin body, high image quality, power saving and no radiation.

[0003] Currently, liquid crystal display panels and organic light-emitting diode display panels have complex structures, a large number of film layers, and require a large number of photomasks. This not only increases time and material costs but also leads to a lower process yield for display panels.

[0004] Therefore, it is necessary to provide a display panel, a method for manufacturing the display panel, and a display device to improve this deficiency. Summary of the Invention

[0005] The embodiments of this application provide a display panel, a method for manufacturing the display panel, and a display device, which can simplify the structure of the display panel, improve the process yield of the display panel, and reduce the production cost of the display panel.

[0006] To achieve the above objectives, according to a first aspect of this application, a display panel is provided, comprising:

[0007] Substrate;

[0008] A light-shielding layer is disposed on one side of the substrate, and the light-shielding layer includes a first electrode plate;

[0009] The second electrode plate is disposed on the side of the light-shielding layer away from the substrate;

[0010] A first source / drain layer is disposed on the side of the light-shielding layer away from the substrate, and the first source / drain layer includes conductive electrodes; and

[0011] The second source / drain layer is disposed on the side of the first source / drain layer away from the substrate;

[0012] The second source-drain layer includes a third electrode plate, which extends toward the second electrode plate. The third electrode plate is electrically connected to the first electrode plate through the conductive electrode. Along the thickness direction of the display panel, the third electrode plate, the second electrode plate, and the first electrode plate overlap to form a capacitor.

[0013] Optionally, the display panel further includes a passivation layer, which is disposed on the side of the first source / drain layer away from the substrate. The portion of the passivation layer corresponding to the second electrode plate is recessed toward the second electrode plate to form a groove, and the third electrode plate portion is disposed in the groove.

[0014] Optionally, the third electrode plate includes:

[0015] The main body is located at the bottom of the groove;

[0016] A first connecting part is disposed on the side wall of the groove, and the first connecting part is connected to the main body part;

[0017] The second connection portion is disposed on the passivation layer surrounding the groove. One end of the second connection portion is connected to the first connection portion, and the other end of the second connection portion is connected to the conductive electrode.

[0018] Optionally, the display panel further includes an interlayer dielectric layer, which is partially disposed between the second electrode plate and the first source / drain electrode layer. The portion of the interlayer dielectric layer corresponding to the second electrode plate has a first opening. The passivation layer is continuously disposed along the bottom and sidewall of the first opening and is recessed above the first opening to form the groove.

[0019] Optionally, the display panel further includes a first planarization layer disposed on the passivation layer, and the second source / drain layer is partially disposed on the first planarization layer;

[0020] Wherein, the portion of the first planarization layer corresponding to the third electrode plate has a second opening, and the orthographic projection of the third electrode plate on the substrate is located within the orthographic projection of the second opening on the substrate.

[0021] Optionally, the display panel further includes a second planarization layer disposed on the first planarization layer and the second source-drain layer, and filling the second opening.

[0022] Optionally, the material of the first planarization layer includes polyimide, and the material of the second planarization layer includes acrylate.

[0023] Optionally, the display panel further includes a first active layer disposed on the side of the light-shielding layer away from the substrate, the first active layer being made of an oxide semiconductor material, and the first active layer including a second electrode plate.

[0024] Optionally, the display panel further includes:

[0025] A first active layer is disposed on the side of the light-shielding layer away from the substrate, and the material of the first active layer includes an oxide semiconductor material;

[0026] A gate layer is disposed on the side of the first active layer away from the substrate, and the gate layer includes the second electrode plate.

[0027] Optionally, the display panel further includes:

[0028] A first gate insulating layer is disposed on the substrate and the first active layer;

[0029] The second active layer is disposed on the first gate insulating layer, and the material of the second active layer includes silicon semiconductor material;

[0030] A second gate insulating layer is disposed on the first gate insulating layer and the second active layer, wherein the gate layer is disposed on the second gate insulating layer;

[0031] The first gate insulating layer and the second gate insulating layer are partially disposed between the second electrode plate and the first electrode plate.

[0032] Optionally, the display panel further includes:

[0033] A first active layer is disposed on the side of the light-shielding layer away from the substrate, and the first active layer includes the second electrode plate;

[0034] A gate layer is disposed on the side of the first active layer away from the substrate. The gate layer includes a fourth electrode plate. Along the thickness direction of the display panel, the third electrode plate, the fourth electrode plate, the second electrode plate, and the first electrode plate are overlapped to form the capacitor.

[0035] Optionally, the display panel further includes:

[0036] A first gate insulating layer is disposed on the substrate and the first active layer;

[0037] The second active layer is disposed on the first gate insulating layer;

[0038] A second gate insulating layer is disposed on the first gate insulating layer and the second active layer, wherein the gate layer is disposed on the second gate insulating layer;

[0039] The first gate insulating layer and the second gate insulating layer are partially disposed between the second electrode plate and the fourth electrode plate.

[0040] Optionally, the display panel includes a display area and a gate driving circuit area disposed around the display area. The gate driving circuit area is provided with a gate driving circuit, and the second source-drain layer includes a signal bus, which is disposed in the gate driving circuit area.

[0041] Optionally, the display area is provided with a plurality of first transistors, and the gate driving circuit includes a plurality of second transistors;

[0042] The first transistor includes a first active portion, the material of which is an oxide semiconductor material; the second transistor includes a second active portion, the material of which is an oxide semiconductor material or a silicon semiconductor material.

[0043] According to a second aspect of this application, a method for manufacturing a display panel is provided, for manufacturing a display panel as described above, the method comprising the following steps:

[0044] A light-shielding layer is formed on a substrate, the light-shielding layer including a first electrode plate;

[0045] A second electrode is formed on the side of the light-shielding layer away from the substrate;

[0046] A first source / drain layer and a second source / drain layer are formed on the side of the light-shielding layer away from the substrate. The first source / drain layer includes a conductive electrode, and the second source / drain layer includes a third electrode plate.

[0047] The third electrode plate extends toward the second electrode plate and is electrically connected to the first electrode plate through the conductive electrode. Along the thickness direction of the display panel, the third electrode plate, the second electrode plate, and the first electrode plate overlap to form a capacitor.

[0048] Optionally, forming the first source / drain layer and the second source / drain layer on the side of the light-shielding layer away from the substrate includes the following steps:

[0049] An interlayer dielectric layer is formed on the side of the light-shielding layer away from the substrate, and a first opening is formed on the interlayer dielectric layer;

[0050] The first source / drain layer is formed on the interlayer dielectric layer;

[0051] A passivation layer is formed on the interlayer dielectric layer and the first source-drain layer. The passivation layer is continuously disposed along the bottom and sidewall of the first opening and a groove is formed above the first opening.

[0052] A first planarization layer is formed on the passivation layer, and a second opening is formed on the portion of the first planarization layer corresponding to the groove.

[0053] The second source / drain layer is formed on the first planarization layer, and the third electrode portion is formed in the groove.

[0054] According to a third aspect of this application, a display device is provided, including a display panel as described above.

[0055] In the display panel of this application embodiment, the third electrode in the second source-drain layer is used as the capacitor electrode, and the third electrode is extended toward the second electrode. The third electrode is electrically connected to the first electrode in the light-shielding layer through the conductive electrode in the first source-drain layer, so that the third electrode, the second electrode, and the first electrode overlap to form a capacitor. Therefore, a metal layer that was originally used as the capacitor electrode can be eliminated, thereby simplifying the film structure of the display panel. It can also save a photomask and the corresponding patterning process, thereby improving the process yield of the display panel and reducing the production cost of the display panel.

[0056] Other features and advantages of this application will be described in detail in the following detailed description section. Attached Figure Description

[0057] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0058] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings, wherein the same reference numerals in the following description denote the same parts.

[0059] Figure 1 A schematic diagram of the structure of a first type of display panel provided for an embodiment of this application;

[0060] Figure 2 A schematic diagram of the structure of a second display panel provided for an embodiment of this application;

[0061] Figure 3 A schematic diagram of the structure of a third type of display panel provided for an embodiment of this application;

[0062] Figure 4 A schematic diagram of the structure of a fourth display panel provided for an embodiment of this application;

[0063] Figure 5 A flowchart illustrating a method for manufacturing a first display panel according to an embodiment of this application;

[0064] Figures 6a to 6dA schematic diagram illustrating a method for manufacturing a first display panel according to an embodiment of this application;

[0065] Figure 7 This is a schematic diagram of the structure of a display device provided in an embodiment of this application.

[0066] Explanation of reference numerals in the attached figures:

[0067] 10. Substrate; 11. Buffer layer; 12. Light-shielding layer; 121. First electrode plate; 13. Second electrode plate; 14. First source / drain layer; 141. Conductive electrode; 15. Second source / drain layer; 150. Third electrode plate; 151. Main body; 152. First connection portion; 153. Second connection portion; 154. Signal bus; 155. Terminal; 16. Capacitor; 17. Passivation layer; 171. Groove; 18. Interlayer dielectric layer; 181. First opening; 19. First planarization layer; 191. Second opening;

[0068] 20. Second planarization layer; 21. First active layer; 22. First gate insulating layer; 23. Second active layer; 24. Second gate insulating layer; 25. Gate layer; 251. Fourth electrode plate; 26. Anode layer; 27. First pixel definition layer; 28. Second pixel definition layer;

[0069] T1, first transistor; T1A, first active part; T2, second transistor; T2A, second active part;

[0070] AA, Display area; GOA, Gate drive circuit area; BA, Bonding area;

[0071] 100, Display panel; 200, Housing; 1000, Display device. Detailed Implementation

[0072] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the protection scope of this application.

[0073] An embodiment of this application provides a display panel, which includes a substrate, a light-shielding layer, a second electrode plate, a first source-drain layer, and a second source-drain layer. The light-shielding layer is disposed on one side of the substrate and includes a first electrode plate. The second electrode plate is disposed on the side of the light-shielding layer away from the substrate. The first source-drain layer is disposed on the side of the light-shielding layer away from the substrate and includes a conductive electrode. The second source-drain layer is disposed on the side of the first source-drain layer away from the substrate and includes a third electrode plate. The third electrode plate extends toward the second electrode plate and is electrically connected to the first electrode plate through a conductive electrode. Along the thickness direction of the display panel, the third electrode plate, the second electrode plate, and the first electrode plate overlap to form a capacitor.

[0074] In the display panel of this application embodiment, the third electrode in the second source-drain layer is used as the capacitor electrode, and the third electrode is extended toward the second electrode. The third electrode is electrically connected to the first electrode in the light-shielding layer through the conductive electrode in the first source-drain layer, so that the third electrode, the second electrode, and the first electrode overlap to form a capacitor. Therefore, a metal layer that was originally used as the capacitor electrode can be eliminated, thereby simplifying the film structure of the display panel. It can also save a photomask and the corresponding patterning process, thereby improving the process yield of the display panel and reducing the production cost of the display panel.

[0075] Please see Figure 1 , Figure 1 This is a schematic diagram of the structure of a first display panel provided in an embodiment of this application. The display panel 100 includes a substrate 10, a light-shielding layer 12, a second electrode plate 13, a first source-drain layer 14, and a second source-drain layer 15. The light-shielding layer 12 is disposed on one side of the substrate 10 and includes a first electrode plate 121. The second electrode plate 13 is disposed on the side of the light-shielding layer 12 away from the substrate 10. The first source-drain layer 14 is disposed on the side of the light-shielding layer 12 away from the substrate 10 and includes a conductive electrode 141. The second source-drain layer 15 is disposed on the side of the first source-drain layer 14 away from the substrate 10 and includes a third electrode plate 150. The third electrode plate 150 extends toward the second electrode plate 13 and is electrically connected to the first electrode plate 121 through the conductive electrode 141. Along the thickness direction of the display panel, the third electrode plate 150 overlaps with the second electrode plate 13 and the first electrode plate 121 to form a capacitor 16.

[0076] It should be noted that the relevant technology involves adding a second gate layer on top of the existing gate layer to utilize the second gate layer as a capacitor electrode in the formation of capacitance. This not only makes the film structure of the display panel more complex but also requires an additional photomask and corresponding processes, which increases both time and material costs. Furthermore, it leads to a decrease in the yield rate of the display panel, ultimately resulting in a higher production cost.

[0077] In the embodiments of this application, by using the third electrode 150 in the second source-drain layer 15 as the capacitor electrode, the third electrode 150 is extended toward the second electrode 13. The third electrode 150 is electrically connected to the first electrode 121 in the light-shielding layer 12 through the conductive electrode 141 in the first source-drain layer 14, so that the third electrode 150, the second electrode 13 and the first electrode 121 overlap to form a capacitor 16. Therefore, a metal layer that was originally used as the capacitor electrode can be eliminated, thereby simplifying the film structure of the display panel. It can also save a photomask and the corresponding patterning process, thereby improving the process yield of the display panel and reducing the production cost of the display panel.

[0078] It should be noted that the overlapping arrangement of the third electrode plate 150 with the second electrode plate 13 and the first electrode plate 121 means that the third electrode plate 150, the second electrode plate 13 and the first electrode plate 121 are respectively disposed on different film layers, and the orthographic projection of the third electrode plate 150 on the substrate 10 overlaps with the orthographic projection of the second electrode plate 13 on the substrate 10 and the orthographic projection of the first electrode plate 121 on the substrate 10. In this way, not only can a capacitor 16 be formed, but the capacitance of the capacitor 16 can also be increased.

[0079] In some embodiments, please refer to Figure 1 The display panel 100 also includes a passivation layer 17, which is disposed on the side of the first source-drain layer 14 away from the substrate 10. The portion of the passivation layer 17 corresponding to the second electrode 13 is recessed toward the second electrode 13 and forms a groove 171. The third electrode 150 is partially disposed in the groove 171.

[0080] Please see Figure 1 The cross-sectional shape of the groove 171 is an inverted trapezoid. By making the passivation layer 17 recessed towards the second electrode plate 13 to form a groove 171, and by placing the third electrode plate 150 in the groove 171, the third electrode plate 150 can be extended towards the second electrode plate 13. This reduces the distance between the third electrode plate 150 and the second electrode plate 13, thereby simplifying the film structure of the display panel and optimizing the capacitor structure, thereby increasing the capacitance of the capacitor.

[0081] In some embodiments, please refer to Figure 1 The third electrode plate 150 includes a main body 151, a first connecting part 152 and a second connecting part 153. The main body 151 is disposed at the bottom of the groove 171. The first connecting part 152 is disposed on the side wall of the groove 171 and is connected to the main body 151. The second connecting part 153 is disposed on the passivation layer 17 around the groove 171. One end of the second connecting part 153 is connected to the first connecting part 152 and the other end of the second connecting part 153 is connected to the conductive electrode 141.

[0082] In some embodiments, please refer to Figure 1 The main body 151 is the primary component of the third electrode plate 150 that participates in forming the capacitor structure. The main body 151 is laid flat on the passivation layer 17 at the bottom of the groove 171 and is directly opposite the second electrode plate 13. The lower surface of the passivation layer 17 is in direct contact with the upper surface of the second electrode plate 13, and the upper surface of the passivation layer 17 is in direct contact with the lower surface of the main body 151 of the third electrode plate 150. The first connecting portion 152 is inclined and disposed on the side wall of the groove 171, and the second connecting portion 153 is laid flat on the passivation layer 17 surrounding the groove 171. This reduces the distance between the third electrode plate 150 and the second electrode plate 13, thereby simplifying the film layer structure of the display panel while optimizing the capacitor structure, thus increasing the capacitor's capacitance.

[0083] In some embodiments, please refer to Figure 1 The display panel 100 also includes an interlayer dielectric layer 18, which is partially disposed between the second electrode plate 13 and the first source-drain electrode layer 14. The portion of the interlayer dielectric layer 18 corresponding to the second electrode plate 13 has a first opening 181. The passivation layer 17 is continuously disposed along the bottom and sidewall of the first opening 181 and is recessed above the first opening 181 to form a groove 171.

[0084] In some embodiments, please refer to Figure 1 A plurality of first openings 181 are formed on the interlayer dielectric layer 18, and the cross-sectional shape of the first opening 181 is an inverted trapezoid. In the thickness direction of the display panel, the first opening 181 is directly opposite the second electrode plate 13, penetrating the interlayer dielectric layer 18 and exposing at least a portion of the upper surface of the second electrode plate 13. A passivation layer 17 is partially disposed on the surface of the interlayer dielectric layer 18 away from the substrate, and the remaining portion of the passivation layer 17 is continuously disposed along the bottom and sidewalls of the first opening 181, forming a recess 171 above the first opening 181. By forming the first opening 181 on the interlayer dielectric layer 18 and recessing the passivation layer 17 above the first opening 181 to form the recess 171, the distance between the third electrode plate 150 in the second source / drain layer 15 and the second electrode plate 13 located below it is increased. This simplifies the film structure of the display panel while optimizing the capacitor structure, thereby improving the capacitance.

[0085] In some embodiments, please refer to Figure 1The display panel 100 also includes a first planarization layer 19, which is disposed on the passivation layer 17. A second source / drain layer 15 is partially disposed on the first planarization layer 19. A second opening 191 is formed on the portion of the first planarization layer 19 corresponding to the third electrode 150. The orthographic projection of the third electrode 150 onto the substrate 10 lies within the orthographic projection of the second opening 191 onto the substrate 10. Since the second source / drain layer 15 is fabricated after the first planarization layer 19, by providing the second opening 191 on the first planarization layer 19 and aligning the second opening 191 with the first opening 181, it is easier to form the third electrode 150 in the groove 171. This simplifies the film structure of the display panel while optimizing the capacitor structure, thereby increasing the capacitor's capacitance.

[0086] In some embodiments, please refer to Figure 1 Along the thickness direction of the first planarization layer 19, the second opening 191 penetrates the first planarization layer 19 and exposes the passivation layer 17 and the groove 171. The diameter of the second opening 191 or the diameter of the outer circle of the second opening 191 is greater than the diameter of the first opening 181 or the diameter of the outer circle of the first opening 181, so that the third electrode plate 150 can be formed on the passivation layer 17 at the bottom of the second opening 191.

[0087] In some embodiments, please refer to Figure 1 The display panel 100 also includes a second planarization layer 20, which is disposed on the first planarization layer 19 and the second source / drain layer 15 and fills the second opening 191.

[0088] In some embodiments, the first planarization layer 19 is made of polyimide, and the second planarization layer 20 is made of acrylate. By selecting polyimide as the material of the first planarization layer 19, the yield of the semi-mask lithography process can be ensured. Optimizing the material of the second planarization layer 20, and selecting acrylate as the material of the second planarization layer 20, can improve the photosensitivity of the second planarization layer 20 and reduce the exposure process time of the second planarization layer 20. This not only improves process efficiency but also improves the planarity of the second planarization layer 20.

[0089] In some embodiments, please refer to Figure 1 The display panel 100 also includes a first active layer 21, which is disposed on the side of the light-shielding layer 12 away from the substrate 10. The material of the first active layer 21 includes an oxide semiconductor material, and the first active layer 21 includes a second electrode 13. Using the second electrode 13 in the first active layer 21 as the capacitor electrode does not increase the film structure of the display panel, nor does it increase the number of photomasks, which is beneficial to improving the yield of the display panel and reducing the production cost of the display panel.

[0090] In some embodiments, please refer to Figure 1 The display panel 100 further includes a buffer layer 11, a first gate insulating layer 22, a second active layer 23, a second gate insulating layer 24, and a gate layer 25. The buffer layer 11 is disposed on the substrate 10 and the light-shielding layer 12. The first active layer 21 and the first gate insulating layer 22 are both disposed on the buffer layer 11. The second active layer 23 is disposed on the first gate insulating layer 22. The second gate insulating layer 24 is disposed on the first gate insulating layer 22 and the second active layer 23. The gate layer 25 is disposed on the second gate insulating layer 24.

[0091] The material of the first active layer 21 includes an oxide semiconductor material, which can be indium gallium zinc oxide. The material of the second active layer 23 includes a silicon semiconductor material, which can be amorphous silicon or polycrystalline silicon.

[0092] In some embodiments, please refer to Figure 1 The display panel 100 includes a display area AA and a gate driving circuit area GOA disposed around the display area AA. The gate driving circuit area GOA is provided with a gate driving circuit. The second source-drain layer 15 includes a signal bus 154, which is located in the gate driving circuit area GOA. By placing the signal bus 154 above the gate driving circuit in the gate driving circuit area GOA, the bezel width of the display panel 100 can be reduced, thereby achieving a narrow bezel effect. Furthermore, by using the third electrode plate of the second source-drain layer 15 to form a capacitor with the first electrode plate 121 and the second electrode plate 13, the bezel width of the display panel can be reduced while optimizing the capacitor structure, simplifying the film layer structure of the display panel, and saving a photomask and corresponding processes. This can improve the process yield of the display panel and reduce the production cost of the display panel.

[0093] In some embodiments, please refer to Figure 1 The display area AA is provided with a plurality of first transistors T1, and the gate driving circuit includes a plurality of second transistors T2. The first transistor T1 includes a first active part T1A, and the material of the first active part T1A includes silicon semiconductor material; the second transistor T2 includes a second active part T2A, and the material of the second active part T2A includes silicon semiconductor material.

[0094] In some embodiments, please refer to Figure 1 The first active layer 21 includes a first active part T1A, and the second active layer 23 includes a second active part T2A.

[0095] In some embodiments, please refer to Figure 1 The bonding area BA is provided with terminal 155, and the second source-drain layer 15 includes terminal 155.

[0096] In some embodiments, please refer to Figure 1The display panel 100 is an organic light-emitting diode display panel. The display panel 100 also includes an anode layer 26, a first pixel definition layer 27, and a second pixel definition layer 28. The anode layer 26 is disposed on the second planarization layer 20, and the first pixel definition layer 27 and the second pixel definition layer 28 are sequentially stacked on the second planarization layer 20 and the anode layer 26.

[0097] In some embodiments, the display panel 100 further includes a light-emitting layer, a cathode, and an encapsulation layer (not shown in the figure). It should be noted that... Figure 1 This illustration only shows the structure of the capacitors in the display panel and does not represent the film structure of the display panel 100 in actual applications.

[0098] In some other embodiments, the type of display panel 100 is not limited to the organic light-emitting diode display panel in the above embodiments; the display panel 100 may also be a liquid crystal display panel or a micro light-emitting diode display panel.

[0099] In some embodiments, please refer to Figure 2 , Figure 2 This is a schematic diagram of the structure of a second type of display panel provided in an embodiment of this application. Its structure is similar to... Figure 1 The structures of the display panels shown are roughly the same, the difference being that the display panel 100 is provided with a first active layer 21, while the display panel 100 is not provided with a second active layer 23.

[0100] Specifically, please refer to Figure 2 The first active layer 21 includes a first active portion T1A and a second active portion T2A. Both the first active portion T1A and the second active portion T2A are made of oxide semiconductor material; that is, the first transistor T1 in the display area AA and the second transistor T2 in the gate drive circuit area GOA are both oxide transistors. This allows for… Figure 1 Based on the illustrated embodiment, one less photomask is required, which would otherwise be needed for etching to form the second active layer 23. Therefore, Figure 2 The embodiments shown can further simplify the film layer structure of the display panel and further reduce the production cost of the display panel.

[0101] In some embodiments, please refer to Figure 2 The display panel 100 has only one gate insulating layer, namely the first gate insulating layer 22, which is disposed on the first active layer 21, and the gate 25 is disposed on the first gate insulating layer 22.

[0102] In some embodiments, please refer to Figure 3 , Figure 3 This is a schematic diagram of the structure of a third type of display panel provided in an embodiment of this application. Its structure is similar to... Figure 1The structures of the display panels shown are roughly the same, except that the gate layer 25 includes a second electrode plate 13.

[0103] Specifically, please refer to Figure 3 The gate layer 25 includes a second electrode plate 13, meaning the material of the second electrode plate 13 is the same as that of the gate layer 25, both being metal or alloy. Furthermore, the second electrode plate 13 and the gate layer 25 can share the same photomask and be fabricated using the same process. Compared to... Figure 1 and Figure 2 The embodiment shown, Figure 3 The embodiment shown uses gate layer 25 as the second electrode plate. Compared with semiconductor materials, metals or alloys have lower resistance, which can further increase the capacitance of capacitor 16.

[0104] In some embodiments, please refer to Figure 3 The first gate insulating layer 22 and the second gate insulating layer 24 are partially disposed between the second electrode plate 13 and the first electrode plate 121.

[0105] In some embodiments, please refer to Figure 4 , Figure 4 This is a schematic diagram of the structure of a fourth display panel provided in an embodiment of this application, and its structure is similar to... Figure 1 The structures of the display panels shown are largely the same, with the difference being that the gate layer 25 includes a fourth electrode 251, and the third electrode 150, the fourth electrode 251, the second electrode 13, and the first electrode 121 are overlapped to form a capacitor 16. This not only simplifies the film layer structure of the display panel and increases the capacitance, but also saves a photomask and the corresponding patterning process, thereby improving the process yield of the display panel and reducing its production cost.

[0106] Specifically, please refer to Figure 4 The first active layer 21 includes a second electrode plate 13 disposed on the first electrode plate 121. A fourth electrode plate 251 is disposed between the second electrode plate 13 and the third electrode plate 150. A first gate insulating layer 22 and a second gate insulating layer 24 are partially stacked between the second electrode plate 13 and the fourth electrode plate 251. The first gate insulating layer 22 is partially disposed on the surface of the second electrode plate 13 away from the substrate 10, and the fourth electrode plate 251 is disposed on the surface of the second gate insulating layer 24 away from the first gate insulating layer 22.

[0107] Based on the display panel provided in the above embodiments of this application, embodiments of this application also provide a method for manufacturing a display panel as provided in any of the above embodiments. Please refer to... Figure 5 as well as Figures 6a to 6d , Figure 5A flowchart illustrating a method for manufacturing a first display panel according to an embodiment of this application. Figures 6a to 6d A schematic diagram illustrating a first method for manufacturing a display panel according to an embodiment of this application. The method for manufacturing the display panel includes the following steps:

[0108] Step S1: A light-shielding layer 12 is formed on the substrate 10. The light-shielding layer 12 includes a first electrode plate 121.

[0109] Please see Figure 6a A light-shielding layer 12 is formed on the substrate 10, and the light-shielding layer 12 includes a patterned first electrode plate 121 and a light-shielding portion. A buffer layer 11 is also formed on the substrate 10, and the buffer layer 11 covers the light-shielding layer 12.

[0110] Step S2: Form a second electrode plate 13 on the side of the light-shielding layer 12 away from the substrate 10.

[0111] Please see Figure 6a Step S2 includes: sequentially forming a first active layer 21, a first gate insulating layer 22, a second active layer 23, a second gate insulating layer 24, and a gate layer 25 on the buffer layer 11. The first active layer 21 includes a second electrode plate 13, that is, the second electrode plate 13 is made of the same material as the first active layer 21, and the second electrode plate 13 and the first active layer 21 are prepared simultaneously using the same process.

[0112] Step S3: A first source-drain layer 14 and a second source-drain layer 15 are formed on the side of the light-shielding layer 12 away from the substrate 10. The first source-drain layer 14 includes a conductive electrode 141, and the second source-drain layer 15 includes a third electrode plate 150.

[0113] Please see Figure 6a , Figure 6b as well as Figure 6c Step S3 includes: forming an interlayer dielectric layer 18 on the side of the light-shielding layer 12 away from the substrate 10, and forming a first opening 181 on the interlayer dielectric layer 18; forming a first source-drain layer 14 on the interlayer dielectric layer 18; forming a passivation layer 17 on the interlayer dielectric layer 18 and the first source-drain layer 14, the passivation layer 17 being continuously disposed along the bottom and sidewall of the first opening 181, and forming a groove 171 above the first opening 181; forming a first planarization layer 19 on the passivation layer 17, and forming a second opening 191 on the portion of the first planarization layer 19 corresponding to the groove 171; forming a second source-drain layer 15 on the first planarization layer 19, and forming a third electrode plate 150 in part of the groove 171.

[0114] Please see Figure 6cThe third electrode plate 150 extends toward the second electrode plate 13. The third electrode plate 150 is electrically connected to the first electrode plate 121 through the conductive electrode 141. Along the thickness direction of the display panel, the third electrode plate 150, the second electrode plate 13, and the first electrode plate 121 overlap to form a capacitor.

[0115] In some embodiments, please refer to Figure 6d The method for manufacturing the display panel also includes: Step S4: An anode layer 26, a first pixel definition layer 27, a second pixel definition layer 28, a light-emitting layer, a cathode layer and an encapsulation layer (not shown in the figure) are sequentially formed on the first planarization layer 19 and the second source-drain layer 15.

[0116] Based on the display panel provided in the above embodiments of this application, embodiments of this application also provide a display device. Please refer to [link to relevant documentation]. Figure 7 , Figure 7 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. The display device 1000 includes a display panel 100 and a housing 200, with the display panel 100 disposed on the housing 200. The display device 1000 can be any of the display panels provided in the above embodiments. The display device provided in the embodiments of this application can achieve the same technical effects as the display panels provided in any of the above embodiments, and will not be described in detail here.

[0117] The beneficial effects of the embodiments of this application are as follows: The embodiments of this application provide a display panel, a method for manufacturing a display panel, and a display device. The display panel includes a substrate, a light-shielding layer, a second electrode plate, a first source-drain layer, and a second source-drain layer. The light-shielding layer includes a first electrode plate, and the first source-drain layer includes a conductive electrode. The second source-drain layer is disposed on the side of the first source-drain layer away from the substrate. The second source-drain layer includes a third electrode plate. By using the third electrode plate in the second source-drain layer as a capacitor electrode, the third electrode plate is extended toward the second electrode plate. The third electrode plate is electrically connected to the first electrode plate in the light-shielding layer through the conductive electrode in the first source-drain layer, so that the third electrode plate, the second electrode plate, and the first electrode plate overlap to form a capacitor. Therefore, a metal layer that was originally used as a capacitor electrode can be eliminated, thereby simplifying the film structure of the display panel. It can also save a photomask and the corresponding patterning process, thereby improving the process yield of the display panel and reducing the production cost of the display panel.

[0118] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0119] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0120] The embodiments, implementation methods, and related technical features of this application can be combined and substituted for each other without conflict.

[0121] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. A display panel, characterized in that, include: Substrate; A light-shielding layer is disposed on one side of the substrate, and the light-shielding layer includes a first electrode plate; The second electrode plate is disposed on the side of the light-shielding layer away from the substrate; A first source / drain layer is disposed on the side of the light-shielding layer away from the substrate, and the first source / drain layer includes a conductive electrode; as well as The second source / drain layer is disposed on the side of the first source / drain layer away from the substrate; A passivation layer is disposed on the side of the first source / drain layer away from the substrate, and the portion of the passivation layer corresponding to the second electrode plate is recessed toward the second electrode plate to form a groove; The second source / drain layer includes a third electrode plate extending toward the second electrode plate. The third electrode plate is electrically connected to the first electrode plate via the conductive electrode. Along the thickness direction of the display panel, the third electrode plate, the second electrode plate, and the first electrode plate overlap to form a capacitor. The third electrode plate is partially disposed in the groove. The third electrode plate includes a main body, a first connecting part, and a second connecting part. The main body is disposed at the bottom of the groove, the first connecting part is disposed on the side wall of the groove and connected to the main body, and the second connecting part is disposed on the passivation layer surrounding the groove. One end of the second connecting part is connected to the first connecting part, and the other end of the second connecting part is connected to the conductive electrode.

2. The display panel as described in claim 1, characterized in that, The display panel further includes an interlayer dielectric layer, which is partially disposed between the second electrode plate and the first source / drain electrode layer. The portion of the interlayer dielectric layer corresponding to the second electrode plate has a first opening. The passivation layer is continuously disposed along the bottom and sidewall of the first opening and is recessed above the first opening to form the groove.

3. The display panel as described in claim 2, characterized in that, The display panel further includes a first planarization layer, which is disposed on the passivation layer, and the second source / drain layer is partially disposed on the first planarization layer; Wherein, the portion of the first planarization layer corresponding to the third electrode plate has a second opening, and the orthographic projection of the third electrode plate on the substrate is located within the orthographic projection of the second opening on the substrate.

4. The display panel as described in claim 3, characterized in that, The display panel further includes a second planarization layer disposed on the first planarization layer and the second source-drain layer, and filling the second opening.

5. The display panel as described in claim 4, characterized in that, The material of the first planarization layer includes polyimide, and the material of the second planarization layer includes acrylate.

6. The display panel as described in claim 1, characterized in that, The display panel further includes a first active layer, which is disposed on the side of the light-shielding layer away from the substrate. The material of the first active layer includes an oxide semiconductor material, and the first active layer includes a second electrode plate.

7. The display panel as described in claim 1, characterized in that, The display panel also includes: A first active layer is disposed on the side of the light-shielding layer away from the substrate, and the material of the first active layer includes an oxide semiconductor material; A gate layer is disposed on the side of the first active layer away from the substrate, and the gate layer includes the second electrode plate.

8. The display panel as described in claim 7, characterized in that, The display panel also includes: A first gate insulating layer is disposed on the substrate and the first active layer; The second active layer is disposed on the first gate insulating layer, and the material of the second active layer includes silicon semiconductor material; A second gate insulating layer is disposed on the first gate insulating layer and the second active layer, wherein the gate layer is disposed on the second gate insulating layer; The first gate insulating layer and the second gate insulating layer are partially disposed between the second electrode plate and the first electrode plate.

9. The display panel as claimed in claim 1, characterized in that, The display panel also includes: A first active layer is disposed on the side of the light-shielding layer away from the substrate, and the first active layer includes the second electrode plate; A gate layer is disposed on the side of the first active layer away from the substrate. The gate layer includes a fourth electrode plate. Along the thickness direction of the display panel, the third electrode plate, the fourth electrode plate, the second electrode plate, and the first electrode plate are overlapped to form the capacitor.

10. The display panel as claimed in claim 9, characterized in that, The display panel also includes: A first gate insulating layer is disposed on the substrate and the first active layer; The second active layer is disposed on the first gate insulating layer; A second gate insulating layer is disposed on the first gate insulating layer and the second active layer, wherein the gate layer is disposed on the second gate insulating layer; The first gate insulating layer and the second gate insulating layer are partially disposed between the second electrode plate and the fourth electrode plate.

11. The display panel as claimed in any one of claims 1 to 10, characterized in that, The display panel includes a display area and a gate driving circuit area disposed around the display area. The gate driving circuit area is provided with a gate driving circuit. The second source-drain layer includes a signal bus, which is disposed in the gate driving circuit area.

12. The display panel as claimed in claim 11, characterized in that, The display area is provided with a plurality of first transistors, and the gate driving circuit includes a plurality of second transistors; The first transistor includes a first active portion, the material of which is an oxide semiconductor material; the second transistor includes a second active portion, the material of which is an oxide semiconductor material or a silicon semiconductor material.

13. A method for manufacturing a display panel, characterized in that, A method for manufacturing a display panel as described in any one of claims 1 to 12, the method comprising the following steps: A light-shielding layer is formed on a substrate, the light-shielding layer including a first electrode plate; A second electrode is formed on the side of the light-shielding layer away from the substrate; A first source / drain layer and a second source / drain layer are formed on the side of the light-shielding layer away from the substrate. The first source / drain layer includes a conductive electrode, and the second source / drain layer includes a third electrode plate. The third electrode plate extends toward the second electrode plate and is electrically connected to the first electrode plate through the conductive electrode. Along the thickness direction of the display panel, the third electrode plate, the second electrode plate, and the first electrode plate overlap to form a capacitor.

14. The method for manufacturing a display panel as described in claim 13, characterized in that, The process of forming a first source / drain layer and a second source / drain layer on the side of the light-shielding layer away from the substrate includes the following steps: An interlayer dielectric layer is formed on the side of the light-shielding layer away from the substrate, and a first opening is formed on the interlayer dielectric layer; The first source / drain layer is formed on the interlayer dielectric layer; A passivation layer is formed on the interlayer dielectric layer and the first source-drain layer. The passivation layer is continuously disposed along the bottom and sidewall of the first opening and a groove is formed above the first opening. A first planarization layer is formed on the passivation layer, and a second opening is formed on the portion of the first planarization layer corresponding to the groove. The second source / drain layer is formed on the first planarization layer, and the third electrode portion is formed in the groove.

15. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 12.

Citation Information

Patent Citations

  • Display panel and display device

    CN115863357A