Hall device and forming method thereof

Abstract

The invention provides a novel Hall device and a forming method thereof, a heterojunction material layer is arranged on a well region of the Hall device, an excitation electrode and a Hall electrode which are electrically connected with the heterojunction material layer are formed on the heterojunction material layer, and the heterojunction material layer has high electron mobility. A constant voltage source or current source is applied to the excitation electrode, and for an external magnetic field, Hall voltage can be generated between the Hall electrodes due to the Hall effect. By introducing the heterojunction material layer with high electron mobility, the Hall effect and the magnetic field detection sensitivity can be greatly improved, and the performance of the semiconductor device is further improved. Since the sensitivity of the Hall device is increased by introducing the heterojunction material layer with high electron mobility, special requirements on the doping concentration of the well region and the doping concentration of the substrate are not required, that is, the doping concentration of the well region and the doping concentration of the substrate can be in accordance with normal doping concentrations, and the pollution control requirement in production is reduced at the same time.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a Hall device and a method for forming the same. Background Art

[0002] A Hall device is a device that uses the Hall effect to detect external magnetic fields. In the production of Si IC chips, a high-resistance, low-concentration deep N-type well region is generally used as a detection device. Sensitivity is a key performance parameter of a Hall device, and its size is mainly related to the structure and properties of the channel material in the Hall device. Generally, the lower the impact of collision and scattering between carriers in the channel material and the higher the mobility, the higher the sensitivity of the Hall device.

[0003] In order to increase the sensitivity of detection, the deep N-type well region generally requires a lower doping concentration, and the body doping concentration needs to reach 1E15 cm -3 , even up to 1E14 cm -3 This places high demands on pollution control in production, and also places high demands on the doping concentration control of the Sub (P-type substrate). To improve the electron deflection signal, the doping concentration of the P-type substrate is required to be low, with a body doping concentration of 1E12 cm -3 To 1E11cm -3 , the doping concentration in the P-type substrate is too low and is easily contaminated by the outside world, which reduces the performance of semiconductor devices. Summary of the invention

[0004] The object of the present invention is to provide a Hall device and a method for forming the same, so as to solve the problem that the doping concentration in the deep well region and the substrate of the Hall device is low and is easily contaminated by the outside world.

[0005] In order to solve the above technical problems, the present invention provides a Hall device, comprising:

[0006] A substrate, wherein the substrate includes a well region;

[0007] A heterojunction material layer; the heterojunction material layer is located on the well region;

[0008] An effective area region, the effective area region being a region through which magnetic flux lines of an applied magnetic field pass in a vertical manner and the effective area region being located within the well region;

[0009] Excitation electrodes, the excitation electrodes are located on two opposite sides of the effective area in a first direction and on the heterojunction material layer and are electrically connected to the heterojunction material layer, and are used for external current;

[0010] Hall electrodes, the Hall electrodes are located at two opposite sides of the effective area in the second direction and are located on the heterojunction material layer and are electrically connected to the heterojunction material layer, and are used to generate a Hall voltage;

[0011] The first direction is perpendicular to the second direction.

[0012] Optionally, the material of the heterojunction material layer includes germanium-silicon heterojunction and indium-gallium-arsenic heterojunction.

[0013] Optionally, the heterojunction material layer includes a single-layer quantum well heterostructure or a multi-layer quantum well heterostructure.

[0014] Based on the same inventive concept, the present invention also provides a method for forming a Hall device, comprising:

[0015] Providing a substrate, the substrate comprising a well region;

[0016] forming a heterojunction material layer, wherein the heterojunction material layer is located on the well region;

[0017] An excitation electrode and a Hall electrode are formed, wherein the excitation electrodes are located on opposite sides of the effective area in a first direction and are located on the heterojunction material layer and are electrically connected to the heterojunction material layer for external current; the Hall electrodes are located on opposite sides of the effective area in a second direction and are located on the heterojunction material layer and are electrically connected to the heterojunction material layer for generating a Hall voltage; wherein the first direction is perpendicular to the second direction.

[0018] Optionally, the heterojunction material layer is formed by an epitaxial growth process.

[0019] Optionally, the material of the heterojunction material layer includes germanium-silicon heterojunction and indium-gallium-arsenic heterojunction.

[0020] Optionally, the heterojunction material layer includes a single-layer quantum well heterostructure or a multi-layer quantum well heterostructure.

[0021] Optionally, the step of forming the excitation electrode and the Hall electrode includes:

[0022] forming an insulating dielectric layer, wherein the insulating dielectric layer is located on the heterojunction material layer;

[0023] Performing an etching process to form contact holes in the insulating dielectric layer, wherein the contact holes are evenly distributed around the well region near the edge;

[0024] A physical vapor deposition process is performed to fill the contact hole with metal, wherein the metal in the contact hole in the first direction constitutes an excitation electrode, and the metal in the contact hole in the second direction constitutes a Hall electrode.

[0025] Optionally, before forming the well region, a shallow trench isolation structure is formed, wherein the shallow trench isolation structure is used to define the active region and to isolate adjacent well regions.

[0026] Optionally, the doping type of the substrate is a first doping type, and the doping type of the well region is a second doping type.

[0027] In the Hall device provided by the present invention, a heterojunction material layer is arranged on the well region, and an excitation electrode and a Hall electrode electrically connected to the heterojunction material layer are formed on the heterojunction material layer, the heterojunction material layer has a high electron mobility, a constant voltage source or current source is applied to the excitation electrode, and a magnetic field B is applied externally, and a Hall voltage is generated between the Hall electrodes due to the Hall effect. By introducing a heterojunction material layer with high electron mobility, the sensitivity of the Hall effect and magnetic field detection can be greatly improved, thereby improving the performance of the semiconductor device. Since the sensitivity of the Hall device is increased by introducing a heterojunction material layer with high electron mobility, there is no need to make high requirements on the doping concentration of the N-type well region and the doping concentration of the P-type substrate, that is, the doping concentration of the N-type well region and the doping concentration of the P-type substrate can be in accordance with the normal doping concentration, while reducing the requirements for pollution control in production. The problem that the semiconductor device is susceptible to external pollution due to the low doping concentration of the N-type well region and the P-type substrate is solved, and the performance of the semiconductor device is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Those skilled in the art will appreciate that the accompanying drawings are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention.

[0029] Figure 1 Schematic diagram of the cross-sectional structure of the Hall device according to an embodiment of the present invention.

[0030] Figure 2 1 is a schematic diagram of a top view of the structure of a Hall device according to an embodiment of the present invention.

[0031] Figure 3 It is a flow chart of a method for forming a Hall device according to an embodiment of the present invention.

[0032] Figures 4 to 6 It is a structural schematic diagram of corresponding steps of the method for forming a Hall device according to an embodiment of the present invention.

[0033] In the attached figure:

[0034] 10-P-type substrate; 11-trench isolation structure; 12-N-type well region; 13-heterojunction material layer; 14-insulating dielectric layer; 15-contact hole; 15a-excitation electrode; 15b-Hall electrode; 16-external magnetic field effective area. DETAILED DESCRIPTION

[0035] In order to make the purpose, advantages and features of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the drawings is often a part of the actual structure. In particular, the emphasis of each drawing is different, and sometimes different scales are used.

[0036] As used in the present invention, the singular forms "one", "an" and "the" include plural objects, the term "or" is usually used to include the meaning of "and / or", the term "several" is usually used to include the meaning of "at least one", and the term "at least two" is usually used to include the meaning of "two or more". In addition, the terms "first", "second" and "third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined as "first", "second" and "third" can explicitly or implicitly include one or at least two of the features. In addition, as used in the present invention, an element is arranged on another element, which usually only indicates that there is a connection, coupling, matching or transmission relationship between the two elements, and the connection, coupling, matching or transmission between the two elements can be direct or indirect through an intermediate element, and cannot be understood as indicating or implying the spatial position relationship between the two elements, that is, an element can be in any orientation such as inside, outside, above, below or on one side of another element, unless the content clearly indicates otherwise. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0037] Figure 1 Schematic diagram of the cross-sectional structure of the Hall device according to an embodiment of the present invention. Figure 2 Schematic diagram of the top view of the Hall device according to an embodiment of the present invention. Figure 1 and Figure 2As shown, this embodiment provides a Hall device, including a P-type substrate 10, wherein the P-type substrate 10 includes an N-type well region 12 and a heterojunction material layer 13 located in the N-type well region 12. An insulating dielectric layer 14 is formed on the heterojunction material layer 13. The P-type substrate 10 also includes an external magnetic field effective area 16, wherein the effective area 16 is an area where the magnetic flux lines of the external B magnetic field pass through in a vertical manner, and the external magnetic field effective area 16 may be larger than the entire device area. Metal electrodes are arranged in the insulating dielectric layer 14, wherein the metal electrodes include an excitation electrode 15a and a Hall electrode 15b. In this embodiment, the excitation electrodes 15a are located on opposite sides of the external magnetic field effective area 16 in the first direction and in the insulating dielectric layer 14, and the excitation electrodes 15a are located on the heterojunction material layer 13 and are electrically connected to the heterojunction material layer 13 for external current. The Hall electrodes 15b are located on opposite sides of the effective area 16 in the second direction and in the insulating dielectric layer 14. The Hall electrodes 15b are located on the heterojunction material layer 13 and are electrically connected to the heterojunction material layer 13 for generating a Hall voltage. The first direction is perpendicular to the second direction.

[0038] The P-type substrate 10 can provide an operating platform for subsequent processes, and can be any substrate for carrying semiconductor integrated circuit components known to those skilled in the art, and can be a bare chip or a wafer processed by an epitaxial growth process. Specifically, the substrate can be, for example, a silicon-on-insulator (SOI) substrate, a bulk silicon substrate, a germanium substrate, a germanium silicon substrate, an indium phosphide (InP) substrate, a gallium arsenide (GaAs) substrate, or a germanium-on-insulator substrate. In this embodiment, the P-type substrate 10 is a silicon substrate.

[0039] The material of the heterojunction material layer 13 includes a germanium silicon (SiGe) heterojunction and an indium gallium arsenide (InGaAs) heterojunction. When the P-type substrate 10 is a silicon substrate, considering the lattice matching of the epitaxial layer and the P-type substrate, the heterojunction material layer 13 is a germanium silicon (SiGe) that is more lattice-matched with the silicon P-type substrate. The heterojunction material layer 13 includes a single-layer quantum well heterostructure or a multi-layer quantum well heterostructure. The germanium silicon heterojunction can adopt a multi-layer quantum well heterostructure. The quantum well heterostructure is a potential well structure that restricts the movement of electrons in a two-dimensional space. By introducing a gradient-varying potential energy field into the material, the force field to which the electrons are subjected during the movement changes, thereby changing the movement trajectory of the electrons, reducing the probability of scattering, and thus improving the electron mobility. Therefore, the heterojunction material layer 13 has a higher electron mobility, which can greatly improve the Hall effect and magnetic field detection sensitivity.

[0040] The working principle of the Hall device is to apply a constant voltage source U0 or current source I0 to the Hall device through two pairs of excitation electrodes 15a, and apply an external magnetic field B. The magnetic flux lines of the B magnetic field vertically pass through the effective area 16. Due to the Hall effect, a Hall voltage UH is generated between the two pairs of Hall electrodes 15b. Since the size of the Hall voltage UH is linearly related to the size of the external magnetic field B, the size of the external magnetic field B is calculated based on the size of the Hall voltage UH. The Hall device uses the Hall effect to detect the external magnetic field. In the production of IC chips on silicon P-type substrates, high-resistance, low-concentration deep well regions are generally used as detection devices to increase the sensitivity of detection. The body doping concentration of the deep well region needs to reach 1E15 cm -3 , even up to 1E14 cm -3 This places high demands on pollution control in production. To improve the electron deflection signal, the doping concentration of the P-type substrate should be low, with a body doping concentration of 1E12 cm -3 To 1E11cm -3 The doping concentration in the P-type substrate is too low, and it is also easily contaminated by the outside world, which reduces the performance of the semiconductor device. In the Hall device provided in this embodiment, the Hall effect and magnetic field detection sensitivity are improved by forming a heterojunction material layer 14 with high electron mobility on the active area. There is no need to improve the Hall effect and magnetic field detection sensitivity by reducing the doping concentration of the N-type well region 12 and the P-type substrate. Therefore, the body doping concentration of the N-type well region 12 in this embodiment is 1E16 cm -3 As shown above, the body doping concentration of the P-type substrate 10 is 1E15 cm -3 to 1E14 cm -3 The doping concentration of the N-type well region 12 and the P-type substrate is increased, which solves the problem that the semiconductor device is easily contaminated by the outside world due to the low doping concentration of the N-type well region 12 and the P-type substrate 10, and improves the performance of the semiconductor device.

[0041] Figure 3 is a flow chart of a method for forming a Hall device according to an embodiment of the present invention. This embodiment also provides a method for forming a Hall device, comprising:

[0042] Step S10, providing a substrate, wherein the substrate includes a well region;

[0043] Step S20, forming a heterojunction material layer, wherein the heterojunction material layer is located on the well region;

[0044] Step S30, forming an excitation electrode and a Hall electrode, wherein the excitation electrodes are located on opposite sides of the effective area in a first direction and are located on the heterojunction material layer and are electrically connected to the heterojunction material layer for external current; the Hall electrodes are located on opposite sides of the effective area in a second direction and are located on the heterojunction material layer and are electrically connected to the heterojunction material layer for generating a Hall voltage; wherein the first direction is perpendicular to the second direction.

[0045] Figures 4 to 6 1 is a schematic diagram of the structure of the corresponding steps of the method for forming a Hall device according to an embodiment of the present invention. Figures 4 to 6 The specific embodiments of the present invention are described in detail.

[0046] like Figure 4 As shown, a substrate is provided, the doping type of the substrate is a first doping type, the first doping type is, for example, a P-type, that is, the substrate is a P-type substrate 10, the P-type substrate 10 can provide an operating platform for subsequent processes, and it can be any substrate for carrying semiconductor integrated circuit components known to those skilled in the art, it can be a bare chip, or it can be a wafer processed by an epitaxial growth process, in detail, the P-type substrate is, for example, a silicon-on-insulator (SOI) substrate, a bulk silicon substrate, a germanium substrate, a germanium silicon substrate, an indium phosphide (InP) substrate, a gallium arsenide (GaAs) substrate, or a germanium-on-insulator substrate. In this embodiment, the P-type substrate 10 is a silicon substrate.

[0047] Please continue to refer to Figure 4 The P-type substrate 10 includes a well region, and the doping type of the well region is a second doping type, and the second doping type is, for example, N-type, that is, an N-type well region 12. The N-type well region 12 is a deep N-type well region. A trench isolation structure 11 is also formed in the P-type substrate 10, and the trench isolation structure 11 is used to isolate adjacent N-type well regions 12. The body doping concentration of the P-type substrate 10 is 1E15 cm -3 to 1E14 cm -3 The body doping concentration of the N-type well region 12 is 1E16 cm -3 above.

[0048] like Figure 5As shown, a heterojunction material layer 13 is formed, and the heterojunction material layer 13 is located on the N-type well region 12. The heterojunction material layer 13 is formed by an epitaxial growth process. The material of the heterojunction material layer 13 includes a germanium silicon heterojunction and an indium gallium arsenide heterojunction. The heterojunction material layer 13 includes a single-layer quantum well heterostructure or a multi-layer quantum well heterostructure. For example, the germanium silicon heterojunction can be a multi-layer quantum well heterostructure.

[0049] Please continue to refer to Figure 5 , forming an insulating dielectric layer 14, the insulating dielectric layer 14 covers the heterojunction material layer 13. The insulating dielectric layer 14 is made of, for example, silicon oxide or silicon nitride and is formed by a chemical vapor deposition process.

[0050] like Figure 1 As shown, an excitation electrode 15a and a Hall electrode 15b are formed, wherein the excitation electrode 15a is located at two opposite sides of the heterojunction material layer 13 in a first direction and is located in the insulating dielectric layer 14, the excitation electrode 15a is located on the heterojunction material layer 13 and is electrically connected to the heterojunction material layer 13, and is used for external current; the Hall electrode 15b is located at two opposite sides of the heterojunction material layer 13 in a second direction and is located in the insulating dielectric layer 14, the Hall electrode 15b is located on the heterojunction material layer 13 and is electrically connected to the heterojunction material layer 13, and is used for generating a Hall voltage; wherein the first direction is perpendicular to the second direction.

[0051] Specifically, the steps of forming the excitation electrode 15a and the Hall electrode 15b include:

[0052] like Figure 6 As shown, an etching process is performed to form contact holes 15 in the insulating dielectric layer 14 , and the contact holes 15 are evenly distributed around the heterojunction material layer 13 near the edge.

[0053] like Figure 1 As shown, a physical vapor deposition process is performed to fill the contact hole 15 with metal, the metal in the contact hole 15 in the first direction constitutes an excitation electrode 15 a , and the metal in the contact hole 15 in the second direction constitutes a Hall electrode 15 b .

[0054] The excitation electrode is used for an external voltage source or current source to provide current for the Hall device. Under an external magnetic field B, the Hall electrode generates a Hall voltage, and the Hall electrode is detected by a detection device. In the Hall device provided in this embodiment, a heterojunction material layer with high electron mobility is formed on the well region to improve the Hall effect and magnetic field detection sensitivity. There is no need to improve the Hall effect and magnetic field detection sensitivity by reducing the doping concentration of the N-type well region 12 and the P-type substrate 10. The problem that semiconductor devices are susceptible to external contamination due to the low doping concentration of the N-type well region 12 and the P-type substrate 10 is solved, and the performance of the semiconductor device is improved.

[0055] In summary, in the Hall device provided by the embodiment of the present invention, a heterojunction material layer is provided on the well region, and an excitation electrode and a Hall electrode electrically connected to the heterojunction material layer are formed on the heterojunction material layer, the heterojunction material layer has a high electron mobility, a constant voltage source or current source is applied to the excitation electrode, and a magnetic field B is applied. Due to the Hall effect, a Hall voltage is generated between the Hall electrodes. By introducing a heterojunction material layer with high electron mobility, the sensitivity of the Hall effect and magnetic field detection can be greatly improved, thereby improving the performance of the semiconductor device. Since the sensitivity of the Hall device is increased by introducing a heterojunction material layer with high electron mobility, there is no need to make high requirements on the doping concentration of the N-type well region and the doping concentration of the P-type substrate, that is, the doping concentration of the N-type well region and the doping concentration of the P-type substrate can be in accordance with the normal doping concentration, while reducing the requirements for pollution control in production. The problem that the semiconductor device is susceptible to external pollution due to the low doping concentration of the N-type well region and the P-type substrate is solved, and the performance of the semiconductor device is improved.

[0056] In addition, it should be recognized that although the present invention has been disclosed as a preferred embodiment, the above embodiment is not intended to limit the present invention. For any technician familiar with the art, without departing from the scope of the technical solution of the present invention, the technical content disclosed above can be used to make many possible changes and modifications to the technical solution of the present invention, or modified into equivalent embodiments of equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiment according to the technical essence of the present invention without departing from the content of the technical solution of the present invention still belongs to the scope of protection of the technical solution of the present invention.

Claims

1. A Hall device, characterized in that: include: A substrate, wherein the substrate includes a well region; a heterojunction material layer; The heterojunction material layer is located on the well region; An effective area region, the effective area region being a region through which magnetic flux lines of an applied magnetic field pass in a vertical manner and the effective area region being located within the well region; Excitation electrodes, the excitation electrodes are located on two opposite sides of the effective area in a first direction and on the heterojunction material layer and are electrically connected to the heterojunction material layer, and are used for external current; Hall electrodes, the Hall electrodes are located at two opposite sides of the effective area in the second direction and are located on the heterojunction material layer and are electrically connected to the heterojunction material layer, and are used to generate a Hall voltage; The first direction is perpendicular to the second direction.

2. The Hall device according to claim 1, characterized in that: The material of the heterojunction material layer includes a germanium silicon heterojunction and an indium gallium arsenide heterojunction.

3. The Hall device according to claim 1, characterized in that: The heterojunction material layer includes a single-layer quantum well heterostructure or a multi-layer quantum well heterostructure.

4. A method for forming a Hall device, characterized in that: include: Providing a substrate, the substrate comprising a well region; forming a heterojunction material layer, wherein the heterojunction material layer is located on the well region; An excitation electrode and a Hall electrode are formed, wherein the excitation electrodes are located on opposite sides of the effective area in a first direction and are located on the heterojunction material layer and are electrically connected to the heterojunction material layer for external current; the Hall electrodes are located on opposite sides of the effective area in a second direction and are located on the heterojunction material layer and are electrically connected to the heterojunction material layer for generating a Hall voltage; wherein the first direction is perpendicular to the second direction.

5. The method for forming a Hall device according to claim 4, characterized in that: The heterojunction material layer is formed by an epitaxial growth process.

6. The method for forming a Hall device according to claim 4 or 5, characterized in that: The material of the heterojunction material layer includes a germanium silicon heterojunction and an indium gallium arsenide heterojunction.

7. The method for forming a Hall device according to claim 4, characterized in that: The heterojunction material layer includes a single-layer quantum well heterostructure or a multi-layer quantum well heterostructure.

8. The method for forming a Hall device according to claim 4, characterized in that: The steps of forming the excitation electrode and the Hall electrode include: forming an insulating dielectric layer, wherein the insulating dielectric layer is located on the heterojunction material layer; Performing an etching process to form contact holes in the insulating dielectric layer, wherein the contact holes are evenly distributed around the well region near the edge; A physical vapor deposition process is performed to fill the contact hole with metal, wherein the metal in the contact hole in the first direction constitutes an excitation electrode, and the metal in the contact hole in the second direction constitutes a Hall electrode.

9. The method for forming a Hall device according to claim 4, characterized in that: Before forming the well region, a shallow trench isolation structure is formed, wherein the shallow trench isolation structure is used to define the active region and to isolate adjacent well regions.

10. The method for forming a Hall device according to claim 4, characterized in that: The doping type of the substrate is a first doping type, and the doping type of the well region is a second doping type.

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