Multilayer ceramic capacitor

Abstract

Provided is a multilayer ceramic capacitor in which cracks and the like do not readily occur in a ceramic body. The multilayer ceramic capacitor is provided with: a ceramic body in which a plurality of ceramic layers, a plurality of first internal electrodes, and a plurality of second internal electrodes are laminated in the height direction; the first main surface and the second main surface are opposite to each other in the height direction, the first end surface and the second end surface are opposite to each other in the length direction orthogonal to the height direction, and the first side surface and the second side surface are opposite to each other in the width direction orthogonal to the height direction and the length direction. And a first external electrode and a second external electrode which are formed on the outer surface of the ceramic body, the first internal electrode being led out to the first end surface and electrically connected to the first external electrode, and the second internal electrode being led out to the second end surface and electrically connected to the second external electrode. The first external electrode is formed in an L shape on the first end surface and the first main surface, the second external electrode is formed in an L shape on the second end surface and the first main surface, and the R dimension of a ridge line connecting the first main surface with the first end surface, the first side surface, the second end surface and the second side surface is larger than the R dimension of a ridge line connecting the second main surface with the first end surface, the first side surface, the second end surface and the second side surface.

Description

Technical Field

[0001] The present invention relates to a laminated ceramic capacitor. Background Art

[0002] Multilayer ceramic capacitors are widely used in various devices such as electronic devices and electrical devices (hereinafter referred to as “electronic devices, etc.”). For example, Patent Document 1 (Japanese Patent Application Laid-Open No. 2000-100647) discloses a typical structure of a multilayer ceramic capacitor.

[0003] Recently, the miniaturization and high-function of electronic devices are developing rapidly. Due to the miniaturization of electronic devices, the internal volume (space volume) of electronic devices that accommodate electronic circuits composed of electronic components has gradually become extremely small. In addition, due to the high-function of electronic devices, the number of electronic components required to constitute electronic circuits has increased dramatically.

[0004] Therefore, as electronic devices and the like are becoming smaller and more functional, electronic components constituting electronic circuits are also required to be smaller. For example, in the case of multilayer ceramic capacitors, extremely thin products are being put into practical use, in which the ceramic body is composed of a thickness of several tens of μm.

[0005] Prior Art Literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Publication No. 2000-100647 Summary of the invention

[0008] Problem that the invention aims to solve

[0009] As described above, with the miniaturization and high functionality of electronic devices, there is a demand for miniaturization, especially thinning, of electronic components. However, in the case of multilayer ceramic capacitors, the reduction in mechanical strength against external forces becomes a problem as the thickness decreases.

[0010] On the other hand, multilayer ceramic capacitors are often mounted on a substrate or an object based on a substrate (hereinafter, both are collectively referred to as a "substrate") by, for example, a reflow process as described below.

[0011] First, prepare a substrate as the destination for installation. Electrodes are formed on the main surface of the substrate, and paste solder is pre-coated on the surface of the electrodes. Next, prepare a mounting device equipped with a nozzle. Then, after the top surface (second main surface) of the multilayer ceramic capacitor is adsorbed by the nozzle, the nozzle is moved to configure (place) the bottom surface (first main surface) of the multilayer ceramic capacitor on a pair of electrodes coated with paste solder on the substrate. Next, the substrate with the multilayer ceramic capacitor is heated to melt the paste solder, and then the entirety is cooled to solidify the paste solder again, thereby mounting the multilayer ceramic capacitor on the electrodes of the substrate.

[0012] In this reflow process, when the multilayer ceramic capacitor is placed on the electrode of the substrate using a nozzle, the ridgeline of the bottom surface (first main surface) of the ceramic body, which is the outer edge, collides with the substrate and the electrode formed on the substrate, and cracks etc. (hereinafter, "cracks", "breaks", "defects", etc. are collectively referred to as "cracks etc.") are generated in the ceramic body, which becomes a problem. In particular, in multilayer ceramic capacitors that are thinned and have reduced mechanical strength against external forces, cracks etc. in the ceramic body generated during mounting etc. become an extremely serious problem.

[0013] Therefore, an object of the present invention is to provide a multilayer ceramic capacitor in which cracks are not easily generated in the ceramic body even when the ridge line as the outer edge of the bottom surface (first main surface) of the ceramic body collides with the substrate, the electrode formed on the substrate, etc., for example during installation.

[0014] Technical solutions to solve problems

[0015] In order to solve the above-mentioned conventional problems, a laminated ceramic capacitor according to one embodiment of the present invention is provided with: a ceramic body having a plurality of ceramic layers, a plurality of first internal electrodes and a plurality of second internal electrodes laminated in a height direction, and having a first main surface and a second main surface opposite to each other in the height direction, a first end surface and a second end surface opposite to each other in a length direction perpendicular to the height direction, and a first side surface and a second side surface opposite to each other in a width direction perpendicular to the height direction and the length direction; and a first external electrode and a second external electrode formed on an outer surface of the ceramic body, wherein the first main surface and the second main surface are opposite to each other in the height direction, and the first end surface and the second end surface are opposite to each other in a length direction perpendicular to the height direction. The internal electrode is led out to the first end face and electrically connected to the first external electrode, and the second internal electrode is led out to the second end face and electrically connected to the second external electrode, wherein, when observing a cross-section parallel to the first side face and the second side face, the first external electrode is formed in an L shape at the first end face and the first main face, and the second external electrode is formed in an L shape at the second end face and the first main face, and the R dimension of the ridgeline connecting the first main face and the first end face, the first side face, the second end face, and the second side face is greater than the R dimension of the ridgeline connecting the second main face and the first end face, the first side face, the second end face, and the second side face.

[0016] Effects of the Invention

[0017] In a multilayer ceramic capacitor according to one embodiment of the present invention, since the R dimension of the ridges connecting the first main surface (bottom surface; mounting surface) and the first end surface, the first side surface, the second end surface, and the second side surface is large, even if these ridges collide with the substrate, electrodes formed on the substrate, etc. during mounting, it is not easy to generate cracks in the ceramic body. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 1 is a perspective view of the multilayer ceramic capacitor 100 according to the first embodiment, and shows the multilayer ceramic capacitor 100 from the first main surface 1A side.

[0019] Figure 2 1 is a perspective view of the multilayer ceramic capacitor 100 , and shows the multilayer ceramic capacitor 100 from the second main surface 1B side.

[0020] Figure 3 is a cross-sectional view of a laminated ceramic capacitor 100, showing Figure 1 (A) is a cross section of the XX portion indicated by a dashed arrow.

[0021] Figure 4 1 is a cross-sectional view of a main part of the multilayer ceramic capacitor 100 .

[0022] Figure 5 (A) to (D) are explanatory diagrams showing steps in an example of a method for manufacturing the multilayer ceramic capacitor 100 .

[0023] Figure 6 (E)~(J) Figure 5 The diagrams following (D) are explanatory diagrams showing steps in an example of a method for manufacturing the multilayer ceramic capacitor 100 .

[0024] Figure 7 It is a cross-sectional view of a multilayer ceramic capacitor 200 according to the second embodiment.

[0025] Figure 8 (A) to (D) are explanatory diagrams showing steps in an example of a method for manufacturing the multilayer ceramic capacitor 200 .

[0026] Fig. 9 (E)~(J) Figure 8 The diagrams following (D) are explanatory diagrams showing steps in an example of a method for manufacturing the multilayer ceramic capacitor 200 . DETAILED DESCRIPTION

[0027] The following, with the attached Figure 1 The following describes a mode for carrying out the present invention.

[0028] In addition, each embodiment illustratively shows an embodiment of the present invention, and the present invention is not limited to the contents of the embodiment. In addition, it is also possible to combine the contents recorded in different embodiments to implement, and the implementation contents in this case are also included in the present invention. In addition, the drawings are used to help the understanding of the specification, and are sometimes schematically depicted, and the ratios of the dimensions of the depicted constituent elements or constituent elements are sometimes inconsistent with the ratios of these dimensions recorded in the specification. In addition, there are cases where the constituent elements recorded in the specification are omitted in the drawings, and the number of elements is omitted and depicted, etc.

[0029] [First embodiment]

[0030] exist Figure 1 , Figure 2 , Figure 3 as well as Figure 4 1 and 2 show the multilayer ceramic capacitor 100 according to the first embodiment. Figure 1 1 is a perspective view of the multilayer ceramic capacitor 100 , and shows the multilayer ceramic capacitor 100 from the first main surface 1A side. Figure 2 This is also a perspective view of the multilayer ceramic capacitor 100 , and shows the multilayer ceramic capacitor 100 from the second main surface 1B side. Figure 3 is a cross-sectional view of a laminated ceramic capacitor 100, showing Figure 1 (A) is a cross section of the XX portion indicated by a dashed arrow. Figure 4 1 is a cross-sectional view of a main part of the multilayer ceramic capacitor 100 .

[0031] The drawings show the height direction T, length direction L, and width direction W of the multilayer ceramic capacitor 100 , and these directions may be referred to in the following description. In the present embodiment, the stacking direction of ceramic layers 1 a described later is defined as the height direction T of the multilayer ceramic capacitor 100 .

[0032] The multilayer ceramic capacitor 100 includes a ceramic body 1. The ceramic body 1 is a rectangular parallelepiped having a first main surface 1A and a second main surface 1B facing each other in a height direction T, a first end surface 1C and a second end surface 1D facing each other in a length direction L, and a first side surface 1E and a second side surface 1F facing each other in a width direction W.

[0033] The size of the ceramic body 1 is arbitrary, but for example, it is also preferred that one of the size in the length direction L and the size in the width direction W is less than 1.0 mm, and the other is less than 0.5 mm. In addition, it is also preferred that the size in the height direction T is less than 0.1 mm. When the present invention is implemented, even in the miniaturized and thinned multilayer ceramic capacitor 100, as described later, since the R size of the ridges connecting the first main surface 1A and the first end surface 1C, the first side surface 1E, the second end surface 1D, and the second side surface 1F as the mounting surface is large, even if these ridges, the first main surface of the ceramic body, the substrate, the electrodes formed on the substrate, etc. collide during installation, cracks, etc. can be suppressed in the ceramic body 1.

[0034] The ceramic body 1 includes a ceramic layer 1a, a first internal electrode 2, a second internal electrode 3, and a dummy internal electrode 4 stacked. The ceramic layer 1a, the first internal electrode 2, the second internal electrode 3, and the dummy internal electrode 4 are stacked in a height direction T of the ceramic body 1.

[0035] As will be described later, the dummy internal electrode 4 is an electrode provided mainly as a base external electrode for the first external electrode 5 and the second external electrode 6 , and is not used to form a capacitor.

[0036] The material of the ceramic body 1 (ceramic layer 1 a ) is arbitrary, but for example, a dielectric ceramic mainly composed of BaTiO 3 can be used. However, a dielectric ceramic mainly composed of another material such as CaTiO 3 , SrTiO 3 , or CaZrO 3 may be used instead of BaTiO 3 .

[0037] The thickness of the ceramic layer 1 a is arbitrary, but can be set to about 0.3 μm to 2.0 μm, for example, in an effective region forming a capacitor where the first internal electrode 2 and the second internal electrode 3 are formed.

[0038] The number of ceramic layers 1 a is arbitrary, but can be set to about 1 to 6000 layers in an effective region forming a capacitor where the first internal electrode 2 and the second internal electrode 3 are formed, for example.

[0039] On the upper and lower sides of the ceramic body 1, the first internal electrode 2 and the second internal electrode 3 are not formed, but a protective layer (outer layer) consisting only of a ceramic layer 1a is provided. However, in the present embodiment, a dummy internal electrode 4 is formed on the protective layer. The thickness of the protective layer is arbitrary, but can be set to, for example, 5μm to 150μm. In addition, the thickness of the ceramic layer 1a of the protective layer may be greater than the thickness of the ceramic layer 1a of the effective area forming the capacitor formed with the first internal electrode 2 and the second internal electrode 3. In addition, the material of the ceramic layer 1a of the protective layer may be different from the material of the ceramic layer 1a of the effective area.

[0040] Depend on Figure 3 It can be seen that the first internal electrode 2 extends in the length direction L of the ceramic body 1, and one end is led to the first end face 1C of the ceramic body 1. The second internal electrode 3 extends in the length direction L of the ceramic body 1, and one end is led to the second end face 1D of the ceramic body 1. In principle, the first internal electrode 2 and the second internal electrode 3 are preferably stacked alternately.

[0041] The dummy internal electrode 4 provided as the base external electrode of the first external electrode 5 and the second external electrode 6 has a smaller dimension in the length direction L than the first internal electrode 2 and the second internal electrode 3. One end of the dummy internal electrode 4 is led out to either the first end surface 1C or the second end surface 1D of the ceramic body 1. In addition, the dummy internal electrode 4 disposed on the side closest to the first main surface 1A of the ceramic body 1 is exposed on the first main surface 1A of the ceramic body 1.

[0042] The dummy internal electrodes 4 may include at least one layer of each of the first external electrodes 5 and the second external electrodes 6 which is disposed closest to the first main surface 1A of the ceramic body 1 and exposed on the first main surface of the ceramic body 1 .

[0043] The material of the main component (metal component) of the first internal electrode 2, the second internal electrode 3, and the dummy internal electrode 4 is arbitrary, but Ni is used in this embodiment. However, other metals such as Cu, Ag, Pd, and Au may be used instead of Ni. In addition, Ni or Cu, Ag, Pd, and Au may be alloys with other metals. The first internal electrode 2, the second internal electrode 3, and the dummy internal electrode 4 may also contain other components such as ceramics in addition to the metal component.

[0044] The thickness of the first internal electrode 2, the second internal electrode 3 and the dummy internal electrode 4 is arbitrary, but can be set to about 0.3 μm to 1.5 μm, for example.

[0045] A first external electrode 5 and a second external electrode 6 are formed on the outer surface of the ceramic body 1. When observing a cross section parallel to the first side surface 1E and the second side surface 1F, the first external electrode 5 is formed in an L shape at the first end surface 1C and the first main surface 1A, and the second external electrode 6 is formed in an L shape at the second end surface 1D and the first main surface 1A. The first external electrode 5 is electrically connected to the first internal electrode 2 at the first end surface 1C. The second external electrode 6 is electrically connected to the second internal electrode 3 at the second end surface 1D.

[0046] The first external electrode 5 and the second external electrode 6 have the same multilayer structure. In the present embodiment, the first external electrode 5 and the second external electrode 6 have, from the bottom, a base external electrode, a Cu-plated external electrode layer 7 formed on the outside of the base external electrode, a Ni-plated external electrode layer 8 formed on the outside of the Cu-plated external electrode layer 7, and an Au-plated external electrode layer 9 formed on the outside of the Ni-plated external electrode layer 8. However, the structure, material, etc. of the first external electrode 5 and the second external electrode 6 are arbitrary and are not limited to the structure and material. In addition, the dimensions of the thickness, width, length, etc. of the first external electrode 5 and the second external electrode 6 are also arbitrary and can be freely set. In particular, various changes can be adopted with respect to the number of layers, material, size, etc. of the plated external electrode layer.

[0047] Next, the base external electrodes of the first external electrode 5 and the second external electrode 6 will be described. The base external electrode is an electrode that serves as a base when a plated external electrode layer is formed on the outside thereof.

[0048] The base external electrode of the first external electrode 5 is composed of the first internal electrode 2 led out to the first end surface 1C, the end of the dummy internal electrode 4, and the main surface of the dummy internal electrode 4 exposed on the first main surface 1A. Figure 3 , the following structure is illustrated, that is, as a base external electrode, the first external electrode 5 includes four layers of dummy internal electrodes 4, wherein the upper main surface of the dummy internal electrode 4 arranged closest to the first main surface 1A is exposed on the first main surface 1A, and the ends of the remaining three layers of the dummy internal electrodes 4 are led out to the first end surface 1C. However, the number of layers of the dummy internal electrodes 4 of the first external electrode 5 is arbitrary, as long as there is at least one layer arranged closest to the first main surface 1A of the ceramic body 1 and the upper main surface is exposed to the outside from the first main surface 1A of the ceramic body 1.

[0049] Similarly, the base external electrode of the second external electrode 6 is composed of the second internal electrode 3 led out to the second end surface 1D, the end of the dummy internal electrode 4, and the main surface of the dummy internal electrode 4 exposed on the first main surface 1A. Figure 3 as well as Figure 4 , the following structure is illustrated, that is, as a base external electrode, the second external electrode 6 includes four layers of dummy internal electrodes 4, wherein the upper main surface of the dummy internal electrode 4 arranged closest to the first main surface 1A is exposed on the first main surface 1A, and the ends of the remaining three layers of the dummy internal electrodes 4 are led out to the second end surface 1D. However, the number of layers of the dummy internal electrodes 4 of the second external electrode 6 is arbitrary, as long as there is at least one layer arranged closest to the first main surface 1A of the ceramic body 1 and the upper main surface is exposed to the outside from the first main surface 1A of the ceramic body 1.

[0050] As described above, the end of the first internal electrode 2 led out to the first end surface 1C of the ceramic body 1 and the end of the second internal electrode 3 led out to the second end surface 1D of the ceramic body 1 are also part of the base external electrodes of the first external electrode 5 and the second external electrode 6. Figure 3 as well as Figure 4 Since the drawings would become complicated, the end of the first internal electrode 2 and the end of the second internal electrode 3 are not shown as part of the first external electrode 5 and the second external electrode 6 (the lead lines from the figure mark "5" in the figure showing the first external electrode 5 and the figure mark "6" in the figure showing the second external electrode 6 are omitted).

[0051] The base external electrode of the first external electrode 5 and the second external electrode 6 functions as a base for forming the Cu-plated external electrode layer 7 on the outside thereof. In addition, as described above, in the present embodiment, the end of the first internal electrode 2 and the end of the dummy internal electrode 4 led to the first end face 1C, and the end of the second internal electrode 3 and the end of the dummy internal electrode 4 led to the second end face 1D are also part of the base external electrode of the first external electrode 5 and the second external electrode 6. Respectively, at the first end face 1C, the ends of a plurality of linear first internal electrodes 2 extending in the width direction W and the ends of the dummy internal electrodes 4 are exposed with a gap (the ends of the linear ceramic layer 1a extending in the width direction W are sandwiched therebetween), and at the second end face 1D, the ends of a plurality of linear second internal electrodes 3 extending in the width direction W and the ends of the dummy internal electrodes 4 are exposed with a gap (the ends of the linear ceramic layer 1a extending in the width direction W are sandwiched therebetween), but even if the ends of the first internal electrode 2, the ends of the second internal electrode 3, and the ends of the dummy internal electrode 4 are arranged with a gap, they function as a base when forming a plated external electrode layer.

[0052] The first external electrode 5 and the second external electrode 6 are provided with a Cu-plated external electrode layer 7 on the outside of the base external electrode. The Cu-plated external electrode layer 7 mainly serves to improve moisture resistance. In addition, it is also preferred that the Cu-plated external electrode layer 7 contains Ni. In this case, the dissolution of the external electrode layer into the solder can be suppressed.

[0053] The first external electrode 5 and the second external electrode 6 include a Ni-plated external electrode layer 8 on the outside of the Cu-plated external electrode layer 7. The Ni-plated external electrode layer 8 mainly serves to improve solder heat resistance and improve bonding properties. In addition, it is also preferred that the Ni-plated external electrode layer 8 contains P. In this case, the mechanical strength of the external electrode layer can be improved.

[0054] The first external electrode 5 and the second external electrode 6 include an Au-plated external electrode layer 9 on the outside of the Ni-plated external electrode layer 8. The Au-plated external electrode layer 9 mainly functions to improve the wettability of the external electrode layer to solder.

[0055] Depend on Figure 1 as well as Figure 2 It can be seen that in the multilayer ceramic capacitor 100 of the present embodiment, the R dimensions of the ridge E11 between the first main surface 1A and the first end surface 1C, the ridge E12 between the first main surface 1A and the first side surface 1E, the ridge E13 between the first main surface 1A and the second end surface 1D, and the ridge E14 between the first main surface 1A and the second side surface 1F are larger than the R dimensions of the ridge E21 between the second main surface 1B and the first end surface 1C, the ridge E22 between the second main surface 1B and the first side surface 1E, the ridge E23 between the second main surface 1B and the second end surface 1D, and the ridge E24 between the second main surface 1B and the second side surface 1F.

[0056] In the present embodiment, a process of increasing the R dimension is separately provided in the manufacturing process for the ridge E11 between the first main surface 1A and the first end surface 1C, the ridge E12 between the first main surface 1A and the first side surface 1E, the ridge E13 between the first main surface 1A and the second end surface 1D, and the ridge E14 between the first main surface 1A and the second side surface 1F. On the other hand, a process of increasing the R dimension is not provided in the manufacturing process for the ridge E21 between the second main surface 1B and the first end surface 1C, the ridge E22 between the second main surface 1B and the first side surface 1E, the ridge E23 between the second main surface 1B and the second end surface 1D, and the ridge E24 between the second main surface 1B and the second side surface 1F.

[0057] In the multilayer ceramic capacitor 100, the first main surface 1A of the ceramic body 1 having the first external electrode 5 and the second external electrode 6 is a mounting surface facing a substrate (as described above, the “substrate” includes “an object based on the substrate”). Since the R dimensions of the ridge E11 where the first main surface 1A and the first end surface 1C meet, the ridge E12 where the first main surface 1A and the first side surface 1E meet, the ridge E13 where the first main surface 1A and the second end surface 1D meet, and the ridge E14 where the first main surface 1A and the second side surface 1F meet, which are provided on the mounting surface side of the multilayer ceramic capacitor 100, are large (due to large rounded corners), when the multilayer ceramic capacitor 100 is arranged (mounted) on a substrate or the like for mounting, even if these ridges collide with the substrate or electrodes formed on the substrate, the impact can be mitigated, so that cracks etc. can be suppressed from being generated in the ceramic body 1.

[0058] In addition, each R dimension of the ridge E11 where the first main surface 1A and the first end surface 1C meet, the ridge E12 where the first main surface 1A and the first side surface 1E meet, the ridge E13 where the first main surface 1A and the second end surface 1D meet, and the ridge E14 where the first main surface 1A and the second side surface 1F meet is preferably set to a level of 1 μm or more and 10 μm or less. This is because if it is less than 1 μm, the effect of suppressing the generation of cracks in the ceramic body 1 is small. In addition, if it exceeds 10 μm, it takes time to increase the R dimensions of each of these ridges, and the productivity of the laminated ceramic capacitor decreases. On the other hand, the R dimensions of the ridge E21 where the second main surface 1B and the first end surface 1C meet, the ridge E22 where the second main surface 1B and the first side surface 1E meet, the ridge E23 where the second main surface 1B and the second end surface 1D meet, and the ridge E24 where the second main surface 1B and the second side surface 1F meet are preferably set to be less than 1 μm, for example. This is because, in this case, there is no need to separately provide a process for increasing the R dimensions of these ridges.

[0059] In addition, by Figure 1 as well as Figure 2 It can be seen that, in the multilayer ceramic capacitor 100 of the present embodiment, the R dimensions of the corner C11 where the first main surface 1A, the first end surface 1C, and the first side surface 1E are connected, the corner C12 where the first main surface 1A, the first side surface 1E, and the second end surface 1D are connected, the corner C13 where the first main surface 1A, the second end surface 1D, and the second side surface 1F are connected, and the corner C14 where the first main surface 1A, the second side surface 1F, and the first end surface 1C are connected are larger than the R dimensions of the corner C21 where the second main surface 1B, the first end surface 1C, and the first side surface 1E are connected, the corner C22 where the second main surface 1B, the first side surface 1E, and the second end surface 1D are connected, the corner C23 where the second main surface 1B, the second end surface 1D, and the second side surface 1F are connected, and the corner C24 where the second main surface 1B, the second side surface 1F, and the first end surface 1C are connected. This is because the R dimensions of the ridge E11 between the first main surface 1A and the first end surface 1C, the ridge E12 between the first main surface 1A and the first side surface 1E, the ridge E13 between the first main surface 1A and the second end surface 1D, and the ridge E14 between the first main surface 1A and the second side surface 1F are larger than the R dimensions of the ridge E21 between the second main surface 1B and the first end surface 1C, the ridge E22 between the second main surface 1B and the first side surface 1E, the ridge E23 between the second main surface 1B and the second end surface 1D, and the ridge E24 between the second main surface 1B and the second side surface 1F. That is, the R dimension becomes larger at the angle where two ridges with large R dimensions intersect than at the angle where two ridges with small R dimensions intersect.

[0060] Since the R dimensions of the corners C11 where the first main surface 1A, the first end surface 1C, and the first side surface 1E are connected, the corner C12 where the first main surface 1A, the first side surface 1E, and the second end surface 1D are connected, the corner C13 where the first main surface 1A, the second end surface 1D, and the second side surface 1F are connected, and the corner C14 where the first main surface 1A, the second side surface 1F, and the first end surface 1C are connected, which are arranged on the mounting surface side of the multilayer ceramic capacitor 100, are large, when the multilayer ceramic capacitor 100 is arranged on a substrate or the like for mounting, even if these corners collide with the substrate or electrodes formed on the substrate, the impact can be mitigated, so that the occurrence of cracks in the ceramic body 1 can be suppressed.

[0061] The multilayer ceramic capacitor 100 of this embodiment has a plurality of embossed holes 10 formed on the second main surface 1B of the ceramic body 1. In this embodiment, the plurality of embossed holes 10 of the same shape and size are arranged in the longitudinal direction L and the width direction W on the second main surface 1B of the ceramic body 1.

[0062] In this application document, the so-called embossed hole refers to a concave bottomed hole. The concave surface can be hemispherical or non-hemispherical. The size, number, arrangement, spacing, formed area, etc. of the embossed holes 10 are arbitrary and can be set appropriately. The method of forming the embossed holes 10 is also arbitrary. In addition, whether the embossed holes 10 are formed on the second main surface 1B can be easily confirmed by comparing with other surfaces of the ceramic body 1 (such as the first main surface 1A, etc.).

[0063] In the multilayer ceramic capacitor 100, the second main surface 1B of the ceramic body 1 is a surface that is adsorbed by the nozzle of the mounting device during installation, for example, and is a surface that may be impacted by the nozzle. Since the multilayer ceramic capacitor 100 of this embodiment has a plurality of embossed holes 10 formed on the second main surface 1B of the ceramic body 1, it is impact-resistant even if impact is applied by a nozzle, etc., and can suppress the generation of cracks in the ceramic body 1. In addition, as long as the embossed holes 10 are fine embossed holes that are accommodated in the ceramic layer 1a with a depth of 1 to several dozen layers, the impact resistance of the ceramic body 1 can be improved well. However, if the depth of the embossed holes 10 becomes too large, the strength of the ceramic body 1 as a whole may be reduced, so the depth of the embossed holes 10 does not need to be too large.

[0064] The multilayer ceramic capacitor 100 of the present embodiment can be used, for example, Figure 5 (A)~ Figure 6 The method shown in (J) was used for manufacturing.

[0065] First, prepare Figure 5The ceramic green sheets 11a shown in (A) are used to form the ceramic layers 1a of the ceramic body 1. In order to manufacture a large number of multilayer ceramic capacitors 100 at once, the ceramic green sheets 11a are prepared as mother ceramic green sheets 50 in which a large number of ceramic green sheets 11a are arranged in a matrix.

[0066] Although not shown in the figure, first, dielectric ceramic powder, a binder resin, a solvent, etc. are prepared, and these are wet-mixed to prepare ceramic slurry.

[0067] Next, the ceramic slurry is applied onto a carrier film in a sheet shape using a die coater, a gravure coater, a micro gravure coater, or the like, and dried to produce a mother ceramic green sheet 50 .

[0068] Then, similarly, Figure 5 As shown in (A), the conductive paste 12 for forming the first internal electrode 2, the conductive paste 13 for forming the second internal electrode 3, and the conductive paste 14 for forming the dummy internal electrode 4 prepared in advance are applied (e.g., printed) in a desired pattern shape on the main surface of a given ceramic green sheet 11a in the mother ceramic green sheet 50. For the conductive paste, for example, a conductive paste mixed with a solvent, a binder resin, a metal powder (e.g., Ni powder), etc. can be used.

[0069] Then, if Figure 5 As shown in (B), the mother ceramic green sheets 50 are stacked in a given order and pressure-bonded to produce a mother unfired ceramic body 60 in which a large number of unfired ceramic bodies 11 are arranged in a matrix.

[0070] Then, if Figure 5 As shown in (C), a jig 70 having a plurality of protrusions 70a formed on the upper main surface is prepared. Next, the lower main surface of the mother unfired ceramic body 60 is pushed against the protrusions 70a of the jig 70. As a result, Figure 4 As shown in FIG. 5 (D), a plurality of embossed holes 10 are formed on the second main surface 1B of each of the unfired ceramic bodies 11 of the mother unfired ceramic body 60 .

[0071] Then, if Figure 6 As shown in (E), the mother unfired ceramic body 60 is cut into individual unfired ceramic bodies 11 .

[0072] Next, the unfired ceramic body 11 is fired at a given temperature profile to produce Figure 6 (F) shows the ceramic body 1. At this time, inside the ceramic body 1, the conductive paste 12 is fired simultaneously to form the first internal electrode 2, the conductive paste 13 is fired simultaneously to form the second internal electrode 3, and the conductive paste 14 is fired simultaneously to form the dummy internal electrode 4.

[0073] Then, if Figure 6 As shown in (G), a jig 80 is prepared. Then, the second main surface 1B of the ceramic body 1 is fixed to the main surface on the upper side of the jig 80. Next, the first main surface 1A of the ceramic body 1 is cut by, for example, sandblasting, so that the main surface on the upper side of the dummy internal electrode 4 arranged on the side closest to the first main surface 1A of the ceramic body 1 is exposed on the first main surface 1A of the ceramic body 1.

[0074] At this time, at the same time, each of the ridges E11 where the first main surface 1A and the first end surface 1C meet, the ridge E12 where the first main surface 1A and the first side surface 1E meet, the ridge E13 where the first main surface 1A and the second end surface 1D meet, and the ridge E14 where the first main surface 1A and the second side surface 1F meet are cut, respectively. The R dimensions of the ridge E13 between the main surface 1A and the second end surface 1D and the ridge E14 between the first main surface 1A and the second side surface 1F become larger than the R dimensions of the ridge E21 between the second main surface 1B and the first end surface 1C, the ridge E22 between the second main surface 1B and the first side surface 1E, the ridge E23 between the second main surface 1B and the second end surface 1D, and the ridge E24 between the second main surface 1B and the second side surface 1F (the rounded corners become larger).

[0075] Then, if Figure 6 As shown in (H), the first internal electrode 2, the second internal electrode 3, the end portions of the dummy internal electrode 4 led out to the first end face 1C and the second end face 1D, and the main surface on the upper side of the dummy internal electrode 4 exposed on the first main surface 1A are used as base external electrodes. After a given catalyst is applied to the surface of these base external electrodes as needed, electroless plating is performed to form a Cu-plated external electrode layer 7.

[0076] Then, if Figure 6 As shown in (I), after applying a predetermined catalyst as needed on the outer side of the Cu-plated external electrode layer 7 , electroless plating is performed to form the Ni-plated external electrode layer 8 .

[0077] Then, if Figure 6 As shown in (J), after applying a given catalyst as needed on the outside of the Ni-plated external electrode layer 8, electroless plating is performed to form the Au-plated external electrode layer 9. Through the above, the first external electrode 5 is formed in an L shape on the first end surface 1C and the first main surface 1A of the ceramic body 1, and the second external electrode 6 is formed in an L shape on the second end surface 1D and the first main surface 1A of the ceramic body 1, and the laminated ceramic capacitor 100 involved in the first embodiment is completed.

[0078] [Second embodiment]

[0079] exist Figure 7 FIG. 2 shows a multilayer ceramic capacitor 200 according to a second embodiment. Figure 7 is a cross-sectional view of the multilayer ceramic capacitor 200 .

[0080] The multilayer ceramic capacitor 200 according to the second embodiment is obtained by modifying a part of the structure of the multilayer ceramic capacitor 100 according to the first embodiment described above.

[0081] Specifically, in the multilayer ceramic capacitor 100, the dummy internal electrode 4 is used as a part of the base external electrode of the first external electrode 5 and the second external electrode 6. The multilayer ceramic capacitor 200 changes this and omits the dummy internal electrode 4. Moreover, in the multilayer ceramic capacitor 200, a NiCr thin film layer 27 is formed by sputtering as the base external electrode of the first external electrode 25 and the second external electrode 26. The NiCr thin film layer 27 has high adhesion to the ceramic body 1 and becomes an excellent base external electrode of the first external electrode 25 and the second external electrode 26.

[0082] Furthermore, in the multilayer ceramic capacitor 100, a Cu-plated external electrode layer 7, a Ni-plated external electrode layer 8, and an Au-plated external electrode layer 9 are sequentially provided on the outside of the base external electrode as the plated external electrode layers of the first external electrode 5 and the second external electrode 6. The multilayer ceramic capacitor 200 makes a change in this regard, and a Ni-plated external electrode layer 28 and an Au-plated external electrode layer 29 are sequentially formed on the outside of the NiCr thin film layer 27 as the base external electrode as the plated external electrode layers of the first external electrode 25 and the second external electrode 26.

[0083] The other structures of the multilayer ceramic capacitor 200 are the same as those of the multilayer ceramic capacitor 100 .

[0084] Similar to the multilayer ceramic capacitor 100, the R dimensions of the ridge E11 between the first principal surface 1A and the first end surface 1C, the ridge E12 between the first principal surface 1A and the first side surface 1E, the ridge E13 between the first principal surface 1A and the second end surface 1D, and the ridge E14 between the first principal surface 1A and the second side surface 1F of the multilayer ceramic capacitor 200 are larger than the R dimensions of the ridge E21 between the second principal surface 1B and the first end surface 1C, the ridge E22 between the second principal surface 1B and the first side surface 1E, the ridge E23 between the second principal surface 1B and the second end surface 1D, and the ridge E24 between the second principal surface 1B and the second side surface 1F. Therefore, when the multilayer ceramic capacitor 200 is placed on a substrate or the like for mounting, even if these ridges collide with the substrate or electrodes formed on the substrate, the impact can be mitigated, thereby suppressing the occurrence of cracks in the ceramic body 1 .

[0085] The multilayer ceramic capacitor 200 of the present embodiment can be used, for example, Figure 8 (A)~ Fig. 9 The method shown in (J) was used for manufacturing.

[0086] First, prepare Figure 8 The ceramic green sheet 11 a shown in (A) is used to form the ceramic layer 1 a of the ceramic body 1. The ceramic green sheet 11 a is prepared as a mother ceramic green sheet 50 in order to manufacture a large number of multilayer ceramic capacitors 100 at a time.

[0087] Then, similarly, Figure 8 As shown in (A), the conductive paste 12 for forming the first internal electrode 2 and the conductive paste 13 for forming the second internal electrode 3 prepared in advance are applied in a desired pattern shape on the main surface of a given ceramic green sheet 11a in the mother ceramic green sheet 50. In addition, since the multilayer ceramic capacitor 200 does not have a dummy internal electrode, the conductive paste for forming the dummy internal electrode is not applied.

[0088] Then, if Figure 8 As shown in (B), the mother ceramic green sheets 50 are stacked in a given order and pressure-bonded to produce a mother unfired ceramic body 60 .

[0089] Then, if Figure 8 As shown in (C), the main surface of the lower side of the mother unfired ceramic body 60 is pushed against a jig 70 having a plurality of protrusions 70a formed on the main surface of the upper side, as shown in FIG. Figure 8 As shown in FIG. 2 (D), a plurality of embossed holes 10 are formed on the second main surface 1B of each unfired ceramic body 11 .

[0090] Then, if Fig. 9 As shown in (E), the mother unfired ceramic body 60 is cut into individual unfired ceramic bodies 11 .

[0091] Next, the unfired ceramic body 11 is fired at a given temperature curve to produce Fig. 9 The ceramic body 1 is shown in (F).

[0092] Then, if Fig. 9 As shown in (G), a jig 80 is prepared. Then, the second main surface 1B of the ceramic body 1 is fixed to the main surface on the upper side of the jig 80. Next, by, for example, sandblasting, the ridge E11 connecting the first main surface 1A and the first end surface 1C, the ridge E12 connecting the first main surface 1A and the first side surface 1E, the ridge E13 connecting the first main surface 1A and the second end surface 1D, and the ridge E14 connecting the first main surface 1A and the second side surface 1F are cut respectively to increase their R dimensions.

[0093] Then, if Fig. 9As shown in (H), a NiCr thin film layer 27 is formed by sputtering as a base external electrode of the first external electrode 25 and the second external electrode 26 .

[0094] Then, if Fig. 9 As shown in (I), a predetermined catalyst is applied as needed to the outer side of the NiCr thin film layer 27 as the base external electrode of the first external electrode 25 and the second external electrode 26, and then electroless plating is performed to form the Ni plated external electrode layer 28.

[0095] Then, if Fig. 9 As shown in (J), after applying a given catalyst as needed on the outside of the Ni-plated external electrode layer 28, electroless plating is performed to form the Au-plated external electrode layer 29. Through the above, the first external electrode 25 is formed in an L shape on the first end surface 1C and the first main surface 1A of the ceramic body 1, and the second external electrode 26 is formed in an L shape on the second end surface 1D and the first main surface 1A of the ceramic body 1, and the laminated ceramic capacitor 200 involved in the second embodiment is completed.

[0096] The multilayer ceramic capacitors 100 and 200 according to the embodiments have been described above. However, the present invention is not limited to the above-described contents, and various modifications can be made within the spirit of the invention.

[0097] For example, in the above-mentioned embodiment, there is a process for increasing the R dimensions of the ridge E11 connecting the first principal surface 1A and the first end surface 1C, the ridge E12 connecting the first principal surface 1A and the first side surface 1E, the ridge E13 connecting the first principal surface 1A and the second end surface 1D, and the ridge E14 connecting the first principal surface 1A and the second side surface 1F, but there is no process for increasing the R dimensions of the ridge E21 connecting the second principal surface 1B and the first end surface 1C, the ridge E22 connecting the second principal surface 1B and the first side surface 1E, the ridge E23 connecting the second principal surface 1B and the second end surface 1D, and the ridge E24 connecting the second principal surface 1B and the second side surface 1F. However, this may be modified by adding a step of increasing the R dimension of each of the ridge lines E21 connecting the second main surface 1B and the first end surface 1C, the ridge line E22 connecting the second main surface 1B and the first side surface 1E, the ridge line E23 connecting the second main surface 1B and the second end surface 1D, and the ridge line E24 connecting the second main surface 1B and the second side surface 1F, and by giving different degrees of increasing the R dimension in the two steps, the ridge lines E11 connecting the first main surface 1A and the first end surface 1C, the ridge line E22 connecting the second main surface 1B and the first side surface 1E, the ridge line E23 connecting the second main surface 1B and the second end surface 1D, and the ridge line E24 connecting the second main surface 1B and the second side surface 1F are increased. The R dimensions of the ridge E12 between the main surface 1A and the first side surface 1E, the ridge E13 between the first main surface 1A and the second end surface 1D, and the ridge E14 between the first main surface 1A and the second side surface 1F are larger than the R dimensions of the ridge E21 between the second main surface 1B and the first end surface 1C, the ridge E22 between the second main surface 1B and the first side surface 1E, the ridge E23 between the second main surface 1B and the second end surface 1D, and the ridge E24 between the second main surface 1B and the second side surface 1F.

[0098] Furthermore, in the above-described embodiment, the embossed holes 10 are formed in the second main surface 1B of the ceramic body 1. However, in the multilayer ceramic capacitor of the present invention, the embossed holes 10 are not essential components and can be omitted.

[0099] A multilayer ceramic capacitor according to one embodiment of the present invention is as described in the "Solution to Problem" column.

[0100] In the multilayer ceramic capacitor, it is also preferred that the R dimension of the ridges where the first main surface and the first end surface, the second end surface, the first side surface, and the second side surface meet is 1 μm or more and 10 μm or less. This is because if it is less than 1 μm, when these ridges collide with the substrate, etc., the effect of suppressing the generation of cracks in the ceramic body is small. In addition, if it exceeds 10 μm, it takes time to increase the R dimension of each of these ridges, and the productivity of the multilayer ceramic capacitor decreases.

[0101] In addition, it is also preferred that the R dimension of the angle where the first principal surface, the first end surface and the first side surface, the angle where the first principal surface, the first side surface and the second end surface, the angle where the first principal surface, the second end surface and the second side surface, and the angle where the first principal surface, the second side surface and the first end surface are greater than the R dimension of the angle where the second principal surface, the first end surface and the first side surface, the angle where the second principal surface, the first side surface and the second end surface, the angle where the second principal surface, the second end surface and the second side surface, and the angle where the second principal surface, the second side surface and the first end surface are In this case, since the R dimensions of the corners where the first principal surface, the first end surface, and the first side surface meet, the corners where the first principal surface, the first side surface, and the second end surface meet, the corners where the first principal surface, the second end surface, and the second side surface meet, and the corners where the first principal surface, the second side surface, and the first end surface meet, which are arranged on the mounting surface side, are large, when the stacked ceramic capacitor is arranged on a substrate for mounting, even if these corners collide with the substrate or electrodes formed on the substrate, the impact can be mitigated, thereby suppressing the occurrence of cracks in the ceramic body.

[0102] In addition, it is also preferred that a plurality of embossed holes are formed on the second main surface of the ceramic body. In this case, for example, when the second main surface is adsorbed by the nozzle of the mounting device, even if an impact is applied by the nozzle, the impact is also resistant and cracks can be suppressed in the ceramic body.

[0103] It is also preferred that the first external electrode and the second external electrode each include a base external electrode and at least one plated external electrode layer formed on the outside of the base external electrode. In this case, the base external electrode is used as a base, and the plated external electrode layer can be easily formed on the outside thereof by, for example, electroless plating.

[0104] In addition, it is also preferred that the base external electrode includes a dummy internal electrode that is smaller in length than the first internal electrode and the second internal electrode and is exposed on the first main surface of the ceramic body. In this case, the first external electrode and the second external electrode with a relatively large area can be easily formed on the first main surface of the ceramic body.

[0105] It is also preferable that the dummy internal electrode, the first internal electrode, and the second external electrode are formed of the same material. In this case, it is not necessary to prepare a separate material for forming the dummy internal electrode as the base external electrode, and the productivity of the multilayer ceramic capacitor is improved.

[0106] It is also preferable that the dummy internal electrode contains Ni as a main component. In this case, the ceramic body, the first internal electrode, the second external electrode, and the dummy internal electrode can be easily manufactured by so-called co-firing.

[0107] It is also preferable that the base external electrode is a thin film. In this case, the base external electrode can be easily formed by, for example, sputtering.

[0108] In this case, it is also preferable that the thin film contains NiCr as a main component. In this case, the thin film has high adhesion to the ceramic body and serves as an excellent base external electrode for the first external electrode and the second external electrode.

[0109] It is also preferred that the plated external electrode layer includes at least one selected from a Cu plated external electrode layer, a Ni plated external electrode layer, and an Au plated external electrode layer. In this case, various functions can be exerted in each plated external electrode layer, and an excellent first external electrode and a second external electrode can be formed.

[0110] It is also preferred that the plated external electrode layer includes a Ni plated external electrode layer formed on the outside of the base external electrode, and an Au plated external electrode layer formed on the outside of the Ni plated external electrode layer. In this case, the Ni plated external electrode layer can mainly play the role of improving the solder heat resistance and bonding, and the Au plated external electrode layer 9 can mainly play the role of improving the wettability of the external electrode layer to the solder.

[0111] It is also preferred that the plated external electrode layer includes a Cu plated external electrode layer formed on the outside of the base external electrode, a Ni plated external electrode layer formed on the outside of the Cu plated external electrode layer, and an Au plated external electrode layer formed on the outside of the Ni plated external electrode layer. In this case, the Cu plated external electrode layer 7 can mainly play a function of improving moisture resistance, the Ni plated external electrode layer can mainly play a function of improving solder heat resistance and improving bonding, and the Au plated external electrode layer 9 can play a function of improving the wettability of the external electrode layer to solder.

[0112] It is also preferable that the Ni-plated external electrode layer contains P. In this case, the mechanical strength of the external electrode layer is improved.

[0113] It is also preferable that the Cu-plated external electrode layer contains Ni. In this case, dissolution of the external electrode layer into the solder can be suppressed.

[0114] It is also preferred that one of the length dimension and the width dimension is 1.0 mm or less, and the other is 0.5 mm or less. In addition, it is also preferred that the height dimension is 0.1 mm or less. Even when the present invention is applied to a miniaturized and thinned multilayer ceramic capacitor, since the R dimension of the ridges connecting the first main surface, the first end surface, the first side surface, the second end surface, and the second side surface as the mounting surface is large, even if these ridges collide with the substrate, the electrodes formed on the substrate, etc. during mounting, it is possible to suppress the generation of cracks in the ceramic body.

[0115] Description of Reference Numerals

[0116] 1: Ceramic body;

[0117] 1a: ceramic layer;

[0118] 1A: 1st main surface;

[0119] 1B: 2nd main surface;

[0120] 1C: 1st end face;

[0121] 1D: 2nd end surface;

[0122] 1E: 1st side;

[0123] 1F: 2nd side;

[0124] 2: 1st internal electrode;

[0125] 3: Second internal electrode;

[0126] 4: Dummy internal electrode;

[0127] 5: 1st external electrode;

[0128] 6: second external electrode;

[0129] 7: Cu plated external electrode layer;

[0130] 8, 28: Ni-plated external electrode layer;

[0131] 9, 29: Au-plated external electrode layer;

[0132] 27: NiCr thin film layer (substrate external electrode);

[0133] 10: Embossed holes.

Claims

1. A multilayer ceramic capacitor comprising: A ceramic body having a plurality of ceramic layers, a plurality of first internal electrodes, and a plurality of second internal electrodes stacked in a height direction, and having a first main surface and a second main surface opposite to each other in the height direction, a first end surface and a second end surface opposite to each other in a length direction orthogonal to the height direction, and a first side surface and a second side surface opposite to each other in a width direction orthogonal to the height direction and the length direction; and The first external electrode and the second external electrode are formed on the outer surface of the ceramic body. The first internal electrode is led out to the first end surface and is electrically connected to the first external electrode. The second internal electrode is led out to the second end surface and is electrically connected to the second external electrode. in, When observing a cross section parallel to the first side surface and the second side surface, The first external electrode is formed in an L shape on the first end surface and the first main surface. The second external electrode is formed in an L shape on the second end surface and the first main surface, The R dimension of the ridgeline where the first main surface and the first end surface, the first side surface, the second end surface and the second side surface meet is greater than the R dimension of the ridgeline where the second main surface and the first end surface, the first side surface, the second end surface and the second side surface meet.

2. The multilayer ceramic capacitor according to claim 1, wherein An R dimension of a ridge line where the first main surface, the first end surface, the first side surface, the second end surface, and the second side surface are in contact is 1 μm or more and 10 μm or less.

3. The multilayer ceramic capacitor according to claim 1 or 2, wherein: The R dimension of the angle at which the first principal surface, the first end surface and the first side surface, the angle at which the first principal surface, the first side surface and the second end surface, the angle at which the first principal surface, the second end surface and the second side surface, and the angle at which the first principal surface, the second side surface and the first end surface are connected is greater than the R dimension of the angle at which the second principal surface, the first end surface and the first side surface, the angle at which the second principal surface, the first side surface and the second end surface, the angle at which the second principal surface, the second end surface and the second side surface, and the angle at which the second principal surface, the second side surface and the first end surface are connected.

4. The multilayer ceramic capacitor according to any one of claims 1 to 3, wherein A plurality of embossed holes are formed on the second main surface.

5. The multilayer ceramic capacitor according to any one of claims 1 to 4, wherein The first external electrode and the second external electrode respectively include: a substrate external electrode; and At least one plated external electrode layer is formed outside the base external electrode.

6. The multilayer ceramic capacitor according to claim 5, wherein: The base external electrode includes a dummy internal electrode having a smaller dimension in the longitudinal direction than the first internal electrode and the second internal electrode and exposed on the first main surface of the ceramic body.

7. The multilayer ceramic capacitor according to claim 6, wherein: The dummy internal electrode, the first internal electrode, and the second external electrode are formed of the same material.

8. The multilayer ceramic capacitor according to claim 6 or 7, wherein: The dummy internal electrode contains Ni as a main component.

9. The multilayer ceramic capacitor according to claim 5, wherein: The substrate external electrode is a thin film.

10. The multilayer ceramic capacitor according to claim 9, wherein The film contains NiCr as a main component.

11. The multilayer ceramic capacitor according to claim 5, wherein The plated external electrode layer includes at least one selected from a Cu plated external electrode layer, a Ni plated external electrode layer, and an Au plated external electrode layer.

12. The multilayer ceramic capacitor according to claim 11, wherein The plated external electrode layer comprises: A Ni-plated external electrode layer formed outside the substrate external electrode; and The Au-plated external electrode layer is formed on the outer side of the Ni-plated external electrode layer.

13. The multilayer ceramic capacitor according to claim 11, wherein The plated external electrode layer comprises: A Cu-plated external electrode layer formed outside the substrate external electrode; A Ni-plated external electrode layer formed on the outer side of the Cu-plated external electrode layer; and The Au-plated external electrode layer is formed on the outer side of the Ni-plated external electrode layer.

14. The multilayer ceramic capacitor according to claim 11, wherein The Ni-plated external electrode layer includes P.

15. The multilayer ceramic capacitor according to claim 11, wherein The Cu-plated external electrode layer includes Ni.

16. The multilayer ceramic capacitor according to any one of claims 1 to 15, wherein: One of the dimension in the longitudinal direction and the dimension in the width direction is 1.0 mm or less, and the other is 0.5 mm or less.

17. The multilayer ceramic capacitor according to any one of claims 1 to 16, wherein: The dimension in the height direction is less than 0.1 mm.

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