Light emitting device on Ge

Abstract

A light emitting device (10) comprising a germanium first layer (12); a nucleating layer (14); comprising a buffer layer (16) consisting of III-V; and an active layer (24). And the sum product of the As concentration and the layer thickness in each layer is less than 20%. This enables the device to be manufactured in an environment that must be arsenic-free or substantially arsenic-free.

Description

[0001] A light emitting device, specifically but not limited to a resonant cavity LED formed on germanium.

[0002] Typically, light emitting devices are manufactured by forming a gallium arsenide (GaAs) buffer layer on a GaAs substrate and then forming additional layers to implement functional elements such as optical mirrors, light emitting regions, and cladding regions. Depending on the desired emission wavelength, the additional layers are typically composed of GaAs and aluminum gallium arsenide (AlGaAs) for the mirrors, and AlGaAs or indium gallium aluminum phosphide (InGaAlP) for the light emitting regions and cladding regions. Such devices are useful for lighting applications and large display applications. GaAs substrates are widely available, but tend to be expensive and limited in diameter, resulting in relatively high manufacturing costs.

[0003] Light emitting devices are also manufactured on germanium (Ge) substrates by growing a GaAs buffer layer on germanium. This approach exploits the fortuitous lattice match of GaAs relative to germanium, which enables the growth of GaAs layers of quality suitable for device applications directly on the germanium substrate. Additional device layers are then formed on the GaAs buffer layer in the same manner as they were formed on the GaAs substrate. While these devices can be manufactured in factories designed for III-V compound processing, the use of arsenic in such layer stacks creates a contamination risk in factories designed for manufacturing silicon-based devices, as arsenic is an impurity in silicon and may cause performance or reliability degradation of silicon processes. This risk has prevented the adoption of large-scale silicon-based factories to manufacture devices on 200mm and 300mmGe.

[0004] The present invention aims to resolve this disadvantage.

[0005] The present invention provides a light emitting device comprising: a germanium first layer; a nucleation layer; a buffer layer comprising a III-V composition; and an active layer; wherein the sum product of the arsenic concentration in each layer and the layer thickness is less than 20%.

[0006] Minimizing and controlling the amount of arsenic in a device is advantageous because it enables the device to be manufactured in an environment that must be free of arsenic or substantially free of arsenic. For example, environments in which Group IV semiconductors are typically manufactured are sensitive to arsenic, which is a dopant for Group IV layers such as layers containing silicon. Advantageously, such manufacturing environments are arranged for large-scale manufacturing, thereby providing economies of scale and cost advantages.

[0007] Advantageously, germanium substrates are available in large diameter wafers that are mechanically more robust than equivalent gallium arsenide wafers. Thus, thinner substrates can be used, or the substrates can be further thinned in subsequent manufacturing steps without affecting the integrity of the devices grown on the wafer. For example, germanium wafers are available in 200 mm, 300 mm, and larger diameter wafers than are available for GaAs, which can reduce device manufacturing costs per device. Larger substrate diameters also enable cost-effective manufacturing of large arrays of emitters on a single wafer, such as may be required for novel display applications. Advantageously, manufacturing environments that handle silicon-based devices can readily handle germanium-based devices, since both Si and Ge are Group IV elements with similar properties. Advantageously, such manufacturing environments are often set up to handle larger diameter wafers.

[0008] The light emitting device may be configured to emit light at a wavelength between 570 nm and 1000 nm. Advantageously, such a light emitting device may be configured to emit light from green to infrared to suit the particular application contemplated. Advantageously, by using a germanium first layer, such as a germanium substrate, a light emitting device similar to that grown on gallium arsenide (and therefore may be designed to emit at any desired wavelength) may be grown, but with a lower or zero arsenic content.

[0009] The light emitting device may include a resonant cavity light emitting diode or a resonant cavity micro light emitting diode.

[0010] The sum product can be less than 15%. Advantageously, this means that the arsenic content is low and controlled, while allowing some flexibility in the design of the device. For example, in a resonant cavity light emitting diode (RC-LED), the top portion of the device may be arsenic-free so that specific layers can be etched without contamination, such as etching the top mirror area without exposing the process equipment to arsenic-containing byproducts. The sum product can be less than 10%. This is equivalent to about 200nm of arsenic in an edge-emitting laser. In an RC-LED, additional parts of the device (including the light emitting area) may be arsenic-free, which enables deeper etching of the light emitting area without generating arsenic-containing byproducts. The sum product can be less than 5%. This is equivalent to about 200nm of arsenic in a thick LED. In an RC-LED, most of the device stack is arsenic-free, so that most manufacturing steps can be performed without generating arsenic-containing byproducts. The sum product can be less than 2%. Advantageously, this value is low enough to meet very strict arsenic control in a manufacturing environment. This is equivalent to about 200nm of arsenic in a vertical cavity surface emitting laser (VCSEL). Avoiding layers containing arsenic also results in fewer interfaces between arsenic-containing layers and phosphorus-containing layers. This is advantageous because such interfaces may degrade device performance or reliability due to interface strain or roughness.

[0011] The buffer layer may include a first sublayer adjacent to the nucleation layer, and a second sublayer. The first sublayer may include a III-V composition. The second sublayer may include a different III-V composition. The first sublayer and the second sublayer of the buffer layer may be arranged such that one has a tensile strain and the other has a compressive strain. Advantageously, the resulting strain is minimized.

[0012] The first sublayer and the second sublayer of the buffer layer may comprise the same material and / or the same composition. The first sublayer and the second sublayer of the buffer layer may comprise the same material with the same composition. They may be grown under different conditions and / or have another difference, such as different doping levels. Advantageously, this is simple for growth because the same source is used and other growth parameters are controlled. The first sublayer and the second sublayer of the buffer layer may comprise the same material with different compositions. Advantageously, this is simple for growth because the same source is used and the proportions are varied between the sublayers. Alternatively, the first sublayer and the second sublayer of the buffer layer may comprise the same composition but may have another difference, such as doping levels or growth conditions. Advantageously, this is simple for growth because the same source is used and other growth parameters are controlled.

[0013] The buffer layer may be formed from more than two sub-layers. The composition and / or dopant level of one or more of the sub-layers may be graded.

[0014] The first sublayer may comprise indium gallium phosphide. Advantageously, it does not include any arsenic, which means that it does not increase the total arsenide content of the light emitting device. The first sublayer may comprise indium aluminum phosphide. Advantageously, it does not include any arsenic, which means that it does not increase the total arsenide content of the light emitting device. The first sublayer may comprise indium gallium arsenide. Although it contains some arsenic, the composition and / or thickness may be set to minimize or limit the amount of arsenide so that the total arsenide content in the light emitting device is within limits defined for the manufacturing environment.

[0015] The second sublayer may comprise gallium arsenide. The second sublayer may be thin such that the total arsenide content of the light emitting device does not exceed defined limits. The second sublayer may comprise indium gallium phosphide. Advantageously, it does not comprise arsenic.

[0016] The light emitting device may include a lower mirror. The lower mirror may include a III-V material composition that does not contain arsenic. Advantageously, the lower mirror does not contribute to the total arsenic content in the device and can therefore be as thick as appropriate for the optical or other properties of the device.

[0017] The lower mirror may comprise an alternating stack of indium aluminium phosphide and indium aluminium gallium phosphide sublayers. Advantageously, the lower mirror does not contribute to the overall arsenic content in the device, so there may be a number of alternating sublayers in the stack suitable for the optical or other properties of the device.

[0018] The light emitting device may include a lower cladding layer located between the first layer and the active layer. The lower cladding layer may provide confinement of the optical mode. It may also be used to inject carriers into the active region, and the lower cladding layer may be used in combination with the upper cladding layer. The lower cladding layer may also or alternatively be used to separate the active region from the first layer and / or the optional lower mirror at an optimal distance. The lower cladding layer may include aluminum indium phosphide or aluminum indium gallium phosphide. Advantageously, the lower cladding layer does not contribute to the total arsenic content of the device.

[0019] The light emitting device may include an upper mirror. The upper mirror may include a III-V material composition that does not contain arsenic. Advantageously, the upper mirror does not contribute to the total arsenic content in the device, so the thickness may be tailored to the optical or other properties of the device.

[0020] The upper mirror may comprise an alternating stack of indium aluminium phosphide and indium aluminium gallium phosphide sublayers. Advantageously, the upper mirror does not contribute to the overall arsenic content in the device, so there may be a number of alternating sublayers in the stack suitable for the optical or other properties of the device.

[0021] The light emitting device may include an upper cladding layer located between the active layer and the upper mirror. The upper cladding layer may provide confinement of the optical mode. It may also be used to inject carriers into the active region, which upper cladding layer may be used in combination with the lower cladding layer. The upper cladding layer may also or alternatively be used to separate the active region from the active layer and / or the optional upper mirror at an optimal distance. The upper cladding layer may include indium gallium phosphide or indium gallium aluminum phosphide. Advantageously, the upper cladding layer does not contribute to the total arsenic content of the device.

[0022] The active layer may comprise indium gallium phosphide or indium gallium aluminium phosphide. Advantageously, the active layer does not contribute to the overall arsenic content of the device.

[0023] The first layer may include germanium with a large miscut to the main crystal plane. For example, it may include germanium facing <111> The first layer may be germanium with a miscut of up to 15° from the main crystal plane. The first layer may be germanium with a miscut of up to 10° from the main crystal plane. The first layer may be germanium with a miscut of up to 6° from the main crystal plane. The first layer may be germanium with a miscut of up to 3° from the main crystal plane. Advantageously, the miscut germanium first layer prevents the formation of antiphase domains in the layer on which it is grown.

[0024] The first layer may be a substrate with a misalignment of up to 15° with the main crystal plane. The first layer may be a substrate with a misalignment of up to 10° with the main crystal plane. The first layer may be a substrate with a misalignment of up to 6° with the main crystal plane. The first layer may be a substrate with a misalignment of up to 3° with the main crystal plane. For example, the first layer may be a substrate with a misalignment of up to 15° with the main crystal plane. <111> Advantageously, the mis-cut substrate prevents the formation of anti-phase domains in the layers grown on the substrate.

[0025] The nucleation layer may comprise indium gallium phosphide. Advantageously, the nucleation layer does not contribute to the overall arsenic content of the device.

[0026] At least one of the buffer layer, the lower mirror and the upper mirror may be doped. Any one or more of these layers may be n-doped or p-doped. Advantageously, this improves the conductivity of the layer. The choice of doping type may be determined by the device design.

[0027] The light emitting device may be an edge emitting laser. The light emitting device may be an LED. The light emitting device may be a micro-LED. The light emitting device may be a resonant cavity LED. The light emitting device may be a VCSEL. The light emitting device may be an LED combined with a photodetector. The light emitting device may be a resonant cavity LED combined with a photodetector. The light emitting device may be a micro-LED combined with a photodetector. Advantageously, any type of light emitting device may include a germanium first layer and have a low total arsenic content, making it suitable for fabrication in an arsenic-sensitive environment such as a Group IV fabrication environment.

[0028] The present invention also provides a method for manufacturing a light emitting device, comprising the steps of: growing a nucleation layer on a first layer of germanium; growing a buffer layer on the nucleation layer; and growing an active layer; wherein the arsenic content in the light emitting device is less than 20%, which is calculated as the sum product of the arsenic concentration in the layer and the thickness of the layer. Advantageously, the steps of the method can be designed and controlled to achieve a low total arsenic content, so that the method and the resulting device are suitable for manufacturing and further processing in an arsenic-sensitive environment such as a Group IV manufacturing environment. Advantageously, the growth steps of the low arsenic device can be performed in a manner similar to the growth steps of conventional high arsenic devices. Therefore, these steps are well-established and repeatable growth steps, such as epitaxial growth steps, which result in high-quality layers.

[0029] These steps may include growing the layers using metal organic vapor phase epitaxy, metal organic chemical vapor deposition, or molecular beam epitaxy.

[0030] The present invention will now be described more fully by way of example with reference to the accompanying drawings, in which:

[0031] Figure 1 is a schematic cross section of the layers;

[0032] Figure 2is a schematic cross section of a resonant cavity light emitting diode according to the present invention;

[0033] Figure 3 is a schematic cross section of a resonant cavity light emitting diode according to the present invention;

[0034] Figure 4 is a schematic cross section of a resonant cavity light emitting diode according to the present invention;

[0035] Figure 5 is a schematic cross section of a resonant cavity light emitting diode according to the present invention;

[0036] Figure 6 is a schematic cross section of a combined light emitting diode and a PIN diode according to the present invention;

[0037] Figure 7 is a schematic cross section of a combined light emitting diode and a PIN diode according to the present invention;

[0038] Epitaxy or epitaxial means the crystal growth of a material, usually via high temperature deposition. Epitaxy can be performed in a molecular beam epitaxy (MBE) tool, where layers are grown on a heated substrate in an ultra-high vacuum environment. Elemental sources are heated in a furnace and directed toward the substrate without a carrier gas. The elemental components react at the substrate surface to create a deposited layer. Each layer is allowed to reach its lowest energy state before the next layer is grown, so that a bond is formed between the layers. Epitaxy can also be performed in a metal organic vapor phase epitaxy (MOVPE) tool, also known as a metal organic chemical vapor deposition (MOCVD) tool. Compound metal organics and hydride sources are flowed over the heated surface using a carrier gas, usually hydrogen. Epitaxial deposition occurs at much higher pressures than in an MBE tool. The compound components are cracked in the gas phase and then react at the surface to grow a layer of desired composition, doping, and thickness.

[0039] Deposition means depositing one layer on another layer or substrate. It encompasses epitaxy, chemical vapor deposition (CVD), powder bed deposition and other known techniques to deposit materials in layers.

[0040] Compound materials that include one or more materials from Group III and one or more materials from Group V of the periodic table are called III-V materials. Compounds have a 1:1 combination of Group III and Group V, regardless of the number of elements from each group. The subscript in the chemical symbol of the compound refers to the ratio of the element within that group. Thus, Al 0.25 GaAs means that the Group III portion comprises 25% Al and therefore 75% Ga, while the Group V portion comprises 100% As.

[0041] Crystalline means a material or layer having a single crystal orientation. In epitaxial growth or deposition, subsequent layers of the same or similar lattice constant follow the registration of the previous crystalline layer and thus grow in the same crystal orientation. In-plane is used herein to mean parallel to the surface of the substrate; out-of-plane is used to mean perpendicular to the surface of the substrate.

[0042] Throughout this disclosure, as the skilled reader will appreciate, crystal orientation <100> implies the faces of a cubic crystal structure and uses Miller indices covering the

[100] ,

[010] , and

[001] orientations. Similarly, <0001>

[0001] and [000-1] are contemplated unless material polarity is critical. Any integer multiple of one or more of the indices is equivalent to the unit version of the index. For example, (222) is equivalent to (111), which is the same as it.

[0043] Substrate means a flat wafer on which subsequent layers can be deposited or grown. The substrate can be formed of a single element or compound material, and can be doped or undoped. For example, common substrates include silicon (Si), gallium arsenide (GaAs), silicon germanium (SiGe), silicon germanium tin (SiGeSn), indium phosphide (InP), and gallium antimonide (GaSb).

[0044] The substrate may be on-axis, i.e., the growth surface is aligned with the crystal plane. For example, it has <100> Crystalline Orientation. Reference herein to a substrate in a given orientation also encompasses a substrate that is mis-cut by up to 20° toward another crystallographic direction, for example a (100) substrate mis-cut toward the (111) plane.

[0045] Vertical or out-of-plane means in the growth direction; lateral or in-plane means parallel to the substrate surface and perpendicular to the growth direction.

[0046] Doping means that a layer or material contains a small impurity concentration of another element (dopant) that donates (donor) or extracts (acceptor) charge carriers from the parent material, thus changing the conductivity. Charge carriers can be electrons or holes. Doped materials with extra electrons are called n-type, while doped materials with extra holes (fewer electrons) are called p-type.

[0047] Lattice matching means that two crystal layers have the same or similar lattice spacing, so the second layer will tend to grow isomorphically on the first layer. The lattice constant is the strain-free lattice spacing of the unit cell of the crystal. Lattice consistency means that a crystal layer has a lattice constant that is an integer multiple of or close to that of the previous layer, so the atoms can align with the previous layer. Lattice mismatch is a situation where the lattice constants of two adjacent layers are neither lattice matched nor lattice consistent. This mismatch introduces elastic strain into the structure, especially into the second layer, because the second layer adopts the in-plane lattice spacing of the first layer. When the second layer has a larger lattice constant, the strain is compressive strain, and when the second layer has a smaller lattice constant, the strain is tensile strain.

[0048] When the strain is too great, the structure relaxes to minimize the energy by the creation of defects, usually dislocations, called slips, or additional interstitial bonds, each of which allows the layer to recover toward its lattice constant. The strain may be too great due to a large lattice mismatch or due to the accumulation of small mismatches over many layers. Relaxed layers are called degenerate, incongruent, incommensurate, or relaxed, and these terms are often interchangeable.

[0049] A pseudomorphic system is a system in which a single crystal thin layer is coated on a single crystal substrate and the layer and the substrate have similar crystal structures and almost identical lattice constants. In the pseudomorphic structure, the in-plane lattice spacing of the thin layer adopts the in-plane lattice constant of the substrate, so the elastic strain is either a compressive strain in which the layer has a lattice spacing greater than that of the substrate, or a tensile strain in which the layer has a lattice spacing less than that of the substrate. The pseudomorphic structure is not constrained in the out-of-plane direction, so the lattice spacing of the thin layer in this direction can change to accommodate the strain generated by the mismatch between the lattice spacings. The thin layer can be alternatively described as "conform", "commensurate", "strained" or "unrelaxed", and these terms are often used interchangeably. In the pseudomorphic structure, all layers adopt the lattice spacing of the substrate in their corresponding in-plane lattice spacing.

[0050] The layer can be monolithic, that is, the entire layer includes bulk material. Alternatively, it can be porous over some or all of its thickness. The porous layer includes air or vacuum pores, and the porosity is defined as the proportion of the area occupied by pores rather than bulk material. The porosity can vary with the thickness of the layer. For example, the layer can be porous in one or more sublayers. The layer can include a porous upper part and a non-porous lower part. Alternatively, the layer can include one or more discrete discontinuous parts (domains), which are porous and the rest are non-porous (having bulk material properties). These parts can be discontinuous in the plane of the sublayer and / or through the thickness of the layer (horizontally and / or vertically in the sense of the growth direction). These parts can be distributed across the layer and / or distributed through the layer in a regular array or irregular pattern. The porosity within the porous region can be constant or variable. When the porosity is variable, it can vary linearly in thickness, or it can vary according to different functions such as quadratic functions, logarithmic functions, or step functions.

[0051] A fully depleted porous layer means a layer having no charge carriers therein.

[0052] The present invention relates to a light emitting device in which the amount of arsenic (As) is limited so that the device can be manufactured or further processed in an environment that is sensitive to As. For example, the manufacturing environment of a silicon-based device must have low levels of As in the device being processed because As is a dopant for many common materials. The acceptable As level can be determined by calculating the As content in each layer and summing for all layers. The As content in a layer is the product of the concentration of As atoms relative to other group V atoms in the layer and the layer thickness. Therefore, if Figure 1 As shown in , a layer of thickness T in which 100% of the group V atoms include As will have the same As content as a layer of thickness 2T in which only 50% of the group V atoms include As. Thus, a layer of thickness T that is a binary compound of As and a group III element, such as GaAs, has the same As content as a layer of thickness 2T that is a ternary III-V compound in which As is 50% of the atomic concentration of the group V element.

[0053] The light emitting device 10 according to the present invention is configured to have a limited As concentration. Therefore, it is suitable for manufacturing or further processing in an As-sensitive environment. For example, the total As content of the light emitting device 10 can be equivalent to less than 20% of the total thickness of the device 10. The total As content can be calculated as the sum product of the As concentration in each layer and the layer thickness. That is, the As concentration of the layer is multiplied by the thickness, and all layers forming the light emitting device 10 are summed.

[0054] The light emitting device 10 can be configured to have a lower total As content. For example, 15%, 10%, 5%, or 2%. For example, when the device has 200nm of GaAs as its only As-containing layer, the total As content is approximately 17% in a device with a total thickness of 1.2μm (such as a thin LED or edge emitter), and approximately 2.5% in a device with a total thickness of 8μm (such as a VCSEL). For a thick LED with a total thickness of 4μm, the As content is approximately 5%. When the device has 200nm of In x Ga 1- x With As as the only As-containing layer and x=0.5, the total As content for a 1.2 μm device is only approximately 8%, and for an 8 μm thick device the total As content is only 1.25%.

[0055] Reference will now be made to a diagram showing a light emitting diode (LED) 10. Figure 2 The present invention is described more particularly. LED 10 includes a first layer 12 of germanium (Ge). The first layer 12 may be a substrate. The substrate may be Ge that is staggered toward different major faces. For example, it may be toward <111> The face is cut <100> Ge, but it can be mis-cut towards different planes. It can have a large mis-cut. For example, it can be a mis-cut of up to 15°. For example, it can be a mis-cut of 6°.

[0056] Alternatively, it can be a Ge layer formed on another layer or substrate, such as on a silicon (Si) substrate. For example, there can be a Si substrate with a graded composition of SiGe, on which Ge is grown in increasing proportions until the upper layer is pure Ge or mainly Ge, such as 90% Ge and 10% Si, which forms the first layer 12. Thus, the first layer 12 can include a composition that is essentially Ge, such as where the Ge content is greater than or equal to 90%.

[0057] Ge wafers are available in large diameters, such as 200 mm and 300 mm. Advantageously, Ge wafers are mechanically robust and have low defect rates. This makes Ge particularly suitable for growing LEDs and micro-LEDs where hundreds or thousands of devices are cut from a single wafer and a single defective device can render the entire product (e.g., an LED display) useless. For example, micro-LED devices are on the order of a few microns or less in size.

[0058] Grown on or above the first layer 12 is a nucleation layer 14. The nucleation layer 14 enables high quality III-V layers to grow on top of the Ge first layer 12. It acts as a transition layer to promote the growth of crystalline layers and smooth the change in lattice constant between the Ge first layer 12 and subsequent layers. The nucleation layer 14 can be thin, for example a few hundred angstroms thick. The nucleation layer 14 can include indium gallium phosphide (InGaP), which can be lattice matched to Ge by appropriate selection of the ratio of In and Ga.

[0059] On or above the nucleation layer 14 is a buffer layer 16. The buffer layer 16 restores or improves surface roughness so that subsequently grown layers have a smooth surface to grow thereon. The buffer layer 16 is preferably pseudomorphic relative to the first layer 12 and / or the nucleation layer 14. Alternatively, the buffer layer 16 may be metamorphic relative to the nucleation layer 14. The buffer layer may be doped with Si or another dopant to make it n-type. Alternatively, it may be doped with a p-type dopant. Alternatively, the buffer layer 16 may be undoped or inadvertently doped. The buffer layer 16 may be relatively thick, e.g., 100 nm - 2 μm. The buffer layer 16 may be formed of a single composition throughout its thickness. For example, it may include indium gallium phosphide (InGaP). x Ga 1-x P), where x is ~0.5, so that it is lattice matched to the Ge first layer 12. Alternatively, x can be slightly greater or less than 0.5, such as 0.45 to 0.55, which introduces a small amount of strain but not enough to prevent the buffer layer 16 from becoming pseudomorphic relative to the first layer 12. This range of x will result in a strain between about 0.2% tension and about 0.5% compression. Advantageously, the buffer layer 16 including InGaP does not contain As and is therefore suitable for processing in an As-sensitive manufacturing environment such as the environment in which Si-based devices are typically processed. Alternatively, the buffer layer 16 may include a graded composition in which the proportion of one or more elements in the composition increases, decreases, or varies over the thickness of the layer. For example, the proportion of In can increase as the proportion of Ga decreases, and vice versa. The change in composition can be linear, quadratic, exponential, or follow another equation. The change can be periodic. The proportion of one element can first increase and then decrease over the thickness of the buffer layer 16, or vice versa.

[0060] Alternatively, the buffer layer 16 may include a quaternary compound such as InGaAlP, In y (Ga x Al 1-x ) 1-yP. Advantageously, such a buffer layer 16 is As-free and therefore suitable for processing in an As-sensitive manufacturing environment, such as a Si manufacturing environment. Advantageously, for a given In composition y, including Al in the composition has minimal effect on the lattice constant, but can improve optical mode confinement in the buffer layer 16 (by changing the refractive index) and carrier confinement in subsequent layers (by changing the bandgap energy). Thus, y can be ~0.5 to ensure lattice matching with the Ge first layer 12, and x can be selected to set the desired properties. For example, x>0 provides a bandgap energy greater than 1.9 eV, and x>0.5 provides a bandgap energy>2.2 eV.

[0061] Alternatively, buffer layer 16 may include a quaternary or quinary alloy containing antimony. For example, layer 16 may include In y (Ga x Al 1-x ) 1-y As 1-z Sb z . Binary alloys of Sb (GaSb, InSb, AlSb) have larger lattice constants and lower band gap energies than the related phosphide (GaP, InP, AlP) and arsenide (GaAs, InAs, AlAs) compounds. Therefore, the addition of antimony to layer 16 provides additional degrees of freedom for modifying the lattice constant (increases with increasing z) and the band gap energy (decreases with increasing z). For example, layer 16 can contain z>0.1%, or z>1%, or z>10%, up to approximately z<40%, where the Ga / In ratio is adjusted to maintain a lattice constant close to that of the Ge first layer 12 and the nucleation layer 14. The composition of the buffer layer 16 can also vary throughout the layer to provide a lattice constant and band energy or refractive index profile that varies with thickness.

[0062] In an alternative, the buffer layer 16 may include two or more sub-layers, such as Figure 3 As shown in . The first sublayer 18 may be relatively thick, and the second sublayer 20 may be relatively thin. For example, the thickness of the first sublayer 18 in the growth direction may be about 200 nm, and the thickness of the second sublayer 20 may be about 20 nm. The first sublayer 18 may include In x Ga 1-x P or InGaAs (In x Ga 1-xThe first sublayer 18 may be a GaAs layer, wherein x is approximately 0.5 for InGaP and approximately 0.015 for InGaAs to lattice match the Ge first layer 12. The second sublayer 20 may include gallium arsenide (GaAs). When the first sublayer 18 includes InGaP, it may be grown under different conditions and / or include a different ratio of In and Ga than the nucleation layer 14. Advantageously, by including only a thin layer of GaAs, the overall As content of the LED 10 is low. Thus, the buffer layer 16 and the LED 10 are suitable for processing in a manufacturing environment where As must be minimized, such as the environment in which Si-based devices are typically processed.

[0063] Alternatively, the second sublayer 20 can be relatively thick and the first sublayer 18 relatively thin. For example, the first sublayer 18 can include indium aluminum phosphide (InAlP) with a thickness of about 20nm, and the second sublayer 20 can include InGaP with a thickness of 200nm or more. The second sublayer 20 can be grown under the same or different growth conditions as the nucleation layer 14. It can have the same composition, or can have different ratios of In and Ga. Advantageously, this combination of sublayer compositions means that the buffer layer 16 does not include As, making it suitable for processing or manufacturing in environments sensitive to As.

[0064] The first and second sublayers 18, 20 can be arranged so that one has a tensile strain and the other has a compressive strain, in this case, controlled by the relative proportions of the group III elements within the sublayers. Thus, the net strain can be substantially zero, meaning that the top surface of the buffer layer 16 is flat. Alternatively, the net strain can be arranged to be non-zero so that there is a tensile strain or a compressive strain. This can offset the strain in the first layer 12, such as the compressive strain in the SiGe or SiGeSn first layer 12, and / or can pre-strain the structure so that the strain is compensated by subsequent layers of the device 10. Advantageously, this net strain can be configured to balance reflectivity and surface roughness. Similarly, the first and second sublayers 18, 20 can be arranged to control the surface roughness at their interface.

[0065] On or above the buffer layer 16 is an optional lower mirror 22. The lower mirror 22 includes alternating pairs of layers having different, high and low, refractive indices. These layers or some of them may be doped with p-type dopants such as beryllium (Be), carbon (C), zinc (Zn), or magnesium (Mg). Alternatively, they may be doped with n-type dopants such as Si, selenium (Se), tellurium (Te), or sulfur (S). Alternatively, the lower mirror 22 is undoped or is inadvertently doped. These layers may include In x Al 1-x P and In x (Al y Ga 1-y ) 1-xP, where x is approximately 0.5 to lattice match the Ge first layer 12, and y can be selected to control the band gap and set the appropriate reflectivity contrast, in which case the lower mirror 22 does not contain As. For example, these layers may include In 0.5 Al 0.5 P and In 0.5 (Al 0.3 Ga 0.7 ) 0.5 P or In 0.5 Al 0.5 P and In 0.5 (Al 0.5 Ga 0.5 ) 0.5 P. Alternatively, these layers may include GaAs and Al x Ga 1-x As, or GaAs and aluminum arsenide (AlAs), or Al x Ga 1-x As and AlAs, where x is selected between 0 and 1 and the compound remains lattice matched to Ge. The thicknesses of these layers can be the same as each other, or the layers of one material can be thicker than the layers of the other material. The doping concentration can be uniform within each layer, or can vary between layers, or can vary within a layer. For example, the thickness and / or doping concentration can be optimized for voltage drop and relative reflectivity. For devices 10 with longer wavelengths, the layers are thicker than for devices with shorter wavelengths. The thickness of the lower mirror 22 can be arranged so that the total As content of the lower mirror 22 and therefore the LED 10 does not exceed the desired amount. Therefore, the LED 10 can be manufactured in an environment that is sensitive to As. The As content of the lower mirror 22 is a function of the proportion of As in each layer multiplied by the thickness of these layers and summed over all layers containing As.

[0066] The buffer layer 16 may include a transition portion adjacent to the nucleation layer 14 that is designed to modify the surface roughness (and lattice constant) of subsequent layers or the interface roughness between pairs of layers above the buffer layer 16, in particular the sublayer of the optional lower mirror 22. Such a portion may include the same material as the nucleation layer 14, but with a different composition and / or grown under different growth conditions. For example, it may include InGaP. The transition portion may be only a few nanometers thick. By providing this transition portion, the reflectivity of the optional lower mirror 22 may be reduced somewhat because it has a refractive index more similar to that of the nucleation layer 14 than the rest of the buffer layer 16, but with improved uniformity of reflectivity across the wafer. Thus, a small reduction in reflectivity is offset by improved device performance and uniformity.

[0067] If lower mirror 22 is absent, the transition portion of buffer layer 16 may improve the quantum efficiency or another property of active layer 24 .

[0068] On or above the optional lower mirror 22 or buffer layer 16 is an active layer 24. The active layer 24 is arranged to emit light of a desired wavelength in response to a current across it. The wavelength may be in the range of 570 to 1000 nm. For example, the active layer 24 may emit at 570 nm-700 nm, which is typical for red LEDs. The active layer 24 may be configured as a bulk layer, one or more quantum wells, or one or more quantum dots. The active layer 24 may include one layer, or two or more sublayers. For example, it may include quantum wells and quantum barriers in corresponding sublayers formed of different materials. The active layer 24 may include InGaP or InAlGaP, wherein In includes approximately 50% of the concentration of group III atoms in order to maintain lattice matching. Advantageously, such materials do not contain As. Alternatively, the wavelength may be in the range of 550 to 620 nm, which covers orange, amber, and green light. Alternatively, it may emit at 690 to approximately 1000 nm, which is typical for infrared light. The active layer 24 may include InGaAs, GaAs, AlGaAs or GaAsP with a wavelength between 690 nm and 1000 nm. The active layer 24 is thin, for example, about 10 nm to about 500 nm, and therefore has a low As content. For example, the active layer 24 may be about 100 nm thick and include up to 10 quantum wells for a μLED, or up to 300 nm for an edge emitter laser. Alternatively, the LED 10 may also have a much thicker bulk active layer 24, for example, about 500 nm. However, the active layer 24 is still thin relative to the total thickness of the LED 10, and therefore has a low As content. Therefore, advantageously, the As in the active layer 24 does not exceed the acceptable total As content in the LED 10.

[0069] Optionally, there may be a lower cladding layer 26 between the lower mirror 22 and the active layer 24. The lower cladding layer 26 provides confinement of the optical mode. It may also confine charge carriers (holes when the lower mirror 22 is n-doped) in the active layer 24. It may also serve as a carrier injection layer. In this case, it is configured as an intracavity contact. The lower cladding layer 26 may include InAlP or InAlGaP, which is typical for red emitters. Advantageously, the lower cladding layer 26 does not include any As. The lower cladding layer 26 may include sublayers with different compositions and / or doping concentrations and / or thicknesses, for example to accommodate mode expansion.

[0070] Optionally, there may be an upper cladding layer 28 on or above the active layer 24. The upper cladding layer 28 provides confinement of the optical mode. It may also confine charge carriers, electrons or holes, to the active layer 24 depending on the configuration of the light emitting device. It may also serve as a carrier injection layer and be configured as an intracavity contact. The upper cladding layer 28 may comprise the same material as the lower cladding layer 26, or may comprise a different material or a different composition of the same material. It may comprise InAlP or InAlGaP. Advantageously, the upper cladding layer 28 does not include any As. The upper cladding layer 28 may comprise sublayers having different compositions and / or doping concentrations and / or thicknesses, for example to accommodate mode expansion.

[0071] Optionally, an upper mirror 30 is provided on or over the active layer 24. When an upper cladding layer 28 is present, the upper mirror 30 is disposed on or over the upper cladding layer 28. The upper mirror 30 may be an epitaxially grown mirror comprising alternating pairs of layers having different, higher and lower, refractive indices. The layers forming the upper mirror 30 may be doped. When the lower mirror 22 is doped with an n-type dopant, the upper mirror 30 may be doped with a p-type dopant, such as Be, C, Mg, or Zn. When the lower mirror 22 is doped with a p-type dopant, the upper mirror 30 may be doped with an n-type dopant, such as Si, Se, Te, or S. Alternatively, the upper mirror 30 is undoped or is inadvertently doped. The upper mirror 30 may include alternating In x Al 1-x P layer and In x (Al y Ga 1-y ) 1-x P layers, where x is approximately 0.5 for lattice matching, and y is selected to control the band gap and set the relative refractive index. In this case, the upper mirror 30 does not contain As. The upper mirror 30 may include alternating layers of GaAs and Al x Ga 1-x As layer, or GaAs layer and AlAs layer, or Al x Ga 1-x As layer and AlAs layer. In this case, x is selected between 0 and 1 based on the desired band gap and refractive index. AlAs with x = 0.605 x Ga 1-xAs is lattice matched to Ge, but compounds with different x generally generate less strain. The upper mirror 30 may have the same layer material as the lower mirror 22. The composition of each layer may be the same or different from that of the lower mirror 22. Alternatively, the upper mirror 30 may include a different material than that set for the lower mirror 22. The layer thickness may be the same as or may be different from that of the lower mirror 22. When the upper mirror includes As, the thickness and composition of the layer are controlled so that the total As content of the LED 10 does not exceed the desired value. The upper mirror 30 may have a different number of layer pairs from the lower mirror 22, and the number of layer pairs is usually less for front-emitting LEDs. For example, the lower mirror 22 may include 26.5 layer pairs, and the upper mirror 30 may include 5 layer pairs, which results in a reflectivity close to 100%. Alternatively, the lower mirror 22 may include 10 pairs, and the upper mirror 30 may include 4 pairs, which, although the emission is less concentrated, has a lower voltage drop.

[0072] Alternatively, the upper mirror 30 may be a dielectric mirror disposed on or above the active layer 24 or upper cladding layer 28. Since the dielectric mirror is undoped, the upper cladding layer 28 is required to inject charge carriers into the structure to generate a current across the active layer 24 in operation. The dielectric upper mirror 30 may be bonded to the lower layer. Alternatively, a bulk material may be grown and then porous to produce sub-layers with higher and lower refractive indices.

[0073] The optional lower cladding layer 26 and the upper cladding layer 28 can also be used to space the optional lower mirror 22 and the upper mirror 30 at an optimal distance from each other. The optional lower cladding layer 26 and the upper cladding layer 28 can form an optical cavity to provide overlap between the active layer 24 and the optical mode defined by the optional lower mirror 22 and the upper mirror 30.

[0074] Optionally, a cap layer 32 may be grown or provided on or over the optional upper mirror 30, the optional upper cladding layer 28, or the active layer 24. The cap layer 32 may be highly doped so as to enable a low contact resistance electrode to be provided over the active layer 24.

[0075] In the case where the lower cladding layer 26 is omitted or not configured as an intracavity contact, there may be a lower contact 34 attached to the substrate or first layer 12. The lower contact 34 may be attached to the back of the substrate or first layer 12, such as Figure 2 . Alternatively, the lower contact 34 may be attached to the substrate or the front of the first layer 12. Alternatively, it may be attached to the lower mirror 22. In the case where a lower cladding layer 26 is provided, the lower contact 34 may alternatively be attached to the lower cladding layer 26. In this case, the lower mirror 22 may be undoped or inadvertently doped.

[0076] An upper contact 36 may be provided on top of the LED 10. It may be attached to an optional cap layer 32 (eg, Figure 2 ) or attached to the top of the optional upper mirror 30. The upper contact 36 may include an aperture for directing and / or focusing the emitted light. Alternatively, the upper contact 36 may take the form of a grid to allow light to be emitted in a predefined pattern. The upper contact 36 may be attached to the upper cladding layer 28 (if an upper cladding layer 28 is provided), in which case the upper mirror 30 does not need to be doped and can be a dielectric mirror rather than an epitaxially grown mirror.

[0077] The lattice mismatch between adjacent layers can be controlled to obtain a specific wafer shape. For example, the lattice mismatch can be controlled so that the wafer is flat. This is advantageous because the subsequently grown layers grow on a flat surface and they are deposited with uniform thickness and uniform properties. This also means that the heat from the heated holder supporting the substrate in the epitaxial reactor is evenly distributed on the wafer, so the subsequently grown layers experience the same heating across these layers and therefore grow more uniformly. Alternatively, the lattice mismatch can be controlled to introduce some strain in one direction or another, so that the wafer becomes slightly convex or concave. Advantageously, this can provide pre-strain, which is released when the LED 10 wafer is taken out of the epitaxial reactor and cooled to operating temperature. Additionally or alternatively, it can provide a desired wafer shape to match existing processes and equipment.

[0078] An optional window layer 38 (also called a current spreading layer) may be present, such as Figure 4 As shown in . The window layer 38 improves the diffusion of charge carriers from the optional upper contact 36 to the active layer 24. The window layer 38 can also improve light extraction. In the front-emitting LED 10, the window layer 38 is positioned above the active layer 24, adjacent to and below the optional cap layer 32. The window layer 38 can be relatively thick, for example up to 3 μm thick, up to 10 μm thick, or up to 20 μm thick. It includes a material having a wider band gap than the active layer 24. For example, it can include InAlGaP or AlP. Advantageously, such a window layer 38 does not include any As and is therefore suitable for devices manufactured in an environment sensitive to As. The window layer 38 can alternatively include GaAs or AlGaAs, the thickness of which is limited to maintain the level of As below a desired threshold to enable manufacturing in an environment sensitive to As.

[0079] Figure 5The LED 10 is illustrated without the upper mirror 30 or the lower mirror 22. Instead, the upper cladding layer 28 and the lower cladding layer 26 are thicker so as to adequately separate the buffer layer 16, the active layer 24, and the window layer 38. Alternatively, the lower mirror 22 can be omitted in favor of a thicker lower cladding layer 26, and the upper mirror 30 can be retained. Alternatively, the upper mirror 30 can be omitted in favor of a thicker upper cladding layer 28, and the lower mirror 22 can be retained. Each of the above variations also applies to this arrangement. For example, the buffer layer 16 can include two sublayers 18, 20; an optional cap layer 32 can be present; and the upper contact 36 and the lower contact 34 can be attached to any suitable portion of the device 10.

[0080] Although device 10 has been described as an LED, it may alternatively be a combined LED and photodetector, such as Figure 6 As shown in . Above the Ge first layer 12 and the buffer layer 16 is a photodetector, which is a PIN photodetector 40 as shown. The PIN photodetector 40 includes a first layer 42, a second layer 44, and an intrinsic absorber layer 46 therebetween. The first layer 42 and the second layer 44 are oppositely doped, so one is n-doped and the other is p-doped. For example, the first layer 42 can be n-doped and the second layer 44 can be p-doped. The absorber layer 46 is undoped or inadvertently doped. When a photon hits the absorber layer 46, it creates an electron-hole pair, thereby creating a detectable current between the first layer 42 and the second layer 44. The composition of the absorber layer 46 is selected so that its band gap energy is slightly lower than the energy of the photons generated by the active region. The composition of the first layer 42 and the second layer 44 is selected so that its band gap energy is higher than the energy of the photons generated by the active region to minimize photon absorption in the doped layers. Like other photodetectors, the PIN photodetector 40 is reverse biased, which means that when photons of the desired wavelength are absorbed, the current increases.

[0081] The PIN photodetector 40 can be designed to absorb (detect) light having a longer wavelength than that emitted from the LED 10. Thus, the absorber layer 46 can include the same material as the active layer 24 of the LED 10, but with a smaller bandgap energy, for example, InGaAlP with less Al. Alternatively, it can include a different material with a smaller bandgap energy, such as AlGaAs, as long as the total arsenic content is not exceeded. Thus, for red light (approximately 570-700nm), the absorber layer 46 includes InGaP or InAlGaP, where In includes approximately 50% of the concentration of group III atoms. In the same way that the cladding layers 26, 28 of the LED 10 have a higher bandgap than the active layer 24, the first layer 42 and the second layer 44 include higher bandgap materials with different doping so that they do not absorb the light emitted by the LED 10.

[0082] Above the PIN photodetector 40 is an LED or resonant cavity LED 10 as described above. Thus, there is a buffer layer 16 which may include sublayers 18, 20, followed by an optional lower mirror 22, an optional lower cladding layer 26, an active layer 24, an optional upper cladding layer 28, an optional upper mirror 30, and an optional cap 32. Each device includes two contacts, one of which is typically shared. Thus, there may be a lower contact 34 attached to the top or back of the first layer 12 or to the first layer 42 of the PIN photodetector 40. There may be an upper contact 36 attached to the cap layer 32, the upper mirror 30, the upper cladding layer 28, or the top of the active layer 24. There may be an intermediate contact 48 attached to the second layer 44 of the PIN photodetector 40, as shown. Figure 6 The contacts 34, 36 may be arranged as intracavity contacts embedded in the layer stack.

[0083] Alternatively, the PIN photodetector 40 can be positioned in the middle of the optional lower mirror 22. That is, one, two or more sub-layers of the lower mirror 22 are grown first, then the first layer 42, absorber layer 46 and second layer 44 of the PIN photodetector 40 are grown, and then the remaining sub-layers of the lower mirror 22 are grown thereon.

[0084] Alternatively, the PIN photodetector 40 may be positioned above the active layer 24, e.g. Figure 7 , between the active layer 24 and the upper mirror 30. Alternatively, the PIN photodetector 40 may be positioned in the middle of the optional upper mirror 30. That is, one, two or more sublayers of the upper mirror 30 are grown first, then the first layer 42, the intrinsic layer 46 and the second layer 44 of the PIN photodetector 40 are grown, and then the remaining sublayers of the upper mirror 30 are grown thereon.

[0085] LED 10 may include a tunnel junction such that optional upper mirror 30 and lower mirror 22 have the same dopant type, for example, both p-type or both n-type. The tunnel junction may be grown adjacent to one of lower cladding layer 26 and upper cladding layer 28.

[0086] Although device 10 has been described as an LED, it may alternatively be an edge emitting laser. In this case, optional lower mirror 22 or optional upper mirror 30 may be omitted, and lower cladding layer 26 and upper cladding layer 28 may form a waveguide to assist optical mode propagation in the in-plane direction. Lower cladding layer 26 and upper cladding layer 28 may include sublayers. Active layer 24 may also or alternatively include sublayers.

[0087] Although device 10 has been described as an LED, it may alternatively be a vertical cavity surface emitting laser (VCSEL). In this case, lower mirror 22 and upper mirror 30 are required and may have more layer pairs than in an LED. Lower mirror 22 may include GaAs and AlAs or GaAs and Al x Ga 1-x The alternating layers of As, when grown on top of the Ge first layer 12, result in a low strain mirror. The As content can be controlled, and / or the number of layer pairs limited, so that the total As content of the VCSEL does not exceed a desired level. The active layer 24 also includes an oxide layer that includes an aperture for vertically emitting light.

[0088] The layers of the device 10 can be epitaxially grown in a MOCVD reactor. Alternatively, they can be grown in an MBE reactor or grown by any other epitaxial process. Alternatively, the layers can be grown or deposited by another deposition method. Some of the layers can be provided by other means such as bonding.

Claims

1. A resonant cavity light emitting device (10), comprising: a first layer (12) of substantially germanium; Nucleation layer (14); A buffer layer (16) comprising a III-V composition; as well as an active layer (24), The product of the arsenic concentration in each layer and the layer thickness is less than 20% of the total thickness of the device.

2. The light emitting device (10) according to claim 1, wherein: The light emitting device (10) is configured to emit light having a wavelength between 570 nm and 1000 nm.

3. A light emitting device (10) according to any preceding claim, wherein: The sum product is less than 15%, less than 10%, less than 5% or less than 2%.

4. A light emitting device (10) according to any preceding claim, wherein: The buffer layer (16) includes a first sublayer (18) adjacent to the nucleation layer (14), and a second sublayer (20), wherein the first sublayer (18) includes a III-V composition, and wherein the second sublayer (20) includes a different III-V composition.

5. The light emitting device (10) according to any one of claims 1 to 3, wherein: The buffer layer (16) comprises a first sublayer (18) adjacent to the nucleation layer (14), and a second sublayer (20), wherein the first sublayer (18) and the second sublayer (20) of the buffer layer (16) comprise the same material and / or the same composition.

6. The light emitting device (10) according to claim 4 or claim 5, wherein: The first sublayer (18) comprises indium gallium phosphide, indium aluminum phosphide or indium gallium arsenide.

7. The light emitting device (10) according to claim 4, claim 5 or claim 6, wherein: The second sublayer (20) comprises gallium arsenide or indium gallium phosphide.

8. The light emitting device (10) of any preceding claim, further comprising a lower mirror (22), wherein the lower mirror (22) comprises an arsenic-free III-V material composition.

9. The light emitting device (10) according to claim 8, wherein: The lower mirror (22) comprises an alternating stack of indium aluminum phosphide and indium aluminum gallium phosphide sublayers.

10. The light emitting device (10) of any preceding claim, further comprising a lower cladding layer (26) located between the first layer (12) and the active layer (24).

11. The light emitting device (10) according to any preceding claim, further comprising an upper mirror (30).

12. The light emitting device (10) according to claim 11, wherein: The upper mirror (30) comprises an alternating stack of indium aluminum phosphide and indium aluminum gallium phosphide sublayers.

13. The light emitting device (10) according to claim 11 or claim 12, further comprising an upper cladding layer (28) located between the active layer (24) and the upper mirror (30).

14. The light emitting device (10) according to claim 13, wherein: The upper cladding layer (28) comprises indium gallium phosphide or indium gallium aluminum phosphide.

15. The light emitting device (10) according to any preceding claim, wherein: The active layer (24) comprises indium gallium phosphide or indium gallium aluminum phosphide.

16. A light emitting device (10) according to any preceding claim, wherein: The first layer (12) comprises germanium having a large off-cut.

17. A light emitting device (10) according to any preceding claim, wherein: The first layer (12) is a substrate having an angle of up to 15° off-cut from the main crystal plane.

18. A light emitting device (10) according to any preceding claim, wherein: The nucleation layer (14) includes indium gallium phosphide.

19. A light emitting device (10) according to any preceding claim, wherein: The buffer layer (16) is doped; or the light emitting device (10) according to any one of claims 8 to 18, wherein at least one of the buffer layer (16) and the lower mirror (22) is doped; or the light emitting device (10) according to any one of claims 11 to 18, wherein at least one of the buffer layer (16), the lower mirror (22) or the upper mirror (30) is doped.

20. The light emitting device (10) according to any preceding claim, wherein: The light emitting device is an edge emitting laser, an LED, a micro-LED, a resonant cavity LED, a VCSEL, an LED combined with a photodetector, a resonant cavity LED combined with a photodetector, or a micro-LED combined with a photodetector.

21. A method for manufacturing a resonant cavity light emitting device (10), comprising the following steps: growing a nucleation layer (14) on the first layer (12) of substantially germanium; growing a buffer layer (16) on the nucleation layer (14); and growing an active layer (24), Wherein, in the total thickness of the light emitting device (10), less than 20% As is present in the device, calculated as the product of the As concentration in the layer and the layer thickness.

22. The method for manufacturing a light emitting device (10) according to claim 21, wherein: The steps include growing the layers using metal organic vapor phase epitaxy, metal organic chemical vapor deposition or molecular beam epitaxy.

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