Polycrystalline silicon carbide bearing substrate, bonded silicon carbide substrate and preparation method thereof

Abstract

The embodiment of the invention relates to the technical field of semiconductors, in particular to a polycrystalline silicon carbide bearing substrate, a bonded silicon carbide substrate and a preparation method thereof.The polycrystalline silicon carbide bearing substrate at least comprises a polycrystalline silicon carbide layer and a silicon carbide transition layer which are sequentially stacked in the vertical direction; wherein the surface, far away from the polycrystalline silicon carbide layer, of the silicon carbide transition layer is a bonding surface for bonding a single crystal silicon carbide substrate; the grain size and the roughness of the silicon carbide transition layer are smaller than those of the polycrystalline silicon carbide layer; the silicon carbide transition layer comprises a silicon carbide nanocrystalline layer and / or an amorphous silicon carbide layer. The polycrystalline silicon carbide bearing substrate can meet the requirement for bonding a single crystal silicon carbide substrate, and the performance of a silicon carbide device can be improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular, to a polycrystalline silicon carbide carrier substrate, a bonded silicon carbide substrate and a preparation method thereof. Background Art

[0002] When preparing silicon carbide devices, a homogeneous silicon carbide epitaxial layer can be grown from a silicon carbide single crystal substrate, and then a silicon carbide device can be prepared on the silicon carbide epitaxial layer. Providing polycrystalline silicon carbide under a silicon carbide single crystal substrate can reduce the resistivity of the substrate, thereby helping to improve the performance of silicon carbide devices. Depositing silicon carbide on a statically pressed graphite substrate is a mainstream process for preparing silicon carbide coatings. However, the polycrystalline silicon carbide layer prepared by this process has a high roughness and cannot meet the requirements for bonding with a single crystal silicon carbide substrate. This limits the application of polycrystalline silicon carbide in the preparation of silicon carbide devices. Summary of the invention

[0003] In order to solve the above technical problems, the embodiments of the present application provide a polycrystalline silicon carbide carrier substrate, a bonded silicon carbide substrate and a preparation method thereof to improve the performance of silicon carbide devices.

[0004] A first aspect of an embodiment of the present application provides a polycrystalline silicon carbide carrier substrate, comprising at least:

[0005] A polycrystalline silicon carbide layer and a silicon carbide transition layer are stacked in sequence in a vertical direction; wherein the surface of the silicon carbide transition layer away from the polycrystalline silicon carbide layer is a bonding surface for bonding to a single-crystalline silicon carbide substrate; the grain size and roughness of the silicon carbide transition layer are both smaller than those of the polycrystalline silicon carbide layer; the silicon carbide transition layer comprises: a silicon carbide nanocrystalline layer and / or an amorphous silicon carbide layer.

[0006] In an optional embodiment of the present application, the roughness of the surface of the polycrystalline silicon carbide layer close to the bonding surface is no more than 10 nanometers.

[0007] In an optional embodiment of the present application, the roughness of the bonding surface of the silicon carbide transition layer is no greater than 0.5 nanometers.

[0008] In an optional embodiment of the present application, the thickness of the silicon carbide transition layer is no more than 50 nanometers.

[0009] In an optional embodiment of the present application, the silicon carbide transition layer includes at least: a third silicon carbide sublayer and a fourth silicon carbide sublayer which are stacked, the fourth silicon carbide sublayer being located on a side of the third silicon carbide sublayer away from the polycrystalline silicon carbide layer; and the material of the fourth silicon carbide sublayer is silicon carbide nanocrystals.

[0010] A second aspect of an embodiment of the present application provides a bonded silicon carbide substrate, comprising at least a polycrystalline silicon carbide carrier substrate as described above, and a single crystal silicon carbide substrate bonded to a bonding surface of the polycrystalline silicon carbide carrier substrate.

[0011] A third aspect of the embodiments of the present application provides a method for preparing a polycrystalline silicon carbide carrier substrate, comprising at least:

[0012] forming a polycrystalline silicon carbide material layer on the surface of the substrate;

[0013] removing the substrate, and lightly polishing and thinning the polycrystalline silicon carbide material layer to form a polycrystalline silicon carbide layer;

[0014] A silicon carbide transition material layer is formed on the surface of the polycrystalline silicon carbide layer to form a silicon carbide transition layer; wherein the surface of the silicon carbide transition layer away from the polycrystalline silicon carbide layer is a bonding surface for bonding to a single-crystalline silicon carbide substrate; the grain size and roughness of the silicon carbide transition layer are both smaller than those of the polycrystalline silicon carbide layer; the silicon carbide transition layer includes: a silicon carbide nanocrystalline layer and / or an amorphous silicon carbide layer, and correspondingly, the silicon carbide transition material layer includes: a silicon carbide nanocrystalline material layer and / or an amorphous silicon carbide material layer.

[0015] In an optional embodiment of the present application, the forming of a polycrystalline silicon carbide material layer on the surface of the substrate includes:

[0016] forming the polycrystalline silicon carbide material layer on multiple surfaces of the substrate;

[0017] Correspondingly, the substrate is removed, and the silicon carbide material layer is lightly polished and thinned to form a polycrystalline silicon carbide layer, including:

[0018] Removing the substrate to obtain at least two layers of the silicon carbide material;

[0019] The at least two silicon carbide material layers are lightly polished and thinned to form at least two polycrystalline silicon carbide layers.

[0020] In an optional embodiment of the present application, after forming the polycrystalline silicon carbide material layer on multiple surfaces of the substrate, the method further includes:

[0021] A portion of the polycrystalline silicon carbide material layer deposited on the edge of the substrate is removed.

[0022] In an optional embodiment of the present application, the substrate is a graphite substrate, and correspondingly, a low-temperature muffle furnace process is used to remove the graphite substrate.

[0023] In an optional embodiment of the present application, the roughness of the surface of the polycrystalline silicon carbide layer close to the bonding surface is not greater than 10 nanometers; and / or, the roughness of the bonding surface of the silicon carbide transition layer is not greater than 0.5 nanometers; and / or, the thickness of the silicon carbide transition layer is not greater than 50 nanometers.

[0024] The polycrystalline silicon carbide carrier substrate provided in the embodiment of the present application has a bonding surface, and the bonding surface can be bonded with a single-crystal silicon carbide substrate to form a bonding substrate. Among them, the polycrystalline silicon carbide carrier substrate has a polycrystalline silicon carbide layer and a silicon carbide transition layer. The polycrystalline silicon carbide layer can make the bonding substrate have a lower resistivity, thereby reducing the on-resistance of the silicon carbide device and reducing the power consumption of the silicon carbide device; the silicon carbide transition layer can cover the surface of the polycrystalline silicon carbide layer, and there is no need to provide a high-flatness bonding surface through the polycrystalline silicon carbide layer or even the substrate, which overcomes the problem that it is difficult to provide a high-flatness surface when the growth quality of the polycrystalline silicon carbide layer is insufficient. In this way, it is possible to improve the performance of silicon carbide devices and reduce preparation costs.

[0025] In the embodiment of the present application, a polycrystalline silicon carbide layer is first formed on the surface of the substrate, which isolates the substrate from the silicon carbide transition layer, thereby avoiding the problem of the surface characteristics of the substrate such as isostatic graphite causing the crystal orientation disorder of the silicon carbide transition layer, and thus facilitating the silicon carbide transition layer to have better flatness. Alternatively, when the surface of the polycrystalline silicon carbide layer close to the bonding surface does not have the flatness that meets the bonding requirements, forming a silicon carbide transition layer on the surface of the polycrystalline silicon carbide layer can provide a bonding surface with high flatness. The polycrystalline silicon carbide layer can isolate the influence of substrates such as graphite on the silicon carbide transition layer. For example, in the case where the surface flatness of the substrate and the polycrystalline silicon carbide layer is insufficient, any replacement of the substrate can still ensure that the polycrystalline silicon carbide carrier substrate has a bonding surface with high flatness.

[0026] The silicon carbide transition layer in the embodiment of the present application includes: a silicon carbide nanocrystalline layer and / or an amorphous silicon carbide layer, wherein the amorphous silicon carbide has no grains, and the surface roughness is not high due to the uneven size of polycrystalline grains; the surface grains of nanocrystalline silicon carbide are very small (generally a few nanometers), so the surface roughness is greatly reduced, thereby greatly improving the roughness standard of the silicon carbide transition layer surface or the bonding surface of the polycrystalline silicon carbide carrier substrate, thereby improving the bonding effect of the bonding surface with the single crystal silicon carbide substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0028] Figure 1This is a crystal morphology diagram of the growth surface of a polycrystalline silicon carbide layer grown on the surface of an isostatically pressed graphite sheet in the related art.

[0029] Figure 2 This is a crystal morphology diagram of the graphite surface of a polycrystalline silicon carbide layer grown on the surface of an isostatically pressed graphite sheet in the related art.

[0030] Figure 3 This is a crystal morphology diagram of a growth surface of a polycrystalline silicon carbide layer grown on the surface of an isostatically pressed graphite sheet after chemical mechanical polishing in the related art.

[0031] Figures 4a to 4d This is a surface roughness detection diagram of a growth surface of a polycrystalline silicon carbide layer grown on the surface of an isostatically pressed graphite sheet after chemical mechanical polishing in the related art.

[0032] Figure 5 This is a schematic structural diagram of a polycrystalline silicon carbide material layer formed on a substrate surface in one embodiment of the present application.

[0033] Figure 6 This is a schematic diagram of the structure in which the edge of the intermediate substrate is machined to expose the graphite substrate in one embodiment of the present application.

[0034] Figure 7 This is a schematic diagram of the structure in which the graphite substrate is removed in one embodiment of the present application.

[0035] Figure 8 This is a schematic structural diagram of polishing the surface of a polycrystalline silicon carbide material layer to form a second transition surface in one embodiment of the present application.

[0036] Fig. 9 This is a schematic diagram of the structure of generating a silicon carbide nanocrystalline layer on the second transition surface in one embodiment of the present application.

[0037] Fig.10 This is a roughness detection diagram of the bonding surface formed by the silicon carbide nanocrystalline layer in an embodiment of the present application.

[0038] Fig.11 This is a schematic diagram of the structure of a bonded silicon carbide substrate in one embodiment of the present application. DETAILED DESCRIPTION

[0039] In the process of realizing the present application, the applicant discovered that the crystal quality of polycrystalline silicon carbide grown using isostatically pressed graphite sheets as deposition substrates is poor and cannot meet the requirements for bonding single crystal silicon carbide even after polishing.

[0040] In response to the above problems, a polycrystalline silicon carbide carrier substrate, a bonded silicon carbide substrate and a method for preparing the same are provided in the embodiments of the present application, so that a polycrystalline silicon carbide carrier substrate that can meet the requirements of bonding single-crystalline silicon carbide can be prepared based on any substrate. In order to make the purpose, technical solution and advantages of the present application clearer, a polycrystalline silicon carbide carrier substrate, a bonded silicon carbide substrate and a method for preparing the same are further described in detail below through embodiments and in combination with the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0041] The serial numbers assigned to the components herein, such as "first", "second", etc., are only used to distinguish the objects described and do not have any order or technical meaning. The "connection" and "coupling" mentioned in this application, unless otherwise specified, include direct and indirect connections (couplings). In the description of this application, it should be understood that the orientation or position relationship indicated by the terms "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", etc. are based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to this application.

[0042] In the present application, unless otherwise clearly specified and limited, a first feature being “above” or “below” a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being “above”, “above”, and “above” a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being “below”, “below”, and “below” a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0043] In the related art, isostatically pressed graphite sheets cannot be used as the deposition substrate for polycrystalline silicon carbide layers, mainly because the surface flatness and surface roughness of isostatically pressed graphite are relatively poor (both are at the micron level). In addition, isostatically pressed graphite has many particles, which are easily volatilized under gas extraction at high temperatures; after direct deposition of polycrystalline silicon carbide, the crystal growth will be very poor, the crystal orientation and lattice are very disordered, and the grain sizes are different, which leads to obvious grain boundaries, uneven grains, and large surface roughness after chemical mechanical polishing, which cannot meet the requirements of bonding single-crystal silicon carbide substrates.

[0044] Figure 1In the related art, when a polycrystalline silicon carbide layer is directly formed on the surface of an isostatically pressed graphite sheet, the crystal morphology of the polycrystalline silicon carbide layer away from the surface (growth surface) of the isostatically pressed graphite sheet. As can be seen from Figures a, b, and c, the grains on the growth surface grow into a block structure, a large number of small grains are attached to the large grains, and there is cluster growth between the grains.

[0045] Figure 2 In the related art, when a polycrystalline silicon carbide layer is directly formed on the surface of an isostatically pressed graphite sheet, the crystal morphology of the polycrystalline silicon carbide layer close to the surface (graphite surface) of the isostatically pressed graphite sheet. As can be seen from Figures d, e, and f, there are holes on the graphite surface and the grains around the holes are accumulated and grown.

[0046] Figure 3 In the related art, after a polycrystalline silicon carbide layer is directly formed on the surface of an isostatically pressed graphite sheet, the polycrystalline silicon carbide layer is subjected to chemical mechanical polishing and the crystal morphology after polishing. Figure 3 It can be seen that the overall grain boundary effect of polycrystalline silicon carbide is obvious; the grain size is uneven, with individual sizes of 100um and conventional large-size grains of 30 to 50um. This is because the surface roughness of the polycrystalline silicon carbide layer directly generated from the isostatically pressed graphite sheet is very poor, and the chemical polishing rates of grains in different crystal directions are different during chemical mechanical polishing, resulting in a relatively poor surface roughness after final processing, and generally the roughness within the range of 10*10um is greater than 10 nanometers.

[0047] Figures 4a to 4d In the related art, after a polycrystalline silicon carbide layer is directly formed on the surface of an isostatically pressed graphite sheet, the polycrystalline silicon carbide layer is subjected to chemical mechanical polishing and the roughness detection diagram after polishing. Figures 4a to 4d The roughness of the center point 5*5um test is smaller because the whole grain is measured. The average value of the overall roughness in the range of 100*100um is about 10 nanometers, which does not meet the bonding requirements (<0.5 nanometers).

[0048] The following is an exemplary description of the polycrystalline silicon carbide carrier substrate, the bonded silicon carbide substrate, the preparation method thereof and the effects thereof according to the embodiments of the present application in conjunction with the accompanying drawings.

[0049] The present application provides a polycrystalline silicon carbide carrier substrate, a bonded silicon carbide substrate and a preparation method thereof, wherein the polycrystalline silicon carbide carrier substrate at least comprises: a polycrystalline silicon carbide layer 300 and a silicon carbide transition layer stacked in sequence in a vertical direction, wherein the surface of the silicon carbide transition layer away from the polycrystalline silicon carbide layer 300 is a bonding surface B for bonding to a single-crystalline silicon carbide substrate 400; and the grain size and roughness of the silicon carbide transition layer are both smaller than those of the polycrystalline silicon carbide layer 300. The silicon carbide transition layer comprises: a silicon carbide nanocrystalline layer 220 and / or an amorphous silicon carbide layer, that is, the silicon carbide transition layer in the embodiment of the present application may be a silicon carbide nanocrystalline layer 220, or an amorphous silicon carbide layer, or may be a composite structure consisting of a silicon carbide nanocrystalline layer 220 and an amorphous silicon carbide layer.

[0050] The polycrystalline silicon carbide carrier substrate provided in the embodiment of the present application is applied to power devices of the silicon carbide system. In order to ensure the performance of the polycrystalline silicon carbide carrier substrate and the power device, the polycrystalline silicon carbide layer and the silicon carbide transition layer in the present application are made of the same material to avoid the occurrence of lattice mismatch due to different expansion coefficients caused by the polycrystalline silicon carbide layer and the silicon carbide transition layer using different materials, which has a great impact on the performance of the substrate and the device. In addition, the polycrystalline silicon carbide layer and the silicon carbide transition layer in the embodiment of the present application are both made of silicon carbide materials. Compared with traditional silicon materials, silicon carbide has the following advantages:

[0051] In terms of atomic structure, silicon is a typical semiconductor material with a diamond lattice crystal structure, an atomic spacing of 0.235 nanometers, and a bond strength of 1.04 eV. Silicon carbide is composed of silicon and carbon atoms, and its crystal structure is similar to graphite, with an atomic spacing of 0.307 nanometers and a bond strength of 3.2 eV. This means that silicon carbide has a larger atomic spacing and a higher bond strength.

[0052] In terms of physical properties, the density of silicon is 2.33 g / cm 3 , the melting point is 1414℃; and the density of silicon carbide is 3.21g / cm 3 , with a melting point as high as 2700°C. These data show that silicon carbide is more stable than silicon at high temperatures.

[0053] In terms of chemical properties, both silicon and silicon carbide have high chemical stability. However, silicon is susceptible to oxidation and corrosion at high temperatures, while silicon carbide exhibits better high temperature resistance. This is mainly because silicon carbide has a large atomic spacing, high bond strength, a small thermal expansion coefficient, and high thermal conductivity.

[0054] That is, silicon carbide is a further technological innovation based on traditional silicon materials. It is more suitable for power devices and provides overall performance for power devices.

[0055] In addition, the polycrystalline silicon carbide carrier substrate provided in the embodiment of the present application can be used in the preparation of power devices. Therefore, the polycrystalline silicon carbide layer and the silicon carbide transition layer stacked in sequence along the vertical direction are directly adhered to each other to achieve conduction or conductivity, and there cannot be any insulating layer or layers that affect its conductive properties, thereby ensuring the stable working performance of the power device.

[0056] For the convenience of description, the following embodiment is described in detail by taking the silicon carbide transition layer including a single silicon carbide nanocrystal layer 220 as an example:

[0057] The polycrystalline silicon carbide carrier substrate has a bonding surface B, which can be bonded to a single-crystal silicon carbide substrate 400 to form a bonding substrate. The polycrystalline silicon carbide carrier substrate has a polycrystalline silicon carbide layer 300 and a silicon carbide transition layer. The polycrystalline silicon carbide layer 300 can make the bonding substrate have a lower resistivity, thereby reducing the on-resistance of the silicon carbide device and reducing the power consumption of the silicon carbide device; the silicon carbide transition layer can cover the surface of the polycrystalline silicon carbide layer 300, and there is no need to provide a high-flatness bonding surface B through the polycrystalline silicon carbide layer 300 or even the substrate 100, which overcomes the problem that it is difficult to provide a high-flatness surface when the growth quality of the polycrystalline silicon carbide layer 300 is insufficient. In this way, the performance of the silicon carbide device can be improved and the preparation cost can be reduced.

[0058] In the embodiment of the present application, a polycrystalline silicon carbide layer 300 is first formed on the surface of the substrate 100, so that the substrate 100 and the silicon carbide transition layer are isolated, thereby avoiding the problem of the crystal orientation disorder of the silicon carbide transition layer caused by the surface characteristics of the substrate such as isostatic graphite, and thus facilitating the silicon carbide transition layer to have better flatness. Alternatively, when the surface of the polycrystalline silicon carbide layer 300 close to the bonding surface B does not have the flatness that meets the bonding requirements, the silicon carbide transition layer is formed on the surface of the polycrystalline silicon carbide layer 300 to provide a bonding surface B with high flatness. The polycrystalline silicon carbide layer 300 can isolate the influence of the substrate 100 such as graphite on the silicon carbide transition layer. For example, in the case where the surface flatness of the substrate 100 and the polycrystalline silicon carbide layer 300 is insufficient, any replacement of the substrate can still ensure that the polycrystalline silicon carbide carrier substrate has a bonding surface B with high flatness.

[0059] The silicon carbide transition layer in the embodiment of the present application includes: a silicon carbide nanocrystalline layer and / or an amorphous silicon carbide layer, wherein the amorphous silicon carbide has no grains, and the surface roughness is not high due to the uneven size of polycrystalline grains; the surface grains of nanocrystalline silicon carbide are very small (generally a few nanometers), so the surface roughness is greatly reduced, thereby greatly improving the roughness standard of the silicon carbide transition layer surface or the bonding surface of the polycrystalline silicon carbide carrier substrate, thereby improving the bonding effect of the bonding surface with the single crystal silicon carbide substrate.

[0060] In an optional embodiment of the present application, when preparing a polycrystalline silicon carbide carrier substrate, the substrate 100 may be an isostatically pressed graphite substrate, for example, an isostatically pressed graphite sheet. Isostatically pressed graphite has the advantages of high temperature resistance, good thermal stability and good thermal uniformity, and the thermal expansion coefficient can be close to that of silicon carbide. It is understandable that in other embodiments of the present application, the substrate 100 does not necessarily adopt an isostatically pressed graphite substrate, and other types of substrates may also be used. In one embodiment of the present application, the roughness of the bonding surface of the silicon carbide transition layer is not greater than 0.5 nanometers, for example, the surface roughness of the bonding surface B of the silicon carbide nanocrystalline layer of the polycrystalline silicon carbide carrier substrate is not greater than 0.5 nanometers, so as to ensure the effective combination of the polycrystalline silicon carbide carrier substrate and the single crystal silicon carbide substrate 400.

[0061] In an optional embodiment of the present application, the material of the silicon carbide nanocrystal layer 220 can be silicon carbide nanocrystals with very small grain size, and the grain size of the silicon carbide nanocrystals is between 1 nanometer and 10 nanometers. Similar to the use of amorphous silicon carbide, silicon carbide nanocrystals with very small grain size can also provide a polycrystalline silicon carbide layer 300 with a relatively uniform grain size when growing on the surface of the graphite substrate 100. The polycrystalline silicon carbide layer 300 provides a first transition surface A with a higher flatness after a grinding or polishing process, thereby facilitating the improvement of the growth rate and growth quality of the silicon carbide nanocrystal layer 220. In another optional embodiment of the present application, the silicon carbide nanocrystal layer 220 can be formed by a sintering process.

[0062] In one example, the surface of the silicon carbide transition material layer 220x that is not ground or polished and is away from the polycrystalline silicon carbide layer 300 may be ground or polished so that the surface roughness of the silicon carbide nanocrystalline layer 220 away from the polycrystalline silicon carbide layer 300 is not greater than 0.5 nanometers. In this way, the surface of the silicon carbide nanocrystalline layer 220 away from the polycrystalline silicon carbide layer 300 may be directly used as a bonding surface B to bond the single crystal silicon carbide substrate 400.

[0063] In an optional embodiment of the present application, see Fig. 9 and Fig.11 The material of the silicon carbide nanocrystalline layer 220 can be amorphous silicon carbide, especially amorphous silicon carbide. In this way, even if the surface of the polycrystalline silicon carbide layer 300 close to the bonding surface B is not flat enough due to the problem of insufficient crystal quality, the silicon carbide nanocrystalline layer 220 can form a transition layer with uniform material without being affected by the flatness of the surface of the polycrystalline silicon carbide layer 300. The uniform material of the transition layer is conducive to providing a bonding surface B with higher flatness after the grinding or polishing process.

[0064] In an optional embodiment of the present application, see Figure 7 and Figure 8The surface of the polycrystalline silicon carbide layer 300 near the bonding surface B is a second transition surface C that has been pre-ground or polished, so that the second transition surface C has a high flatness, for example, a roughness of no more than 10 nanometers. When the silicon carbide nanocrystalline layer 220 is formed on the surface of the polycrystalline silicon carbide layer 300, the surface flatness of the formed silicon carbide nanocrystalline layer 220 can be very high, and even directly meet the bonding requirements without further grinding or polishing. For example, the surface roughness of the silicon carbide nanocrystalline layer 220 that has not been further ground or polished after formation can be as low as no more than 0.5 nanometers. Optionally, a chemical vapor deposition process, a plasma-enhanced chemical vapor deposition process, or a sputtering process can be used to form an amorphous silicon carbide layer as the silicon carbide nanocrystalline layer 220.

[0065] In an optional embodiment of the present application, the material of the silicon carbide nanocrystalline layer 220 can also be polycrystalline silicon carbide with very small grain size, for example, silicon carbide nanocrystals. In an optional embodiment of the present application, the above-mentioned polycrystalline silicon carbide layer 300 can also be replaced by an amorphous silicon carbide layer or an amorphous silicon carbide layer is formed on the surface of the polycrystalline silicon carbide layer 300, and then a silicon carbide transition layer is formed on the surface of the amorphous silicon carbide layer, thereby forming a structure of a polycrystalline silicon carbide layer 300, an amorphous silicon carbide layer and a silicon carbide transition layer stacked in sequence in a vertical direction. Since amorphous crystals do not have crystalline properties, the crystals of the upper silicon carbide transition layer will not grow disorderly along the surface of a substrate such as a graphite sheet, resulting in poor quality of the entire crystal. The silicon carbide transition layer of the embodiment of the present application is formed on the surface of the amorphous silicon carbide layer, which can ensure that the grains of the silicon carbide transition layer have good growth quality and growth rate. Similar to the use of amorphous silicon carbide, even if the surface of the polycrystalline silicon carbide layer 300 close to the bonding surface B is not flat enough due to insufficient crystal quality, the silicon carbide nanocrystalline layer 220 can form a transition layer with uniform material without being affected by the flatness of the surface of the polycrystalline silicon carbide layer 300. Similarly, since the transition layer has strong uniformity, it can provide a low-roughness bonding surface through grinding or polishing; or the surface of the polycrystalline silicon carbide layer 300 is a second transition surface C that has been ground or polished in advance, and the formed silicon carbide nanocrystalline layer 220 can meet the bonding requirements without further grinding or polishing.

[0066] Optionally, the silicon carbide nanocrystalline layer 220 may be formed by a high temperature sintering process or an ion deposition process.

[0067] Optionally, when the polycrystalline silicon carbide layer 300 is a surface with low roughness after grinding or polishing, if the surface roughness of the silicon carbide nanocrystalline layer 220 formed directly on the surface of the polycrystalline silicon carbide layer 300 meets the bonding requirements, the silicon carbide nanocrystalline layer 220 may not need to be further polished or ground, which can reduce the preparation cost of the polycrystalline silicon carbide carrier substrate. It is understandable that if the surface roughness of the silicon carbide nanocrystalline layer 220 does not meet the bonding requirements after the silicon carbide nanocrystalline layer 220 is formed, the surface of the silicon carbide nanocrystalline layer 220 may be polished to improve the surface flatness.

[0068] Optional, see Figure 5 , a polycrystalline silicon carbide material layer 300x may be formed on the surface of the substrate 100; see Figure 8 , and then the surface of the polycrystalline silicon carbide material layer 300x is ground or polished to form a polycrystalline silicon carbide layer 300; the polycrystalline silicon carbide layer 300 has a second transition surface C. For example, through a polishing process or a grinding process, the roughness of the surface (second transition surface C) of the polycrystalline silicon carbide layer 300 close to the bonding surface is reduced to no more than 10 nanometers, for example, 1 to 10 nanometers.

[0069] Optionally, a polycrystalline silicon carbide furnace process may be used to form the polycrystalline silicon carbide material layer 300 x .

[0070] In an optional embodiment of the present application, the silicon carbide nanocrystalline layer 220 may also be a multi-layer composite transition layer, which may include multiple sub-material layers; in two adjacent sub-material layers, the material of the sub-material layer away from the polycrystalline silicon carbide layer 300 is amorphous silicon carbide, or the grains of the material of the sub-material layer away from the polycrystalline silicon carbide layer 300 are smaller. For example, the silicon carbide transition layer may include a third silicon carbide sub-layer and a fourth silicon carbide sub-layer stacked, the fourth silicon carbide sub-layer being located on the side of the third silicon carbide sub-layer away from the polycrystalline silicon carbide layer 300; the material of the fourth silicon carbide sub-layer may be silicon carbide nanocrystals.

[0071] In an optional embodiment of the present application, the thickness of the silicon carbide transition layer is not greater than 15 nanometers, for example, the thickness of the silicon carbide nanocrystalline layer 220 is not greater than 15 nanometers, for example, the thickness of the silicon carbide nanocrystalline layer 220 is between 5 and 15 nanometers. For example, the thickness of the silicon carbide nanocrystalline layer 220 is 5 nanometers, 6 nanometers, 7 nanometers, 8 nanometers, 9 nanometers, 10 nanometers, 11 nanometers, 12 nanometers, 13 nanometers, 14 nanometers or 15 nanometers. In this way, under the premise that the polycrystalline silicon carbide layer 300 has a relatively low roughness surface (second transition surface C), the silicon carbide nanocrystalline layer 220 has a relatively low thickness and can provide a low-roughness bonding surface B; the silicon carbide nanocrystalline layer 220 has a relatively small thickness, which can reduce the contact resistance between the single-crystalline silicon carbide substrate 400 and the polycrystalline silicon carbide layer 300, and avoid the silicon carbide nanocrystalline layer 220 being too thick to weaken the impedance reduction effect of the polycrystalline silicon carbide layer 300 on the single-crystalline silicon carbide.

[0072] In an optional embodiment of the present application, the silicon carbide in the polycrystalline silicon carbide layer 300 may be doped silicon carbide, especially highly doped silicon carbide, which can reduce the resistance of the polycrystalline silicon carbide layer 300 and further enhance the impedance reduction effect of the polycrystalline silicon carbide layer 300 on the single crystal silicon carbide substrate 400.

[0073] In one example, the doping ions in the polycrystalline silicon carbide layer 300 are the same as the doping ions in the bonded single crystal silicon carbide substrate 400 , and the doping concentration in the polycrystalline silicon carbide layer 300 is greater than the doping concentration in the single crystal silicon carbide substrate 400 .

[0074] In one example, the resistivity of the polycrystalline silicon carbide layer 300 is <5 mohm.

[0075] An embodiment of the present application provides a bonded silicon carbide substrate, comprising at least the polycrystalline silicon carbide carrier substrate as described above, and a single crystal silicon carbide substrate bonded to a bonding surface of the polycrystalline silicon carbide carrier substrate.

[0076] See also Fig.11 After obtaining the polycrystalline silicon carbide carrier substrate, the single crystal silicon carbide substrate 400 may be bonded to the bonding surface B of the polycrystalline silicon carbide carrier substrate to form a bonded silicon carbide substrate. For example, a standard smart cut process may be used to prepare the bonded substrate.

[0077] The beneficial effects of the polycrystalline silicon carbide carrier substrate have been described in detail in the above embodiments and will not be repeated here. In summary, the embodiments of the present application provide a bonded silicon carbide substrate with better bonding effect, stronger stability, higher efficiency, and lower cost or substrate material requirements.

[0078] In an optional embodiment of the present application, see Figures 5 to 9, a method for preparing a polycrystalline silicon carbide carrier substrate is provided, and the method for preparing a polycrystalline silicon carbide carrier substrate comprises the following steps S201 to S204:

[0079] Step S201, providing a substrate 100;

[0080] The substrate 100 may be, for example, an isostatically pressed graphite sheet.

[0081] Step S202, see Figure 5 , a polycrystalline silicon carbide material layer 300 x is formed on the surface of the substrate 100 .

[0082] Optionally, the material of the polycrystalline silicon carbide material layer 300x is polycrystalline silicon carbide, and the thickness of the polycrystalline silicon carbide material layer 300x is about 1 mm, for example, between 900 microns and 1100 microns.

[0083] Optionally, a polycrystalline silicon carbide furnace process may be used to grow polycrystalline silicon carbide. Of course, in other embodiments, other processes may also be used to form polycrystalline silicon carbide, such as a deposition process (eg, vapor chemical deposition, plasma enhanced vapor chemical deposition, or sputtering).

[0084] Step S203, removing the substrate 100, and performing a light polishing and thinning process on the polycrystalline silicon carbide material layer 300x to form a polycrystalline silicon carbide layer 300;

[0085] In an optional embodiment of the present application, the roughness of the surface of the polycrystalline silicon carbide layer 300 close to the bonding surface B is no greater than 10 nanometers.

[0086] Step S204, forming a silicon carbide transition material layer on the surface of the polycrystalline silicon carbide layer 300 to form a silicon carbide transition layer;

[0087] Among them, the surface of the silicon carbide transition layer away from the polycrystalline silicon carbide layer 300 is a bonding surface B for bonding to a single-crystal silicon carbide substrate; the grain size and roughness of the silicon carbide transition layer are both smaller than those of the polycrystalline silicon carbide layer 300; the silicon carbide transition layer includes: a silicon carbide nanocrystalline layer 220 and / or an amorphous silicon carbide layer, and correspondingly, the silicon carbide transition material layer includes: a silicon carbide nanocrystalline material layer 220x and / or an amorphous silicon carbide material layer. For the convenience of description, the following embodiments are described in detail by taking the silicon carbide transition layer including a single silicon carbide nanocrystalline layer 220 as an example:

[0088] Among them, the surface of the silicon carbide nanocrystal layer 220 away from the polycrystalline silicon carbide layer 300 is a bonding surface B for bonding to a single-crystal silicon carbide substrate; the grain size and roughness of the silicon carbide nanocrystal layer 220 are both smaller than those of the polycrystalline silicon carbide layer 300. Optionally, a high-temperature and high-pressure sintering method or an ion deposition process can be used to form nanocrystals with a thickness of about 10 nanometers on the surface. In an optional embodiment of the present application, the thickness of the silicon carbide nanocrystal layer is not greater than 50 nanometers. In an optional embodiment of the present application, the thickness of the silicon carbide nanocrystal layer is not greater than 15 nanometers, which can ensure that the bonding surface B has a better bonding effect with the single-crystal silicon carbide substrate; the roughness of the bonding surface of the silicon carbide nanocrystal layer is not greater than 0.5 nanometers. On the one hand, the method for preparing a polycrystalline silicon carbide carrier substrate provided in an embodiment of the present application first forms a polycrystalline silicon carbide layer 300 on the surface of a substrate 100 before forming a silicon carbide nanocrystal layer 200. The polycrystalline silicon carbide layer 300 can cover the surface of a graphite substrate or any substrate, so that the uneven surface of the substrate 100 will not affect the crystal orientation and grain size of the silicon carbide nanocrystal layer 200, thereby ensuring that the silicon carbide nanocrystal layer 200 has good growth quality and is not easily affected by the substrate material, and the cost of the substrate material is lower; on the other hand, the polycrystalline silicon carbide layer 300 has a flat surface, and further forming a silicon carbide nanocrystal layer 200 on its surface is more efficient and the generated film layer has a higher quality.

[0089] In an optional embodiment of the present application, the step S202, forming a polycrystalline silicon carbide material layer 300x on the surface of the substrate 100, includes:

[0090] forming the polycrystalline silicon carbide material layer 300x on multiple surfaces of the substrate 100;

[0091] Correspondingly, the above step S203, wherein the substrate 100 is removed and the polycrystalline silicon carbide material layer 300x is lightly polished and thinned to form the polycrystalline silicon carbide layer 300, comprises:

[0092] The substrate 100 is removed to obtain at least two silicon carbide material layers 300x;

[0093] The at least two silicon carbide material layers 300 x are lightly polished and thinned to form at least two polycrystalline silicon carbide layers 300 .

[0094] See also Figure 8 , surface thinning and mechanical grinding processes can be used to make the thickness of each polycrystalline substrate reach a standard thickness and the roughness is at a level of several nanometers. When the surface of the polycrystalline silicon carbide material layer 300x is ground, a second transition surface C with low roughness can be formed; the remaining part of the polycrystalline silicon carbide material layer 300x is a polycrystalline silicon carbide layer 300 with the second transition surface C.

[0095] See also Fig. 9 A thin silicon carbide nanocrystal layer is formed on the surface of the polycrystalline silicon carbide layer 300 (second transition surface C) as the silicon carbide nanocrystal layer 220, the thickness of the silicon carbide nanocrystal layer is about 10 nanometers, and the surface roughness is less than 0.5 nanometers. In this way, the surface of the silicon carbide nanocrystal layer serves as the bonding surface B.

[0096] Fig.10 is a schematic diagram of the surface of the silicon carbide nanocrystalline layer 220, and the Ra result is 0.38 nanometers. Fig.10 It can be seen that after experimental and simulation verification, the results are feasible, the roughness is better after the nanocrystals are grown, and the surface roughness of the silicon carbide nanocrystal layer 220 is very small, which meets the bonding requirements.

[0097] In an optional embodiment of the present application, after forming the polycrystalline silicon carbide material layer 300x on the surface of the substrate 100 in the above step S202, the method further includes:

[0098] A portion of the polycrystalline silicon carbide material layer deposited on the edge of the substrate is removed.

[0099] Removing the graphite substrate 100. For example, the graphite substrate 100 may be removed by a thinning process, or the graphite substrate 100 may be removed by a calcining process.

[0100] As an example, see Figure 6 and Figure 7 After forming the polycrystalline silicon carbide material layer 300x, taking the substrate 100 as a graphite substrate as an example, the edge of the intermediate substrate can be cut by grinding or cutting process to expose the graphite substrate; then the intermediate substrate with the exposed graphite substrate is calcined in a muffle furnace to remove the graphite substrate. In the embodiment of the present application, each intermediate state in the preparation process of the polycrystalline silicon carbide carrier substrate is referred to as an intermediate substrate. It can be understood that the structure of the intermediate substrate corresponding to the preparation process is different for different preparation processes.

[0101] As an example, after removing the graphite substrate, the intermediate substrate having polycrystalline silicon carbide may be thinned, for example, the side of the intermediate substrate away from the bonding surface B may be thinned.

[0102] See also Figure 6 , the intermediate substrate is edge machined to remove silicon carbide at the edge of the intermediate substrate and expose the isostatically pressed graphite sheet.

[0103] In an optional embodiment of the present application, the substrate 100 is a graphite substrate, and correspondingly, a low-temperature muffle furnace process is used to remove the graphite substrate.

[0104] See also Figure 7, using a low-temperature muffle furnace process, the middle isostatically pressed graphite sheet is burned out to form two polycrystalline silicon carbide substrates (i.e., 300x polycrystalline silicon carbide material layers on both sides are retained), thereby eliminating the graphite matrix and reducing the substrate structure. The method is simple, safe and fast, and greatly improves process efficiency.

[0105] In an optional embodiment of the present application, the roughness of the surface of the polycrystalline silicon carbide layer close to the bonding surface is no more than 10 nanometers.

[0106] In an optional embodiment of the present application, the roughness of the bonding surface of the silicon carbide transition layer is no greater than 0.5 nanometers.

[0107] In an optional embodiment of the present application, the thickness of the silicon carbide transition layer is no more than 50 nanometers.

[0108] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0109] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A polycrystalline silicon carbide carrier substrate, characterized in that: At least: A polycrystalline silicon carbide layer and a silicon carbide transition layer are stacked in sequence in a vertical direction; wherein the surface of the silicon carbide transition layer away from the polycrystalline silicon carbide layer is a bonding surface for bonding to a single-crystalline silicon carbide substrate; the grain size and roughness of the silicon carbide transition layer are both smaller than those of the polycrystalline silicon carbide layer; the silicon carbide transition layer comprises: a silicon carbide nanocrystalline layer and / or an amorphous silicon carbide layer.

2. The polycrystalline silicon carbide carrier substrate according to claim 1, characterized in that: The roughness of the surface of the polycrystalline silicon carbide layer close to the bonding surface is no greater than 10 nanometers.

3. The polycrystalline silicon carbide carrier substrate according to claim 1, characterized in that: The roughness of the bonding surface of the silicon carbide transition layer is not greater than 0.5 nanometers; and / or the thickness of the silicon carbide transition layer is not greater than 50 nanometers.

4. The polycrystalline silicon carbide carrier substrate according to claim 1, characterized in that: The silicon carbide transition layer comprises at least: a third silicon carbide sublayer and a fourth silicon carbide sublayer which are stacked, wherein the fourth silicon carbide sublayer is located on a side of the third silicon carbide sublayer away from the polycrystalline silicon carbide layer; and the material of the fourth silicon carbide sublayer is silicon carbide nanocrystals.

5. A bonded silicon carbide substrate, characterized in that: At least comprises the polycrystalline silicon carbide carrier substrate according to any one of claims 1 to 4, and a single crystal silicon carbide substrate bonded to the bonding surface of the polycrystalline silicon carbide carrier substrate.

6. A method for preparing a polycrystalline silicon carbide carrier substrate, characterized in that: At least: forming a polycrystalline silicon carbide material layer on the surface of the substrate; removing the substrate, and lightly polishing and thinning the polycrystalline silicon carbide material layer to form a polycrystalline silicon carbide layer; A silicon carbide transition material layer is formed on the surface of the polycrystalline silicon carbide layer to form a silicon carbide transition layer; wherein the surface of the silicon carbide transition layer away from the polycrystalline silicon carbide layer is a bonding surface for bonding to a single-crystalline silicon carbide substrate; the grain size and roughness of the silicon carbide transition layer are both smaller than those of the polycrystalline silicon carbide layer; the silicon carbide transition layer includes: a silicon carbide nanocrystalline layer and / or an amorphous silicon carbide layer, and correspondingly, the silicon carbide transition material layer includes: a silicon carbide nanocrystalline material layer and / or an amorphous silicon carbide material layer.

7. The method for preparing a polycrystalline silicon carbide carrier substrate according to claim 6, characterized in that: The forming of a polycrystalline silicon carbide material layer on the surface of the substrate comprises: forming the polycrystalline silicon carbide material layer on multiple surfaces of the substrate; Correspondingly, the substrate is removed, and the silicon carbide material layer is lightly polished and thinned to form a polycrystalline silicon carbide layer, including: Removing the substrate to obtain at least two layers of the silicon carbide material; The at least two silicon carbide material layers are lightly polished and thinned to form at least two polycrystalline silicon carbide layers.

8. The method for preparing a polycrystalline silicon carbide carrier substrate according to claim 7, characterized in that: After forming the polycrystalline silicon carbide material layer on multiple surfaces of the substrate, the method further comprises: A portion of the polycrystalline silicon carbide material layer deposited on the edge of the substrate is removed.

9. The method for preparing a polycrystalline silicon carbide carrier substrate according to claim 7, characterized in that: The substrate is a graphite substrate, and correspondingly, a low-temperature muffle furnace process is adopted to remove the graphite substrate.

10. The method for preparing a polycrystalline silicon carbide carrier substrate according to claim 6, characterized in that: The roughness of the surface of the polycrystalline silicon carbide layer close to the bonding surface is not greater than 10 nanometers; and / or, the roughness of the bonding surface of the silicon carbide transition layer is not greater than 0.5 nanometers; and / or, the thickness of the silicon carbide transition layer is not greater than 50 nanometers.

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