Electrochemical detection system and method for early gastric cancer marker in human urine

Abstract

This invention provides an electrochemical detection system and method for early gastric cancer markers in human urine. The system includes: a three-electrode system inserted into the urine sample to be tested, comprising a reference electrode, an auxiliary electrode, and a working electrode; an SWV waveform generation module, including a square wave generation circuit, a stepped wave generation circuit, a voltage divider, a voltage bias circuit, a bus switch, and a constant potential circuit; a current detection circuit, outputting a voltage signal after current-to-voltage conversion; a low-pass filter circuit; an ADC; an FPGA, controlling the selective conduction of the stepped wave generation circuit and the bus switch to generate the current-to-voltage conversion amplification signal of the current detection circuit; and a display. This invention achieves automatic detection of early gastric cancer markers in human urine by controlling the selective conduction of the reset switch and the bus switch in the stepped wave generation circuit through FPGA programming, and controlling the current-to-voltage conversion amplification factor of the current detection circuit. It features low power consumption, high speed, high precision, and high integration.

Description

Technical Field

[0001] This invention relates to the field of medical device technology, specifically to an electrochemical detection system and method for early gastric cancer markers in human urine. Background Technology

[0002] Gastric cancer is an adenocarcinoma-like malignant tumor originating from the gastric mucosal epithelium. According to the latest report from the National Cancer Center and the Cancer Hospital of the Chinese Academy of Medical Sciences, gastric cancer is the second most common type of malignant tumor in my country, after lung cancer. With the increasingly fast pace of modern life, changes in the dietary structure of Chinese residents have led to a trend of gastric cancer occurring at younger ages. However, early-stage gastric cancer often presents with no obvious symptoms, causing patients to frequently confuse it with chronic diseases such as gastritis and gastric ulcers, thus missing the optimal treatment window. Furthermore, the incidence of gastric cancer is mainly concentrated in East and Southeast Asia, and this significant geographical characteristic has resulted in a lack of international attention to its screening and research. This field has long been largely unexplored.

[0003] Urine testing is a routine clinical diagnostic method. Compared to blood tests, urine testing has advantages such as simplicity, non-invasiveness, and patient-friendliness, and has been widely used for early screening of various diseases. Researchers have also discovered tumor markers in human urine that are highly correlated with the incidence of gastric cancer. Therefore, using urine testing for early gastric cancer screening holds promise as an efficient and low-cost clinical technique, which is of great significance for the diagnosis and treatment of gastric cancer in my country.

[0004] Electrochemical detection is an emerging rapid testing method. Traditional urine sample collection requires centralized facilities and HPLC analysis, all of which increase costs. Furthermore, backlogs in centralized clinical laboratories can lead to time differences between sampling and concentration measurements of different biological fluids, introducing more variables that can negatively impact clinical outcomes. Electrochemical detection, on the other hand, offers rapid, accurate, and cost-effective results, making it suitable for early screening of gastric cancer.

[0005] The Swing Swing (SWV) method is one of the important methods in electrochemical analysis. When selecting electrochemical detection methods, considering the complexity and uncertainty of solutes in the urine environment, the SWV method offers significant improvements over other detection methods in terms of specificity for the marker and operability for different samples. Its specificity is specifically reflected in the fact that, thanks to the square SWV waveform, the differential current plotted against the basic step potential after secondary measurements has a larger numerical value than any single measurement. Simultaneously, it yields a differential current of 0 at a voltage consistent with the limiting current of the electroactivated component and the mass transfer region on the electrode surface. These characteristics indicate that the noise from non-target substances is lower than other electrochemical methods. Regarding the differences in different human urine samples, the SWV method offers extremely fast scanning speed. For solution systems with capacitive properties, the extremely short scanning time does not cause side reactions or noise currents. Furthermore, for scanning ranges of different potentials, due to the impact of each positive and negative pulse, potentials without reaction remain at the limiting current, preventing the induction of double-layer capacitance characteristics. This is also an advantage for complex urine environments.

[0006] Miniaturized instruments are an extremely effective means of improving the efficiency of early disease screening. Traditional urine testing instruments cannot achieve rapid home testing, while small blood testing instruments have long been widely used, as well as purely physical blood pressure and heart rate monitoring instruments. These have all contributed to the early screening rate and prevention of various related diseases. Urine, as a relatively easy-to-obtain human biochemical sample, is extremely suitable for small, home-use testing instruments. Therefore, designing a simple-to-programmable, miniaturized, automated electrochemical detection system and method plays a crucial role in the early screening of gastric cancer.

[0007] Therefore, there is a need for a miniaturized early screening device that can automatically detect gastric cancer markers in human urine by utilizing the advantages of the SWV method. This would provide important scientific evidence for home self-testing of people at potential risk of developing the disease and for clinical medical diagnosis, and ultimately lay the technical foundation for the development of handheld patient self-testing devices (similar to blood glucose meters) and clinical high-throughput monitoring devices. Summary of the Invention

[0008] To address the shortcomings of existing technologies, the purpose of this invention is to provide an electrochemical detection system and method for early gastric cancer markers in human urine.

[0009] According to one aspect of the present invention, an electrochemical detection system for early gastric cancer markers in human urine is provided, comprising:

[0010] A three-electrode system, comprising a reference electrode, an auxiliary electrode, and a working electrode, is inserted into the urine sample to be tested.

[0011] The SWV waveform generation module includes a square wave generation circuit, a stepped wave generation circuit, a voltage divider, a voltage bias circuit, a bus switch, and a constant potential circuit. The square wave generation circuit generates square wave waveforms Vy and Vx, with Vx input to the input terminal of the stepped wave generation circuit and Vy input to the input terminal of the voltage divider. The stepped wave generation circuit provides feedback signal Vz to the square wave generation circuit and outputs stepped wave Vin1 to the bus switch. The voltage divider outputs square wave Vin2 to the bus switch. The voltage bias circuit outputs DC voltage Vin3. The bus switch is coupled to the constant potential circuit and outputs voltage waveforms Vae and Vre. Vae is input to the auxiliary electrode, Vre is input to the reference electrode, and the working electrode outputs the detection result current Iwe.

[0012] A current detection circuit is coupled to the output terminal of the working electrode and outputs a voltage signal Vsig after current-to-voltage conversion.

[0013] A low-pass filter circuit is coupled to the output terminal of the current detection circuit to output a noise-reduced voltage signal Vout.

[0014] The ADC is coupled to the output terminal of the low-pass filter circuit and outputs a digital signal.

[0015] An FPGA is coupled to the output of the ADC. The FPGA controls the selective conduction of the stepped wave generation circuit and the bus switch, and generates the current-to-voltage conversion amplification signal of the current detection circuit.

[0016] A display, coupled to the FPGA, is used to display detection results and operating status, and serves as a control interface.

[0017] Optionally, the square wave generating circuit includes two feedback networks. At the non-inverting input terminal, resistors R1 and R2 and the output terminal of operational amplifier OP1 form positive feedback, outputting Vy; at the inverting input terminal, capacitor C1, resistor R3 and the output terminal of operational amplifier OP1 form negative feedback, outputting Vx.

[0018] Optionally, the stepped wave generating circuit includes a differentiating circuit, a limiting circuit, an integrating circuit, and a voltage comparator connected in sequence, wherein:

[0019] Vx is converted into positive and negative pulse voltages by the differentiating circuit.

[0020] After passing through the over-limiting circuit, only the positive pulse voltage remains.

[0021] The integrating circuit includes a resistor R7, an operational amplifier OP2, an integrating capacitor C3, a MOSFET M1, and a reset switch Srst. One end of the resistor R7 is connected to the limiting circuit, and the other end is connected to the inverting input terminal of the operational amplifier OP2. The non-inverting input terminal of the operational amplifier OP2 is grounded. The integrating capacitor C3, the reset switch Srst, and the MOSFET M1 are connected in parallel between the inverting input terminal and the output terminal of the operational amplifier OP2.

[0022] The voltage comparator includes operational amplifier OP3, resistors R9, R10, and R11. The output of operational amplifier OP2 is connected to the negative input of operational amplifier OP3. The non-inverting input of operational amplifier OP3 is connected to ground GND via resistor R9 and to power supply VEE via resistor R10. The output is connected to MOSFET M1. Resistor R11 is connected between the non-inverting input and output of operational amplifier OP3. The output of operational amplifier OP2 outputs a stepped waveform Vin1.

[0023] The FPGA controls the conduction of the reset switch Srst. When the reset switch Srst is closed, the integrating capacitor C3 discharges. When detection needs to be started, the FPGA controls the reset switch Srst to open, so that the integrating circuit can start integrating and accumulating.

[0024] Optionally, the output terminal of the operational amplifier OP3 is connected to the MOS transistor M1 via diode D2, and the output terminal of the operational amplifier OP3 outputs voltage Vz via diode D3.

[0025] Optionally, the voltage divider includes operational amplifier OP4, operational amplifier OP5, capacitor C4, capacitor C5, resistor R12, and resistor R13, wherein:

[0026] The operational amplifier OP4 serves as the first voltage follower, and the operational amplifier OP5 serves as the second voltage follower;

[0027] The operational amplifier OP4 has Vy input at its positive input terminal and is connected to its output terminal at its negative input terminal. The output terminal of the operational amplifier OP4 is connected to resistor R12. Resistors R12 and R13 are connected in series. Resistors R12 and R13, capacitor C4, and capacitor C5 are connected in parallel. Resistors R13 and C5 are connected to ground GND via a wire. Resistors R12 and R13 are connected to the positive input terminal of the operational amplifier OP5 via a wire. The negative input terminal of the operational amplifier OP5 is connected to its output terminal. The output terminal of the operational amplifier OP5 outputs a square wave Vin2.

[0028] Optionally, the voltage bias circuit includes resistors R14 and R15 and an operational amplifier OP6. One end of resistor R14 is connected to ground GND, and the other end is connected to resistor R15. Resistor R15 is connected to power supply VEE. A wire is led out between resistors R14 and R15 and connected to the positive input terminal of operational amplifier OP6. The negative input terminal of operational amplifier OP6 is connected to the output terminal. The output terminal of operational amplifier OP6 outputs a DC voltage Vin3.

[0029] Optionally, the stepped wave Vin1 is converted into a square wave Vin1' via a bus switch, the square wave Vin2 is converted into a stepped wave Vin2' via a bus switch, and the DC voltage Vin3 is converted into a DC bias Vin3' via a bus switch.

[0030] The constant potential circuit includes resistors R16, R17, R18, R19, and R20, operational amplifiers OP7 and OP8. The square wave Vin1' is input to one end of resistor R16, and the other end of resistor R16 is connected to resistor R19, which is grounded. A wire connects resistors R16 and R19 to the positive input terminal of operational amplifier OP7. The stepped wave Vin2' is input to one end of resistor R17, and the other end of resistor R17 is connected to the negative input terminal of operational amplifier OP7. Operational amplifier OP7 outputs Vae.

[0031] The DC bias Vin3' is input to one end of the resistor R18. The resistor R18 and the resistor R20 are connected to the resistor R17 via a wire. The resistor R20 is connected to the negative input terminal and the output terminal of the operational amplifier OP8. Vre is input to the positive input terminal of the operational amplifier OP8.

[0032] Optionally, the current detection circuit includes operational amplifier OP9, operational amplifier OP10, capacitor C6, resistors R21, R22, R23, R24, R25, R26, R27 and a 4:1 multiplexer.

[0033] The operational amplifier OP9, capacitor C6, resistors R21, R22, R23, and R24, and the 4:1 multiplexer constitute a variable gain current-to-voltage conversion circuit. The positive input terminal of the operational amplifier OP9 is grounded, and the negative input terminal is connected to the input terminal of the 4:1 multiplexer through resistors R21, R22, R23, and R24 in parallel. The detected current Iw is input to the negative input terminal of the operational amplifier OP9. The capacitor C6 is connected in parallel between the negative input terminal and the output terminal of the operational amplifier OP9, and the capacitor C6 serves as a voltage holding capacitor. The 4:1 multiplexer defaults to selecting the smallest resistor among resistors R21, R22, R23, and R24 to obtain the largest current detection range.

[0034] The output terminal of the operational amplifier OP9 is connected to the negative input terminal of the operational amplifier OP10 through the resistor R25. The positive input terminal of the operational amplifier OP10 is grounded through the resistor R26. The resistor R27 is connected in parallel between the negative input terminal and the output terminal of the operational amplifier OP10, forming a voltage amplification and inversion circuit.

[0035] Optionally, the low-pass filter circuit includes resistors R28, R29, R30, and R31, capacitors C7 and C8, and operational amplifier OP11;

[0036] The resistors R28 and R29 are connected in series and then connected to the non-inverting input terminal of the operational amplifier OP11. The resistor R29 and the non-inverting input terminal of the operational amplifier OP11 are connected to the capacitor C8 and grounded via a wire. The resistors R28 and R29 are connected to the output terminal of the operational amplifier OP11 via the capacitor C7.

[0037] One end of the resistor R30 is grounded, and the other end is connected to the negative input terminal of the operational amplifier OP11. The resistor R30 and the negative input terminal of the operational amplifier OP11 are connected to the output terminal of the operational amplifier OP11 via the resistor R31.

[0038] According to another aspect of the present invention, an electrochemical detection method for early gastric cancer markers in human urine is provided, which utilizes the aforementioned electrochemical detection system for early gastric cancer markers in human urine, the method comprising:

[0039] Place the three-electrode system into the urine sample to be tested;

[0040] The FPGA controls the selective activation of the SWV waveform generation module to generate the required SWV waveform.

[0041] The FPGA controls the selective conduction of the bus switch to apply the required SWV waveform to the three-electrode system;

[0042] The FPGA-controlled current detection circuit automatically adapts the current-to-voltage conversion amplification factor based on the current detected by the three-electrode system.

[0043] When the applied waveform reaches the preset number of times, the detection stops and the detection signal waveform is stored in the FPGA. After FPGA data processing, the detection result of the gastric cancer marker concentration test value in the urine sample is output.

[0044] Compared with the prior art, the present invention has at least one of the following beneficial effects:

[0045] This invention utilizes FPGA programming to selectively control the reset switch and bus switch in the stepped wave generation circuit, and controls the current-to-voltage conversion amplification factor of the current detection circuit, thereby achieving automatic detection of early gastric cancer markers in human urine. Compared to traditional urine detection methods, the system of this invention features miniaturization, low power consumption, high speed, high precision, and high integration, providing advantages in portability, testing efficiency, and cost for handheld patient self-testing devices. Furthermore, this system provides a highly feasible and reliable electrochemical detection circuit system for future detection of small molecule markers in various complex solution systems using other electrochemical methods. Attached Figure Description

[0046] Other features, objects, and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0047] Figure 1 This is a schematic diagram of the overall structure of the electrochemical detection system in one embodiment of the present invention;

[0048] Figure 2 This is a structural block diagram of the circuit system on a PCB board according to an embodiment of the present invention;

[0049] Figure 3 This is a schematic diagram of the circuit structure of a square wave generating circuit in one embodiment of the present invention;

[0050] Figure 4 This is a schematic diagram of the circuit structure of a stepped wave generating circuit in one embodiment of the present invention;

[0051] Figure 5 This is a schematic diagram of the circuit structure of a voltage divider in one embodiment of the present invention;

[0052] Figure 6 This is a schematic diagram of the circuit structure of the voltage bias circuit in one embodiment of the present invention;

[0053] Figure 7 This is a schematic diagram of the circuit structure of a constant potential circuit in one embodiment of the present invention;

[0054] Figure 8 This is a schematic diagram of the circuit structure of the current detection circuit in one embodiment of the present invention;

[0055] Figure 9 This is a schematic diagram of the circuit structure of a low-pass filter circuit in one embodiment of the present invention;

[0056] Figure 10 This is a potential-time diagram of the square wave voltammetry input in one embodiment of the present invention;

[0057] Figure 11 This is a schematic diagram showing the detailed waveform parameters of the square wave voltammetry method in one embodiment of the present invention;

[0058] Figure 12 This is a schematic diagram of a signal processing method for detecting signals in one embodiment of the present invention. (a) is the waveform of the detected differential current signal after applying a single-cycle SWV signal, and (b) is the waveform after data processing.

[0059] Figure 13 This is a control logic block diagram of an electrochemical detection system in one embodiment of the present invention;

[0060] Figure 14 This is a flowchart of the signal processing of an FPGA in one embodiment of the present invention. Detailed Implementation

[0061] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention. These all fall within the scope of protection of the present invention.

[0062] Reference Figure 1 An embodiment of the present invention provides an electrochemical detection system for early gastric cancer markers in human urine, comprising a three-electrode system, an SWV waveform generation module, a current detection circuit, a low-pass filter circuit, an ADC, an FPGA, and a display. The three-electrode system includes a reference electrode, an auxiliary electrode, and a working electrode. The three-electrode system is inserted into the urine sample to be tested. Exemplarily, the three-electrode system includes a gold working electrode, a platinum wire auxiliary electrode, and a silver chloride reference electrode. The SWV waveform generation module, current detection circuit, low-pass filter circuit, ADC, and FPGA can be integrated onto a PCB board. The circuit system block diagram on the PCB board is shown below. Figure 2As shown, it includes several key components and modules to realize signal input, amplification, reception, and output processing. Specifically, the SWV waveform generation module includes a square wave generation circuit, a stepped wave generation circuit, a voltage divider, a voltage bias circuit, a bus switch, and a constant potential circuit. The square wave generation circuit generates square wave waveforms (i.e., square wave signals) Vy and Vx. Square wave signals Vx and Vy have the same frequency, but the amplitude of Vx is greater than that of Vy. Vx is input to the input terminal of the stepped wave generation circuit, and Vy is input to the input terminal of the voltage divider. The stepped wave generation circuit feeds back a signal Vz to the square wave generation circuit and outputs a stepped wave Vin1 to the bus switch. The voltage divider outputs a square wave Vin2 to the bus switch. The voltage bias circuit outputs a DC voltage Vin3. Vin1 to Vin3 serve as the inputs to the constant potential circuit. The bus switch is coupled to the constant potential circuit and outputs voltage waveforms Vae and Vre. The reference electrode and auxiliary electrode of the three-electrode system are coupled to the output terminal of the constant potential circuit. The system consists of an auxiliary electrode (Vae) and a reference electrode (Vre). The SWV waveform generator module serves as the analog front-end of the three-electrode system, providing the waveform required for electrochemical testing. The working electrode outputs the detection result current Iwe. The current detection circuit is coupled to the output of the working electrode, outputting a voltage signal Vsig after current-to-voltage conversion. The low-pass filter circuit is coupled to the output of the current detection circuit, outputting a noise-reduced voltage signal Vout. The ADC is coupled to the output of the low-pass filter circuit, outputting a digital signal. The programmable FPGA is coupled to the output of the ADC, controlling the selective conduction of the stepped wave generator circuit and the bus switch to control whether the SWV waveform is applied to the three-electrode system and generating the current-to-voltage conversion amplification signal for the current detection circuit. The display is coupled to the FPGA, controlling its display. The display shows the detection results and operating status, and serves as the control interface for starting the detection.

[0063] Due to the high impurity content in urine systems, square wave voltammetry (SWV) is required. Traditional SWV methods necessitate the use of an electrochemical workstation. The system in this embodiment is a miniaturized improvement of an electrochemical workstation for a specific scenario. In this embodiment, the signal path in the circuit system on the PCB board is as follows: The SWV waveform generation module generates the voltage waveforms Vre and Vae required for square wave voltammetry (SWV), which are applied to the reference electrode RE and auxiliary electrode AE ​​of the three-electrode system, respectively. The three-electrode system is used to perform electrochemical detection of early gastric cancer markers in human urine. The potential of its working electrode WE is fixed to 0V by the current detection circuit, which outputs a current Iwe. The current detection circuit is connected to the working electrode WE, detects Iwe, and outputs a voltage signal Vsig. The voltage signal Vsig is filtered by a low-pass filter circuit to remove high-frequency noise. The noise-reduced signal Vout is converted into a digital signal by an ADC, and the digital signal is input to the FPGA for data processing. The FPGA then controls the display for display. As a programmable controller, the FPGA sends high-level signals to different modules or circuits to control the conduction of switches or multiplexers such as the reset switch control signal Srst, the bus switch control signal Sin, and the 4:1 multiplexer control signals Sa and Sb in the current detection circuit. This enables selective conduction of the stepped wave generation circuit and the bus switch, and generates the current-to-voltage conversion amplification signal of the current detection circuit. Through the combination and coordinated operation of various circuits or modules, the electrochemical detection of early gastric cancer markers in human urine can be performed in a programmable and automated manner.

[0064] Reference Figure 3 In some implementations, the square wave generating circuit includes an operational amplifier OP1, resistors R1-R4, and capacitor C1, with an input voltage Vz and output voltages Vx and Vy. The circuit includes two feedback networks: at the non-inverting input, resistors R1 and R2, along with the output of operational amplifier OP1, form positive feedback, outputting Vy; at the inverting input, capacitor C1, resistor R3, and the output of operational amplifier OP1 form negative feedback, outputting Vx via resistor R4. Before detection begins, the potential at the non-inverting input of operational amplifier OP1 is 0, and the potential at its inverting input is Vz (Vz ≠ 0), creating a voltage difference at the input of operational amplifier OP1. This accelerates the setup time from the start of detection to a stable square wave output. Because the amplification factor of an ideal operational amplifier is infinite, the output voltage saturates; therefore, the high and low levels of the square wave Vx are the positive and negative saturation voltages, respectively. Vy is the square wave signal obtained by dividing Vx through resistors R1 and R2, and its high and low levels are less than Vx.

[0065] Reference Figure 4In some implementations, the stepped wave generating circuit includes a differentiating circuit, a limiting circuit, an integrating circuit, and a voltage comparator connected in sequence. Specifically: Zener diodes ZD1 and ZD2 are connected in series; the absolute values ​​of the positive and negative voltages of the square wave generator output Vx are greater than the regulated voltage (typically equal to the forward supply voltage of 5V); the stepped wave generator accepts the square wave Vx output from the square wave generator as its input; capacitor C2 and resistor R5 form a differentiating circuit, which generates positive and negative pulse voltages from Vx; diode D1 and resistor R6 form a limiting circuit, which reduces the positive pulse voltage to a single positive pulse voltage; the integrating circuit includes resistor R7, operational amplifier OP2, integrating capacitor C3, MOSFET M1, and reset switch Srst; one end of resistor R7 is connected to the limiting circuit, and the other end is connected to the inverting input of operational amplifier OP2; the non-inverting input of operational amplifier OP2 is grounded. The integrating capacitor C3, reset switch Srst, and MOSFET M1 are connected in parallel between the inverting input and output of operational amplifier OP2. The voltage comparator includes operational amplifier OP3, resistors R9, R10, and R11. The output of operational amplifier OP2 is connected to the negative input of operational amplifier OP3. One path of the non-inverting input of operational amplifier OP3 is connected to ground GND via resistor R9, and the other path is connected to power supply VEE via resistor R10. The output is connected to MOSFET M1. Resistor R11 is connected between the non-inverting input and output of operational amplifier OP3. The output of operational amplifier OP2 outputs a stepped wave Vin1. When there is no pulse voltage, the output voltage of operational amplifier OP2 remains unchanged. When the next positive pulse voltage arrives, the output voltage of operational amplifier OP2 is integrated based on the original voltage. Thus, the integrating circuit can perform integration and accumulation. The FPGA controls the conduction of the reset switch Srst. When the reset switch Srst is closed, the integrating capacitor C3 discharges. When detection needs to begin, the FPGA controls the reset switch Srst to open, causing the integrating circuit to start integrating and accumulating. Specifically, when the output voltage of operational amplifier OP2 in the integrating circuit accumulates to the comparison voltage of the voltage comparator, the output of operational amplifier OP3 in the voltage comparator outputs a positive voltage, turning on MOSFET M1 and discharging the integrating capacitor C3. At this time, the output of operational amplifier OP2 jumps from negative to zero. After the jump, the output of operational amplifier OP3 becomes negative, MOSFET M1 is turned off, and the integrating circuit starts integrating and accumulating again. This cycle repeats, forming a stepped wave. The reset switch Srst is controlled by the FPGA signal. When the reset switch Srst is closed, the integrating capacitor C3 discharges; when detection needs to begin, the reset switch Srst is opened, causing the integrating circuit to start integrating and accumulating.

[0066] In some implementations, the output of operational amplifier OP3 is connected to MOSFET M1 via diode D2, ensuring that voltage flows forward through diode D2 and preventing the voltage of the square wave generator circuit from affecting the stepped wave generator circuit. The output of operational amplifier OP3 outputs voltage Vz through diode D3, creating a voltage difference between the positive and negative input terminals of operational amplifier OP1 in the square wave generator circuit, thus enabling the square wave generator circuit to start oscillating more quickly.

[0067] Reference Figure 5 In some implementations, the voltage divider includes operational amplifiers OP4 and OP5, capacitors C4 and C5, resistors R12 and R13, wherein operational amplifier OP4 acts as a first voltage follower and operational amplifier OP5 acts as a second voltage follower; unlike Vx output from operational amplifier OP1, Vy is output from the non-inverting input of operational amplifier OP1, therefore it needs to be... Figure 5 Operational amplifier OP4 has its non-inverting input terminal Vy and its negative input terminal connected to the output terminal. The output terminal of operational amplifier OP4 is connected to resistor R12. Resistors R12 and R13 are connected in series. Resistors R12 and R13, capacitors C4 and C5 are connected in parallel. Resistors R13 and C5 are connected to ground GND via a wire. Resistors R12 and R13 are connected to the non-inverting input terminal of operational amplifier OP5 via a wire. The negative input terminal of operational amplifier OP5 is connected to the output terminal. The output terminal of operational amplifier OP5 outputs a square wave Vin2.

[0068] Because the output resistance at the Vy port of the square wave generator circuit is not small enough, an operational amplifier OP4 is added to the voltage divider as a voltage follower. Similarly, the output resistance directly output after voltage division by resistors R12 and R13 is not small enough, so an operational amplifier OP5 is added as a voltage follower to improve the load-carrying capacity of the voltage divider circuit. The signal is filtered by capacitors C4 (capacitance can be 2.2μF) and C5 (capacitance can be 10nF), then divided by resistors R12 and R13, and finally output as a square wave Vin2 through the voltage follower.

[0069] Reference Figure 6 In some implementations, the voltage bias circuit includes resistors R14 and R15 and operational amplifier OP6. One end of resistor R14 is connected to ground GND, and the other end is connected to resistor R15. Resistor R15 is connected to power supply VEE. A wire is led out between resistors R14 and R15 and connected to the positive input terminal of operational amplifier OP6. The negative input terminal of operational amplifier OP6 is connected to the output terminal. Operational amplifier OP6 forms a voltage follower, which has a strong load-driving capability. The output terminal of operational amplifier OP6 outputs a DC voltage Vin3.

[0070] In some implementations, the bus switch has three independent switches. Vin1 is connected to Vin1' through one of these switches; that is, the stepped wave Vin1 is transformed into a square wave Vin1' via the bus switch. Similarly, the square wave Vin2 is transformed into a stepped wave Vin2' via the bus switch. The DC voltage Vin3 is transformed into a DC bias Vin3' via the bus switch. Sin controls whether the bus switch is turned on or off. (Refer to...) Figure 7 The constant potential circuit includes resistors R16, R17, R18, R19, and R20, operational amplifiers OP7 and OP8. The square wave Vin1' is input to one end of resistor R16, with the other end connected to resistor R19. Resistor R19 is grounded, and a wire connects resistors R16 and R19 to the positive input of operational amplifier OP7. The stepped wave Vin2' is input to one end of resistor R17, with the other end connected to the negative input of operational amplifier OP7. Operational amplifier OP7 outputs Vae. The DC bias Vin3' is input to one end of resistor R18, with a wire connecting resistors R18 and R20 to resistor R17. Resistor R20 is connected to both the negative input and output of operational amplifier OP8, and Vre is input to the positive input of operational amplifier OP8.

[0071] Since Vae and Vre are connected through electrodes in the three-electrode system, the constant potential circuit can be viewed as a voltage adder and subtractor, with a voltage follower composed of operational amplifiers OP8 in its feedback loop. The output of operational amplifier OP7, the three-electrode system, and the non-inverting input of operational amplifier OP8 are connected to form negative feedback at the output of the constant potential circuit. This circuit structure will subtract the three waveforms Vin1, Vin2, and Vin3, i.e., Vin1-Vin2-Vin3, and apply the resulting waveform to the corresponding electrode in the three-electrode system. When the resistance values ​​of resistors R16 to R20 are equal, Vre = Vin2' + Vin3' - Vin1'. Since the voltage on the working electrode WE is set to 0V in the current detection circuit, the voltage difference between the working electrode WE and the reference electrode RE is -Vre = Vin1' - Vin2' - Vin3', where Vin1' is a square wave, Vin2' is a stepped wave, and Vin3' is a DC bias. After addition and subtraction, the SWV waveform can be obtained, and Vre is the SWV waveform.

[0072] Reference Figure 8In some implementations, the current detection circuit includes operational amplifiers OP9 and OP10, capacitor C6, resistors R21, R22, R23, R24, R25, R26, R27, and a 4:1 multiplexer. Operational amplifiers OP9, C6, R21, R22, R23, R24, and the 4:1 multiplexer form a variable gain current-to-voltage conversion circuit. The non-inverting input of operational amplifier OP9 is grounded, and its negative input is connected to the input of the 4:1 multiplexer via resistors R21, R22, R23, and R24 in parallel. The detected current Iw is input to the negative input of operational amplifier OP9. Capacitor C6 is connected in parallel between the negative input and output of operational amplifier OP9, serving as a voltage holding capacitor. The 4:1 multiplexer defaults to selecting resistors R21, R22, R23, and R24. The smallest resistor is used to obtain the largest current detection range. Specifically, when the FPGA detects that the difference between the maximum and minimum values ​​of the detected three-electrode system output current Iwe is too large, the FPGA sends 2-bit gating signals Sa and Sb to control the selection of 4 channels (R21~R24), automatically connecting the smaller resistor to the path through a 4:1 multiplexer, thereby adapting to the optimal current detection range and obtaining the best detection accuracy. The output of operational amplifier OP9 is connected to the negative input of operational amplifier OP10 through resistor R25, and the non-inverting input of operational amplifier OP10 is grounded through resistor R26. Resistor R27 is connected in parallel between the negative input and output of operational amplifier OP10 to form a voltage amplification and inversion circuit. Because the gain of the current-to-voltage conversion circuit is relatively small, an additional amplifier stage is needed for amplification. Also, the output voltage of operational amplifier OP9 is a negative voltage, which needs to be converted to a positive voltage before entering the ADC. By amplifying the detected current Iwe to the maximum allowable voltage range, the optimal detection accuracy can be obtained when it passes through the ADC.

[0073] In this embodiment of the invention, the current-to-voltage conversion amplification factor of the current detection circuit depends on... Figure 8 The value of the resistor connected in series across capacitor C6. Figure 8 The circuit provides four different resistor values, R21 to R24. The selection behavior of the 4:1 multiplexer is controlled by two-bit selection signals Sa and Sb issued by the FPGA, enabling selection of the 4:1 multiplexer. Based on the magnitude of the detected current Iwe, the FPGA automatically selects the most suitable resistor among the four resistors by selecting different resistors, automatically adjusting the current-to-voltage conversion amplification factor of the current detection circuit to determine the optimal current-to-voltage conversion amplification factor.

[0074] Reference Figure 9In some implementations, a low-pass filter circuit is used to filter out high-frequency noise. The low-pass filter circuit includes resistors R28, R29, R30, and R31, capacitors C7 and C8, and an operational amplifier OP11. Resistors R28 and R29 are connected in series to the non-inverting input of operational amplifier OP11. Resistor R29 is connected to capacitor C8 via a wire and grounded. Resistor R28 and R29 are connected to the output of operational amplifier OP11 via capacitor C7. One end of resistor R30 is grounded, and the other end is connected to the negative input of operational amplifier OP11. Resistor R30 is connected to the output of operational amplifier OP11 via resistor R31.

[0075] Figure 10 A schematic diagram of the potential-time relationship of a single-cycle SWV waveform is shown. Figure 10 As shown, the potential signal of this method appears as a periodic square wave pulse on the time axis, with the following main characteristics: Square wave potential signal: In the square wave voltammetry method, the input potential is applied to the electrochemical system in the form of a square wave. The potential change in the image appears as a periodic rectangular pulse, where each pulse contains two main phases: a rising phase and a falling phase. During the rising phase, the potential rapidly rises from the baseline potential to the set high potential, and then quickly falls back to the baseline potential during the falling phase, forming a complete cycle. Within each cycle, the SWV waveform scan start voltage is -518mV, and the scan end voltage is 0V. After applying the above SWV waveform, the output current Iwe of the current detection circuit fluctuates within the range of 0–3mA within one cycle.

[0076] Figure 11 A detailed parameter diagram of the SWV waveform is shown. (For example...) Figure 11 As shown, for Figure 10 The single cycle is magnified and explained, with information such as the square wave potential signal, frequency, and potential amplitude labeled. Potential amplitude: In the image, the amplitude of the square wave potential signal refers to the change in the peak value of the potential pulse relative to the baseline potential, with values ​​Esw = 25.0mV and ΔE = 1.5mV; Frequency: The repetition frequency of the square wave potential signal. This system selects and adjusts 150-250Hz to optimize the signal response characteristics and noise suppression capability, with a typical value τ = 1 / 195.4Hz = 5.11ms.

[0077] based on Figure 10 and Figure 11The single-cycle SWV waveform shown is scanned for multiple cycles, and the SWV waveform is applied multiple times. Each time Iwe passes through the current detection circuit, low-pass filter circuit, and ADC, the corresponding detection result is stored in the FPGA. The average value of the multiple stored detection results is taken as the test value of the gastric cancer marker concentration in human urine. It is compared with the preset value to obtain the early gastric cancer screening result using urine detection.

[0078] Figure 12 A schematic diagram of the signal processing method for the detected signal is shown, illustrating the waveform of the detected differential current signal after applying a single-cycle SWV signal and the waveform after data processing. Figure 12 As shown in (a), due to the different solution compositions, the current difference between the detection data graph containing early markers and the marker data graph that needs to be pre-stored and processed is large, making direct comparison impossible. Therefore, the baseline needs to be subtracted. Figure 12 As shown in (b), the peak signal difference in the data after subtracting the baseline is large, while the non-peak signal difference is small. Therefore, the difference in peak differential current can be used as the detection result. In actual detection of early gastric cancer markers, images without early markers need to be used as preset values, processed, and stored. Then, the same baseline processing is performed to compare the peak values. The peak difference between each sample and the preset value is the basis for determining the marker concentration.

[0079] Figure 13 The control logic block diagram of the above-mentioned miniaturized programmable automated electrochemical detection system is shown, including but not limited to the application of multi-cycle SWV waveforms and the acquisition of detection results, including the following steps:

[0080] Reset: The reset switch Srst in the stepped wave generating circuit is closed and held for a period of time to control the stepped wave generating circuit to generate the required SWV waveform;

[0081] Waveform application: The reset switch Srst is opened, and the control Sin is used to open the bus switch. After applying an SWV waveform, the bus switch is closed, and the current is maintained for a period of time.

[0082] Determine whether the maximum value of the detected current Iwe exceeds the measurement limit of the current detection circuit;

[0083] If the maximum value of the detected current Iwe exceeds the measurement limit of the current detection circuit, the current-voltage amplification factor of the current detection circuit is reduced by switching Sa and Sb; if the maximum value of the detected current Iwe does not exceed the measurement limit of the current detection circuit, it is further determined whether the maximum value of the detected current Iwe is less than half of the measurement limit of the current detection circuit.

[0084] If the maximum value of the detected current Iwe is less than half of the measurement limit of the current detection circuit, the current-voltage amplification factor of the current detection circuit is increased by switching Sa and Sb; if the maximum value of the detected current Iwe is not less than half of the measurement limit of the current detection circuit, the circuit is reset, that is, the reset switch Srst in the stepped wave generating circuit is closed, controlling the stepped wave generating circuit to conduct.

[0085] Continuous waveform application: When the reset switch Srst is open, control Sin to open the bus switch and apply the SWV waveform;

[0086] After N waveforms have been applied consecutively, the detection stops, the control bus switch is turned off, and the average value of the N detection results is output.

[0087] In the above embodiments of the present invention, the SWV waveform generation module is coupled to the reference electrode and auxiliary electrode in the three-electrode system to apply the voltage waveform required for electrochemical detection onto the three electrodes. The current detection circuit is coupled to the output terminal of the working electrode of the three-electrode system. The output signal passes through the current detection circuit and the low-pass filter circuit to achieve current-to-voltage conversion and noise reduction. The noise-reduced signal waveform is then processed by the ADC and fed into the FPGA for post-processing and displayed on the screen. The FPGA generates the reset switch control signal Srst, the bus switch control signal Sin, and the 4:1 multiplexer control signals Sa and Sb of the stepped wave generation circuit. By programming the FPGA, the selective conduction of the reset switch and bus switch in the stepped wave generation circuit is controlled, realizing the automatic detection of gastric cancer markers in human urine. Compared with traditional urine detection methods, this system features miniaturization, low power consumption, high speed, high precision, and high integration, providing portability, testing efficiency, and cost advantages for handheld patient self-testing devices. This system also provides a feasible and highly referential electrochemical detection circuit system for the detection of small molecule markers in various complex solution systems using other electrochemical methods in the future.

[0088] It should be noted that the system provided in the above embodiments of the present invention can also achieve automatic detection for other solution systems suitable for square wave voltammetry. In other solution systems, if it is necessary to change various parameters of the SWV method (e.g. Figure 11 (e.g., medium frequency), only the circuit element parameters in the above embodiments of the present invention need to be changed, such as the resistance value of the resistor, without changing the circuit structure and the FPGA program. The system has strong versatility.

[0089] Based on the same inventive concept, another embodiment of the present invention provides an electrochemical detection method for early gastric cancer markers in human urine, which utilizes the aforementioned electrochemical detection system for early gastric cancer markers in human urine. The method includes the following steps:

[0090] S1. Place the three-electrode system into the urine sample to be tested;

[0091] S2. The FPGA controls the selective conduction of the SWV waveform generation module to generate the required SWV waveform;

[0092] S3, the selective conduction of the FPGA control bus switch, applies the required SWV waveform to the three-electrode system;

[0093] S4. The FPGA-controlled current detection circuit automatically adapts the current-to-voltage conversion amplification factor based on the current detected by the three-electrode system.

[0094] S5. When the applied waveform reaches the preset number of times, the detection stops and the detection signal waveform is stored in the FPGA. After FPGA data processing, the detection result of the gastric cancer marker concentration test value in the urine sample is output.

[0095] Figure 14 The signal processing flow of the FPGA in the aforementioned miniaturized programmable automated electrochemical detection system, i.e., the method for obtaining detection results, is illustrated. It includes the following processes:

[0096] The detection signal is stored in the FPGA after passing through the current detection circuit, low-pass filter circuit and ADC.

[0097] Signal processing: Within the FPGA, the detection signal waveforms of N cycles are subtracted from the corresponding baselines to obtain N peak values, which are then averaged to obtain the final detection peak value;

[0098] Results Comparison: The preset peak value stored in the FPGA is used as the threshold for judging the early screening result of gastric cancer. It is compared with the detection peak value to obtain the early screening result of gastric cancer.

[0099] The results showed that the early gastric cancer screening results were displayed on the monitor.

[0100] The above embodiments of the present invention achieve automatic detection of early gastric cancer markers in human urine by selectively turning on the reset switch and bus switch in the staircase wave generation circuit through programmable FPGA control, and by controlling the current-to-voltage conversion amplification factor of the current detection circuit. Compared with traditional urine detection methods, the system in the above embodiments of the present invention features miniaturization, low power consumption, high speed, high precision, and high integration, providing advantages in portability, testing efficiency, and cost for handheld patient self-testing devices. This system also provides a highly feasible and reliable electrochemical detection circuit system for future detection of small molecule markers in various complex solution systems using other electrochemical methods.

[0101] Specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various modifications or variations within the scope of the claims, which do not affect the essence of the present invention. The above preferred features can be used in any combination without conflict.

Claims

1. An electrochemical detection system for an early gastric cancer marker in human urine, characterized by, include: A three-electrode system, comprising a reference electrode, an auxiliary electrode, and a working electrode, is inserted into the urine sample to be tested. The SWV waveform generation module includes a square wave generation circuit, a stepped wave generation circuit, a voltage divider, a voltage bias circuit, a bus switch, and a constant potential circuit. The square wave generation circuit generates square wave waveforms Vy and Vx, with Vx input to the input terminal of the stepped wave generation circuit and Vy input to the input terminal of the voltage divider. The stepped wave generation circuit provides feedback signal Vz to the square wave generation circuit and outputs stepped wave Vin1 to the bus switch. The voltage divider outputs square wave Vin2 to the bus switch. The voltage bias circuit outputs DC voltage Vin3. The bus switch is coupled to the constant potential circuit and outputs voltage waveforms Vae and Vre. Vae is input to the auxiliary electrode, Vre is input to the reference electrode, and the working electrode outputs the detection result current Iwe. A current detection circuit is coupled to the output terminal of the working electrode and outputs a voltage signal Vsig after current-to-voltage conversion. A low-pass filter circuit is coupled to the output terminal of the current detection circuit to output a noise-reduced voltage signal Vout. The ADC is coupled to the output terminal of the low-pass filter circuit and outputs a digital signal. An FPGA is coupled to the output of the ADC. The FPGA controls the selective conduction of the stepped wave generation circuit and the bus switch, and generates the current-to-voltage conversion amplification signal of the current detection circuit. A display, coupled to the FPGA, is used to display detection results and operating status, and serves as a control interface.

2. The electrochemical detection system for early gastric cancer markers in human urine according to claim 1, characterized in that, The square wave generating circuit includes two feedback networks. At the non-inverting input terminal, resistors R1 and R2 and the output terminal of operational amplifier OP1 form positive feedback, outputting Vy. At the inverting input terminal, capacitor C1, resistor R3 and the output terminal of operational amplifier OP1 form negative feedback, outputting Vx.

3. The electrochemical detection system for early gastric cancer markers in human urine according to claim 1, characterized in that, The stepped wave generating circuit includes a differentiating circuit, a limiting circuit, an integrating circuit, and a voltage comparator connected in sequence, wherein: Vx is converted into positive and negative pulse voltages by the differentiating circuit. After the positive and negative pulse voltages pass through the limiting circuit, only the positive pulse voltage remains. The integrating circuit includes a resistor R7, an operational amplifier OP2, an integrating capacitor C3, a MOSFET M1, and a reset switch Srst. One end of the resistor R7 is connected to the limiting circuit, and the other end is connected to the inverting input terminal of the operational amplifier OP2. The non-inverting input terminal of the operational amplifier OP2 is grounded. The integrating capacitor C3, the reset switch Srst, and the MOSFET M1 are connected in parallel between the inverting input terminal and the output terminal of the operational amplifier OP2. The voltage comparator includes operational amplifier OP3, resistors R9, R10, and R11. The output of operational amplifier OP2 is connected to the negative input of operational amplifier OP3. The non-inverting input of operational amplifier OP3 is connected to ground GND via resistor R9 and to power supply VEE via resistor R10. The output is connected to MOSFET M1. Resistor R11 is connected between the non-inverting input and output of operational amplifier OP3. The output of operational amplifier OP2 outputs a stepped waveform Vin1. The FPGA controls the conduction of the reset switch Srst. When the reset switch Srst is closed, the integrating capacitor C3 discharges. When detection needs to be started, the FPGA controls the reset switch Srst to open, so that the integrating circuit can start integrating and accumulating.

4. The electrochemical detection system for early gastric cancer markers in human urine according to claim 3, characterized in that, The output terminal of the operational amplifier OP3 is connected to the MOS transistor M1 via diode D2, and the output terminal of the operational amplifier OP3 outputs voltage Vz via diode D3.

5. The electrochemical detection system for early gastric cancer markers in human urine according to claim 1, characterized in that, The voltage divider includes operational amplifier OP4, operational amplifier OP5, capacitor C4, capacitor C5, resistor R12, and resistor R13, wherein: The operational amplifier OP4 serves as the first voltage follower, and the operational amplifier OP5 serves as the second voltage follower; The operational amplifier OP4 has Vy input at its positive input terminal and is connected to its output terminal at its negative input terminal. The output terminal of the operational amplifier OP4 is connected to resistor R12. Resistors R12 and R13 are connected in series. Resistors R12 and R13, capacitor C4, and capacitor C5 are connected in parallel. Resistors R13 and C5 are connected to ground GND via a wire. Resistors R12 and R13 are connected to the positive input terminal of the operational amplifier OP5 via a wire. The negative input terminal of the operational amplifier OP5 is connected to its output terminal. The output terminal of the operational amplifier OP5 outputs a square wave Vin2.

6. The electrochemical detection system for early gastric cancer markers in human urine according to claim 1, characterized in that, The voltage bias circuit includes resistors R14 and R15 and an operational amplifier OP6. One end of resistor R14 is connected to ground GND, and the other end is connected to resistor R15. Resistor R15 is connected to power supply VEE. A wire is led out between resistors R14 and R15 and connected to the positive input terminal of operational amplifier OP6. The negative input terminal of operational amplifier OP6 is connected to the output terminal. The output terminal of operational amplifier OP6 outputs a DC voltage Vin3.

7. The electrochemical detection system for early gastric cancer markers in human urine according to claim 1, characterized in that, The stepped wave Vin1 is converted into a square wave Vin1' via a bus switch, the square wave Vin2 is converted into a stepped wave Vin2' via a bus switch, and the DC voltage Vin3 is converted into a DC bias Vin3' via a bus switch. The constant potential circuit includes resistors R16, R17, R18, R19, and R20, operational amplifiers OP7 and OP8. The square wave Vin1' is input to one end of resistor R16, and the other end of resistor R16 is connected to resistor R19, which is grounded. A wire connects resistors R16 and R19 to the positive input terminal of operational amplifier OP7. The stepped wave Vin2' is input to one end of resistor R17, and the other end of resistor R17 is connected to the negative input terminal of operational amplifier OP7. Operational amplifier OP7 outputs Vae. The DC bias Vin3' is input to one end of the resistor R18. The resistor R18 and the resistor R20 are connected to the resistor R17 via a wire. The resistor R20 is connected to the negative input terminal and the output terminal of the operational amplifier OP8. Vre is input to the positive input terminal of the operational amplifier OP8.

8. The electrochemical detection system for early gastric cancer markers in human urine according to claim 1, characterized in that, The current detection circuit includes operational amplifier OP9, operational amplifier OP10, capacitor C6, resistors R21, R22, R23, R24, R25, R26, R27 and a 4:1 multiplexer. The operational amplifier OP9, capacitor C6, resistors R21, R22, R23, and R24, and the 4:1 multiplexer constitute a variable gain current-to-voltage conversion circuit. The positive input terminal of the operational amplifier OP9 is grounded, and the negative input terminal is connected to the input terminal of the 4:1 multiplexer through resistors R21, R22, R23, and R24 in parallel. The detected current Iw is input to the negative input terminal of the operational amplifier OP9. The capacitor C6 is connected in parallel between the negative input terminal and the output terminal of the operational amplifier OP9, and the capacitor C6 serves as a voltage holding capacitor. The 4:1 multiplexer defaults to selecting the smallest resistor among resistors R21, R22, R23, and R24 to obtain the largest current detection range. The output terminal of the operational amplifier OP9 is connected to the negative input terminal of the operational amplifier OP10 through the resistor R25. The positive input terminal of the operational amplifier OP10 is grounded through the resistor R26. The resistor R27 is connected in parallel between the negative input terminal and the output terminal of the operational amplifier OP10, forming a voltage amplification and inversion circuit.

9. The electrochemical detection system for early gastric cancer markers in human urine according to claim 1, characterized in that, The low-pass filter circuit includes resistors R28, R29, R30, and R31, capacitors C7 and C8, and operational amplifier OP11. The resistors R28 and R29 are connected in series and then connected to the non-inverting input terminal of the operational amplifier OP11. The resistor R29 and the non-inverting input terminal of the operational amplifier OP11 are connected to the capacitor C8 and grounded via a wire. The resistors R28 and R29 are connected to the output terminal of the operational amplifier OP11 via the capacitor C7. One end of the resistor R30 is grounded, and the other end is connected to the negative input terminal of the operational amplifier OP11. The resistor R30 and the negative input terminal of the operational amplifier OP11 are connected to the output terminal of the operational amplifier OP11 via the resistor R31.

10. An electrochemical detection method for early gastric cancer markers in human urine, characterized in that, The method utilizes the electrochemical detection system for early gastric cancer markers in human urine according to any one of claims 1-9, and comprises: Place the three-electrode system into the urine sample to be tested; The FPGA controls the selective activation of the SWV waveform generation module to generate the required SWV waveform. The FPGA controls the selective conduction of the bus switch to apply the required SWV waveform to the three-electrode system; The FPGA-controlled current detection circuit automatically adapts the current-to-voltage conversion amplification factor based on the current detected by the three-electrode system. When the applied waveform reaches the preset number of times, the detection stops and the detection signal waveform is stored in the FPGA. After FPGA data processing, the detection result of the gastric cancer marker concentration test value in the urine sample is output.

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