Control Method, Device, Equipment and Storage Medium of Dual-Sided Display Device
By performing multi-channel timing analysis and dynamic load allocation for double-sided display devices, adjusting the refresh sequence and main clock reference, the phase mismatch problem of double-sided display devices under high speed or high brightness conditions is solved, and ghosting and synchronization errors are significantly reduced.
Patent Information
- Application Number
- CN202510444178.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-10
- Publication Date
- 2025-06-20
- Estimated Expiration
- 2045-04-10
AI Technical Summary
When controlling the double-sided display device, the prior art fails to effectively solve the timing accuracy, temperature load and signal coupling problems between the front and rear panels, resulting in phase mismatch during high-speed refresh or high-brightness output, resulting in problems such as ghosting, tearing or local delay.
By performing multi-channel timing analysis on the front and rear panels of the double-sided display device, the initial delay characteristics and temperature distribution data of the signal line are evaluated, the refresh load is predicted and dynamic load allocation is performed, the refresh sequence and main clock reference are adjusted, the front and back end fusion phase correction sequence is generated, and the refresh frequency is continuously monitored and adjusted.
It significantly reduces ghosting and synchronization errors of double-sided display devices under high speed or high brightness conditions, and improves the synchronization stability of the device during long-term high-load operation or multi-scene switching.
Smart Images

Figure CN119964525B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of device control, and particularly to a control method, device, equipment and storage medium for a dual-sided display device. Background Art
[0002] For the control of dual-sided display devices, the synchronous refresh algorithm and temperature management strategy of single-sided display products are usually adopted. Although it can provide driving support for the front and rear panels to a certain extent, due to the significant differences in the requirements of each panel for timing accuracy, temperature load, and signal coupling in the dual-sided display environment, obvious phase mismatches often occur during high-speed refreshing or high-brightness output. Especially when the front panel and the back panel are synchronously refreshed, if there is no dedicated timing analysis and load distribution mechanism for the dual-sided structure, it is easy to generate difficult-to-capture microscopic interference between the signal channels on the front and back, resulting in problems such as ghosting, tearing, or local delay in the dual-sided display. Most of the existing technologies only focus on the refresh optimization of a single panel, without comprehensively considering the potential signal interaction and temperature coupling relationship between the front and back panels in the dual-sided structure, and it is difficult to balance the timing adjustment requirements brought by high-speed response and thermal effects. Therefore, in practical applications, dual-sided display devices are prone to significant synchronization errors during long-term high-load operation or multi-scenario switching. Summary of the Invention
[0003] The main object of the present invention is to solve the technical problem that the existing technology only independently manages the single-sided refresh and temperature control of dual-sided display devices, without fully considering the phase mismatch caused by multi-channel timing coupling between the front and back panels;
[0004] The first aspect of the present invention provides a control method for a dual-sided display device, and the control method for the dual-sided display device includes:
[0005] Perform multi-channel timing analysis on the front and back panels of the dual-sided display device to obtain the initial delay characteristics and temperature distribution data of the signal lines of the dual-sided display device, and evaluate the potential phase mismatch range of different signal channels according to the initial delay characteristics and temperature distribution data to obtain an initial phase offset reference;
[0006] Predict the refresh load of the dual-sided panels of the dual-sided display device according to the initial phase offset reference to obtain refresh load prediction data, and based on the refresh load prediction data, combine the temperature evolution to distinguish and process the refresh requests of the front and back panels to obtain multi-panel dynamic load distribution parameters;
[0007] Based on the multi-panel dynamic load distribution parameters, synchronously refresh the front and rear panels to obtain an initial synchronous refresh result, and adjust the refresh sequence and the master clock reference of the back panel according to the initial synchronous refresh result and the temperature accumulation situation, so as to obtain a front-end and back-end fusion phase correction sequence;
[0008] Use the front-end and back-end fusion phase correction sequence to continuously monitor the dual-sided display device to obtain a real-time phase offset value, and adjust and control the refresh frequency of the dual-sided display device according to the real-time phase offset value and the multi-panel dynamic load distribution parameters.
[0009] Optionally, in the first implementation manner of the first aspect of the present invention, the multi-channel timing analysis of the front and rear panels of the dual-sided display device to obtain the initial delay characteristics and temperature distribution data of the signal lines of the dual-sided display device, and according to the initial delay characteristics and temperature distribution data, evaluate the potential phase mismatch range of different signal channels to obtain the initial phase offset reference includes:
[0010] Perform synchronous sampling processing on the multi-channel drive signals of the front and rear panels of the dual-sided display device to obtain a multi-channel initial sampling sequence;
[0011] According to the multi-channel initial sampling sequence, perform interval analysis processing on the delay waveforms of each signal line of the dual-sided display device in the startup phase to obtain the initial delay characteristics;
[0012] Perform segmented comparison processing on the distributed thermal sensing data of the front panel and the back panel to obtain the temperature distribution data;
[0013] According to the initial delay characteristics and the temperature distribution data, perform phase mismatch amount inference processing on the coupling regions of different signal channels to obtain the initial phase offset reference.
[0014] Optionally, in the second implementation manner of the first aspect of the present invention, the performing phase mismatch amount inference processing on the coupling regions of different signal channels according to the initial delay characteristics and the temperature distribution data to obtain the initial phase offset reference includes:
[0015] Perform differential induction processing on the initial delay characteristics to obtain a delay classification index, and according to the delay classification index, perform coupling region marking processing on the temperature distribution data to obtain a coupling marking matrix;
[0016] Perform phase offset amount measurement processing on each signal channel in the coupling marking matrix to obtain a phase mismatch coefficient group;
[0017] According to the phase mismatch coefficient group, perform benchmark inference processing on the multi-channel drive signals of the dual-sided display device to obtain the initial phase offset reference.
[0018] Optionally, in the third implementation manner of the first aspect of the present invention, predicting the refresh load of the double-sided panels of the double-sided display device according to the initial phase offset reference to obtain refresh load prediction data, and based on the refresh load prediction data, differentiating and processing the refresh requests of the front and rear panels in combination with the temperature evolution to obtain multi-panel dynamic load distribution parameters includes:
[0019] Performing load prediction processing on the driving current and refresh frequency of the front and rear panels at different brightness levels according to the initial phase offset reference to obtain refresh load prediction data;
[0020] Performing multi-dimensional evolution mapping processing on the refresh load prediction data in combination with the real-time acquisition results of a preset temperature sensor to obtain a temperature evolution curve;
[0021] Differentiating and processing the high-brightness refresh request of the front panel and the low-power refresh request of the rear panel according to the temperature evolution curve to obtain the load priority order of different signal channels in a specific temperature range;
[0022] Performing comprehensive allocation processing on the available timing resources of the front and rear panels according to the load priority order to obtain multi-panel dynamic load distribution parameters.
[0023] Optionally, in the fourth implementation manner of the first aspect of the present invention, synchronously refreshing the front and rear panels based on the multi-panel dynamic load distribution parameters to obtain an initial synchronous refresh result, and adjusting the refresh order and the main clock reference of the back panel according to the initial synchronous refresh result and the temperature accumulation situation to obtain a front-end and rear-end fusion phase correction sequence includes:
[0024] Performing phase parallel processing on the channel drive signals of the front panel and the back panel according to the multi-panel dynamic load distribution parameters, and performing phase parallel processing based on the phase parallel processing to obtain an initial synchronous refresh result;
[0025] Performing temperature accumulation evaluation processing on the initial synchronous refresh result to obtain the current temperature rise curve and the high-brightness channel load data;
[0026] Performing timing fine-tuning processing on the refresh order of the back panel according to the current temperature rise curve and the high-brightness channel load data, and performing limited phase correction on the main clock reference to match the high-speed output interval of the front panel;
[0027] After completing the timing fine-tuning processing and phase correction, generating a front-end and rear-end fusion phase correction sequence that can reflect the synchronization relationship between the front and rear channels.
[0028] Optionally, in the fifth implementation manner of the first aspect of the present invention, the continuous monitoring of the dual-sided display device by using the front-back end fusion phase correction sequence to obtain a real-time phase offset value, and the adjustment control of the refresh frequency of the dual-sided display device according to the real-time phase offset value and the multi-panel dynamic load distribution parameter includes:
[0029] Perform synchronous tracking processing on the front-back end fusion phase correction sequence within a periodic time window to obtain the current phase acquisition data of each signal channel;
[0030] According to the phase acquisition data, perform a comparison operation between the actual outputs of the front and rear panels and the correction sequence to obtain a real-time phase offset value;
[0031] According to the real-time phase offset value and the multi-panel dynamic load distribution parameter, perform a limiting adjustment process on the refresh frequencies of the front panel and the back panel.
[0032] The second aspect of the present invention provides a control device for a dual-sided display device, and the control device for the dual-sided display device includes:
[0033] A multi-channel timing analysis module, configured to perform multi-channel timing analysis on the front and rear panels of the dual-sided display device to obtain the initial delay characteristics and temperature distribution data of the signal lines of the dual-sided display device, and evaluate the potential phase mismatch range of different signal channels according to the initial delay characteristics and temperature distribution data to obtain an initial phase offset reference;
[0034] A refresh load prediction module, configured to predict the refresh load of the dual-sided panels of the dual-sided display device according to the initial phase offset reference to obtain refresh load prediction data, and based on the refresh load prediction data, combine the temperature evolution to distinguish the refresh requests of the front and rear panels to obtain a multi-panel dynamic load distribution parameter;
[0035] A synchronous refresh adjustment module, configured to perform synchronous refresh on the front and rear panels based on the multi-panel dynamic load distribution parameter to obtain an initial synchronous refresh result, and adjust the refresh sequence and the main clock reference of the back panel according to the initial synchronous refresh result and the temperature accumulation situation to obtain a front-back end fusion phase correction sequence;
[0036] A continuous monitoring and correction module, configured to continuously monitor the dual-sided display device by using the front-back end fusion phase correction sequence to obtain a real-time phase offset value, and adjust and control the refresh frequency of the dual-sided display device according to the real-time phase offset value and the multi-panel dynamic load distribution parameter.
[0037] In a third aspect of the present invention, a control device for a dual-sided display device is provided, including: a memory and at least one processor, wherein instructions are stored in the memory, and the memory and the at least one processor are interconnected by a line; the at least one processor calls the instructions in the memory to enable the control device of the dual-sided display device to execute the steps of the above-mentioned control method for the dual-sided display device.
[0038] In a fourth aspect of the present invention, a computer-readable storage medium is provided, in which instructions are stored. When it runs on a computer, it enables the computer to execute the steps of the above-mentioned control method for the dual-sided display device.
[0039] The above-mentioned control method, device, equipment and storage medium for the dual-sided display device obtain the initial delay characteristics of the signal line and the temperature distribution data through multi-channel timing analysis of the front and rear panels, and evaluate the phase mismatch range based on this to obtain the initial phase offset reference; then predict the refresh load of the dual-sided panel according to this reference, and distinguish the refresh requests of the front and rear panels by combining the temperature evolution to generate multi-panel dynamic load distribution parameters; synchronously refresh the front and rear panels based on the parameters and evaluate the temperature accumulation situation, adjust the refresh order of the back panel and the main clock reference to generate a front-end and back-end fusion phase correction sequence; finally, continuously monitor using the correction sequence to obtain the real-time phase offset value and adjust the refresh frequency accordingly. This method can significantly reduce the ghosting and synchronization errors of dual-sided display under high-speed or high-brightness conditions.
[0040] Other features and advantages of the present invention will be described in the subsequent specification, and some will be obvious from the specification or understood by implementing the present invention. The objectives and other advantages of the present invention are achieved and obtained by the structures specifically pointed out in the specification, claims and drawings.
[0041] To make the above-mentioned objectives, features and advantages of the present invention more obvious and understandable, the following specific preferred embodiments are given in conjunction with the accompanying drawings and described in detail as follows. Description of the Drawings
[0042] Figure 1 It is a schematic diagram of the first embodiment of the control method for the dual-sided display device in the embodiment of the present invention;
[0043] Figure 2 It is a schematic diagram of an embodiment of the control device for the dual-sided display device in the embodiment of the present invention;
[0044] Figure 3 It is a schematic diagram of an embodiment of the control equipment for the dual-sided display device in the embodiment of the present invention. Detailed Description of the Embodiments
[0045] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Apparently, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.
[0046] As used in the embodiments of the present invention, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally further include other unlisted steps or units, or may optionally further include other steps or units inherent to these processes, methods, products, or devices.
[0047] To facilitate the understanding of this embodiment, first, a control method for a dual-sided display device disclosed in the embodiments of the present invention will be introduced in detail. As Figure 1 shown, the method includes the following steps:
[0048] 101. Perform multi-channel timing analysis on the front and rear panels of the dual-sided display device to obtain the initial delay characteristics of the signal lines of the dual-sided display device and the temperature distribution data, and evaluate the potential phase mismatch range of different signal channels based on the initial delay characteristics and the temperature distribution data to obtain the initial phase offset reference;
[0049] In an embodiment of the present invention, the performing multi-channel timing analysis on the front and rear panels of the dual-sided display device to obtain the initial delay characteristics of the signal lines of the dual-sided display device and the temperature distribution data, and evaluating the potential phase mismatch range of different signal channels based on the initial delay characteristics and the temperature distribution data to obtain the initial phase offset reference includes: performing synchronous sampling processing on the multi-channel drive signals of the front and rear panels of the dual-sided display device to obtain a multi-channel initial sampling sequence; performing interval analysis processing on the delay waveforms of each signal line of the dual-sided display device at the startup stage based on the multi-channel initial sampling sequence to obtain the initial delay characteristics; performing segmented comparison processing on the distributed thermal sensing data of the front panel and the back panel to obtain the temperature distribution data; and performing phase mismatch amount inference processing on the coupling regions of different signal channels based on the initial delay characteristics and the temperature distribution data to obtain the initial phase offset reference.
[0050] Specifically, for the process of synchronously sampling the multi-channel drive signals of the front and rear panels of a dual-sided display device to obtain a multi-channel initial sampling sequence, first, a unified trigger pulse is applied to each signal line of the front and rear panels based on high-speed sampling hardware, and digital waveforms are continuously acquired at a fixed minimum sampling interval. A multi-level channel selection logic is set in the sampling hardware. By matching the numbers and priorities of the target signal lines, several synchronous sampling values output from the channel multiplexer are recorded in the data buffer. If the number of signal lines is huge, a parallel grouping strategy can be adopted to perform polling sampling on the signal lines in different regions. To meet the requirements of high brightness and low power consumption switching in the dual-sided display scenario, reserved time slots need to be set before and after the trigger pulse to overcome the differences in voltage fluctuations and start-up delays between the front panel and the back panel. After sampling, the multi-channel signals are converted into a sequence containing timestamp and level information, denoted as , where is the signal line number, is the discrete sampling moment. The multi-channel initial sampling sequence obtained by this method carries the original timing state of the front and rear panels under the same physical clock. This process relies on distributed trigger control and multi-level cache logic to make the front panel and the back panel at the same reference starting point during the sampling period and obtain a complete waveform record of each signal line under the condition of minimizing crosstalk. According to the multi-channel initial sampling sequence, the process of performing interval analysis on the delay waveforms of each signal line of the dual-sided display device in the startup phase to obtain the initial delay characteristics can be carried out with the help of an adaptive interval division algorithm. This algorithm first scans the waveforms of each signal line before and after the startup moment, and after detecting stable regions of high or low levels, calculates the corresponding delay intervals according to the actual sampling frequency and threshold voltage. To ensure accuracy, more refined sampling interpolation can be performed on the transition regions that fluctuate above and below the critical level, and an interference coefficient can be set to eliminate occasional pulses. Then these data are processed according to the short-time smoothing filtering method to form a set of delay segments with central moments and durations. The delay value can be denoted as , where is the signal line or channel number. If there are multiple rising edges or oscillations during the startup phase, the adjacent waveform jitters can be merged into a unified interval by using the threshold determination and merging strategy to avoid unnecessary noise interference. Through the above interval analysis and processing, the key delay change ranges of all signal lines during the startup phase can be extracted, and these delay characteristics are stored in a matrix or table, which will be used as a comparison basis during the phase mismatch inference. Such processing can distinguish the differences between the front and rear panels during the power-on process and provide conditions for obtaining a more accurate phase evaluation result by combining temperature data. The process of obtaining the temperature distribution data by performing segmented comparison processing on the distributed thermal sensing data of the front panel and the back panel first involves embedding multiple thermal sensors inside the dual-sided display device, and these thermal sensors are distributed near the front and rear panel drive chips and in the concentrated area of the heat dissipation channels. The sampled values of these sensors are packed with consistent timestamps and classified according to dimensions such as panel position, working duration, and brightness requirements. Then, based on the continuous segmented comparison algorithm, the difference calculation is performed on the temperature information recorded in each time period to form a one-dimensional or two-dimensional temperature gradient sequence. For application scenarios that require higher precision, the segmented interval can be further refined into short-period blocks, for example, with sampling periods as a block, and the temperature difference between adjacent blocks is cumulatively calculated. Denote the temperature sampled value as , where is the sensor number, is the sampling time. If the temperature sampled values within the same time period are stacked into a matrix, the local smoothing or least squares fitting method can be used to obtain the temperature rise distribution in different regions of the front and rear panels, and the result is output as temperature distribution data. The segmented comparison processing will accurately record the heat increment of each key module, thereby clarifying the correlation information of the temperature difference between the front and rear panels at different channel positions.
[0051] Based on the initial delay characteristics and temperature distribution data, the process of inferring the phase mismatch amount in the coupling region of different signal channels to obtain the initial phase shift reference depends on a set of multi-dimensional mapping and operation methods. First, take out the temperature distribution data generated in the previous step and locate the channel ranges on the front and rear panels with high heat accumulation or frequent transitions. Match the delay characteristics and temperature information of these channels in a matrix form. Let the phase mismatch amount be represented by , where is the channel number, is the temperature interval or the position of the thermal sensor. If the delay data and temperature data are arranged in vector form, a coupling matrix can be constructed, and each element satisfies
[0052] ;
[0053] where represents channel The delay value, It means that after the temperature matrix is mapped to the frequency domain or time domain, the channel-temperature coupling can be extracted through the phase alignment strategy and compared with the established threshold. If some channels exceed the threshold, after recording in the reference, the initial phase shift reference will be output, which is used to distinguish the timing drift degree of the front and rear panels under different thermal conditions. This reference contains a relatively detailed channel-temperature coupling relationship and will be used as an important reference for subsequent refresh load prediction and synchronization adjustment.
[0054] Furthermore, the process of inferring the phase mismatch amount of the coupling region of different signal channels according to the initial delay feature and temperature distribution data to obtain the initial phase shift reference includes: performing differential induction processing on the initial delay feature to obtain a delay classification index, and according to the delay classification index, performing coupling region marking processing on the temperature distribution data to obtain a coupling marking matrix; performing phase shift amount measurement processing on each signal channel in the coupling marking matrix to obtain a phase mismatch coefficient group; and performing reference inference processing on the multi-channel drive signal of the dual-sided display device according to the phase mismatch coefficient group to obtain the initial phase shift reference.
[0055] Specifically, the process of performing differential induction processing on the initial delay feature to obtain a delay classification index first groups the delay samples obtained by multi-channel sampling according to the signal line number or geographical distribution, and performs skewness and kurtosis statistics on the delay data in each group. Let all delay values be recorded in vector form as . Perform multiple weighted averages on the collected to filter out abnormal fluctuations caused by short-term jitter, and divide different waveform segments into several stable intervals based on the difference threshold. Subsequently, use the kernel function mapping or least squares fitting method to estimate the delay distribution curve, and classify the delay values that conform to the distribution center according to the difference size, which can be recorded as , where is the classification index. The delay classification index obtained after the above operations will label the same type of waveforms and provide comparable classification information for the subsequent coupling region marking stage. According to the delay classification index, the process of performing coupling region marking processing on the temperature distribution data to obtain a coupling marking matrix depends on matching the spatial coordinates and timestamps of the distributed thermal sensing data on the front panel and the back panel. Establish a mapping between the classified delay index and temperature data in a one-to-one or one-to-many manner. Each mapping node can be represented by , where Represents the segmented temperature values. After aggregating multiple nodes by region, a matrix - type record table can be constructed. The matrix elements record the heat coupling degree between channels and the similarity of delay types, and indicate the corresponding coupling strength in the form of a mark. When a high correlation between a specific classification index and a temperature section is detected, this mark will be given a higher priority value to indicate that this region has a more sensitive fluctuation interval in phase mismatch inference. The coupling mark matrix generated through this marking process will hierarchically present the coupling relationship between different signal channels and temperature hot - spot regions, laying an associated basis for the next - stage calculation of the phase offset. The process of calculating the phase offset for each signal channel in the coupling mark matrix to obtain the phase mismatch coefficient group needs to combine the cumulative delay performance of the front and rear panels in the frequency domain or time domain. Let the coupling mark matrix be denoted as , where and correspond to the delay classification index and the temperature section respectively. When 's mark value exceeds the threshold, it indicates that there is significant coupling in channel within the temperature section . Using the phase - offset formula
[0056] ;
[0057] where is the average delay value of channel , is the frequency correction factor corresponding to the temperature section , is the constant calibration coefficient based on the hardware characteristics in this system, the phase mismatch amount can be obtained. The above operations can be completed batch - wise in a vectorized framework, and the results are stored in the phase mismatch coefficient group, facilitating a package of statistics for multi - channel data. This operation enables each channel with a high coupling mark to obtain the corresponding phase mismatch value in different temperature sections, finally forming a set of mismatch coefficients that can be quantitatively compared.
[0058] According to the phase mismatch coefficient group, the process of benchmarking inference processing on the multi - channel drive signals of the double - sided display device to obtain the initial phase - offset benchmark is carried out by comparing the mismatch amounts of all channels with the current reference clock or reference timing. If a phase mismatch coefficient is found to be much larger than the general statistical level in a specific channel or temperature section, this channel will be marked as having a high correction priority in the benchmarking operation. The phase mismatch coefficient group and the reference timing can be combined in matrix form to form a comprehensive table containing channel indices, mismatch intervals, priority labels, and offset vectors. This table is sorted according to the channel numbers, and the optimal phase calibration amount is calculated for each mismatch interval. If the calibration value is denoted by , then it can be based on
[0059] ;
[0060] to determine the correction strength in the way that, where is an adjustable gain factor used to regulate the system tolerance. The above output result constitutes the initial phase shift reference, which will be used as a required reading reference before the multi-channel drive signals are synchronized to avoid ghosting or tearing in the phase coupling area of the front and rear panels.
[0061] 102. Predict the refresh loads of the front and rear panels of the double-sided display device according to the initial phase shift reference to obtain refresh load prediction data, and based on the refresh load prediction data, distinguish and process the refresh requests of the front and rear panels in combination with the temperature evolution to obtain multi-panel dynamic load distribution parameters;
[0062] In an embodiment of the present invention, the predicting the refresh loads of the front and rear panels of the double-sided display device according to the initial phase shift reference to obtain refresh load prediction data, and based on the refresh load prediction data, distinguishing and processing the refresh requests of the front and rear panels in combination with the temperature evolution to obtain multi-panel dynamic load distribution parameters includes: performing load prediction processing on the drive currents and refresh frequencies of the front and rear panels at different brightness levels according to the initial phase shift reference to obtain refresh load prediction data; performing multi-dimensional evolution mapping processing on the refresh load prediction data in combination with the real-time acquisition results of a preset temperature sensor to obtain a temperature evolution curve; distinguishing and processing the high-brightness refresh requests of the front panel and the low-power refresh requests of the rear panel according to the temperature evolution curve to obtain the load priority order of different signal channels in a specific temperature range; and comprehensively allocating the available timing resources of the front and rear panels according to the load priority order to obtain multi-panel dynamic load distribution parameters.
[0063] Specifically, the process of performing load prediction processing on the drive currents and refresh frequencies of the front and rear panels at different brightness levels according to the initial phase shift reference to obtain refresh load prediction data can be achieved by setting multiple groups of brightness test conditions at the hardware level and enabling the front and rear panels to perform rapid debugging within their respective brightness ranges to collect the current peaks and corresponding refresh rates. Denote these collected values as and where represents the brightness level. The data collected at different can be used to construct a multi-dimensional matrix, and the relationship between the current and the refresh rate is fitted by the least squares method or the interpolation algorithm, and the fitting result is combined with the previously obtained phase shift reference to generate the instantaneous load intensity corresponding to each brightness level. In this step, the drive power consumption calculation is regarded as , where is the operating voltage range of the device. This allows predicting the refresh loads borne by the front and rear panels respectively under different brightness conditions, enabling the finally output refresh load prediction data to fully reflect the balance between power consumption and refresh rate under the phase alignment requirement. The process of performing multi-dimensional evolution mapping on the refresh load prediction data combined with the real-time acquisition results of a preset temperature sensor to obtain a temperature evolution curve is achieved by loading a series of distributed temperature nodes inside the device. After these nodes are associated with the phase offset reference, they compare the real-time sampled data stream with the previously measured load prediction data. The multi-dimensional evolution algorithm generates a temperature-load coupling curve in the form of coordinate transformation or Lagrange interpolation by relating the temperature changes in different time periods to the refresh load changes. This curve sequences the impacts of different refresh intensities on the ambient temperature and can be represented by the function where is the sampling time step, is the brightness level. During the calculation process, the temperature samples are first segmented according to the rising or falling trend and then matched point by point with the load prediction matrix, and then one or more temperature evolution curves are output to indicate the impact amplitude of future temperature rise on the refresh request.
[0064] According to the temperature evolution curve, the process of differentiating the high-brightness refresh requests of the front panel from the low-power refresh requests of the rear panel to obtain the load priority order of different signal channels in a specific temperature range first requires extracting the temperature critical section from the temperature evolution curve and mapping it with the refresh priority indexes of the front and rear panels at different brightness levels. If it is detected that the temperature rise rate of the front panel in the high-brightness state far exceeds the expectation, the refresh time slice of this panel will be temporarily increased or the priority will be set to a higher level to timely complete the continuous output of high-brightness display. If the temperature amplitude of the rear panel is still in a relatively stable range, the refresh request of the rear panel can be placed at a lower priority. Threshold determination can be used for such mapping results. Once the temperature exceeds a certain preset limit, the channel identifiers of the corresponding panel are reordered within this temperature range. In this way, when the high- and low-power panels are driven in parallel, the load priority order can be dynamically updated with the temperature change to ensure that each channel has a proper timing allocation strategy in the high-temperature section or the high-speed refresh stage.
[0065] According to the load priority order, the available timing resources of the front and rear panels are comprehensively allocated and processed. The process of obtaining the multi-panel dynamic load allocation parameters is based on linear programming or mixed-integer programming algorithms. The refresh windows and available clock cycles of the front and rear panels are regarded as a set of constraint equations, the priority order is transformed into constraint conditions, and the timing resources of different channels are solved. Let the set of available timing resources be \(\Omega\). Arrange the mapped refresh priorities in sequence within this set. If a certain channel is in the high-brightness refresh mode within the high-temperature range, give a larger proportion of the timing segments in the feasible solution space and assign a higher weight coefficient to the cost function, so as to obtain a solution vector that can maximize the satisfaction of the refresh requirements of both panels simultaneously. This solution vector can record the usage permissions and refresh rates of each channel in each time slice. The finally output multi-panel dynamic load allocation parameters can reasonably balance the operating states of the front and rear panels and maintain synchronous timing under the temperature and load coupling conditions.
[0066] 103. Based on the multi-panel dynamic load allocation parameters, synchronously refresh the front and rear panels to obtain an initial synchronous refresh result, and adjust the refresh order and the main clock reference of the back panel according to the initial synchronous refresh result and the temperature accumulation situation to obtain a front-end and back-end fusion phase correction sequence;
[0067] In an embodiment of the present invention, the step of based on the multi-panel dynamic load allocation parameters, synchronously refreshing the front and rear panels to obtain an initial synchronous refresh result, and adjusting the refresh order and the main clock reference of the back panel according to the initial synchronous refresh result and the temperature accumulation situation to obtain a front-end and back-end fusion phase correction sequence includes: performing parallel phase processing on the channel drive signals of the front panel and the back panel according to the multi-panel dynamic load allocation parameters, and based on the parallel phase processing, obtaining an initial synchronous refresh result; performing temperature accumulation evaluation processing on the initial synchronous refresh result to obtain the current temperature rise curve and the high-brightness channel load data; according to the current temperature rise curve and the high-brightness channel load data, performing timing fine-tuning processing on the refresh order of the back panel and performing limited phase correction on the main clock reference to match the high-speed output interval of the front panel; after completing the timing fine-tuning processing and phase correction, generating a front-end and back-end fusion phase correction sequence that can reflect the synchronous relationship between the front and rear channels.
[0068] Specifically, according to the multi-panel dynamic load distribution parameters, the channel drive signals of the front panel and the back panel are processed in parallel in terms of phase. The process of obtaining the initial synchronous refresh result based on the parallel phase processing first requires loading the load distribution parameters in the logic control unit and uniformly scheduling the multi-channels according to the refresh priority and duty cycle limit recorded therein. To ensure that each channel achieves phase alignment under the same reference clock, a phase-locked loop (PLL) group can be placed in the hardware circuit, and the instantaneous phase drift is calculated by monitoring the rising edge moment of each channel, so that the channel at the moment the phase offset of is denoted as . Once it is detected that any channel has a phase out-of-bounds or does not match the reference phase, the phase-locked loop will start interpolation calculation, and distribute the phase error proportionally to several adjacent refresh cycles, so that the overall phase distribution gradually converges to the established threshold. In specific implementation, the comprehensive phase error is satisfied
[0069] ;
[0070] wherein is the weight coefficient of channel , which is used to reflect the influence of different channels on the global phase synchronization. After calculating , the control unit will synchronously lock the refresh actions of all channels to a unified phase window by fine-tuning the start and stop moments of the channel drive signals in real time, and record the effective output cycle and data transmission completion time of each channel. The initial synchronous refresh result generated by this process will include the synchronous completion flags of all current channels and refined phase correction records, which are used for subsequent cross-comparison with the temperature accumulation status and performing phase fine-tuning operations. The process of obtaining the current temperature rise curve and the high-brightness channel load data by performing temperature accumulation evaluation processing on the initial synchronous refresh result is dynamically called between the temperature acquisition module and the high-brightness monitoring channel of the front panel. First, the temperature acquisition module periodically reads the values of several thermal sensors distributed on the surfaces of the front and back panels and near the drive circuit. And splice these continuous samplings into a temperature stack according to the time series, and use the notation to represent the temperature of channel at the sampling moment . Then, for the high-brightness channels in the front panel, read the actual power and peak current data of this channel during this synchronous refresh, and compare this information with the synchronous completion time output by the previous phase-locked loop to obtain the power consumption distribution map of the high-brightness output segment. By statistically calculating the temperature increment and the change of the drive current of the high-brightness channel within a certain time window, a temperature accumulation curve can be formed. Let the power of the high-brightness channel at the refresh cycle be denoted as , and an approximate model can be established for the temperature evolution function , where is the thermal coupling coefficient related to the characteristics of the device materials. After fitting this model to the existing samples, the current temperature rise curve can be generated, and the local heat peak section caused by the high-brightness channel load can be located on this curve. This output can reflect the temperature change trend after synchronous refresh, providing quantitative data support for subsequent fine-tuning of the refresh order and correction of the master clock reference.
[0071] According to the current temperature rise curve and the high-brightness channel load data, the process of performing timing fine-tuning on the refresh order of the back panel and performing limited phase correction on the master clock reference to match the high-speed output interval of the front panel requires the use of the channel timing information recorded in the initial synchronous refresh result and the high-brightness load index accumulated in the temperature acquisition module. To enable the back panel to maintain a relatively stable refresh rhythm when the front panel is overheated or has high-brightness output, the intersection point of the current temperature rise amplitude of the front panel and the high-brightness channel power can be extracted before the fine-tuning process, and it can be determined whether the time interval where this point is located is close to the established refresh time slot of the back panel. If heat accumulation and high-speed load overlap, exchange or delay the refresh order in the refresh queue list of the back panel channels to reduce the synchronization conflict with the front panel. At the same time, set a phase correction threshold for the master clock reference, so that within a certain temperature or load boundary, only a small amount of phase-locked correction is performed for phase correction, preventing large-scale fluctuations in the reference clock of the entire system. The correction formula can be recorded as
[0072] ;
[0073] where is the maximum phase offset of the previous correction, is the weight constant controlling the phase adjustment amplitude, is the reference power value within the safety interval. In this way, a reasonable timing gap is maintained between the front and back panels during the high-brightness stage, so that a relatively stable phase correlation can still be maintained under rapid temperature rise. After completing the timing fine-tuning process and phase correction, the process of generating the front-end and back-end fusion phase correction sequence reflecting the synchronization relationship between the front and back channels organizes the above fine-tuning operations and clock correction records into a correction record table with time stamps and channel labels. This table will contain the delay displacement experienced by each channel during the refresh process, the change in load priority it participates in, and the correction amount of the master clock reference. These information can be encoded as a sequence , where represents the moment Phase adjustment actions are performed on channels or clock references, along with indicators such as temperature, power consumption, and phase drift. After connecting all the correction terms in chronological order, a front-end and back-end integrated phase correction sequence can be formed, which can be used in subsequent refresh cycles or dynamic loading to determine whether small adjustments need to be repeated or restored to a higher refresh rate. Through this global record, different channels can refer to the same set of timing cues in scenarios of high-speed output or sudden heat increase, avoiding large-scale phase misalignment in the next refresh phase. This sequence can also be called during subsequent monitoring phases to form a closed-loop dynamic control process.
[0074] 104. Use the front-end and back-end integrated phase correction sequence to continuously monitor the dual-sided display device, obtain the real-time phase offset value, and adjust and control the refresh frequency of the dual-sided display device according to the real-time phase offset value and the multi-panel dynamic load distribution parameters.
[0075] In an embodiment of the present invention, the step of using the front-end and back-end integrated phase correction sequence to continuously monitor the dual-sided display device, obtain the real-time phase offset value, and adjust and control the refresh frequency of the dual-sided display device according to the real-time phase offset value and the multi-panel dynamic load distribution parameters includes: synchronously tracking and processing the front-end and back-end integrated phase correction sequence within a periodic time window to obtain the current phase acquisition data of each signal channel; performing a comparison operation between the actual outputs of the front and back panels and the correction sequence according to the phase acquisition data to obtain the real-time phase offset value; and performing a limiting adjustment process on the refresh frequencies of the front panel and the back panel according to the real-time phase offset value and the multi-panel dynamic load distribution parameters.
[0076] Specifically, the process of synchronously tracking and processing the front-end and back-end integrated phase correction sequence within a periodic time window to obtain the current phase acquisition data of each signal channel first sets a dynamically configurable synchronous measurement period in the main clock management unit, and the length of this period is jointly determined by the upper limit of the device's refresh frequency and the minimum sampling interval. When entering each measurement cycle, the phase-locked loop (PLL) control circuit reads the key markers in the front-end and back-end integrated phase correction sequence, and these markers indicate the reference phase that each channel should follow in the refresh action after the previous timing fine-tuning and phase correction. Subsequently, the PLL circuit sends a synchronous trigger signal to the channel drivers of the front and back panels, captures the output level waveforms of the channels before and after the trigger point, and converts these waveforms into a set of acquisition data with timestamps through high-speed sampling. Denote the sampling result of channel in the period as , where represents discrete sampling instants. For each channel, the control unit reads the positions of the rising and falling edges of the waveform of that channel at the end of the measurement period, and calculates the difference from the phase targets calibrated in the sequence. If a large deviation occurs, the measurement module will record this deviation incrementally in a scratch table for further operations in subsequent correction cycles. After processing all channels, the system performs interpolation and denoising operations on the acquired waveform data, and then outputs a set of phase characteristic values. A threshold can be set to determine whether each channel exceeds the reasonable range. If , where represents the theoretical reference waveform of that channel under the guidance of the correction sequence, then a priority flag is set for that channel before the next synchronous refresh to remind subsequent steps to perform fine-tuning of amplitude limiting or timing offset. Through this periodic synchronous tracking process, high-precision phase measurement can be completed within a short time window, and the phase acquisition data of all current signal channels can be obtained, providing a quantifiable input vector for the subsequent comparison operation link. According to the phase acquisition data, the comparison operation process between the actual outputs of the front and rear panels and the correction sequence is carried out in the arithmetic module of the central controller. This module first reads the phase acquisition data obtained in the previous stage, and indexes the phase reference values specified for each channel in the front-end and rear-end fusion phase correction sequence. Denote the theoretical reference curve of channel as , and the measured waveform as . To implement the comparison process at the level of executable operators, the system calculates the phase difference between the two in the frequency domain or the time domain respectively. If time-domain analysis is adopted, the cross-correlation function can be used to measure the waveform matching degree, and with to make reach the maximum value to obtain , and then convert it to a phase quantity with , where is the angular frequency of the refresh signal. If frequency-domain analysis is adopted, the phase components of the measured and reference waveforms can be compared in the frequency components through short-time Fourier transform or discrete Fourier transform, and the difference in the main peak frequency band is denoted as . No matter which method is adopted, finally the real-time phase offset value of channel will be generated and stored in the vector . After the system completes the phase difference operation for each channel, it uses the correlation degree to judge whether there is coupling interference between channels, and groups the channels with high correlation and simultaneous offset into the same group, so as to perform collaborative amplitude limiting or priority change on them when adjusting the refresh frequency later. The real-time phase offset value generated by this process can reflect the matching degree between the actual output status of the current front and rear panels and the correction sequence.
[0077] The process of performing amplitude limiting adjustment on the refresh frequencies of the front panel and the back panel according to the real-time phase shift value and the multi-panel dynamic load distribution parameters is executed in the refresh scheduling engine. The refresh scheduling engine first reads the vector obtained from the previous text, and constructs a solvable amplitude limiting strategy matrix in comparison with information such as the channel priorities, brightness expectations, and power consumption upper limits in the multi-panel dynamic load distribution parameters. This matrix can be defined as , where is used to indicate the channel in the load distribution scenario under the refresh upper limit. If the measured phase shift exceeds the specified threshold , then the effective refresh range of is corrected downward so that this channel maintains a lower proportion or lower frequency in subsequent synchronous refreshes. In actual operations, the matrix can be solved according to the linear programming method, and the objective function can be defined as , where represents the refresh frequency of the channel , and is the priority coefficient of this channel in the multi-panel dynamic load distribution parameters. If exceeds the critical range, then the constraint is introduced to limit the refresh step size that this channel can increase or decrease in each round, thereby completing the amplitude limiting adjustment of the refresh frequency. Applying the newly obtained refresh frequency configuration to the next round of synchronous refresh can suppress the further expansion of phase drift while maintaining the double-sided load balance. After completing this amplitude limiting process, the scheduling engine will archive the new frequency allocation result and update the control parameters of the phase-locked loop, so that the entire system can still perform cyclic dynamic correction based on the real-time monitored data stream in subsequent cycles, ensuring that the phase coordination of the double-sided display device remains within a reasonable range.
[0078] In this embodiment, through multi-channel timing analysis of the front and back panels, the initial delay characteristics and temperature distribution data of the signal lines are obtained, and the phase mismatch range is evaluated based on this to obtain the initial phase shift reference; then, the refresh load of the double-sided panel is predicted based on this reference, and the refresh requests of the front and back panels are distinguished in combination with temperature evolution to generate multi-panel dynamic load distribution parameters; based on the parameters, synchronous refresh of the front and back panels is performed and the temperature accumulation situation is evaluated, and the back panel refresh order and the main clock reference are adjusted to generate a front-end and back-end integrated phase correction sequence; finally, continuous monitoring is performed using the correction sequence to obtain the real-time phase shift value, and the refresh frequency is adjusted accordingly. This method can significantly reduce ghosting and synchronization errors in double-sided displays under high-speed or high-brightness conditions.
[0079] The control method of the dual-sided display device in the embodiments of the present invention has been described above. Next, the control device of the dual-sided display device in the embodiments of the present invention will be described. For the control device of the dual-sided display device, please refer to Figure 2 , an embodiment of the control device of the dual-sided display device in the embodiments of the present invention includes:
[0080] A multi-channel timing analysis module 201, configured to perform multi-channel timing analysis on the front and rear panels of the dual-sided display device to obtain the initial delay characteristics and temperature distribution data of the signal lines of the dual-sided display device, and evaluate the potential phase mismatch range of different signal channels according to the initial delay characteristics and temperature distribution data to obtain an initial phase offset reference;
[0081] A refresh load prediction module 202, configured to predict the refresh load of the dual-sided panels of the dual-sided display device according to the initial phase offset reference to obtain refresh load prediction data, and based on the refresh load prediction data, combine the temperature evolution to distinguish and process the refresh requests of the front and rear panels to obtain multi-panel dynamic load distribution parameters;
[0082] A synchronous refresh adjustment module 203, configured to perform synchronous refresh on the front and rear panels based on the multi-panel dynamic load distribution parameters to obtain an initial synchronous refresh result, and adjust the refresh sequence and the main clock reference of the back panel according to the initial synchronous refresh result and the temperature accumulation situation to obtain a front-end and back-end fusion phase correction sequence;
[0083] A continuous monitoring and correction module 204, configured to continuously monitor the dual-sided display device by using the front-end and back-end fusion phase correction sequence to obtain a real-time phase offset value, and adjust and control the refresh frequency of the dual-sided display device according to the real-time phase offset value and the multi-panel dynamic load distribution parameters.
[0084] In the embodiments of the present invention, the control device of the dual-sided display device runs the above control method of the dual-sided display device. The control device of the dual-sided display device obtains the initial delay characteristics and temperature distribution data of the signal lines by performing multi-channel timing analysis on the front and rear panels, and evaluates the phase mismatch range based on this to obtain an initial phase offset reference; then predicts the refresh load of the dual-sided panels according to this reference, combines the temperature evolution to distinguish the refresh requests of the front and rear panels, and generates multi-panel dynamic load distribution parameters; performs synchronous refresh on the front and rear panels based on the parameters and evaluates the temperature accumulation situation, adjusts the refresh sequence of the back panel and the main clock reference, and generates a front-end and back-end fusion phase correction sequence; finally, uses the correction sequence for continuous monitoring to obtain a real-time phase offset value and adjusts the refresh frequency accordingly. This method can significantly reduce the ghosting and synchronization errors of dual-sided display under high-speed or high-brightness conditions.
[0085] Above Figure 2The control device of the double-sided display device in the embodiments of the present invention will be described in detail from the perspective of modular functional entities. Next, the control device of the double-sided display device in the embodiments of the present invention will be described in detail from the perspective of hardware processing.
[0086] Figure 3 FIG. 4 is a schematic structural diagram of a control device of a double-sided display device provided by an embodiment of the present invention. The control device 300 of the double-sided display device may vary greatly due to different configurations or performances, and may include one or more processors (central processing units, CPU) 310 (for example, one or more processors) and a memory 320, and one or more storage media 330 (for example, one or more mass storage device terminals) for storing application programs 333 or data 332. Among them, the memory 320 and the storage media 330 may be transient storage or persistent storage. The program stored in the storage media 330 may include one or more modules (not shown in the figure), and each module may include a series of instruction operations on the control device 300 of the double-sided display device. Further, the processor 310 may be configured to communicate with the storage media 330 and execute a series of instruction operations in the storage media 330 on the control device 300 of the double-sided display device to implement the steps of the control method of the double-sided display device described above.
[0087] The control device 300 of the double-sided display device may further include one or more power supplies 340, one or more wired or wireless network interfaces 350, one or more input / output interfaces 360, and / or one or more operating systems 331, such as Windows Serve, Mac OS X, Unix, Linux, FreeBSD, and so on. Those skilled in the art can understand that Figure 3 the shown structural diagram of the control device of the double-sided display device does not constitute a limitation on the control device of the double-sided display device provided by the present invention, and may include more or fewer components than shown, or combine certain components, or have different component arrangements.
[0088] The present invention also provides a computer-readable storage medium, which may be a non-volatile computer-readable storage medium or a volatile computer-readable storage medium. Instructions are stored in the computer-readable storage medium, and when the instructions are run on a computer, the computer is made to execute the steps of the control method of the double-sided display device.
[0089] Those skilled in the art can clearly understand that for the convenience and conciseness of description, the specific working processes of the above-described system, device, or unit may refer to the corresponding processes in the foregoing method embodiments and will not be repeated here.
[0090] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs that can store program codes.
[0091] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of various embodiments of the present invention.
Claims
1. A control method for a double-sided display device, characterized in that: The control method of the double-sided display device comprises: Performing multi-channel timing analysis on the front and rear panels of the double-sided display device to obtain initial delay characteristics and temperature distribution data of the signal lines of the double-sided display device, and evaluating the potential phase mismatch range of different signal channels based on the initial delay characteristics and temperature distribution data to obtain an initial phase offset reference; According to the initial phase shift reference, the refresh load of the double-sided panel of the double-sided display device is predicted to obtain refresh load prediction data, and based on the refresh load prediction data, the refresh requests of the front and rear panels are differentiated and processed in combination with temperature evolution to obtain multi-panel dynamic load distribution parameters; Based on the multi-panel dynamic load distribution parameters, the front and rear panels are synchronously refreshed to obtain an initial synchronous refresh result, and according to the initial synchronous refresh result and the temperature accumulation, the refresh order and the main clock reference of the rear panel are adjusted to obtain a front-end and rear-end fusion phase correction sequence; The front-end and rear-end fusion phase correction sequence is used to continuously monitor the double-sided display device to obtain a real-time phase offset value, and the refresh frequency of the double-sided display device is adjusted and controlled according to the real-time phase offset value and the multi-panel dynamic load distribution parameter.
2. The control method of the double-sided display device according to claim 1, characterized in that: The multi-channel timing analysis is performed on the front and rear panels of the double-sided display device to obtain the initial delay characteristics and temperature distribution data of the signal lines of the double-sided display device, and the potential phase mismatch range of different signal channels is evaluated based on the initial delay characteristics and temperature distribution data to obtain the initial phase offset benchmark, which includes: Performing synchronous sampling processing on multi-channel driving signals of the front and rear panels of the double-sided display device to obtain a multi-channel initial sampling sequence; According to the multi-channel initial sampling sequence, performing interval analysis processing on the delay waveform of each signal line of the double-sided display device in the startup phase to obtain an initial delay feature; Perform segmented comparison processing on the distributed thermal sensing data of the front panel and the back panel to obtain temperature distribution data; According to the initial delay characteristics and temperature distribution data, phase mismatch inference processing is performed on the coupling regions of different signal channels to obtain an initial phase offset reference.
3. The control method of the double-sided display device according to claim 2, characterized in that: The performing phase mismatch amount inference processing on the coupling regions of different signal channels according to the initial delay characteristics and the temperature distribution data to obtain the initial phase offset reference comprises: Performing differential induction processing on the initial delay characteristics to obtain a delay classification index, and performing coupling region marking processing on the temperature distribution data according to the delay classification index to obtain a coupling marking matrix; Performing phase offset measurement processing on each signal channel in the coupling mark matrix to obtain a phase mismatch coefficient group; According to the phase mismatch coefficient group, a benchmark inference process is performed on the multi-channel driving signal of the double-sided display device to obtain an initial phase offset benchmark.
4. The control method of the double-sided display device according to claim 1, characterized in that: The refresh load of the double-sided panel of the double-sided display device is predicted according to the initial phase shift reference to obtain refresh load prediction data, and based on the refresh load prediction data, the refresh requests of the front and rear panels are differentiated and processed in combination with the temperature evolution to obtain the multi-panel dynamic load distribution parameters, including: According to the initial phase shift reference, load prediction processing is performed on the driving current and refresh frequency of the front and rear panels at different brightness levels to obtain refresh load prediction data; Performing multi-dimensional evolution mapping processing on the refreshed load prediction data in combination with the real-time acquisition results of the preset temperature sensor to obtain a temperature evolution curve; According to the temperature evolution curve, a high brightness refresh request of the front panel and a low power refresh request of the rear panel are distinguished and processed to obtain a load priority order of different signal channels in a specific temperature range; According to the load priority order, the available timing resources of the front and rear panels are comprehensively allocated to obtain multi-panel dynamic load allocation parameters.
5. The control method of the double-sided display device according to claim 1, characterized in that: Based on the multi-panel dynamic load distribution parameter, the front and rear panels are synchronously refreshed to obtain an initial synchronous refresh result, and according to the initial synchronous refresh result and the temperature accumulation, the refresh sequence and the main clock reference of the rear panel are adjusted to obtain the front and rear end fusion phase correction sequence, which includes: According to the multi-panel dynamic load distribution parameters, phase parallel processing is performed on the channel driving signals of the front panel and the back panel, and phase parallel processing is performed based on the phase parallel processing to obtain an initial synchronous refresh result; Performing temperature accumulation evaluation processing on the initial synchronous refresh result to obtain a current temperature rise curve and high brightness channel load data; According to the current temperature rise curve and the high brightness channel load data, the refresh sequence of the back panel is fine-tuned, and the main clock reference is corrected to a limited extent to match the high-speed output range of the front panel; After completing the timing fine-tuning process and phase correction, a front-end and rear-end fusion phase correction sequence that can reflect the synchronization relationship between the front and rear channels is generated.
6. The control method of the double-sided display device according to claim 1, characterized in that: The method of continuously monitoring the double-sided display device by using the front-end and rear-end fusion phase correction sequence to obtain a real-time phase offset value, and adjusting and controlling the refresh frequency of the double-sided display device according to the real-time phase offset value and the multi-panel dynamic load distribution parameter includes: Performing synchronous tracking processing on the front-end and back-end fusion phase correction sequence within a periodic time window to obtain current phase acquisition data of each signal channel; According to the phase acquisition data, the actual output of the front and rear panels is compared with the correction sequence to obtain a real-time phase offset value; According to the real-time phase offset value and the multi-panel dynamic load distribution parameter, the refresh frequencies of the front panel and the back panel are limited and adjusted.
7. A control device for a double-sided display device, characterized in that: The control device of the double-sided display device comprises: A multi-channel timing analysis module is used to perform multi-channel timing analysis on the front and rear panels of the double-sided display device to obtain the initial delay characteristics and temperature distribution data of the signal lines of the double-sided display device, and evaluate the potential phase mismatch range of different signal channels based on the initial delay characteristics and temperature distribution data to obtain an initial phase offset reference; A refresh load prediction module, used to predict the refresh load of the double-sided panel of the double-sided display device according to the initial phase offset reference, obtain refresh load prediction data, and distinguish and process the refresh requests of the front and rear panels based on the refresh load prediction data in combination with temperature evolution to obtain multi-panel dynamic load distribution parameters; A synchronous refresh adjustment module, for synchronously refreshing the front and rear panels based on the multi-panel dynamic load distribution parameters to obtain an initial synchronous refresh result, and adjusting the refresh sequence and the main clock reference of the rear panel according to the initial synchronous refresh result and the temperature accumulation to obtain a front-end and rear-end fusion phase correction sequence; The continuous monitoring and correction module is used to continuously monitor the double-sided display device using the front-end and back-end fusion phase correction sequence to obtain a real-time phase offset value, and adjust and control the refresh frequency of the double-sided display device according to the real-time phase offset value and the multi-panel dynamic load distribution parameter.
8. A control device for a double-sided display device, characterized in that: The control device of the double-sided display device comprises: a memory and at least one processor, wherein instructions are stored in the memory; The at least one processor calls the instruction in the memory to enable the control device of the double-sided display device to execute the steps of the control method of the double-sided display device according to any one of claims 1 to 6.
9. A computer-readable storage medium having instructions stored thereon, characterized in that: When the instructions are executed by the processor, the steps of the control method of the double-sided display device as described in any one of claims 1 to 6 are implemented.
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