RRAM device conductance state non-uniform ultra-precision verification method, device and equipment

Abstract

The application relates to a non-uniform super-precision verification method, device and equipment for a conductance state of an RRAM device, and the method comprises the following steps: based on a preset non-uniform division strategy and a conductance range, the conductance state of the RRAM device is non-uniformly divided into a plurality of conductance state intervals; the corresponding verification data of each conductance state interval of the RRAM device is prestored, and a preset verification mode ADC circuit is used to read the current conductance state of each conductance state interval; based on the current conductance state of each conductance state interval and the corresponding verification data of each conductance state interval, after the data verification is determined to be successful, the actual conductance state of the RRAM device is read by using a preset reading mode ADC circuit. Therefore, the existing programmable conductance range division mode of uniformly dividing the conductance interval can solve the problems that the conductance of the RRAM device in the middle conductance state is more prone to drift, and more tolerance space is left for the RRAM device in the middle conductance state, and the influence of RRAM state drift on reading accuracy is reduced.

Description

Technical Field

[0001] This application relates to the field of RRAM memory technology, and in particular to a method, apparatus and device for ultra-precise verification of non-uniform conductivity state of RRAM devices. Background Technology

[0002] RRAM memory is a new type of non-volatile memory, and RRAM-based storage technology has made significant progress in the past decade or so. RRAM storage technology has huge advantages in non-volatility and high device density. At the same time, the storage capacity of RRAM devices has begun to expand from single-bit storage to multi-bit storage, and RRAM storage technology is developing towards even higher data storage density.

[0003] RRAM multi-bit storage technology requires dividing the programmable conductance range of the RRAM into various conductance intervals, and then encoding each sub-interval. Current RRAM multi-bit storage technologies often involve uniformly dividing the programmable conductance range of the RRAM and then performing the corresponding encoding.

[0004] However, the data stability of multi-bit storage in RRAM devices is still affected by the device's non-ideal characteristics. Compared to the conductive filaments of RRAM devices in high and low conductivity states, the conductive filaments of RRAM devices in intermediate conductivity states are more unstable. RRAM devices in intermediate conductivity states are more prone to physical state drift after successful programming, causing the conductivity state to deviate from the target conductivity range. Figure 1 As shown, the existing programmable conductance range division method that uniformly divides the conductance interval does not distinguish between the high, medium and low conductance intervals of RRAM devices. Data stored in RRAM devices in the middle conductance state is more prone to errors. Summary of the Invention

[0005] This application provides a method, apparatus, and device for ultra-precise verification of the non-uniform conductivity state of RRAM devices, in order to solve the problem that existing programmable conductivity range division methods that uniformly divide conductivity intervals make the conductivity of RRAM devices in intermediate conductivity states more prone to drift.

[0006] The first aspect of this application provides a method for high-precision verification of the non-uniform conductivity state of an RRAM device, comprising the following steps: dividing the conductivity state of the RRAM device into multiple conductivity state intervals based on a preset non-uniform partitioning strategy and conductivity range; pre-storing corresponding verification data for each conductivity state interval of the RRAM device, and reading the current conductivity state of each conductivity state interval using a preset verification mode ADC circuit; and, based on the current conductivity state of each conductivity state interval and the verification data corresponding to each conductivity state interval, determining that the data verification is successful, and then reading the actual conductivity state of the RRAM device using a preset readout mode ADC circuit.

[0007] Optionally, the preset verification mode ADC circuit includes multiple comparators and verification encoding logic. The step of reading the current conductance state of each conductance state interval using the preset verification mode ADC circuit includes: acquiring a first voltage signal generated based on the current signal generated by the RRAM device; identifying the first voltage signal based on the multiple comparators; and verifying the first identification result using the verification encoding logic to obtain the current conductance state of each conductance state interval.

[0008] Optionally, the preset readout mode ADC circuit includes some comparators among the plurality of comparators and the readout encoding logic of the verification encoding logic. The step of reading the actual conductance state of the RRAM device using the preset readout mode ADC circuit includes: acquiring a second voltage signal generated based on the current signal generated by the RRAM device; identifying the second voltage signal based on the plurality of comparators; and reading the second identification result using the readout encoding logic to obtain the actual conductance state of the RRAM device.

[0009] Optionally, after reading the current conductance state of each conductance state interval based on a preset verification precision, the method further includes: determining whether the current conductance state of each conductance state interval and the verification data corresponding to the corresponding conductance state interval meet a preset matching condition; if the current conductance state of each conductance state interval and the verification data corresponding to the corresponding conductance state interval meet the preset matching condition, then the data verification is determined to be successful.

[0010] Optionally, the verification accuracy of the preset verification mode ADC circuit is greater than the reading accuracy of the preset reading mode ADC circuit.

[0011] A second aspect of this application provides an ultra-precise verification device for the non-uniform conductivity state of an RRAM device, comprising: a non-uniform partitioning module, configured to non-uniformly partition the conductivity state of the RRAM device into multiple conductivity state intervals based on a preset non-uniform partitioning strategy and conductivity range; a reading module, configured to pre-store corresponding verification data for each conductivity state interval of the RRAM device, and read the current conductivity state of each conductivity state interval using a preset verification mode ADC circuit; and a verification module, configured to, based on the current conductivity state of each conductivity state interval and the verification data corresponding to each conductivity state interval, determine that the data verification is successful, and then read the actual conductivity state of the RRAM device using a preset reading mode ADC circuit.

[0012] Optionally, the reading module is further configured to: acquire a first voltage signal generated based on the current signal generated by the RRAM device; identify the first voltage signal based on the plurality of comparators, and verify the first identification result using the verification coding logic to obtain the current conductance state of each conductance state interval.

[0013] Optionally, the verification module is further configured to: acquire a second voltage signal generated based on the current signal generated by the RRAM device; identify the second voltage signal based on the plurality of comparators, and use the readout encoding logic to read the second identification result to obtain the actual conductance state of the RRAM device.

[0014] Optionally, after reading the current conductance state of each conductance state interval based on a preset verification precision, the verification module is further configured to: determine whether the current conductance state of each conductance state interval and the verification data corresponding to the corresponding conductance state interval meet a preset matching condition; if the current conductance state of each conductance state interval and the verification data corresponding to the corresponding conductance state interval meet the preset matching condition, then the data verification is determined to be successful.

[0015] Optionally, the verification accuracy of the preset verification mode ADC circuit is greater than the reading accuracy of the preset reading mode ADC circuit.

[0016] A third aspect of this application provides an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor. The processor executes the program to implement the RRAM device conductance state non-uniform ultra-precision verification method as described in the above embodiments.

[0017] A fourth aspect of this application provides a computer program product having a computer program stored thereon, which is executed by a processor to implement the RRAM device conductance state non-uniform ultra-precision verification method as described in the above embodiments.

[0018] In the above embodiments, based on a preset non-uniform partitioning strategy and conductance range, the conductance state of the RRAM device is non-uniformly divided into multiple conductance state intervals. Corresponding verification data is pre-stored for each conductance state interval of the RRAM device, and a preset verification mode ADC circuit is used to read the current conductance state of each conductance state interval. Based on the current conductance state of each conductance state interval and the corresponding verification data, after successful data verification, the actual conductance state of the RRAM device is read using a preset readout mode ADC circuit. This solves the problem that existing uniformly partitioned programmable conductance range partitioning methods make the conductance of RRAM devices in intermediate conductance states more prone to drift. It achieves a narrowing of the individual state distribution of the RRAM device after programming, providing tolerance space for non-ideal factors such as RRAM device state drift, and providing more tolerance space for RRAM devices in intermediate conductance states, thereby reducing the impact of RRAM state drift on readout accuracy.

[0019] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0020] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein:

[0021] Figure 1 This is a schematic diagram of a uniform partitioning method for the conductance states of RRAM;

[0022] Figure 2 This is a flowchart of a method for high-precision verification of non-uniform conductivity states of an RRAM device according to an embodiment of this application;

[0023] Figure 3 This is a schematic diagram of a non-uniform partitioning method of RRAM conductance states according to an embodiment of this application;

[0024] Figure 4 This is a schematic diagram of a multi-bit storage ultra-precision verification method for an RRAM device according to an embodiment of this application;

[0025] Figure 5 This is a schematic diagram of a non-uniform ultra-precision verification method for the conductance state of an RRAM device according to an embodiment of this application;

[0026] Figure 6 This is a schematic diagram of a verification mode ADC structure according to an embodiment of this application;

[0027] Figure 7 This is a schematic diagram of a readout mode ADC structure according to an embodiment of this application;

[0028] Figure 8 This is a schematic diagram of an RRAM device conductivity state non-uniformity ultra-precision verification device according to an embodiment of this application;

[0029] Figure 9 This is a schematic diagram of the structure of an electronic device according to an embodiment of this application. Detailed Implementation

[0030] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.

[0031] The following describes a method, apparatus, and device for ultra-precise verification of the non-uniform conductivity state of RRAM devices according to embodiments of this application, with reference to the accompanying drawings. Addressing the problem mentioned in the background art where existing programmable conductivity range division methods for uniformly dividing conductivity intervals make RRAM devices in intermediate conductivity states more prone to conductivity drift, this application provides a method for ultra-precise verification of the non-uniform conductivity state of RRAM devices. In this method, based on a preset non-uniform division strategy and conductivity range, the conductivity state of the RRAM device is non-uniformly divided into multiple conductivity state intervals. Corresponding verification data is pre-stored for each conductivity state interval of the RRAM device. A preset verification mode ADC circuit is used to read the current conductivity state of each conductivity state interval. Based on the current conductivity state of each conductivity state interval and the corresponding verification data, after determining that the data verification is successful, the actual conductivity state of the RRAM device is read using a preset read mode ADC circuit. This solves the problem that existing programmable conductance range division methods with uniformly divided conductance intervals make RRAM devices in intermediate conductance states more prone to conductance drift. It achieves narrowing of the distribution of individual states of RRAM devices after programming, leaving tolerance space for non-ideal factors such as RRAM device state drift, and at the same time leaving more tolerance space for RRAM devices in intermediate conductance states, thereby reducing the impact of RRAM state drift on readout accuracy.

[0032] Specifically, Figure 2 This is a flowchart illustrating a method for high-precision verification of non-uniform conductivity states of RRAM devices provided in an embodiment of this application.

[0033] like Figure 2 As shown, the method for high-precision verification of non-uniform conductivity states of the RRAM device includes the following steps:

[0034] In step S201, based on a preset non-uniform partitioning strategy and conductivity range, the conductivity state of the RRAM device is non-uniformly divided into multiple conductivity state intervals.

[0035] In step S202, corresponding verification data is pre-stored for each conductance state interval of the RRAM device, and the current conductance state of each conductance state interval is read using a preset verification mode ADC circuit.

[0036] In step S203, based on the current conductance state of each conductance state interval and the corresponding verification data of each conductance state interval, after determining that the data verification is successful, the actual conductance state of the RRAM device is read using the preset reading mode ADC circuit.

[0037] Optionally, in some embodiments, after reading the current conductance state of each conductance state interval based on a preset verification precision, the method further includes: determining whether the current conductance state of each conductance state interval and the verification data corresponding to the corresponding conductance state interval meet a preset matching condition; if the current conductance state of each conductance state interval and the verification data corresponding to the corresponding conductance state interval meet the preset matching condition, the data verification is determined to be successful.

[0038] Optionally, in some embodiments, the verification accuracy of the preset verification mode ADC circuit is greater than the reading accuracy of the preset reading mode ADC circuit.

[0039] Because the conductance of RRAM devices in intermediate conductance states is more prone to drift, this application employs a pre-defined non-uniform partitioning strategy to divide the conductance range of the intermediate conductance state into a wider range, such as... Figure 3 As shown, this provides a larger tolerance margin for conductivity drift in the intermediate conductivity state.

[0040] To achieve multi-bit storage capability in a single RRAM device, the programming verification process achieves higher precision identification and a more compact conductance distribution to compensate for the impact of non-ideal characteristics such as device drift on the read process results. For 2-bit RRAM device storage, the verification process uses 3-bit verification precision, while the normal read process uses 2-bit read precision. For example... Figure 4 As shown, the individual devices store 00, 01, 10, and 11, which correspond to the check data 000, 010, 100, and 110, respectively.

[0041] Therefore, combining the aforementioned non-uniform partitioning method of RRAM conductance states and the ultra-precision verification method of RRAM devices, this application proposes an ultra-precision verification method for non-uniform conductance states of RRAM devices, such as... Figure 5 As shown.

[0042] For storage using multiple 2-bit RRAM devices, the verification process uses 3-bit parity, while the normal read process uses 2-bit read precision. Figure 5As shown, a single device stores 00, 01, 10, and 11, which correspond to the verification data 000, 010, 101, and 111, respectively. This maximizes the distance between the two intermediate conductance states, providing more tolerance space for the instability of the intermediate conductance states.

[0043] Specifically, in this embodiment, the corresponding verification data is pre-stored for each conductance state interval of the RRAM device, and the current conductance state of each conductance state interval is read using a preset verification mode ADC circuit. Based on the current conductance state of each conductance state interval and the verification data corresponding to each conductance state interval, if the current conductance state of each conductance state interval and the verification data corresponding to the corresponding conductance state interval meet the preset matching conditions, that is, the current conductance state and the verification data corresponding to each conductance state interval are consistent, then the data verification is determined to be successful, and the actual conductance state of the RRAM device is read using a preset read mode ADC circuit.

[0044] In some embodiments, the preset verification mode ADC circuit includes multiple comparators and verification encoding logic. The preset verification mode ADC circuit reads the current conductance state of each conductance state interval, including: acquiring a first voltage signal generated based on the current signal generated by the RRAM device; identifying the first voltage signal based on multiple comparators, and verifying the first identification result using the verification encoding logic to obtain the current conductance state of each conductance state interval.

[0045] Optionally, in some embodiments, the preset readout mode ADC circuit includes some comparators among multiple comparators and readout encoding logic of verification encoding logic. The preset readout mode ADC circuit reads the actual conductance state of the RRAM device, including: acquiring a second voltage signal generated based on the current signal generated by the RRAM device; identifying the second voltage signal based on multiple comparators, and reading the second identification result using the readout encoding logic to obtain the actual conductance state of the RRAM device.

[0046] This application also proposes a reconfigurable ADC circuit, including a preset verification mode ADC circuit and a preset readout mode ADC circuit, which realizes both a high-precision data verification process and a high-bandwidth data readout process.

[0047] like Figure 6 As shown, the VREAD voltage causes current to be generated on the selected array cell. The current flowing through the resistor generates a first voltage signal. Seven comparators identify the first voltage signal generated by the array cell current. The verification result is obtained through the verification encoding logic, thereby obtaining the current conductance state of each conductance state interval.

[0048] like Figure 7As shown, during the read process, the 3-bit FLASH ADC circuit can be split into two 2-bit ADC circuits. The six comparators are divided into two groups of three comparators each, and the seventh comparator is disabled to save power. Each group of comparators is used by one 2-bit ADC, and the two 2-bit ADC circuits can read two RRAM cells in parallel. The three comparators of each 2-bit ADC identify the second voltage signal generated by the corresponding array cell current, and obtain a 2-bit verification result through the read encoding logic, thereby obtaining the actual conductance state of the RRAM device. In addition, the verification encoding logic is disabled during the read process.

[0049] The RRAM device conductance state non-uniform ultra-precision verification method proposed in this application, based on a preset non-uniform partitioning strategy and conductance range, non-uniformly divides the conductance state of the RRAM device into multiple conductance state intervals. Corresponding verification data is pre-stored for each conductance state interval of the RRAM device, and a preset verification mode ADC circuit is used to read the current conductance state of each conductance state interval. Based on the current conductance state of each conductance state interval and the corresponding verification data, after successful data verification, the actual conductance state of the RRAM device is read using a preset readout mode ADC circuit. This solves the problem that existing uniformly partitioned programmable conductance range partitioning methods make the conductance of RRAM devices in intermediate conductance states more prone to drift. It achieves narrowing of the individual state distribution of the RRAM device after programming, leaving tolerance space for non-ideal factors such as RRAM device state drift, and providing more tolerance space for RRAM devices in intermediate conductance states, thereby reducing the impact of RRAM state drift on readout accuracy. Furthermore, through a reconfigurable ADC circuit, it achieves both high-precision data verification and high-bandwidth data reading.

[0050] Next, referring to the accompanying drawings, a high-precision verification device for non-uniform conductivity state of RRAM devices according to an embodiment of this application is described.

[0051] Figure 8 This is a block diagram of an RRAM device conductivity state non-uniform ultra-precision verification device according to an embodiment of this application.

[0052] like Figure 8 As shown, the RRAM device conductivity non-uniform ultra-precision verification device 10 includes: a non-uniform partitioning module 100, a reading module 200, and a verification module 300.

[0053] The non-uniform partitioning module 100 is used to non-uniformly divide the conductance state of the RRAM device into multiple conductance state intervals based on a preset non-uniform partitioning strategy and conductance range; the reading module 200 is used to pre-store corresponding verification data for each conductance state interval of the RRAM device and read the current conductance state of each conductance state interval using a preset verification mode ADC circuit; the verification module 300 is used to determine the data verification is successful based on the current conductance state of each conductance state interval and the verification data corresponding to each conductance state interval, and then read the actual conductance state of the RRAM device using a preset reading mode ADC circuit.

[0054] Optionally, in some embodiments, the reading module 200 is further configured to: acquire a first voltage signal generated based on the current signal generated by the RRAM device; identify the first voltage signal based on multiple comparators, and verify the first identification result using verification coding logic to obtain the current conductance state of each conductance state interval.

[0055] Optionally, in some embodiments, the verification module 300 is further configured to: acquire a second voltage signal generated based on the current signal generated by the RRAM device; identify the second voltage signal based on multiple comparators, and use readout encoding logic to read the second identification result to obtain the actual conductance state of the RRAM device.

[0056] Optionally, in some embodiments, after reading the current conductance state of each conductance state interval based on a preset verification precision, the verification module 200 is further configured to: determine whether the current conductance state of each conductance state interval and the verification data corresponding to the corresponding conductance state interval meet the preset matching conditions; if the current conductance state of each conductance state interval and the verification data corresponding to the corresponding conductance state interval meet the preset matching conditions, then the data verification is determined to be successful.

[0057] Optionally, in some embodiments, the verification accuracy of the preset verification mode ADC circuit is greater than the reading accuracy of the preset reading mode ADC circuit.

[0058] It should be noted that the foregoing explanation of the embodiment of the non-uniform ultra-precision verification method for RRAM device conductance state also applies to the RRAM device non-uniform ultra-precision verification device of this embodiment, and will not be repeated here.

[0059] The RRAM device conductivity state non-uniform ultra-precision verification device proposed in this application, based on a preset non-uniform partitioning strategy and conductivity range, non-uniformly divides the conductivity state of the RRAM device into multiple conductivity state intervals. Corresponding verification data is pre-stored for each conductivity state interval of the RRAM device, and a preset verification mode ADC circuit is used to read the current conductivity state of each conductivity state interval. Based on the current conductivity state of each conductivity state interval and the corresponding verification data, after successful data verification, the actual conductivity state of the RRAM device is read using a preset read mode ADC circuit. This solves the problem that existing uniformly partitioned programmable conductivity range partitioning methods make the conductivity of RRAM devices in intermediate conductivity states more prone to drift. It achieves narrowing of the individual state distribution of the RRAM device after programming, leaving tolerance space for non-ideal factors such as RRAM device state drift, and providing more tolerance space for RRAM devices in intermediate conductivity states, thereby reducing the impact of RRAM state drift on readout accuracy.

[0060] Figure 9 A schematic diagram of the structure of an electronic device provided in an embodiment of this application. The electronic device may include:

[0061] The memory 901, the processor 902, and the computer program stored on the memory 901 and capable of running on the processor 902.

[0062] When the processor 902 executes the program, it implements the RRAM device conductance state non-uniform ultra-precision verification method provided in the above embodiments.

[0063] Furthermore, electronic devices also include:

[0064] Communication interface 903 is used for communication between memory 901 and processor 902.

[0065] The memory 901 is used to store computer programs that can run on the processor 902.

[0066] The memory 901 may include high-speed RAM memory, and may also include non-volatile memory, such as at least one disk storage device.

[0067] If the memory 901, processor 902, and communication interface 903 are implemented independently, then the communication interface 903, memory 901, and processor 902 can be interconnected via a bus to complete communication between them. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. The bus can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 9 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0068] Optionally, in a specific implementation, if the memory 901, processor 902, and communication interface 903 are integrated on a single chip, then the memory 901, processor 902, and communication interface 903 can communicate with each other through an internal interface.

[0069] The processor 902 may be a central processing unit (CPU), an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of this application.

[0070] This application also provides a computer program product on which a computer program is stored, which, when executed by a processor, implements the above-described method for non-uniform ultra-precision verification of the conductance state of RRAM devices.

[0071] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0072] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0073] Any process or method described in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more N executable instructions for implementing custom logic functions or processes, and the scope of the preferred embodiments of this application includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as should be understood by those skilled in the art to which embodiments of this application pertain.

[0074] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequential list of executable instructions for implementing logical functions, and can be specifically implemented in any computer program product for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer program product" can be any means that can contain, store, communicate, propagate, or transmit a program for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer program products include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and programmable read-only memory (EPROM or flash memory), fiber optic device, and portable optical disc read-only memory (CDROM). Furthermore, the computer program product can even be paper or other suitable medium on which the program can be printed, because the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0075] It should be understood that the various parts of this application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, the N steps or methods can be implemented using software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0076] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer program product, and when executed, the program includes one or a combination of the steps of the method embodiments.

[0077] Furthermore, the functional units in the various embodiments of this application can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer program product.

[0078] The computer program product mentioned above may be a read-only memory, a disk, or an optical disk, etc. Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of this application.

Claims

1. A method for high-precision verification of non-uniform conductivity states of RRAM devices, characterized in that, Includes the following steps: Based on a preset non-uniform partitioning strategy and conductance range, the conductance state of the RRAM device is non-uniformly divided into multiple conductance state intervals; For each conductance state interval of the RRAM device, corresponding verification data is pre-stored, and the current conductance state of each conductance state interval is read using a preset verification mode ADC circuit; Based on the current conductance state of each conductance state interval and the corresponding verification data for each conductance state interval, after determining that the data verification is successful, the actual conductance state of the RRAM device is read using a preset readout mode ADC circuit.

2. The method according to claim 1, characterized in that, The preset verification mode ADC circuit includes multiple comparators and verification encoding logic. The step of using the preset verification mode ADC circuit to read the current conductance state of each conductance state interval includes: Obtain a first voltage signal generated based on the current signal generated by the RRAM device; The first voltage signal is identified based on the multiple comparators, and the current conductance state of each conductance state interval is obtained by verifying the first identification result using the verification coding logic.

3. The method according to claim 2, characterized in that, The preset readout mode ADC circuit includes some comparators among the plurality of comparators and the readout encoding logic of the verification encoding logic. Reading the actual conductance state of the RRAM device using the preset readout mode ADC circuit includes: Obtain a second voltage signal generated based on the current signal generated by the RRAM device; The second voltage signal is identified based on the multiple comparators, and the actual conductance state of the RRAM device is obtained by reading the second identification result using the readout encoding logic.

4. The method according to claim 1, characterized in that, After reading the current conductance state of each conductance state interval based on a preset verification precision, the method further includes: Determine whether the current conductance state of each conductance state interval and the corresponding verification data of the corresponding conductance state interval meet the preset matching conditions; If the current conductance state of each conductance state interval and the corresponding verification data of the corresponding conductance state interval satisfy the preset matching conditions, then the data verification is determined to be successful.

5. The method according to any one of claims 1-4, characterized in that, The verification accuracy of the preset verification mode ADC circuit is greater than the reading accuracy of the preset reading mode ADC circuit.

6. A high-precision verification device for non-uniform conductivity states of RRAM devices, characterized in that, include: The non-uniform partitioning module is used to non-uniformly partition the conductance state of the RRAM device into multiple conductance state intervals based on a preset non-uniform partitioning strategy and conductance range. The reading module is used to pre-store corresponding verification data for each conductance state interval of the RRAM device, and to read the current conductance state of each conductance state interval using a preset verification mode ADC circuit. The verification module is used to determine the actual conductance state of the RRAM device by using a preset reading mode ADC circuit after determining that the data verification is successful based on the current conductance state of each conductance state interval and the verification data corresponding to each conductance state interval.

7. The apparatus according to claim 6, characterized in that, The reading module is also used for: Obtain a first voltage signal generated based on the current signal generated by the RRAM device; The first voltage signal is identified based on the multiple comparators, and the current conductance state of each conductance state interval is obtained by verifying the first identification result using the verification coding logic.

8. The apparatus according to claim 7, characterized in that, The verification module is also used for: Obtain a second voltage signal generated based on the current signal generated by the RRAM device; The second voltage signal is identified based on the multiple comparators, and the actual conductance state of the RRAM device is obtained by reading the second identification result using readout encoding logic.

9. The apparatus according to claim 7, characterized in that, After reading the current conductance state of each conductance state interval based on a preset verification precision, the verification module is further configured to: Determine whether the current conductance state of each conductance state interval and the corresponding verification data of the corresponding conductance state interval meet the preset matching conditions; If the current conductance state of each conductance state interval and the corresponding verification data of the corresponding conductance state interval satisfy the preset matching conditions, then the data verification is determined to be successful.

10. An electronic device, characterized in that, include: The memory, the processor, and the computer program stored in the memory and executable on the processor, the processor executing the program to implement the RRAM device conductance state non-uniform ultra-precision verification method as described in any one of claims 1-5.

Images