Power module short circuit protection circuit and protection method

Abstract

The invention discloses a power module short circuit protection circuit and protection method, and the method comprises the steps: a transconductance integrating circuit converts the induced voltage of a to-be-detected power module into a first signal with bias, and inputs the first signal into an amplification circuit; the biasing circuit generates a second signal and inputs the second signal into the amplifying circuit; the amplifying circuit debiases and amplifies the first signal based on a second signal to obtain a third signal; the comparison circuit compares the third signal with a preset threshold value; the protection action is executed according to the comparison result, first-class short circuit and second-class short circuit faults of the power module can be rapidly detected, so that the short circuit protection function is executed, the short circuit protection loss of the power module is reduced, the transconductance integrating circuit can be reset through an MOS tube in the transconductance integrating circuit after the power to be detected is turned off every time, and the reliability of the power module is improved. And the problems of large size and complex circuit of a traditional integrating circuit reset circuit are avoided.

Description

Technical Field

[0001] The present invention belongs to the technical field of power module protection, and in particular relates to a power module short-circuit protection circuit and a protection method. Background Art

[0002] Power modules are power electronic components in electronic circuits, also known as power components, such as IGBT (Insulate-Gate Bipolar Transistor) and silicon power components. When power electronic equipment is short-circuited due to the use environment, abnormal working conditions, etc., this type of power module will withstand a short-circuit current of four to six times the rated current, but the short-circuit current withstand time of the power module is short, and the output current detection speed of the power electronic equipment is not fast enough, which can easily lead to damage to the power module. Therefore, the power module itself needs to have a short-circuit protection function, but the short-circuit protection function of the existing power module has defects such as high loss and slow response speed.

[0003] Therefore, how to improve the short-circuit protection response speed of the power module and reduce the short-circuit protection loss of the power module is a technical problem to be solved by those skilled in the art. Summary of the invention

[0004] The purpose of the present invention is to solve the technical problems of slow short-circuit protection response speed and high short-circuit protection loss of a power module in the prior art.

[0005] To achieve the above technical objectives, on the one hand, the present invention provides a power module short-circuit protection circuit, the circuit comprising:

[0006] The input end of the transconductance integration circuit is connected to the power module to be detected, the input end of the transconductance integration circuit includes a first voltage-dividing resistor and a second voltage-dividing resistor, and the output end of the transconductance integration circuit is connected to the amplifier circuit;

[0007] A bias circuit connected to the amplifier circuit, and the amplifier circuit is also connected to a comparison circuit;

[0008] Wherein, the transconductance integrator circuit specifically includes:

[0009] One end of the resistor R1 is connected to the IGBT to be detected, the other end of the resistor R1 is respectively connected to the other end of the resistor R2 and the non-inverting input end of the operational amplifier U1, one end of the resistor R2 is connected to +15V, the inverting input end of the operational amplifier is respectively connected to the emitter of the transistor D1 and one end of the resistor R3, the other end of the resistor R3 is grounded, the pin 4 of the operational amplifier U1 is connected to -15V, the pin 8 of the operational amplifier U1 is connected to +15V, the output end of the operational amplifier U1 is connected to the base of the transistor D1, the collector of the transistor D1 is respectively connected to the amplifier circuit, the other end of the capacitor C1 and the drain of the MOS tube Q1, one end of the capacitor C1 and the source of the MOS tube Q1 are both connected to +15V, the gate of the MOS tube Q1 is connected to the host computer, and the MOS tube Q1 is used to reset the transconductance integration circuit.

[0010] Furthermore, the power module to be detected is specifically connected to the input end of the transconductance integration circuit via the inductor L1.

[0011] Furthermore, the bias circuit specifically includes:

[0012] One end of the resistor R4 is connected to +15V, the other end of the resistor R4 is respectively connected to the other end of the resistor R5 and the non-inverting input end of the operational amplifier U2, the other end of the resistor R5 is grounded, the reverse input end of the operational amplifier U2 is respectively connected to one end of the resistor R6 and the emitter of the transistor D2, the other end of the resistor R6 is grounded, the output end of the operational amplifier U2 is connected to the base of the transistor D2, the collector of the transistor D2 is respectively connected to the amplifier circuit, the other end of the capacitor C2, and the drain of the MOS tube Q2, one end of the capacitor C2 and the source of the MOS tube Q2 are both connected to +15V, the gate of the MOS tube Q2 is connected to the host computer, and the MOS tube Q2 is used to reset the bias circuit.

[0013] On the other hand, the present invention also provides a power module short-circuit protection method, which is applied to the protection circuit as described above, and the method comprises:

[0014] The transconductance integration circuit converts the induced voltage of the power module to be detected into a first signal with a bias, and inputs the first signal into the amplification circuit;

[0015] The bias circuit generates a second signal and inputs the second signal into the amplifier circuit;

[0016] The amplifying circuit debiases and amplifies the first signal based on the second signal to obtain a third signal;

[0017] The comparison circuit compares the third signal with a preset threshold;

[0018] The protection action is executed according to the comparison result.

[0019] Furthermore, the first signal Specifically expressed as:

[0020]

[0021]

[0022] In the formula, is the integration time, is the capacitance of the transconductance integrator circuit, is the parasitic inductance of the power module to be tested, is the differential operator, is the on-state current of the power module to be detected, and is the voltage divider resistor of the transconductance integrator circuit, is the parasitic inductance voltage drop of the power module to be detected.

[0023] Furthermore, the second signal Specifically expressed as:

[0024]

[0025] In the formula, is the integrating resistance of the transconductance integrator circuit.

[0026] Further, the third signal is specifically represented as:

[0027]

[0028] In the formula, The third signal.

[0029] Furthermore, the method also includes: when the power module to be detected is turned off, controlling the MOS tube Q1 in the transconductance integration circuit to be enabled so as to reset the transconductance integration circuit, and controlling the MOS tube Q2 in the bias circuit to be enabled so as to reset the bias circuit; when the power module to be detected is turned on, the MOS tube Q1 and the MOS tube Q2 do not operate.

[0030] Furthermore, the method further comprises adjusting the ratio of the first voltage-dividing resistor to the second voltage-dividing resistor according to the conduction speed and parasitic inductance of the power module to be detected.

[0031] Furthermore, the performing of the protection action according to the comparison result is specifically when the third signal exceeds a preset threshold, the protection action is performed by the host computer.

[0032] The present invention provides a power module short-circuit protection circuit and protection method. Compared with the prior art, the method comprises: the transconductance integration circuit converts the induced voltage of the power module to be detected into a first signal with a bias, and inputs the first signal into the amplifier circuit; the bias circuit generates a second signal, and inputs the second signal into the amplifier circuit; the amplifier circuit debiases and amplifies the first signal based on the second signal to obtain a third signal; the comparison circuit compares the third signal with a preset threshold; and performs a protection action according to the comparison result, so as to quickly detect Class 1 short circuit and Class 2 short circuit faults of the power module, thereby performing a short circuit protection function, reducing the short circuit protection loss of the power module, and the MOS tube in the transconductance integration circuit can reset the transconductance integration circuit after each power to be detected is turned off, thereby avoiding the problem of large volume and complex circuit of the reset circuit of the traditional integration circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the embodiments of this specification or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0034] Figure 1 The figure shows a schematic diagram of the structure of a power module short-circuit protection circuit provided in an embodiment of this specification;

[0035] Figure 2 The figure is a schematic flow chart of a power module short-circuit protection method provided in an embodiment of the present specification. DETAILED DESCRIPTION

[0036] In order to enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of this application.

[0037] like Figure 1The structure diagram of the power module short-circuit protection circuit provided by the embodiment of this specification is shown. Although this specification provides the method operation steps or device structure shown in the following embodiments or drawings, the method or device may include more or fewer operation steps or module units after partial merger based on routine or no creative labor. In the steps or structures where there is no necessary causal relationship logically, the execution order of these steps or the module structure of the device is not limited to the execution order or module structure shown in the embodiments of this specification or drawings. When the method or module structure is applied in the actual device, server or terminal product, it can be executed sequentially or in parallel according to the method or module structure shown in the embodiment or drawings.

[0038] The power module short-circuit protection circuit provided in the embodiments of this specification specifically includes:

[0039] The input end of the transconductance integration circuit is connected to the power module to be detected, the input end of the transconductance integration circuit includes a first voltage-dividing resistor and a second voltage-dividing resistor, and the output end of the transconductance integration circuit is connected to the amplifier circuit;

[0040] The bias circuit is connected to the amplifier circuit, and the amplifier circuit is also connected to the comparison circuit.

[0041] In the embodiment of the present application, the transconductance integrator circuit specifically includes:

[0042] One end of the resistor R1 is connected to the IGBT to be detected, the other end of the resistor R1 is respectively connected to the other end of the resistor R2 and the non-inverting input end of the operational amplifier U1, one end of the resistor R2 is connected to +15V, the inverting input end of the operational amplifier is respectively connected to the emitter of the transistor D1 and one end of the resistor R3, the other end of the resistor R3 is grounded, the pin 4 of the operational amplifier U1 is connected to -15V, the pin 8 of the operational amplifier U1 is connected to +15V, the output end of the operational amplifier U1 is connected to the base of the transistor D1, the collector of the transistor D1 is respectively connected to the amplifier circuit, the other end of the capacitor C1 and the drain of the MOS tube Q1, one end of the capacitor C1 and the source of the MOS tube Q1 are both connected to +15V, and the gate of the MOS tube Q1 is connected to the host computer.

[0043] In the embodiment of the present application, the bias circuit specifically includes:

[0044] One end of the resistor R4 is connected to +15V, the other end of the resistor R4 is respectively connected to the other end of the resistor R5 and the non-inverting input end of the operational amplifier U2, the other end of the resistor R5 is grounded, the reverse input end of the operational amplifier U2 is respectively connected to one end of the resistor R6 and the emitter of the transistor D2, the other end of the resistor R6 is grounded, the output end of the operational amplifier U2 is connected to the base of the transistor D2, the collector of the transistor D2 is respectively connected to the amplifier circuit, the other end of the capacitor C2, and the drain of the MOS tube Q2, one end of the capacitor C2 and the source of the MOS tube Q2 are both connected to +15V, and the gate of the MOS tube Q2 is connected to the host computer.

[0045] In the embodiment of the present application, the amplifier circuit specifically includes:

[0046] One end of the resistor R7 is connected to the transconductance integration circuit, one end of the resistor R8 is connected to the bias circuit, the other end of the resistor R7 is respectively connected to the other end of the resistor R9 and the non-inverting input end of the operational amplifier U3, the other end of the resistor R8 is respectively connected to one end of the resistor R10 and the inverting input end of the operational amplifier U3, one end of the resistor R9 is grounded, the other end of the resistor R10 is respectively connected to the output end of the operational amplifier U3 and the comparison circuit, and pins 4 and 8 of the operational amplifier U3 are connected to a 15V power supply.

[0047] In the embodiment of the present application, the comparison circuit specifically includes:

[0048] The other end of the resistor R11 and one end of the resistor R12 are both connected to the inverting input terminal of the operational amplifier U4, one end of the resistor R11 is connected to +15V, the other end of the resistor R12 is grounded, the non-inverting input terminal of the operational amplifier U4 is connected to the amplification circuit, the pin 4 of the operational amplifier is grounded, the pin 8 of the operational amplifier is connected to +15V, and the output terminal of the operational amplifier is connected to the host computer.

[0049] like Figure 2 The figure shows a power module short-circuit protection method, which is applied to the protection circuit as described above, and the method includes:

[0050] Step S201: The transconductance integration circuit converts the induced voltage of the power module to be detected into a first signal with a bias, and inputs the first signal into an amplification circuit.

[0051] Specifically, the transconductance integration circuit can perform bias integration on the induced voltage of the power module to be detected to obtain a voltage signal proportional to the slope of the power module conduction current. That is, the first signal. In addition, the method further includes adjusting the ratio of the first voltage-dividing resistor to the second voltage-dividing resistor according to the conduction speed and parasitic inductance of the power module to be detected.

[0052] The first signal Specifically expressed as:

[0053]

[0054]

[0055] In the formula, is the integration time, is the capacitance of the transconductance integrator circuit, is the parasitic inductance of the power module to be tested, is the differential operator, is the on-state current of the power module to be detected, and is the voltage divider resistor of the transconductance integrator circuit, is the parasitic inductance voltage drop of the power module to be detected.

[0056] The resistors R1 and R2 in the transconductance integration circuit divide the induced voltage of the IGBT to be detected, so that the induced voltage is within the common-mode voltage range of the operational amplifier U1, and one end of the integration capacitor C1 is based on a +15V power supply, and can be reset using the MOS tube Q1, that is, when the power module to be detected is turned off, the MOS tube Q1 in the transconductance integration circuit is enabled to reset the transconductance integration circuit. The drive of the MOS tube Q1 shares a common ground with the host computer, and the drive does not need to be isolated, which simplifies the detection circuit and improves the reliability of the overall circuit.

[0057] In addition, the traditional slope-based detection circuit processes the induced voltage of the parasitic inductance between the IGBT emitter and the auxiliary emitter, but this link is an approximate integration link, and can only be equivalent to an integration link when the slope of the induced voltage is high. After the IGBT is turned on, the output signal of this link will begin to attenuate, resulting in a Type 2 short circuit, that is, a short circuit after the IGBT is turned on. The short-circuit current needs to be re-integrated, which reduces the response speed, and when the integral value is less than the specified threshold, the detection failure problem will occur. The first signal output by the transconductance integration circuit in the present application is a voltage signal that is completely proportional to the current to be detected in the IGBT, which can quickly respond to protection in Type 2 short circuits and avoid the problem of detection failure.

[0058] Step S202: The bias circuit generates a second signal, and inputs the second signal into an amplifying circuit.

[0059] Specifically, the bias circuit is connected to a 15V power supply and outputs a fixed voltage signal That is, the second signal. Specifically expressed as:

[0060]

[0061] In the formula, is the integrating resistance of the transconductance integrator circuit.

[0062] Step S203: The amplifying circuit debias and amplifies the first signal based on the second signal to obtain a third signal.

[0063] Specifically, the first signal and the second signal Input to the amplifier circuit for debiasing and amplification to obtain a voltage signal proportional to the short-circuit current of the power module That is, the third signal, and the third signal is specifically represented as:

[0064]

[0065] In the formula, The third signal.

[0066] Step S204: The comparison circuit compares the third signal with a preset threshold.

[0067] Step S205: Execute a protection action according to the comparison result.

[0068] Specifically, the voltage signal V3 is input into the comparison circuit and compared with the specified threshold to obtain a feedback signal, and the feedback signal is transmitted to the host computer for controlling the power module to cut off power. For example, when the third signal exceeds the preset threshold, the protection action is executed by the host computer, which can be an FPGA main control chip, so as to ensure the safety of the power module and avoid short-circuit damage to the power module.

[0069] In the prior art, an RC link is used to process the induced voltage of the parasitic inductance between the power emitter and the auxiliary emitter. This link is an approximate integral link. Only when the slope of the induced voltage is very high can it be equivalent to an integral link. Because this link is an inertial link, after the power module is turned on, the link output voltage will begin to decay. In the case of a Class 2 short circuit, the short-circuit current needs to be re-integrated, which reduces the response speed, and when the integral value is less than the comparison threshold, a detection failure problem will occur. The protection circuit and protection method provided in the present application can detect Class 1 short circuit (short circuit before conduction) and Class 2 short circuit (short circuit after conduction) faults of power semiconductor devices (IGBT, SiC) without delay, quickly execute the short-circuit protection function, and improve the reliability of the power module operation.

[0070] The above is a description of a specific embodiment of the specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0071] The storage medium may include a physical device for storing information, which is usually a medium that digitizes information and then stores it in an electrical, magnetic or optical manner. The storage medium may include: a device that stores information in an electrical energy manner, such as various memories, such as RAM, ROM, etc.; a device that stores information in a magnetic energy manner, such as a hard disk, a floppy disk, a magnetic tape, a magnetic core memory, a magnetic bubble memory, a USB flash drive; a device that stores information in an optical manner, such as a CD or a DVD. Of course, there are other readable storage media, such as quantum memory, graphene memory, etc.

[0072] The embodiments of this specification are not limited to complying with industry communication standards, standard computer resource data update and data storage rules, or the situations described in one or more embodiments of this specification. Certain industry standards or slightly modified implementation plans based on the implementation described in the custom method or embodiment can also achieve the same, equivalent or similar, or predictable implementation effects after deformation of the above-mentioned embodiments. The embodiments obtained by using these modified or deformed data acquisition, storage, judgment, processing methods, etc. can still fall within the scope of the optional implementation plans of the embodiments of this specification.

[0073] The controller or host computer can be implemented in any appropriate manner. For example, the controller can take the form of a microprocessor or processor and a computer-readable medium storing a computer-readable program code (such as software or firmware) that can be executed by the (micro)processor, a logic gate, a switch, an application specific integrated circuit (ASIC), a programmable logic controller, and an embedded microcontroller. Examples of controllers include, but are not limited to, the following microcontrollers: ARC 625D, ATMEL AT91SAM, MICROCHIP PIC18F26K20, and SILICONE LABSC8051F320. The memory controller can also be implemented as part of the control logic of the memory. It is also known to those skilled in the art that in addition to implementing the controller in a purely computer-readable program code manner, the controller can be implemented in the form of a logic gate, a switch, an application specific integrated circuit, a programmable logic controller, and an embedded microcontroller by logically programming the method steps. Therefore, this controller can be considered as a hardware component, and the devices included therein for implementing various functions can also be considered as structures within the hardware component. Or even, the devices for implementing various functions can be considered as both software modules for implementing the method and structures within the hardware component.

[0074] The device embodiments described above are merely illustrative. For example, the division of the units is merely a logical function division. There may be other divisions in actual implementation, such as multiple units or plug-ins may be combined or integrated into another system, or some features may be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed may be through some interface, indirect coupling or communication connection of the device or unit, which may be electrical, mechanical or other forms.

[0075] These computer program instructions may also be loaded onto a computer or other programmable resource data updating device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions executed on the computer or other programmable device for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0076] Each embodiment in this specification is described in a progressive manner, and the same and similar parts between the embodiments can be referenced to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can refer to the partial description of the method embodiment. In the description of this specification, the description of the reference term "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of this specification. In this specification, the schematic representation of the above terms does not necessarily target the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples without contradiction.

[0077] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific variations and combinations that do not deviate from the essence of the present invention based on the technical revelations disclosed by the present invention, and these variations and combinations are still within the protection scope of the present invention.

Claims

1. A power module short-circuit protection circuit, characterized in that: The circuit comprises: The input end of the transconductance integration circuit is connected to the power module to be detected, the input end of the transconductance integration circuit includes a first voltage-dividing resistor and a second voltage-dividing resistor, and the output end of the transconductance integration circuit is connected to the amplifier circuit; A bias circuit connected to the amplifier circuit, and the amplifier circuit is also connected to a comparison circuit; Wherein, the transconductance integrator circuit specifically includes: One end of the resistor R1 is connected to the IGBT to be detected, the other end of the resistor R1 is respectively connected to the other end of the resistor R2 and the non-inverting input end of the operational amplifier U1, one end of the resistor R2 is connected to +15V, the inverting input end of the operational amplifier is respectively connected to the emitter of the transistor D1 and one end of the resistor R3, the other end of the resistor R3 is grounded, the pin 4 of the operational amplifier U1 is connected to -15V, the pin 8 of the operational amplifier U1 is connected to +15V, the output end of the operational amplifier U1 is connected to the base of the transistor D1, the collector of the transistor D1 is respectively connected to the amplifier circuit, the other end of the capacitor C1 and the drain of the MOS tube Q1, one end of the capacitor C1 and the source of the MOS tube Q1 are both connected to +15V, the gate of the MOS tube Q1 is connected to the host computer, and the MOS tube Q1 is used to reset the transconductance integration circuit.

2. The power module short-circuit protection circuit according to claim 1, characterized in that: The power module to be detected is specifically connected to the input end of the transconductance integration circuit via the inductor L1.

3. The power module short-circuit protection circuit according to claim 1, characterized in that: The bias circuit specifically comprises: One end of the resistor R4 is connected to +15V, the other end of the resistor R4 is respectively connected to the other end of the resistor R5 and the non-inverting input end of the operational amplifier U2, the other end of the resistor R5 is grounded, the reverse input end of the operational amplifier U2 is respectively connected to one end of the resistor R6 and the emitter of the transistor D2, the other end of the resistor R6 is grounded, the output end of the operational amplifier U2 is connected to the base of the transistor D2, the collector of the transistor D2 is respectively connected to the amplifier circuit, the other end of the capacitor C2, and the drain of the MOS tube Q2, one end of the capacitor C2 and the source of the MOS tube Q2 are both connected to +15V, the gate of the MOS tube Q2 is connected to the host computer, and the MOS tube Q2 is used to reset the bias circuit.

4. A power module short circuit protection method, characterized in that: Applied to the protection circuit according to any one of claims 1 to 3, the method comprises: The transconductance integration circuit converts the induced voltage of the power module to be detected into a first signal with a bias, and inputs the first signal into the amplification circuit; The bias circuit generates a second signal and inputs the second signal into the amplification circuit; The amplifying circuit debiases and amplifies the first signal based on the second signal to obtain a third signal; The comparison circuit compares the third signal with a preset threshold; The protection action is executed according to the comparison result.

5. The power module short-circuit protection method according to claim 4, characterized in that: The first signal Specifically expressed as: In the formula, is the integration time, is the capacitance of the transconductance integrator circuit, is the parasitic inductance of the power module to be tested, is the differential operator, is the on-state current of the power module to be detected, and is the voltage divider resistor of the transconductance integrator circuit, is the parasitic inductance voltage drop of the power module to be detected.

6. The power module short-circuit protection method according to claim 5, characterized in that: The second signal Specifically expressed as: In the formula, is the integrating resistance of the transconductance integrator circuit.

7. The power module short-circuit protection method according to claim 6, characterized in that: The third signal is specifically represented as: In the formula, The third signal.

8. The power module short circuit protection method according to claim 4, characterized in that: The method further includes: when the power module to be detected is turned off, controlling the MOS tube Q1 in the transconductance integration circuit to be enabled so as to reset the transconductance integration circuit, and controlling the MOS tube Q2 in the bias circuit to be enabled so as to reset the bias circuit; when the power module to be detected is turned on, the MOS tube Q1 and the MOS tube Q2 do not operate.

9. The power module short circuit protection method according to claim 4, characterized in that: The method further includes adjusting the ratio of the first voltage-dividing resistor to the second voltage-dividing resistor according to the conduction speed and parasitic inductance of the power module to be detected.

10. The power module short circuit protection method according to claim 4, characterized in that: The performing of the protection action according to the comparison result is specifically when the third signal exceeds a preset threshold, the protection action is performed by the host computer.

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