Preparation method and valuing method of wafer dielectric film doping concentration standard sample

Abstract

The invention relates to the field of semiconductors, in particular to a preparation method and a value fixing method of a wafer dielectric film doping concentration standard sample wafer. Comprising the following steps: S1, preparing two silicon substrates, and performing a deposition step through PECVD (Plasma Enhanced Chemical Vapor Deposition) so as to deposit buffer layers on the silicon substrates; s2, executing a deposition step on one silicon substrate through PECVD (Plasma Enhanced Chemical Vapor Deposition) so as to deposit the dielectric film layer on the buffer layer; according to the preparation method, impurities such as boron and phosphorus in the standard sample can be effectively prevented from reacting with internal or external moisture, and the problem that the impurity concentration changes along with time is solved, so that the stability is kept; the defects related to phosphorus and boron in the dielectric film during annealing and the phenomenon that the dopant diffuses towards the silicon substrate and the outside can be effectively improved; according to the valuing method disclosed by the invention, precise valuing of the contents of the dopants B and P of the dielectric film layer can be realized through ICP / MS based on the developed standard sample wafer and the auxiliary sample wafer.

Description

Technical Field

[0001] The present invention relates to the field of semiconductors, and in particular to a method for preparing a standard sample of a wafer dielectric film doping concentration and a method for determining a value. Background Art

[0002] Borophosphosilicate glass (BPSG), phosphosilicate glass (PSG), and borosilicate glass (BSG) are widely used as dielectric materials in microelectronic devices; for example, BPSG film can be used as a planarization film for microelectronic circuits, which provides good step coverage for high-density microelectronic devices. When manufacturing BPSG film, the flow rate of BPSG film varies with film composition, flow temperature, flow time, and flow surrounding environment. In the manufacture of microelectronic devices including BPSG film, it is known to control the impurity concentration of BPSG film such as boron or phosphorus so that BPSG flows in an appropriate amount at the expected flow temperature. In order to measure the impurity concentration in dielectric films, measuring instruments that monitor the microelectronic device manufacturing process are usually used using X-rays, infrared or other technologies.

[0003] However, in order to verify that the manufactured dielectric film has the necessary impurity concentration, the measurement instrument usually needs a wafer dielectric film standard sample for comparison purposes to provide a uniform impurity concentration over time in the microelectronic device manufacturing device. The doping elements of the wafer dielectric film standard sample should preferably have an impurity concentration that remains stable over time. However, in traditional wafer dielectric film samples, the concentration of impurities such as boron and phosphorus will change over time (e.g. Figure 1 As shown in the figure, impurities will react with internal or external moisture and thus fail to remain stable and meet the stability requirements of the standard sample.

[0004] Existing methods form a protective layer on the dielectric film, such as Figure 2 As shown, a dielectric film is directly deposited on a silicon substrate, and a protective layer is deposited on the surface of the dielectric film to isolate moisture from the external environment. Other methods are to remove moisture from the film by annealing the dielectric film, but other undesirable effects may occur during the annealing process. During annealing, defects related to phosphorus and boron and outward diffusion of dopants may occur in the dielectric film without a protective layer; and annealing a dielectric film layer with a protective layer often leads to improper flow of the dielectric film. At the same time, during the annealing process, the protective layer and the substrate are injected with B and P dopants that diffuse out of the dielectric film layer. When the protective layer is not thick enough, the dopants in the dielectric film will diffuse outward through the protective layer. When the protective layer is too thick, not only the flow ability of the dielectric film is deteriorated, but also the surface uniformity is reduced.

[0005] In addition, when wafer dielectric film standard samples are used for calibration of X-ray, infrared or other measuring instruments, they must first be quantitatively analyzed using the wet chemical analysis method ICP / MS (inductively coupled plasma Mass Spectrometer) to determine their boron and phosphorus concentrations. The presence of a protective layer will seriously affect the fixed-value measurement of its boron and phosphorus concentrations, and the B and P dopants diffused into the substrate due to annealing cannot be effectively stripped off. Summary of the invention

[0006] In response to the problems mentioned in the prior art, the present invention proposes a method for preparing a standard sample of wafer dielectric film doping concentration and a method for determining the value, which can effectively prevent impurities in the standard sample such as boron and phosphorus from reacting with internal or external moisture, and solve the problem of impurity concentration changing over time, thereby maintaining stability.

[0007] At the same time, the method provided by the present invention can effectively improve the defects related to phosphorus and boron in the dielectric film during annealing, as well as the diffusion of dopants to the silicon substrate and the outside; while ensuring the fluidity and uniformity of the dielectric film, precise fixed value measurement of boron and phosphorus concentration based on ICP / MS can be achieved, which can effectively meet the preparation and precise fixed value measurement requirements of high-stability and high-uniformity wafer dielectric film standard samples in the integrated circuit manufacturing process.

[0008] In order to achieve the above object, the present invention adopts the following technical solution: The present invention provides a method for preparing a wafer dielectric film doping concentration standard sample, comprising the following steps: S1, preparing two silicon substrates and performing a deposition step by PECVD to deposit a buffer layer on the silicon substrate; S2, performing a deposition step on one of the silicon substrates by PECVD to deposit a dielectric film layer on the buffer layer; S3, performing a deposition step on the two silicon substrates by PECVD to deposit a protective layer on the buffer layer of one of the silicon substrates and on the dielectric film layer of the other silicon substrate; S4. Annealing the silicon substrate to obtain a dielectric film standard sample and an auxiliary standard sample.

[0009] As a further improvement of the present invention, the specific process of step S1 is: placing a silicon substrate in a PECVD device, turning off the boron and phosphorus sources, establishing SiH4 and O2 gas flows under vacuum, and depositing a silicon dioxide layer with a thickness of 50 to 300Å on the silicon substrate.

[0010] As a further improvement of the present invention, the specific process of step S2 is: take out one of the silicon substrates, and deposit a BPSG film with a substrate thickness of 100nm to 20μm on the buffer layer of the other silicon substrate, introduce gas, and deposit it at 400°C, pressure 2.4Torr, and RF power 0.9kw.

[0011] As a further improvement of the present invention, the dopant in the BPSG film is 2.0-4.5% by weight of the B element and 3.0-7.0% by weight of the P element.

[0012] As a further improvement of the present invention, the gas is N2, SiH4, N2O, PH3 and B2H6.

[0013] As a further improvement of the present invention, the SiH4 gas flow rate is 0.12-0.34 SLPM.

[0014] As a further improvement of the present invention, the specific process of step S3 is: placing two silicon substrates in PECVD, turning off the boron and phosphorus sources, establishing SiH4 and O2 gas flows under vacuum, and depositing a silicon dioxide layer with a thickness of 50 to 350Å on the silicon substrate.

[0015] As a further improvement of the present invention, the temperature of the annealing treatment in step S4 is 800-1000° C. and the time is 10-30 minutes.

[0016] A method for determining the doping concentration of the wafer dielectric film prepared above, comprising the following steps: S1: weigh the auxiliary standard sheet, peel off the protective layer and buffer layer of the auxiliary standard sheet with an etching solution, weigh the peeled auxiliary standard sheet again, and the difference between the weight of the auxiliary standard sheet before weighing and the weight of the auxiliary standard sheet after weighing is the total mass of the protective layer and the buffer layer; S2: Weigh the dielectric film standard sample, peel off the protective layer, dielectric film layer and buffer layer of the dielectric film standard sample by etching solution, weigh the stripped dielectric film standard sample again, and the difference between the weight of the dielectric film standard sample before weighing and the weight of the dielectric film standard sample after weighing is the total mass of the protective layer, dielectric film layer and buffer layer; S3: The difference between the total mass of the protective layer, the dielectric film layer and the buffer layer and the total mass of the protective layer and the buffer layer is the total mass of the dielectric film; S4: Analyze the contents of B element and P element in the solution stripped from the dielectric film standard sample according to ICP / MS, and calculate the content concentrations of B element and P element in the dielectric film standard sample according to the total mass of the dielectric film.

[0017] In step S1, a precision electronic balance is used for weighing.

[0018] Compared with the prior art, the present invention has achieved the following technical effects: The preparation method of the present invention can effectively prevent standard sample impurities such as boron and phosphorus from reacting with internal or external moisture, solve the problem of impurity concentration changing over time, and thus maintain stability; it can also effectively improve the defects related to phosphorus and boron in the dielectric film during annealing and the diffusion of dopants to the silicon substrate and the outside.

[0019] The preparation method of the present invention can ensure the proper fluidity of the dielectric film when annealing the dielectric film layer with the protective layer, so that its surface meets the uniformity requirements of the standard sample, and can achieve effective stripping of all B and P dopants doped into the dielectric film.

[0020] The value determination method of the present invention can realize accurate measurement of the quality of the dielectric film layer, and can also realize precise value determination of the B and P dopant contents of the dielectric film layer based on ICP / MS. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a schematic diagram of the decrease of the concentration of B element and P element over time in the prior art; Figure 2 A dielectric film standard with a protective layer in the prior art; Figure 3 is a schematic diagram of a silicon substrate of the present invention; Figure 4 is a schematic diagram of a standard sample of a dielectric film of the present invention; Figure 5 A schematic diagram of a standard sample of a dielectric film after annealing according to the present invention; Figure 6 is a schematic diagram of the auxiliary standard sheet of the present invention; Figure 7 This is a flow chart of the value determination method of the present invention; Figure 8 It is a schematic diagram of the curve of changes of B and P concentrations over time of the present invention.

[0022] Reference numerals: 10, silicon substrate; 20, buffer layer; 30, dielectric film layer; 40, protective layer; 41, second transition region; 21, first transition region. DETAILED DESCRIPTION

[0023] In the following, only some exemplary embodiments are briefly described. As those skilled in the art will appreciate, the described embodiments may be modified in various ways without departing from the spirit or scope of the present invention. Therefore, the drawings and descriptions are considered to be exemplary and non-restrictive in nature.

[0024] In the description of the present invention, it is to be understood that the terms “center”, “longitudinal”, “lateral”, “length”, “width”, “thickness”, “up”, “down”, “front”, “back”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inside”, “outside”, “clockwise”, “counterclockwise”, “axial”, “radial”, “circumferential”, etc., indicating orientations or positional relationships are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0025] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0026] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or a communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0027] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0028] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0029] It should also be understood that the terms used in the present specification are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the present specification and the appended claims, the singular forms "a", "an" and "the" are intended to include plural forms unless the context clearly indicates otherwise.

[0030] It should be further understood that the term "and / or" used in the present description and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

[0031] Various structural schematic diagrams of the embodiments disclosed in the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clear expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0032] Example 1 The structure of the wafer dielectric film sample in the prior art is as follows: Figure 2 As shown, the concentration of impurities such as boron and phosphorus in the structure changes over time. Figure 1 As shown, it is impossible to maintain stability. In order to solve the stability problem, the present invention proposes a method for preparing a standard sample of wafer dielectric film doping concentration.

[0033] The present invention provides a method for preparing a wafer dielectric film doping concentration standard sample, comprising the following steps: S1, preparing two silicon substrates 10 and performing a deposition step by PECVD to deposit a buffer layer 20 on the silicon substrate 10; S2, performing a deposition step on one of the silicon substrates 10 by PECVD to deposit a dielectric film layer 30 onto the buffer layer 20; S3, performing a deposition step on the two silicon substrates 10 by PECVD to deposit a protective layer 40 on the buffer layer 20 of one of the silicon substrates 10 and on the dielectric film layer 30 of the other silicon substrate 10; S4, performing annealing treatment on the silicon substrate 10 to obtain a dielectric film standard sample and an auxiliary standard sample.

[0034] The embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0035] like Figure 3As shown, firstly, two silicon substrates 10 are prepared, namely silicon substrate 10A and silicon substrate 10B, and silicon substrate 10A and silicon substrate 10B are deposited in PECVD process, boron and phosphorus sources are turned off, SiH4 and O2 flows are established under vacuum, and silicon dioxide layer buffer layer 20 is deposited on silicon substrate 10A and silicon substrate 10B; in the embodiment, thermal oxide, silicon nitride, silicon oxide, etc. can be selected as buffer layer 20, preferably silicon dioxide; the thickness of buffer layer 20 is between 50 and 300Å, preferably 100Å.

[0036] like Figure 4 As shown, after the deposition of the buffer layer 20 is completed, the silicon substrate 10B is taken out, and the dielectric film layer 30 is further formed on the buffer layer 20 of the silicon substrate 10A through the PECVD process. The dielectric film layer 30 is any dielectric layer containing B and / or P, but is certainly not limited to this. Other processes such as APCVD, SACVD, LPCVD, HDPCVD or one or more of their combinations may also be used to form the dielectric film layer 30. In the embodiment, the thickness of the dielectric film layer 30 is between 100nm and 20μm, and the preferred thickness is 1μm.

[0037] In PECVD, N2, SiH4, N2O, PH3 and B2H6 source gases are used, and N2 is used as a carrier gas; The BPSG film is deposited at 400°C, a pressure of 2.4 Torr, and a radio frequency power of 0.9 kW. The dopants in the BPSG film are 2.0-4.5% by weight of the B element and 3.0-7.0% by weight of the P element. Preferably, the weight percentage of the B element is 4.0%, and the weight percentage of the P element is 3.2%. The specific doping amount can be determined according to actual needs.

[0038] During the film deposition process, SiH4 gas flow can effectively adjust the characteristics of BPSG film. As SiH4 decreases, more P, B and O atoms are combined from the gas phase into the film, resulting in a reduction in defect precipitation on the BPSG surface during deposition. When SiH4 is reduced to a certain extent, excess oxygen will be generated, which promotes the complete oxidation of P and possible B in the film. The high oxygen content in the deposited film is beneficial to its stability. However, the improvement is limited by a certain minimum amount of SiH4 gas flow. Below this amount, oxygen forms excessive bonds with hydrogen, and the film becomes highly hydrogenated and porous, which in turn makes it easy to produce defects related to B and P. Therefore, the SiH4 gas flow should be controlled within the range of 0.12 to 0.34 SLPM for BPSG deposition. The preferred SiH4 gas flow in the embodiment is 0.20 SLPM.

[0039] like Figure 3As shown, a silicon substrate 10A deposited with a dielectric film layer 30 and a silicon substrate 10B not deposited with a dielectric film layer 30 are placed in PECVD, the boron and phosphorus sources are turned off, and SiH4 and O2 flows are established under vacuum. The silicon dioxide layer deposited on the silicon substrate 10A and the silicon substrate 10B serves as a protective layer 40.

[0040] In the embodiment, the protective layer 40 can be any dielectric layer containing oxide, such as a low-temperature oxide layer, a thermal oxide layer or a silicon oxynitride layer. The oxide layer can be formed by any known deposition method. When the protective layer 40 uses a low-temperature oxide, the protective layer 40 and the dielectric film layer 30 are deposited in the same CVD process. After the dielectric film deposition is completed, the silicon substrate 1010A deposited with the dielectric film layer 30 and the silicon substrate 1010B not deposited with the dielectric film layer 30 are placed in PECVD, the boron or phosphorus source is turned off, and while maintaining the vacuum, SiH4 and O2 gas flows are established, and an undoped oxide thin layer is deposited on the dielectric film layer 30 on the silicon substrate 10A as the protective layer 40. A silicon nitride thin layer can also be deposited as the protective layer 40 after the deposition of the dielectric film layer 30 is completed.

[0041] The silicon / oxygen ratio is controlled during the CVD process to increase the amount of silicon, because a silicon-rich oxide layer or nitride is denser, and therefore silicon dioxide is preferred. This is controlled by adjusting the SiH4 gas concentration during the deposition process. Increasing the SiH4 concentration causes the undoped oxide layer or silicon nitride layer to become denser and thus act as a better barrier layer, preventing it from absorbing moisture from the air through the protective layer 40 and entering the dielectric film layer 30. The density of the material in the protective layer 40 can also be controlled by adjusting deposition process parameters such as pressure, temperature, etc.

[0042] The thickness of the protective layer 40 is between 50 and 350 Å, preferably 100 Å. When the protective layer 40 is thin enough, it will not affect the flow ability of the dielectric film layer 30. However, if the protective layer 40 is too thin, the dopant in the dielectric film layer 30 will diffuse outward through the protective layer 40. The effective thickness of the protective layer 40 will depend in part on the B or P concentration in the dielectric film and the annealing conditions applied to the given dielectric film (annealing temperature, pressure, wet / dry atmosphere, etc.).

[0043] After the deposition of the protective layer 40 is completed, one or more annealing processes can be performed to anneal the two silicon substrates 10A and 10B under the same conditions; the annealing process can be carried out in a temperature range of about 800°C to 1000°C, preferably 950°C in the embodiment, and the time is 10 to 30 minutes, preferably 20 minutes.

[0044] During the annealing process, B and P will diffuse into the buffer layer 20 and the protective layer 40, forming a first transition region 21 and a second transition region 41 formed by the diffusion of doping elements into the buffer layer 20 and the protective layer 40. If the annealing process is too long (higher temperature, longer annealing time), over-doping of the protective layer 40 may occur, resulting in instability of the protective layer 40 film.

[0045] like Figure 5 As shown, when the protective layer 40 is relatively thick, the B and P elements in the dielectric film layer 30 will not diffuse to the entire thickness of the protective layer 40 during the annealing process, and the second transition region 41 in the protective layer 40 remains basically undoped after annealing. The farther away from the dielectric film layer 30, the lower the concentration of B and P of the dopants. The amount of the second transition region 41 may depend on the thickness of the protective layer 40 and the annealing conditions.

[0046] When the annealing process is performed at 950°C for 20 minutes, B can diffuse into the protective layer 40 to about 150Å. P is the main dopant that enhances the fluidity of the BPSG film. P diffuses slowly. Therefore, for the same annealing process, the depth of P doping into the protective layer 40 is less than 150Å.

[0047] like Figure 5 and Figure 6 As shown, the dielectric film standard sample 10A and the auxiliary standard sample 10B are obtained according to the above method.

[0048] Example 2 This embodiment is basically the same as Embodiment 1, except that this embodiment proposes a method for determining the doping concentration of a wafer dielectric film standard sample for preparation, such as Figure 7 As shown, the following steps are included: S1: Use a precision electronic balance to weigh the auxiliary standard sheet, peel off the protective layer 40 and the buffer layer 20 of the auxiliary standard sheet with an etching solution (HF), and re-weigh the auxiliary standard sheet after peeling. The difference between the weight of the auxiliary standard sheet before weighing and the weight of the auxiliary standard sheet after weighing is the total mass M of the protective layer 40 and the buffer layer 20. C ; S2: Weigh the dielectric film standard sample, peel off the protective layer 40, dielectric film layer 30 and buffer layer 20 of the dielectric film standard sample by etching solution (HF), weigh the stripped dielectric film standard sample again, and the difference between the weight of the dielectric film standard sample before weighing and the weight of the dielectric film standard sample after weighing is the total mass M of the protective layer 40, dielectric film layer 30 and buffer layer 20 S ; S3: The total mass M of the protective layer 40, the dielectric film layer 30 and the buffer layer 20 SThe difference between the total mass Mc of the protective layer 40 and the buffer layer 20 is the total mass M of the dielectric film, that is, M=M C -M S ; S4: According to ICP / MS analysis, the contents of B and P in the solution stripped from the dielectric film standard sample are M B and M P According to the total mass of the dielectric film, the concentration of B element in the standard sample of the dielectric film is calculated to be M B / M, P element content concentration M p / M.

[0049] like Figure 8 As shown, the contents of B element and P element in the standard sample of the dielectric film of the present invention are constant values.

[0050] The above shows and describes the basic principles and main features of the present invention and the advantages of the present invention. It is obvious to those skilled in the art that the present invention is not limited to the details of the above exemplary embodiments, and the present invention can be implemented in other specific forms without departing from the spirit or basic features of the present invention. Therefore, no matter from which point of view, the embodiments should be regarded as exemplary and non-restrictive. The scope of the present invention is defined by the attached claims rather than the above description, and it is intended that all changes falling within the meaning and scope of the equivalent elements of the claims are included in the present invention. Any figure mark in the claims should not be regarded as limiting the claims involved.

[0051] In addition, it should be understood that although this specification is described in accordance with the implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other implementation modes that can be understood by those skilled in the art. The above content is only to illustrate the technical idea of ​​the present invention, and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution according to the technical idea proposed by the present invention shall fall within the protection scope of the claims of the present invention.

Claims

1. A method for preparing a wafer dielectric film doping concentration standard sample, characterized in that: The following steps are involved: S1, preparing two silicon substrates and performing a deposition step by PECVD to deposit a buffer layer on the silicon substrate; S2, performing a deposition step on one of the silicon substrates by PECVD to deposit a dielectric film layer on the buffer layer; S3, performing a deposition step on the two silicon substrates by PECVD to deposit a protective layer on the buffer layer of one of the silicon substrates and on the dielectric film layer of the other silicon substrate; S4. Annealing the silicon substrate to obtain a dielectric film standard sample and an auxiliary standard sample.

2. A method for preparing a wafer dielectric film doping concentration standard sample according to claim 1, characterized in that: The specific process of step S1 is: Place the silicon substrate in the PECVD equipment, turn off the boron and phosphorus sources, establish SiH4 and O2 gas flows under vacuum, and deposit a silicon dioxide layer with a thickness of 50 to 300Å on the silicon substrate.

3. The method for preparing a wafer dielectric film doping concentration standard sample according to claim 1, characterized in that: The specific process of step S2 is: Take out one of the silicon substrates, and deposit a BPSG film with a thickness of 100nm to 20μm on the buffer layer of the other silicon substrate. Introduce gas and deposit it at 400°C, pressure 2.4Torr, and RF power 0.9kw.

4. The method for preparing a wafer dielectric film doping concentration standard sample according to claim 3, characterized in that: The dopant in the BPSG film is 2.0-4.5% by weight of the B element and 3.0-7.0% by weight of the P element.

5. The method for preparing a wafer dielectric film doping concentration standard sample according to claim 3, characterized in that: The gases are N2, SiH4, N2O, PH3 and B2H6.

6. The method for preparing a wafer dielectric film doping concentration standard sample according to claim 4, characterized in that: The SiH4 gas flow rate is 0.12~0.34SLPM.

7. The method for preparing a wafer dielectric film doping concentration standard sample according to claim 1, characterized in that: The specific process of step S3 is: Place two silicon substrates in PECVD, turn off the boron and phosphorus sources, establish SiH4 and O2 gas flows under vacuum, and deposit a silicon dioxide layer with a thickness of 50 to 350Å on the silicon substrate.

8. The method for preparing a wafer dielectric film doping concentration standard sample according to claim 1, characterized in that: The annealing treatment in step S4 is performed at a temperature of 800 to 1000° C. and for a time of 10 to 30 minutes.

9. A method for determining the doping concentration of a wafer dielectric film prepared according to any one of claims 1 to 8, characterized in that: The following steps are involved: S1: weigh the auxiliary standard sheet, peel off the protective layer and buffer layer of the auxiliary standard sheet with an etching solution, weigh the peeled auxiliary standard sheet again, and the difference between the weight of the auxiliary standard sheet before weighing and the weight of the auxiliary standard sheet after weighing is the total mass of the protective layer and the buffer layer; S2: Weigh the dielectric film standard sample, peel off the protective layer, dielectric film layer and buffer layer of the dielectric film standard sample by etching solution, weigh the stripped dielectric film standard sample again, and the difference between the weight of the dielectric film standard sample before weighing and the weight of the dielectric film standard sample after weighing is the total mass of the protective layer, dielectric film layer and buffer layer; S3: The difference between the total mass of the protective layer, the dielectric film layer and the buffer layer and the total mass of the protective layer and the buffer layer is the total mass of the dielectric film; S4: Analyze the contents of B element and P element in the solution stripped from the dielectric film standard sample according to ICP / MS, and calculate the content concentrations of B element and P element in the dielectric film standard sample according to the total mass of the dielectric film.

10. The value determination method according to claim 9, characterized in that: In step S1, a precision electronic balance is used for weighing.

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