Semiconductor chip packaging defect detection method

Abstract

The invention discloses a semiconductor chip packaging defect detection method, relates to the technical field of packaging defect detection, and solves the technical problems that in the prior art, offset detection cannot be carried out on pins through image acquisition and packaging defect detection cannot be carried out according to light refraction, in particular to chip packaging defect detection. Light source selection is carried out according to the gathered semiconductor chips; after the light source type is determined through light source analysis, pin irradiation is carried out, picture collection is carried out on the irradiated pins, and whether position deviation exists in the pins in the chip operation stage or not is inferred according to the collected pictures; after the pin detection is completed and the pin detection is normal, performing defect collection on the packaging surface according to the collected picture; performing real-time evaluation on a detection environment, namely performing real-time evaluation on a real-time defect detection environment in a semiconductor chip packaging defect detection process; after the detection environment is qualified, continuously performing defect detection until the detection is finished.

Description

Technical Field

[0001] The present invention relates to the technical field of packaging defect detection, and in particular to a semiconductor chip packaging defect detection method. Background Art

[0002] Semiconductor chip packaging is a key link in the semiconductor manufacturing process. It has the functions of chip protection, electrical connection, stress relief, size adjustment and coordination. Semiconductor chip packaging defect detection is a detection method to ensure chip quality and reliability. The existing technology uses a high-resolution camera to capture chip surface images and identifies defects through image analysis. AXI is based on the principle of X-ray penetration and can detect internal package structure and solder joint quality, such as cold solder joints, short circuits and other defects, without causing damage to the chip.

[0003] However, in the prior art, it is not possible to adjust the color temperature of the captured image, it is impossible to maintain the most efficient display state, it is not possible to detect pin offset through image capture and it is not possible to detect packaging defects based on light refraction, which reduces the efficiency and accuracy of chip defect detection.

[0004] In view of the above technical defects, a solution is now proposed. Summary of the invention

[0005] The purpose of the present invention is to solve the above-mentioned problems and to provide a semiconductor chip packaging defect detection method.

[0006] The purpose of the present invention can be achieved through the following technical solutions: A semiconductor chip packaging defect detection method, the packaging defect detection method steps are as follows: Collect semiconductor chips, aggregate them, and perform chip packaging defect detection; Light source analysis and selection: select the light source based on the collected semiconductor chips, and analyze the light source characteristics in combination with the current semiconductor chip color analysis; Pin detection: After determining the light source type through light source analysis, the pins are illuminated and pictures of the pins after illumination are collected. Based on the collected pictures, it is inferred whether there is positional displacement of the pins during the chip operation stage; Package defect detection: After the pin detection is completed and the pin detection is normal, the semiconductor chip is subjected to package defect detection. The semiconductor chip package is imaged through image acquisition, and defects on the package surface are acquired based on the acquired images. Real-time evaluation of the detection environment: During the semiconductor chip packaging defect detection process, the real-time defect detection environment is evaluated in real time; After the testing environment is qualified, defect detection continues until the testing is completed.

[0007] As a preferred embodiment of the present invention, the light source analysis and selection process is as follows: Collect the main color temperature and background color temperature, the main color temperature is the color temperature of the semiconductor chip package color; the background color temperature is the color temperature of the light source type illumination light; collect color temperature compliance data and color temperature control data, if the color temperature compliance data exceeds the color temperature deviation threshold, or the color temperature control data exceeds the time span ratio threshold, the current light source type is marked as a non-use type; if the color temperature compliance data does not exceed the color temperature deviation threshold, and the color temperature control data does not exceed the time span ratio threshold, the current light source type is marked as a use type.

[0008] As a preferred embodiment of the present invention, the color temperature compliance data and the color temperature control data are respectively the deviation values ​​of the main color temperature average and the background color temperature average in the semiconductor chip packaging defect collection picture, and the color temperature adjustment buffer time of the current light source type when the metal part of the pin in the semiconductor chip packaging defect collection picture causes overexposure and the corresponding time span value ratio of the clarity increase span of the current collection picture.

[0009] As a preferred implementation of the present invention, the pin detection process is as follows: After determining the light source type, irradiate with the light source of the used type, collect images of the semiconductor chip, set the collection time point according to the operation cycle of the semiconductor chip, and arrange the collected images corresponding to the collection time point in sequence; Collect pin collection information and obtain the pin detection coefficient through calculation. If the pin detection coefficient exceeds the pin detection coefficient threshold, the current moment is marked as the pin abnormal moment; if the pin detection coefficient corresponding to the semiconductor chip does not exceed the pin detection coefficient threshold, the current moment is marked as the pin normal moment, and continuous pin detection is performed.

[0010] As a preferred embodiment of the present invention, the pin collection information includes the offset value expansion speed of the distance between adjacent pins corresponding to the semiconductor chip pin area, the pin shape angle floating value corresponding to the position of any pin in the semiconductor chip pin area, and the corresponding adjacent pin occlusion area ratio after the corresponding semiconductor chip pin posture is displaced under the currently set camera illumination angle.

[0011] As a preferred embodiment of the present invention, the packaging defect detection process is as follows: The light source transmitting end is set according to the current light source type, and the light source receiving end is set according to the surface roughness of the semiconductor chip package. Through the light source debugging, the light source transmitting end and the light source receiving end are set to transmit and receive the light source, and the package defect detection is performed after the closed loop; Collect single luminous flux information and multiple luminous flux information. If the single luminous flux information exceeds the luminous flux decrease span threshold, or the multiple luminous flux information exceeds the luminous flux cumulative floating span threshold, the current packaging area is positioned and repaired; if the single luminous flux information does not exceed the luminous flux decrease span threshold, and the multiple luminous flux information does not exceed the luminous flux cumulative floating span threshold, the current packaging area is continuously monitored.

[0012] As a preferred embodiment of the present invention, the single light flux information and the multiple light flux information are respectively the light flux decrease span of a single light source receiving end corresponding to a receiving light source during the defect detection process of the semiconductor chip packaging area, and the floating span of the cumulative value of the received light flux of multiple light source receiving ends corresponding to the receiving light sources during the defect detection process of the semiconductor chip packaging area.

[0013] As a preferred embodiment of the present invention, the real-time evaluation process of the detection environment is as follows: Pin defect information and package defect information are collected. If the pin defect information exceeds the numerical deviation floating span threshold, or the package defect information exceeds the path floating quantity ratio threshold, environmental control assistance is performed; if the pin defect information does not exceed the numerical deviation floating span threshold, and the package defect information does not exceed the path floating quantity ratio threshold, the real-time semiconductor defect detection collection image is stored and the defect location in the real-time image is repaired.

[0014] As a preferred embodiment of the present invention, the pin defect information and the package defect information are respectively the floating span of the numerical deviation between the average ambient luminous flux corresponding to the pin defect detection position and the average real-time light source luminous flux, and the floating number ratio of the refraction path of the emitting light source corresponding to the humidity floating stage of the package defect detection position.

[0015] Compared with the prior art, the present invention has the following beneficial effects: 1. In the present invention, by combining the light source characteristic analysis with the current semiconductor chip color analysis, the light source type suitable for the current semiconductor chip is inferred, and the light source is reasonably matched to improve the accuracy of semiconductor chip defect detection, so as to avoid the poor display effect of the image collected on the surface of the corresponding semiconductor chip under the current light source caused by inappropriate light source matching, and the inability to achieve the best image display effect, so that the accuracy of defect detection is reduced, and at the same time, the poor image display effect is easy to hide defects, thereby reducing the use efficiency and performance detection efficiency of the semiconductor chip; Based on the collected images, it is inferred whether there is a position offset of the pins during the operation stage of the chip, so as to facilitate timely pin defect detection, reducing the degradation of the operating performance of the semiconductor chip caused by pin defect anomalies. At the same time, inferring the pin position based on the collected images can effectively and timely provide pin defect warnings, minimizing the impact of pin defect failures.

[0016] 2. In the present invention, the semiconductor chip packaging is captured by image acquisition, and defects on the packaging surface are captured based on the captured images to infer whether there are defects on the packaging surface of the semiconductor chip, thereby avoiding the packaging anomaly of the semiconductor chip that reduces the operating performance of the semiconductor chip, and the inability to control the power parameters of the semiconductor chip, which may also easily cause the internal part of the semiconductor chip to be more affected by the external environment, thereby affecting the operating life of the semiconductor chip; Conduct real-time evaluation of the real-time defect detection environment, infer the feasibility and effectiveness of the current defect detection through environmental evaluation, and avoid the defect detection environment being unsuitable for defect collection, which reduces the accuracy of defect detection. Through real-time environmental evaluation, the environment can also be adjusted in a timely manner to ensure the executability of the current detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to facilitate understanding by those skilled in the art, the present invention is further described below with reference to the accompanying drawings.

[0018] Figure 1 A flow chart of the overall method of the present invention; Figure 2 Flow chart of the method selected for light source analysis of the present invention. DETAILED DESCRIPTION

[0019] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0020] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0021] See also Figure 1 As shown, a semiconductor chip packaging defect detection method, the specific packaging defect detection method steps are as follows: Collect semiconductor chips, aggregate them, and perform chip packaging defect detection; Light source analysis and selection: select the light source based on the collected semiconductor chips. By analyzing the light source characteristics and combining the color analysis of the current semiconductor chip, infer the light source type suitable for the current semiconductor chip. Reasonable light source matching improves the accuracy of semiconductor chip defect detection. Avoid inappropriate light source matching that causes poor display of the image collected on the surface of the corresponding semiconductor chip under the current light source, and cannot achieve the best image display effect. Therefore, the accuracy of defect detection decreases. At the same time, poor image display effect can easily hide defects, thereby reducing the use efficiency of semiconductor chips and the efficiency of performance detection. Pin detection: After determining the light source type through light source analysis, pins are illuminated and pictures of the pins after illumination are collected. Based on the collected pictures, it is inferred whether there is positional offset of the pins during the chip operation phase, so as to facilitate timely pin defect detection and reduce the performance degradation of semiconductor chips caused by pin defect anomalies. At the same time, the pin position inferred based on the collected pictures can effectively and timely issue pin defect warnings, minimizing the impact of pin defect failures; Package defect detection: After completing the pin detection and the pin detection is normal, the semiconductor chip is subjected to package defect detection. The semiconductor chip package is captured through image acquisition, and the package surface is defect-captured based on the captured image to infer whether there are defects on the package surface of the semiconductor chip, so as to avoid the package abnormality of the semiconductor chip reducing the operating performance of the semiconductor chip, and failing to control the power parameters of the semiconductor chip, which is also likely to cause the internal part of the semiconductor chip to be more affected by the external environment, thus affecting the operating life of the semiconductor chip; Real-time evaluation of the detection environment: During the semiconductor chip packaging defect detection process, the real-time defect detection environment is evaluated in real time. The feasibility and effectiveness of the current defect detection can be inferred through environmental evaluation to avoid the defect detection environment being unsuitable for defect collection, thereby reducing the accuracy of defect detection. The real-time environmental evaluation can also be used to timely adjust the environment to ensure the executability of the current detection. After the testing environment is qualified, continue to carry out defect detection until the testing is completed; See also Figure 2 As shown, the light source analysis selection process is as follows: According to the real-time monitoring of the semiconductor chip package color, the color temperature of the package color is collected and marked as the main color temperature, the light source type is obtained, and the light source type illumination light color temperature is collected and marked as the background color temperature; Under the current light source type, the deviation value of the main color temperature mean and the background color temperature mean in the semiconductor chip package defect collection picture is collected, and at the same time, the color temperature adjustment buffer time of the current light source type when the metal part of the pin in the semiconductor chip package defect collection picture causes overexposure and the corresponding time span value ratio of the clarity increase span of the current collection picture is obtained, and the deviation value of the main color temperature mean and the background color temperature mean in the semiconductor chip package defect collection picture, and the color temperature adjustment buffer time of the current light source type when the metal part of the pin in the semiconductor chip package defect collection picture causes overexposure and the corresponding time span value ratio of the clarity increase span of the current collection picture are marked as color temperature compliance data and color temperature control data, respectively, and compared with the color temperature deviation threshold and the time span ratio threshold respectively: wherein the numerical comparison performs statistical analysis on the numerical values ​​of the two data, without considering the influence of inconsistent data units; If the deviation value between the average color temperature of the main body and the average color temperature of the background in the semiconductor chip package defect acquisition picture exceeds the color temperature deviation threshold, or the color temperature adjustment buffer time of the current light source type and the time span value corresponding to the clarity increase span of the current acquisition picture when the metal part of the pin in the semiconductor chip package defect acquisition picture causes overexposure exceed the time span ratio threshold, it is inferred that the current light source type is not suitable for the current package defect detection, and the current light source type is marked as a non-use type; If the deviation value between the average color temperature of the main body and the average color temperature of the background in the semiconductor chip package defect collection picture does not exceed the color temperature deviation threshold, and the color temperature adjustment buffer time of the current light source type when the metal part of the pin in the semiconductor chip package defect collection picture causes overexposure and the time span value ratio corresponding to the clarity increase span of the current collection picture does not exceed the time span ratio threshold, it is inferred that the current light source type is suitable for the current package defect detection, and the current light source type is marked as the use type; The pin detection process is as follows: After determining the light source type, irradiate with the light source of the used type, and collect images of the semiconductor chip. Set the collection time point according to the operation cycle of the semiconductor chip and arrange the collected images at the corresponding collection time point in sequence, obtain the offset value expansion speed of the distance between adjacent pins in the semiconductor chip pin area corresponding to the arranged collected images, and mark the offset value expansion speed of the distance between adjacent pins in the semiconductor chip pin area corresponding to the arranged collected images as YLP; Obtain the pin shape angle floating value of the position of any pin corresponding to the semiconductor chip pin area corresponding to the arrangement collection picture, and mark the pin shape angle floating value of the position of any pin corresponding to the semiconductor chip pin area corresponding to the arrangement collection picture as JDF, where the shape angle is represented by the angle formed by the shape of the current pin and the package after the pin is installed in the current posture; Obtain the percentage of the occlusion area of ​​the adjacent pins after the pin posture of the semiconductor chip is displaced under the currently set camera illumination angle in the arranged collected image, and mark the percentage of the occlusion area of ​​the adjacent pins after the pin posture of the semiconductor chip is displaced under the currently set camera illumination angle in the arranged collected image as ZDM; The above collected information is uniformly marked as pin collection information, and substituted into the formula to obtain the corresponding pin detection coefficient of the semiconductor chip, where the formula is: , where G is the pin detection coefficient corresponding to the semiconductor chip, faw1, faw2 and faw3 are preset proportional coefficients, e is a natural constant, and β is an error correction factor, which is 0.987; Compare the pin detection coefficient corresponding to the semiconductor chip with the pin detection coefficient threshold: If the pin detection coefficient corresponding to the semiconductor chip exceeds the pin detection coefficient threshold, it is inferred that the pin detection of the current semiconductor chip corresponding to the image acquisition moment is abnormal, the current moment is marked as the pin abnormal moment, and the pin is repaired at the pin abnormal moment. At the same time, the semiconductor chip is quality inspected with the current abnormal pin as the starting point and maintenance is performed when abnormal; If the pin detection coefficient corresponding to the semiconductor chip does not exceed the pin detection coefficient threshold, it is inferred that the pin detection of the current semiconductor chip corresponding to the image acquisition moment is normal, and the current moment is marked as the pin normal moment, and continuous pin detection is performed. If the duration span of the pin normal moment increases, the span of the image acquisition moment increases accordingly; The packaging defect detection process is as follows: After the pin detection is completed and the detection is normal, the semiconductor chip packaging defects are detected, the light source transmitting end is set according to the current light source type, and the light source receiving end is set according to the roughness of the semiconductor chip packaging surface. Specifically, when the packaging surface roughness exceeds the roughness threshold, the packaging surface is set to high roughness, otherwise the packaging surface is set to low roughness; if the packaging surface is high roughness, multiple light source receiving ends are set, otherwise a single light source receiving end is set when the packaging surface is low roughness; Through light source debugging, the light source transmitting end and the light source receiving end are used for light source transmission and reception, and packaging defect detection is performed after the loop is closed; The luminous flux drop span of a single light source receiving end corresponding to a receiving light source during the semiconductor chip packaging area defect detection process is obtained, and the floating span of the accumulated received luminous flux of multiple light source receiving ends corresponding to the receiving light sources during the semiconductor chip packaging area defect detection process is obtained, and the luminous flux drop span of a single light source receiving end corresponding to a receiving light source during the semiconductor chip packaging area defect detection process and the floating span of the accumulated received luminous flux of multiple light source receiving ends corresponding to the receiving light sources during the semiconductor chip packaging area defect detection process are marked as single luminous flux information and multiple luminous flux information, respectively, and compared with the luminous flux drop span threshold and the luminous flux accumulated floating span threshold, respectively: If the luminous flux drop span of a single light source receiving end corresponding to a receiving light source exceeds the luminous flux drop span threshold during the semiconductor chip packaging area defect detection process, or the floating span of the accumulated value of the received luminous flux of multiple light source receiving ends corresponding to the receiving light sources during the semiconductor chip packaging area defect detection process exceeds the accumulated floating span threshold, it is inferred that the semiconductor chip packaging area defect detection is abnormal, and it is inferred that the current packaging area has a surface deformation at the corresponding position, causing the roughness of the packaging surface to change, affecting the set light recognition, and the current packaging area is positioned and repaired; If the luminous flux drop span of a single light source receiving end corresponding to a receiving light source does not exceed the luminous flux drop span threshold during the semiconductor chip packaging area defect detection process, and the floating span of the accumulated value of the received luminous flux of multiple light source receiving ends corresponding to the receiving light sources does not exceed the accumulated floating span threshold during the semiconductor chip packaging area defect detection process, it is inferred that the semiconductor chip packaging area defect detection is normal, and the current packaging area is continuously monitored; The real-time evaluation process of the detection environment is as follows: When performing defect detection on pins and packages, perform environmental detection on the location where the real-time semiconductor chip package is located, obtain the floating span of the numerical deviation between the average value of the ambient luminous flux corresponding to the pin defect detection location and the average value of the real-time light source luminous flux, and obtain the floating quantity ratio of the refraction path of the emitting light source corresponding to the humidity floating stage of the package defect detection location, and mark the floating span of the numerical deviation between the average value of the ambient luminous flux corresponding to the pin defect detection location and the average value of the real-time light source luminous flux and the floating quantity ratio of the refraction path of the emitting light source corresponding to the humidity floating stage of the package defect detection location as pin defect information and package defect information, respectively, and compare them with the floating span threshold of the numerical deviation and the path floating quantity ratio threshold, respectively: If the numerical deviation floating span between the average value of the ambient luminous flux corresponding to the pin defect detection position and the average value of the real-time light source luminous flux exceeds the numerical deviation floating span threshold, or the floating number ratio of the refraction path of the emission light source corresponding to the humidity floating stage of the package defect detection position exceeds the path floating number ratio threshold, it is inferred that the environmental detection at the defect detection position is abnormal, and environmental control assistance is performed, that is, real-time environmental parameters are controlled during defect detection, such as the ambient humidity value, light flux floating value, etc.; If the numerical deviation floating span between the average value of the ambient luminous flux corresponding to the pin defect detection position and the average value of the real-time light source luminous flux does not exceed the numerical deviation floating span threshold, and the floating quantity ratio of the refraction path of the emission light source corresponding to the humidity floating stage of the package defect detection position does not exceed the path floating quantity ratio threshold, it is inferred that the environmental detection of the defect detection position is normal, the real-time semiconductor defect detection acquisition image is stored, and the defect position of the real-time image with defects is repaired; The above formulas are obtained by collecting a large amount of data and performing software simulation, and a formula close to the actual value is selected. The coefficients in the formula are set by technicians in this field according to actual conditions; When the present invention is used, semiconductor chips are collected, and the semiconductor chips are summarized, and chip packaging defect detection is performed; light source analysis and selection, light source selection is performed according to the summarized semiconductor chips, and light source characteristic analysis is combined with current semiconductor chip color analysis; pin detection, pin irradiation is performed after the light source type is determined by light source analysis, and pictures of the pins after irradiation are collected, and it is inferred whether there is positional offset of the pins during the chip operation stage according to the collected pictures; packaging defect detection, after the pin detection is completed and the pin detection is normal, the semiconductor chip is packaged and detected, and pictures of the semiconductor chip packaging are collected through picture collection, and defects are collected on the packaging surface according to the collected pictures; real-time evaluation of the detection environment, during the semiconductor chip packaging defect detection process, the real-time defect detection environment is evaluated in real time; After the testing environment is qualified, defect detection continues until the testing is completed.

[0022] The preferred embodiments of the present invention disclosed above are only used to help explain the present invention. The preferred embodiments do not describe all the details in detail, nor do they limit the invention to only specific implementation methods. Obviously, many modifications and changes can be made according to the content of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can understand and use the present invention well. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A semiconductor chip packaging defect detection method, characterized in that: The steps of the packaging defect detection method are as follows: Collect semiconductor chips, aggregate them, and perform chip packaging defect detection; Light source analysis and selection: select the light source based on the collected semiconductor chips, and analyze the light source characteristics in combination with the current semiconductor chip color analysis; Pin detection: After determining the light source type through light source analysis, the pins are illuminated and pictures of the pins after illumination are collected. Based on the collected pictures, it is inferred whether there is positional displacement of the pins during the chip operation stage; Package defect detection: After the pin detection is completed and the pin detection is normal, the semiconductor chip is subjected to package defect detection. The semiconductor chip package is imaged through image acquisition, and defects on the package surface are acquired based on the acquired images. Real-time evaluation of the detection environment: During the semiconductor chip packaging defect detection process, the real-time defect detection environment is evaluated in real time; After the testing environment is qualified, defect detection continues until the testing is completed.

2. A semiconductor chip packaging defect detection method according to claim 1, characterized in that: The light source analysis and selection process is as follows: Collect the main color temperature and background color temperature, the main color temperature is the color temperature of the semiconductor chip package color; the background color temperature is the color temperature of the light source type illumination light; collect color temperature compliance data and color temperature control data, if the color temperature compliance data exceeds the color temperature deviation threshold, or the color temperature control data exceeds the time span ratio threshold, the current light source type is marked as a non-use type; if the color temperature compliance data does not exceed the color temperature deviation threshold, and the color temperature control data does not exceed the time span ratio threshold, the current light source type is marked as a use type.

3. A semiconductor chip packaging defect detection method according to claim 2, characterized in that: The color temperature compliance data and the color temperature control data are respectively the deviation value between the average color temperature of the main body and the average background color temperature in the semiconductor chip package defect collection picture, and the color temperature adjustment buffer time of the current light source type when the metal part of the pin in the semiconductor chip package defect collection picture causes overexposure and the corresponding time span value ratio of the clarity increase span of the current collection picture.

4. A semiconductor chip packaging defect detection method according to claim 1, characterized in that: The pin detection process is as follows: After determining the light source type, irradiate with the light source of the used type, collect images of the semiconductor chip, set the collection time point according to the operation cycle of the semiconductor chip, and arrange the collected images corresponding to the collection time point in sequence; Collect pin collection information and obtain the pin detection coefficient through calculation. If the pin detection coefficient exceeds the pin detection coefficient threshold, the current moment is marked as the pin abnormal moment; if the pin detection coefficient corresponding to the semiconductor chip does not exceed the pin detection coefficient threshold, the current moment is marked as the pin normal moment, and continuous pin detection is performed.

5. A semiconductor chip packaging defect detection method according to claim 4, characterized in that: The pin collection information includes the offset value expansion speed of the distance between adjacent pins in the semiconductor chip pin area, the pin shape angle floating value corresponding to the position of any pin in the semiconductor chip pin area, and the proportion of the adjacent pin occlusion area corresponding to the displacement of the semiconductor chip pin posture under the currently set camera illumination angle.

6. The semiconductor chip package defect detection method according to claim 1, characterized in that: The packaging defect detection process is as follows: The light source transmitting end is set according to the current light source type, and the light source receiving end is set according to the surface roughness of the semiconductor chip package. Through the light source debugging, the light source transmitting end and the light source receiving end are set to transmit and receive the light source, and the package defect detection is performed after the closed loop; Collect single luminous flux information and multiple luminous flux information. If the single luminous flux information exceeds the luminous flux decrease span threshold, or the multiple luminous flux information exceeds the luminous flux cumulative floating span threshold, the current packaging area is positioned and repaired; if the single luminous flux information does not exceed the luminous flux decrease span threshold, and the multiple luminous flux information does not exceed the luminous flux cumulative floating span threshold, the current packaging area is continuously monitored.

7. A semiconductor chip packaging defect detection method according to claim 6, characterized in that: The single light flux information and multiple light flux information are respectively the light flux drop span of a single light source receiving end corresponding to a receiving light source during the semiconductor chip packaging area defect detection process, and the floating span of the accumulated value of the receiving light flux of multiple light source receiving ends corresponding to the receiving light sources during the semiconductor chip packaging area defect detection process.

8. The semiconductor chip package defect detection method according to claim 1, characterized in that: The real-time evaluation process of the detection environment is as follows: Collect pin defect information and package defect information. If the pin defect information exceeds the numerical deviation floating span threshold, or the package defect information exceeds the path floating quantity ratio threshold, perform environmental control assistance; If the pin defect information does not exceed the numerical deviation floating span threshold, and the package defect information does not exceed the path floating quantity ratio threshold, the real-time semiconductor defect detection acquisition image is stored and the defect location of the real-time image is repaired.

9. A semiconductor chip packaging defect detection method according to claim 8, characterized in that: The pin defect information and package defect information are respectively the floating span of the numerical deviation between the average ambient luminous flux and the average real-time light source luminous flux corresponding to the pin defect detection position, and the floating number ratio of the refraction path of the emitting light source corresponding to the humidity floating stage of the package defect detection position.

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