A method for detecting semiconductor chip packaging defects

Through light source characteristic analysis, select the light source type, combined with semiconductor chip color analysis, pin and package defect detection are carried out, which solves the problem of insufficient detection efficiency and accuracy in the prior art, and achieves efficient and accurate semiconductor chip packaging defect detection.

CN119985531BActive Publication Date: 2025-09-02MICA TECHSUZHOUCO
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202510172161.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-02-17
Publication Date
2025-09-02
Estimated Expiration
2045-02-17

AI Technical Summary

Technical Problem

In the prior art, semiconductor chip package defect detection cannot be performed to control color temperature, cannot maintain the optimal image display state, and cannot detect pin offsets and package defects, resulting in a decrease in detection efficiency and accuracy.

Method used

Select the appropriate light source type through light source characteristic analysis, combine semiconductor chip color analysis, pin detection and packaging defect detection, evaluate the detection environment in real time, ensure the best image acquisition effect, and promptly detect pin position offsets and packaging defects.

Benefits of technology

It improves the accuracy and efficiency of semiconductor chip defect detection, reduces the impact of pin defects on chip performance, ensures that the detection environment is suitable, avoids the hidden defects caused by poor detection results, and improves the chip's usage efficiency and operating performance.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119985531B_ABST
    Figure CN119985531B_ABST
Patent Text Reader

Abstract

The present invention discloses a semiconductor chip package defect detection method, which relates to the technical field of package defect detection and solves the technical problems in the prior art that pin offset detection cannot be performed through image acquisition and package defect detection cannot be performed based on light refraction. Specifically, the method comprises the following steps: performing chip package defect detection; selecting a light source based on aggregated semiconductor chips; irradiating the pins after determining the light source type through light source analysis, and capturing images of the pins after irradiation, and inferring whether there is positional offset of the pins during the chip operation phase based on the captured images; after completing the pin detection and confirming that the pin detection is normal, capturing defects on the package surface based on the captured images; conducting real-time evaluation of the detection environment, and performing real-time evaluation of the real-time defect detection environment during the semiconductor chip package defect detection process; and continuously performing defect detection after the detection environment is qualified until the detection is completed.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the technical field of packaging defect detection, and in particular to a semiconductor chip packaging defect detection method. Background Art

[0002] Semiconductor chip packaging is a key step in the semiconductor manufacturing process, responsible for chip protection, electrical connection, stress relief, and dimensional adjustment. Semiconductor chip packaging defect detection is a means of ensuring chip quality and reliability. Existing detection methods use high-resolution cameras to capture images of the chip surface and identify defects through image analysis. AXI, based on the principle of X-ray penetration, can detect the internal structure of the package and the quality of solder joints, such as cold solder joints and short circuits, without damaging the chip.

[0003] However, the existing technology cannot control the color temperature of the captured image, cannot maintain the most efficient display state, cannot detect pin offset through image capture, and cannot detect packaging defects based on light refraction, which reduces the efficiency and accuracy of chip defect detection.

[0004] In view of the above technical defects, a solution is now proposed. Summary of the Invention

[0005] The purpose of the present invention is to solve the above-mentioned problems and to provide a method for detecting semiconductor chip packaging defects.

[0006] The purpose of the present invention can be achieved through the following technical solutions:

[0007] A semiconductor chip packaging defect detection method, the packaging defect detection method steps are as follows:

[0008] Collect semiconductor chips, aggregate them, and perform chip packaging defect detection;

[0009] Light source analysis and selection: select the light source based on the collected semiconductor chips, and analyze the light source characteristics in combination with the color analysis of the current semiconductor chips;

[0010] Pin detection: After determining the light source type through light source analysis, the pins are illuminated and images of the illuminated pins are captured. Based on the captured images, it is inferred whether there is any positional deviation of the pins during the chip operation phase;

[0011] Package defect detection: After completing the pin detection and the pin detection is normal, the semiconductor chip is subjected to package defect detection. The semiconductor chip package is imaged through image acquisition, and defects on the package surface are detected based on the captured images;

[0012] Real-time evaluation of the detection environment: During the semiconductor chip packaging defect detection process, the real-time defect detection environment is evaluated in real time;

[0013] After the inspection environment is qualified, defect inspection will continue until the inspection is completed.

[0014] As a preferred embodiment of the present invention, the light source analysis and selection process is as follows:

[0015] Collect the main color temperature and background color temperature, the main color temperature is the color temperature of the semiconductor chip package color; the background color temperature is the color temperature of the light source type illumination light; collect color temperature compliance data and color temperature control data, if the color temperature compliance data exceeds the color temperature deviation threshold, or the color temperature control data exceeds the time span ratio threshold, the current light source type is marked as a non-use type; if the color temperature compliance data does not exceed the color temperature deviation threshold, and the color temperature control data does not exceed the time span ratio threshold, the current light source type is marked as a use type.

[0016] As a preferred embodiment of the present invention, the color temperature compliance data and the color temperature control data are respectively the deviation value between the average color temperature of the main body and the average background color temperature in the semiconductor chip packaging defect acquisition picture, and the color temperature adjustment buffer time of the current light source type when the metal part of the pin in the semiconductor chip packaging defect acquisition picture causes overexposure and the time span value ratio corresponding to the clarity increase span of the current acquisition picture.

[0017] As a preferred embodiment of the present invention, the pin detection process is as follows:

[0018] After determining the light source type, irradiate with the light source of the used type and collect images of the semiconductor chip. Set the collection time point according to the operation cycle of the semiconductor chip and arrange the collected images corresponding to the collection time point in sequence.

[0019] Collect pin collection information and obtain the pin detection coefficient through calculation. If the pin detection coefficient exceeds the pin detection coefficient threshold, the current moment is marked as the pin abnormal moment; if the pin detection coefficient corresponding to the semiconductor chip does not exceed the pin detection coefficient threshold, the current moment is marked as the pin normal moment, and continuous pin detection is performed.

[0020] As a preferred embodiment of the present invention, the pin collection information includes the offset value expansion speed of the distance between adjacent pins corresponding to the semiconductor chip pin area, the pin shape angle floating value corresponding to the position of any pin in the semiconductor chip pin area, and the proportion of the adjacent pin occlusion area corresponding to the displacement of the semiconductor chip pin posture under the currently set camera illumination angle.

[0021] As a preferred embodiment of the present invention, the packaging defect detection process is as follows:

[0022] The light source transmitter is set according to the current light source type, and the light source receiver is set according to the surface roughness of the semiconductor chip package. Through light source debugging, the light source transmitter and the light source receiver are set to transmit and receive light, and the package defect detection is performed after the closed loop;

[0023] Collect single luminous flux information and multiple luminous flux information. If the single luminous flux information exceeds the luminous flux drop span threshold, or the multiple luminous flux information exceeds the luminous flux cumulative floating span threshold, the current packaging area is positioned and repaired; if the single luminous flux information does not exceed the luminous flux drop span threshold, and the multiple luminous flux information does not exceed the luminous flux cumulative floating span threshold, the current packaging area is continuously monitored.

[0024] As a preferred embodiment of the present invention, the single optical flux information and the multiple optical flux information are respectively the luminous flux decrease span of the receiving light source corresponding to the single light source receiving end during the semiconductor chip packaging area defect detection process, and the floating span of the cumulative value of the receiving luminous flux of the receiving light sources corresponding to the multiple light source receiving ends during the semiconductor chip packaging area defect detection process.

[0025] As a preferred embodiment of the present invention, the real-time evaluation process of the detection environment is as follows:

[0026] Collect pin defect information and package defect information. If the pin defect information exceeds the numerical deviation floating span threshold, or the package defect information exceeds the path floating quantity ratio threshold, perform environmental control assistance. If the pin defect information does not exceed the numerical deviation floating span threshold, and the package defect information does not exceed the path floating quantity ratio threshold, store the real-time semiconductor defect detection collection image and perform defect repair on the defective location in the real-time image.

[0027] As a preferred embodiment of the present invention, the pin defect information and the package defect information are respectively the floating span of the numerical deviation between the average ambient luminous flux corresponding to the pin defect detection position and the average real-time light source luminous flux, and the floating number ratio of the refraction path of the emitting light source corresponding to the humidity floating stage of the package defect detection position.

[0028] Compared with the prior art, the present invention has the following beneficial effects:

[0029] 1. In the present invention, by combining light source characteristic analysis with current semiconductor chip color analysis, the appropriate light source type for the current semiconductor chip is inferred, and the light source is reasonably matched to improve the accuracy of semiconductor chip defect detection. This avoids the situation where an inappropriate light source match causes poor display effects of the image captured on the surface of the corresponding semiconductor chip under the current light source, which in turn prevents the optimal image display effect from being achieved. As a result, the accuracy of defect detection decreases, and poor image display effects can easily hide defects, thereby reducing the utilization efficiency and performance detection efficiency of the semiconductor chip.

[0030] Based on the collected images, it is inferred whether there is positional offset of the pins during the chip operation phase, so that pin defects can be detected in a timely manner, reducing the degradation of the operating performance of the semiconductor chip caused by pin defect anomalies. At the same time, inferring the pin position based on the collected images can effectively and timely issue pin defect warnings, minimizing the impact of pin defect failures.

[0031] 2. In the present invention, the semiconductor chip package is captured by image acquisition, and defects on the package surface are detected based on the captured images to infer whether there are defects on the package surface of the semiconductor chip. This prevents the semiconductor chip package abnormality from reducing the operating performance of the semiconductor chip, making it impossible to control the power parameters of the semiconductor chip, and easily causing the internal part of the semiconductor chip to be more affected by the external environment, thereby shortening the operating life of the semiconductor chip.

[0032] Conduct real-time evaluation of the real-time defect detection environment, infer the feasibility and effectiveness of the current defect detection through environmental evaluation, and avoid the defect detection environment being unsuitable for defect collection, thereby reducing the accuracy of defect detection. Real-time environmental evaluation can also be used to timely adjust the environment to ensure the executable nature of the current detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] To facilitate understanding by those skilled in the art, the present invention is further described below with reference to the accompanying drawings.

[0034] Figure 1 A flow chart of the overall method of the present invention;

[0035] Figure 2 Flowchart of the method selected for light source analysis of the present invention. DETAILED DESCRIPTION

[0036] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0037] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present invention. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute a separate or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0038] See also Figure 1 As shown, a semiconductor chip packaging defect detection method, the specific packaging defect detection method steps are as follows:

[0039] Collect semiconductor chips, aggregate them, and perform chip packaging defect detection;

[0040] Light source analysis and selection: Based on the collected semiconductor chips, light source selection is performed. By analyzing the light source characteristics and combining them with the color analysis of the current semiconductor chip, the appropriate light source type for the current semiconductor chip is inferred. Reasonable light source matching improves the accuracy of semiconductor chip defect detection and avoids the situation where inappropriate light source matching causes poor display effects of the images collected on the surface of the corresponding semiconductor chip under the current light source, which cannot achieve the best image display effect. As a result, the accuracy of defect detection decreases. At the same time, poor image display effects can easily hide defects, thereby reducing the utilization efficiency of semiconductor chips and the efficiency of performance detection.

[0041] Pin detection: After determining the light source type through light source analysis, the pins are illuminated and images of the illuminated pins are captured. The captured images are used to infer whether the pins have positional offsets during the chip's operation phase, allowing for timely pin defect detection. This reduces the risk of pin defect anomalies causing performance degradation of the semiconductor chip. Inferring the pin position based on the captured images can effectively and promptly provide early warning of pin defects, minimizing the impact of pin defect failures.

[0042] Package defect detection: After completing the pin detection and the pin detection is normal, the semiconductor chip is subjected to package defect detection. The semiconductor chip package is imaged through image acquisition, and the package surface is detected based on the captured image to infer whether there are defects on the package surface of the semiconductor chip. This prevents the semiconductor chip package abnormality from reducing the operating performance of the semiconductor chip, making it impossible to control the power parameters of the semiconductor chip, and easily causing the internal part of the semiconductor chip to be more affected by the external environment, thereby shortening the operating life of the semiconductor chip.

[0043] Real-time evaluation of the testing environment: During the semiconductor chip packaging defect detection process, the real-time defect detection environment is evaluated in real time. The feasibility and effectiveness of the current defect detection can be inferred through environmental evaluation to avoid the defect detection environment being unsuitable for defect collection, which reduces the accuracy of defect detection. Real-time environmental evaluation can also be used to timely adjust the environment to ensure the executableness of the current detection.

[0044] After the testing environment is qualified, continue defect detection until the testing is completed;

[0045] See also Figure 2 As shown, the light source analysis and selection process is as follows:

[0046] According to the real-time monitoring of the semiconductor chip package color, the color temperature of the package color is collected and marked as the main color temperature, the light source type is obtained, and the light source type illumination light color temperature is collected and marked as the background color temperature;

[0047] Under the current light source type, the deviation value of the main body color temperature average and the background color temperature average in the semiconductor chip package defect collection picture is collected, and at the same time, the color temperature adjustment buffer time of the current light source type when the metal part of the pin in the semiconductor chip package defect collection picture causes overexposure and the corresponding time span value ratio of the clarity increase span of the current collection picture are obtained. The deviation value of the main body color temperature average and the background color temperature average in the semiconductor chip package defect collection picture and the color temperature adjustment buffer time of the current light source type when the metal part of the pin in the semiconductor chip package defect collection picture causes overexposure and the corresponding time span value ratio of the clarity increase span of the current collection picture are marked as color temperature compliance data and color temperature control data, respectively, and compared with the color temperature deviation threshold and the time span ratio threshold, respectively: wherein the numerical comparison performs statistical analysis on the numerical values ​​of the two data without considering the influence of inconsistent data units;

[0048] If the deviation between the average color temperature of the main body and the average color temperature of the background in the semiconductor chip package defect collection image exceeds the color temperature deviation threshold, or if the ratio of the color temperature adjustment buffer time of the current light source type to the time span corresponding to the clarity increase span of the current collection image when the metal part of the pin in the semiconductor chip package defect collection image causes overexposure exceeds the time span ratio threshold, it is inferred that the current light source type is not suitable for the current package defect detection and the current light source type is marked as unused;

[0049] If the deviation between the average color temperature of the main body and the average color temperature of the background in the semiconductor chip package defect collection image does not exceed the color temperature deviation threshold, and the ratio of the color temperature adjustment buffer time of the current light source type to the time span corresponding to the clarity increase span of the current collection image when the metal part of the pin in the semiconductor chip package defect collection image causes overexposure does not exceed the time span ratio threshold, it is inferred that the current light source type is suitable for the current package defect detection and the current light source type is marked as the use type;

[0050] The pin detection process is as follows:

[0051] After determining the light source type, irradiation is performed using the light source of the used type, and images of the semiconductor chip are captured. A capture time point is set according to an operating cycle of the semiconductor chip, and the captured images corresponding to the capture time points are sequentially arranged. An offset value expansion speed corresponding to the distance between adjacent pins in a pin region of the semiconductor chip corresponding to the arranged captured images is obtained, and the offset value expansion speed corresponding to the distance between adjacent pins in the pin region of the semiconductor chip corresponding to the arranged captured images is marked as YLP.

[0052] Obtaining a pin shape angle floating value corresponding to any pin position in the semiconductor chip pin area corresponding to the arrangement and acquisition image, and marking the pin shape angle floating value corresponding to any pin position in the semiconductor chip pin area corresponding to the arrangement and acquisition image as JDF, where the shape angle is represented by the angle formed by the shape of the current pin and the package after the pin is installed in the current posture;

[0053] Obtain the percentage of the occlusion area of ​​the adjacent pins after the posture of the semiconductor chip pins is displaced under the currently set camera illumination angle in the arranged captured image, and mark the percentage of the occlusion area of ​​the adjacent pins after the posture of the semiconductor chip pins is displaced under the currently set camera illumination angle in the arranged captured image as ZDM;

[0054] The above collected information is uniformly marked as pin collection information, and substituted into the formula to obtain the corresponding pin detection coefficient of the semiconductor chip, where the formula is: , where G is the detection coefficient of the corresponding pin of the semiconductor chip, faw1, faw2 and faw3 are preset proportional coefficients, e is a natural constant, and β is an error correction factor with a value of 0.987;

[0055] Compare the pin detection coefficient corresponding to the semiconductor chip with the pin detection coefficient threshold:

[0056] If the pin detection coefficient of the semiconductor chip exceeds the pin detection coefficient threshold, it is inferred that the pin detection of the current semiconductor chip at the time of image acquisition is abnormal, the current moment is marked as the pin abnormal moment, and the pin is repaired at the pin abnormal moment. At the same time, the semiconductor chip is quality inspected starting from the current abnormal pin and maintenance is performed when the abnormality occurs.

[0057] If the pin detection coefficient of the semiconductor chip does not exceed the pin detection coefficient threshold, it is inferred that the pin detection of the current semiconductor chip corresponding to the image acquisition moment is normal, and the current moment is marked as the pin normal moment. The pin detection is continued, and if the duration of the pin normal moment increases, the span of the image acquisition moment increases accordingly;

[0058] The packaging defect detection process is as follows:

[0059] After the pin inspection is completed and the inspection is normal, the semiconductor chip package defects are inspected. The light source transmitting end is set according to the current light source type, and the light source receiving end is set according to the surface roughness of the semiconductor chip package. Specifically, when the package surface roughness exceeds the roughness threshold, the package surface is set to high roughness, otherwise the package surface is set to low roughness; if the package surface is high roughness, multiple light source receiving ends are set, otherwise a single light source receiving end is set when the package surface is low roughness;

[0060] Through light source debugging, the light source transmitting end and the light source receiving end are tested for light source transmission and reception, and packaging defect detection is performed after the loop is closed;

[0061] The luminous flux drop span of a single light source receiving end corresponding to a receiving light source during the semiconductor chip packaging area defect detection process is obtained, and the floating span of the accumulated received luminous flux of multiple light source receiving ends corresponding to the receiving light sources during the semiconductor chip packaging area defect detection process is obtained. The luminous flux drop span of a single light source receiving end corresponding to a receiving light source during the semiconductor chip packaging area defect detection process and the floating span of the accumulated received luminous flux of multiple light source receiving ends corresponding to the receiving light sources during the semiconductor chip packaging area defect detection process are marked as single luminous flux information and multiple luminous flux information, respectively, and compared with the luminous flux drop span threshold and the luminous flux accumulated floating span threshold, respectively:

[0062] If the luminous flux drop span of a single light source receiving end corresponding to a receiving light source exceeds a luminous flux drop span threshold during the semiconductor chip packaging area defect detection process, or the floating span of the cumulative value of the received luminous flux of multiple light source receiving ends corresponding to the receiving light sources exceeds a luminous flux cumulative floating span threshold during the semiconductor chip packaging area defect detection process, it is inferred that the semiconductor chip packaging area defect detection is abnormal, and it is inferred that the current packaging area has a surface deformation at the corresponding position, causing a change in the roughness of the packaging surface, affecting the set light recognition, and the current packaging area is positioned and repaired;

[0063] If, during the semiconductor chip packaging area defect detection process, the luminous flux drop span of a single light source receiving end corresponding to a receiving light source does not exceed the luminous flux drop span threshold, and the floating span of the cumulative value of the received luminous flux of multiple light source receiving ends corresponding to the receiving light sources does not exceed the luminous flux cumulative floating span threshold during the semiconductor chip packaging area defect detection process, it is inferred that the semiconductor chip packaging area defect detection is normal, and the current packaging area is continuously monitored;

[0064] The real-time evaluation process of the detection environment is as follows:

[0065] When performing defect detection on pins and packages, perform environmental detection on the location where the real-time semiconductor chip package is located, and obtain the numerical deviation floating span between the average ambient luminous flux and the average real-time light source luminous flux corresponding to the pin defect detection location. At the same time, obtain the floating quantity ratio of the refraction path of the emitted light source corresponding to the humidity floating stage at the package defect detection location. The numerical deviation floating span between the average ambient luminous flux and the average real-time light source luminous flux corresponding to the pin defect detection location and the floating quantity ratio of the refraction path of the emitted light source corresponding to the humidity floating stage at the package defect detection location are marked as pin defect information and package defect information, respectively, and compared with the numerical deviation floating span threshold and the path floating quantity ratio threshold, respectively:

[0066] If the numerical deviation floating span between the average ambient luminous flux value and the real-time light source luminous flux value at the pin defect detection location exceeds the numerical deviation floating span threshold, or if the floating number ratio of the emission light source refraction path corresponding to the humidity fluctuation stage at the package defect detection location exceeds the path floating number ratio threshold, it is inferred that the environmental detection at the defect detection location is abnormal, and auxiliary environmental control is performed, that is, controlling the real-time environmental parameters such as the ambient humidity value and the light flux fluctuation value during defect detection;

[0067] If the numerical deviation floating span between the average value of the ambient luminous flux corresponding to the pin defect detection position and the average value of the real-time light source luminous flux does not exceed the numerical deviation floating span threshold, and the floating quantity ratio of the refraction path of the emission light source corresponding to the humidity floating stage at the package defect detection position does not exceed the path floating quantity ratio threshold, then it is inferred that the environmental detection at the defect detection position is normal, the real-time semiconductor defect detection collected image is stored, and the defect position of the real-time image with the defect is repaired;

[0068] The above formulas are obtained by collecting a large amount of data and performing software simulation to select a formula close to the actual value. The coefficients in the formula are set by those skilled in the art according to actual conditions;

[0069] When in use, the present invention collects semiconductor chips, aggregates the semiconductor chips, and performs chip packaging defect detection; light source analysis and selection, performs light source selection based on the aggregated semiconductor chips, and combines light source characteristic analysis with current semiconductor chip color analysis; pin detection, after determining the light source type through light source analysis, performs pin irradiation, and collects pictures of the pins after irradiation, and infers whether there is positional offset of the pins during the chip operation stage based on the collected pictures; packaging defect detection, after completing the pin detection and the pin detection is normal, performs packaging defect detection on the semiconductor chip, collects pictures of the semiconductor chip package through picture collection, and collects defects on the packaging surface based on the collected pictures; real-time evaluation of the detection environment, during the semiconductor chip packaging defect detection process, performs real-time evaluation of the real-time defect detection environment;

[0070] After the inspection environment is qualified, defect inspection will continue until the inspection is completed.

[0071] The preferred embodiments of the present invention disclosed above are intended only to help illustrate the present invention. These preferred embodiments do not exhaustively describe all details, nor do they limit the present invention to specific embodiments. Obviously, many modifications and variations are possible based on the contents of this specification. These embodiments are selected and described in detail in this specification to better explain the principles and practical applications of the present invention, thereby enabling those skilled in the art to better understand and utilize the present invention. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A method for detecting semiconductor chip packaging defects, characterized in that: The steps of the packaging defect detection method are as follows: Collect semiconductor chips, aggregate them, and perform chip packaging defect detection; Light source analysis and selection: Based on the collected semiconductor chips, light source selection is performed by combining light source characteristic analysis with current semiconductor chip color analysis. The light source analysis and selection process is as follows: Collect the main color temperature and background color temperature, where the main color temperature is the color temperature of the semiconductor chip package color; the background color temperature is the color temperature of the light source type illumination light; collect color temperature compliance data and color temperature control data. If the color temperature compliance data exceeds the color temperature deviation threshold, or the color temperature control data exceeds the duration span ratio threshold, the current light source type is marked as a non-use type; if the color temperature compliance data does not exceed the color temperature deviation threshold, and the color temperature control data does not exceed the duration span ratio threshold, the current light source type is marked as a use type; Pin detection: After determining the light source type through light source analysis, the pins are illuminated and images of the illuminated pins are captured. Based on the captured images, it is inferred whether there is any positional deviation of the pins during the chip operation phase; Package defect detection: After completing the pin detection and the pin detection is normal, the semiconductor chip is subjected to package defect detection. The semiconductor chip package is imaged through image acquisition, and defects on the package surface are detected based on the captured images; Real-time evaluation of the detection environment: During the semiconductor chip packaging defect detection process, the real-time defect detection environment is evaluated in real time; Collect pin defect information and package defect information. If the pin defect information exceeds the numerical deviation floating span threshold, or the package defect information exceeds the path floating quantity ratio threshold, assist in environmental control. If the pin defect information does not exceed the numerical deviation floating span threshold, and the package defect information does not exceed the path floating quantity ratio threshold, the real-time semiconductor defect detection and acquisition image is stored and the defect position in the real-time image is repaired; the pin defect information and package defect information are respectively the numerical deviation floating span of the average ambient luminous flux corresponding to the pin defect detection position and the average real-time light source luminous flux, and the floating quantity ratio of the refraction path of the transmitting light source corresponding to the humidity floating stage at the package defect detection position; After the inspection environment is qualified, defect inspection will continue until the inspection is completed.

2. The semiconductor chip package defect detection method according to claim 1, characterized in that: The color temperature compliance data and color temperature control data are respectively the deviation value between the average color temperature of the main body and the average background color temperature in the semiconductor chip package defect collection picture, and the ratio of the color temperature adjustment buffer time of the current light source type to the corresponding time span of the clarity increase span of the current collection picture when the metal part of the pin in the semiconductor chip package defect collection picture causes overexposure.

3. The semiconductor chip package defect detection method according to claim 1, wherein: The pin detection process is as follows: After determining the light source type, irradiate with the light source of the used type and collect images of the semiconductor chip. Set the collection time point according to the operation cycle of the semiconductor chip and arrange the collected images corresponding to the collection time point in sequence. Collect pin collection information and obtain the pin detection coefficient through calculation. If the pin detection coefficient exceeds the pin detection coefficient threshold, the current moment is marked as the pin abnormal moment; if the pin detection coefficient corresponding to the semiconductor chip does not exceed the pin detection coefficient threshold, the current moment is marked as the pin normal moment, and continuous pin detection is performed.

4. The semiconductor chip package defect detection method according to claim 3, wherein: The pin collection information includes the offset value expansion speed of the distance between adjacent pins in the semiconductor chip pin area, the pin shape angle floating value corresponding to the position of any pin in the semiconductor chip pin area, and the proportion of the adjacent pin occlusion area after the corresponding semiconductor chip pin posture is displaced under the currently set camera illumination angle.

5. The semiconductor chip package defect detection method according to claim 1, wherein: The packaging defect detection process is as follows: The light source transmitter is set according to the current light source type, and the light source receiver is set according to the surface roughness of the semiconductor chip package. Through light source debugging, the light source transmitter and the light source receiver are set to transmit and receive light, and the package defect detection is performed after the closed loop; Collect single luminous flux information and multiple luminous flux information. If the single luminous flux information exceeds the luminous flux drop span threshold, or the multiple luminous flux information exceeds the luminous flux cumulative floating span threshold, the current packaging area is positioned and repaired; if the single luminous flux information does not exceed the luminous flux drop span threshold, and the multiple luminous flux information does not exceed the luminous flux cumulative floating span threshold, the current packaging area is continuously monitored.

6. The semiconductor chip package defect detection method according to claim 5, characterized in that: The single light flux information and multiple light flux information are respectively the light flux decrease span of a single light source receiving end corresponding to a receiving light source during the defect detection of the semiconductor chip packaging area, and the floating span of the cumulative value of the received light flux of multiple light source receiving ends corresponding to the receiving light sources during the defect detection of the semiconductor chip packaging area.

Citation Information

Patent Citations

  • Composite optical sensor with ambient light sensor die forming natural barrier

    CN108731799A

  • Surface imaging system and method for IC photoetching character recognition and detection device

    CN114496860A