Display panel and display equipment

Abstract

The embodiment of the invention discloses a display panel and a display device, in an array substrate under an overlook view angle, a first connection electrode and a second electrode are arranged at an interval, a first branch electrode and a second branch electrode are arranged between the first connection electrode and the second connection electrode, and the first branch electrode and the second branch electrode are arranged at intervals. The pixel area comprises a middle area and side edge areas, the side edge areas are located on the two sides of the middle area in the first direction, in the middle area, one first branch electrode and one second branch electrode are alternately arranged at intervals in the first direction, and in the side edge areas, the first branch electrodes and the second branch electrodes are alternately arranged at intervals in the second direction. And the first branch electrode and the second branch electrode are partially overlapped. According to the embodiment of the invention, the light transmittance, the refresh rate and the light emitting uniformity can be improved through the setting.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] HFS (Hua Sheng Flat Switch) technology uses a new electric field drive method, which achieves faster response time and higher display quality by changing the electrode structure and drive method. At the same time, HFS technology also has lower power consumption and higher reliability, making it have obvious advantages in large-scale and high-definition aspects.

[0003] Currently, the pixel architecture of traditional HFS technology uses a double-layer ITO design, and the sheet-like common electrode is spread throughout the pixel area, resulting in low optical transmittance of the panel, poor light uniformity, and difficulty in optimizing the storage capacitor, making it difficult for the product to achieve a high refresh rate. Summary of the invention

[0004] The embodiments of the present application provide a display panel and a display device, which can improve light uniformity, light transmittance and refresh rate.

[0005] The embodiment of the present application provides a display panel, including an array substrate, a liquid crystal layer and an opposite substrate, wherein the array substrate includes a plurality of pixel areas, and the array substrate includes:

[0006] a first substrate;

[0007] a first electrode, disposed on the first substrate and located in the pixel region, the first electrode comprising a first connecting electrode and a plurality of first branch electrodes, the plurality of first branch electrodes being arranged along a first direction and connected to the first connecting electrode, the first direction being parallel to an extending direction of the scanning line; the first electrode being one of a pixel electrode and a common electrode, and

[0008] a second electrode, disposed on the first substrate and located in the pixel region, the second electrode and the first electrode being disposed in a different layer, the second electrode comprising a second connecting electrode and a plurality of second branch electrodes, the plurality of second branch electrodes being arranged along the first direction and connected to the second connecting electrode, the second electrode being the other of a pixel electrode and a common electrode;

[0009] In the array substrate viewed from a top-down perspective, the first connecting electrode and the second electrode are spaced apart, the first branch electrode and the second branch electrode are spaced apart from each other, the pixel area includes a middle area and a side area, in the first direction, the side areas are located on both sides of the middle area, in the middle area, a first branch electrode and a second branch electrode are alternately and spaced apart along the first direction, and in the side area, the first branch electrode and the second branch electrode are partially overlapped.

[0010] Optionally, in some embodiments of the present application, the second connecting electrode is spaced apart from the first electrode.

[0011] Optionally, in some embodiments of the present application, in the array substrate in a top view, in the first direction, the first second branch electrode and the first first branch electrode are both located in the side area, a portion of the first second branch electrode close to the middle area overlaps with the first first branch electrode, and a portion of the first second branch electrode far from the middle area exceeds the first first branch electrode;

[0012] In the array substrate viewed from a top-down perspective, in the first direction, the last second branch electrode and the last first branch electrode are both located in the side area, a portion of the last second branch electrode close to the middle area overlaps with the last first branch electrode, and a portion of the last second branch electrode away from the middle area exceeds the last first branch electrode.

[0013] Optionally, in some embodiments of the present application, the array substrate further includes a common wiring connected to the second electrode, and the common wiring is respectively arranged in a different layer from the first electrode and the second electrode;

[0014] In the array substrate viewed from a top perspective, the common wiring is spaced apart from the first electrode, and the common wiring is partially overlapped with the second connection electrode.

[0015] Optionally, in some embodiments of the present application, in the array substrate viewed from a top view, the shortest distance from the common wiring to the first electrode is greater than the shortest distance from the second connecting electrode to the first electrode.

[0016] Optionally, in some embodiments of the present application, the first electrode further includes a third connection electrode extending along the first direction, the second electrode further includes a fourth connection electrode extending along the first direction, the pixel area includes a first domain area and a second domain area, the first branch electrode includes a first branch portion and a second branch portion, the second branch electrode includes a third branch portion and a fourth branch portion, the extension direction of the first branch portion is parallel to the extension direction of the third branch portion, the extension direction of the second branch portion is parallel to the extension direction of the fourth branch portion, and the extension direction of the first branch portion intersects with the extension direction of the second branch portion;

[0017] The first branch portion and the third branch portion are located in the first domain area, the second branch portion and the fourth branch portion are located in the second domain area, the third connection electrode and the fourth connection electrode are located at the junction of the first domain area and the second domain area, the third connection electrode is connected between the first branch portion and the second branch portion, and the fourth connection electrode is connected between the third branch portion and the fourth branch portion;

[0018] In the array substrate in a plan view, the third connection electrode at least partially overlaps with the fourth connection electrode.

[0019] Optionally, in some embodiments of the present application, the array substrate includes an inorganic insulating layer arranged between the first electrode and the second electrode, and in the thickness direction of the array substrate, the distance between the second electrode and the first electrode is equal to the thickness of the inorganic insulating layer, and the thickness of the inorganic insulating layer is between 0.05 microns and 2 microns.

[0020] Optionally, in some embodiments of the present application, a first electrode and a second electrode partially overlap to form a storage capacitor, and the storage capacitor is between 0.2 pF and 1.0 pF.

[0021] Optionally, in some embodiments of the present application, in the middle region, the distances between any adjacent first branch electrodes and second branch electrodes are equal.

[0022] Optionally, in some embodiments of the present application, the distance from the first second branch electrode to the adjacent second branch electrode is smaller than the distance between two adjacent second branch electrodes located in the middle area, and the distance between any two adjacent first branch electrodes is equal.

[0023] Optionally, in some embodiments of the present application, the thickness of the first electrode is between 0.03 micrometers and 0.1 micrometers, the width of the first branch electrode is between 1.5 micrometers and 3 micrometers, the thickness of the second electrode is between 0.03 micrometers and 0.1 micrometers, and the width of the second branch electrode is between 1.5 micrometers and 3 micrometers;

[0024] In the middle region, a distance between any adjacent first branch electrodes and any adjacent second branch electrodes is between 0.5 micrometers and 2 micrometers.

[0025] Correspondingly, an embodiment of the present application further provides a display device, which includes a display panel as described in any one of the above embodiments.

[0026] In the array substrate of the embodiment of the present application in a top-down perspective, the first connecting electrode and the second electrode are spaced apart, the first connecting electrode and the second connecting electrode are spaced apart by the first branch electrode and the second branch electrode, the pixel area includes a middle area and a side area, in the first direction, the side areas are located on both sides of the middle area, in the middle area, a first branch electrode and a second branch electrode are alternately and spaced apart along the first direction, and in the side area, the first branch electrode and the second branch electrode are partially overlapped.

[0027] It is understandable that the first connection electrode does not serve as the capacitor plate of the storage capacitor, which reduces the storage capacitor to increase the refresh rate; and the first branch electrode and the second branch electrode in the side area partially overlap to form a storage capacitor, so that the storage capacitor is maintained within the required range to avoid excessive drop in storage capacitance, resulting in the risk of uneven light output. In addition, since the transmittance of the side area of ​​the pixel area is lower than that of the middle area, setting the storage capacitor in the side area of ​​the pixel area can reduce light loss and improve the overall transmittance.

[0028] Secondly, since the first connecting electrode does not serve as a capacitor plate of the storage capacitor, the electric field overlap area is reduced, making the electric field more uniform, reducing the risk of uneven brightness and darkness to improve the uniformity of light output. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 is a schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the present application;

[0030] Figure 2 is a schematic diagram of a top view of the structure of an array substrate of a display panel provided in an embodiment of the present application;

[0031] Figure 3 yes Figure 2 Schematic diagram of the cross section along the RR line;

[0032] Figure 4 yes Figure 2 Another schematic cross-section diagram along the RR line;

[0033] Figure 5 is another structural schematic diagram of a display panel according to an embodiment of the present application;

[0034] Figure 6 is a light transmittance curve diagram of comparative examples and embodiments;

[0035] Figure 7 is another schematic diagram of a top view of the array substrate of a display panel provided in an embodiment of the present application;

[0036] Figure 8 is another schematic top view of the structure of the array substrate of the display panel provided in an embodiment of the present application;

[0037] Fig. 9 It is a schematic diagram of the structure of the display device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0038] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, the various embodiments can be combined with each other but will not be repeated one by one, and in the absence of contrary instructions, the directional words used, such as "upper" and "lower", usually refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the drawings; while "inside" and "outside" refer to the outline of the device; the terms "first", "second", "third", etc. are used only as markings, and no numerical requirements are imposed or order is established.

[0039] The embodiments of the present application provide a display panel and a display device, which are described in detail below. It should be noted that the description order of the following embodiments is not intended to limit the preferred order of the embodiments.

[0040] Please refer to Figures 1 to 3 The embodiment of the present application provides a display panel 100, including an array substrate 10, a liquid crystal layer (not shown in the figure) and an opposing substrate 20. The array substrate 10 includes a plurality of pixel areas 10a.

[0041] The display panel 100 is a Fringe Field Switching (FFS) structure. The liquid crystal layer is disposed between the array substrate 10 and the counter substrate 20 .

[0042] Optionally, the array substrate 10 includes a first substrate 11, a first electrode 12, a second electrode 13, a scan line 14 and a data line 15. The counter substrate 20 includes a second substrate 21 and a black matrix layer 22, which is disposed on a side of the second substrate 21 close to the array substrate 10.

[0043] The scanning lines 14 and the data lines 15 are arranged in different layers, and the scanning lines 14 and the data lines 15 intersect to form a plurality of pixel regions 10 a. The black matrix layer 22 covers the scanning lines 14 and the data lines 15 .

[0044] The first electrode 12 is disposed on the first substrate 11 and is located in the pixel area 10a. The first electrode 12 includes a first connection electrode 121 and a plurality of first branch electrodes 122. The plurality of first branch electrodes 122 are arranged along a first direction x and connected to the first connection electrode 121. The first direction x is parallel to the extension direction of the scan line 14. The first electrode 12 is one of a pixel electrode and a common electrode.

[0045] The second electrode 13 is disposed on the first substrate 11 and is located in the pixel area 10a. The second electrode 13 is disposed in a different layer from the first electrode 12. The second electrode 13 includes a second connecting electrode 131 and a plurality of second branch electrodes 132, and the plurality of second branch electrodes 132 are arranged along the first direction x and connected to the second connecting electrode 131. The second electrode 13 is the other of the pixel electrode and the common electrode.

[0046] In the array substrate 10 in a top view, the first connection electrode 121 is spaced apart from the second electrode 13, and the first connection electrode 121 and the second connection electrode 131 are spaced apart from each other by a first branch electrode 122 and a second branch electrode 132. The pixel region 10a includes a middle region a1 and a side region a2, and in the first direction x, the side region a2 is located on both sides of the middle region a1. In the middle region a1, a first branch electrode 122 and a second branch electrode 132 are alternately and spaced apart along the first direction x. In the side region a2, the first branch electrode 122 and the second branch electrode 132 are partially overlapped.

[0047] It can be understood that the first connecting electrode 121 does not serve as a capacitor plate of the storage capacitor, which reduces the storage capacitance to increase the refresh rate; and the first branch electrode 122 and the second branch electrode 132 of the side area a2 partially overlap to form a storage capacitor, so that the storage capacitance is maintained within the required range, avoiding excessive decrease in the storage capacitance and the risk of uneven light output. In addition, since the transmittance of the side area a2 of the pixel area 10a is lower than the transmittance of the middle area a1, setting the storage capacitor in the side area a2 of the pixel area 10a can reduce light loss and improve the overall transmittance. Secondly, the first branch electrode 122 and the second branch electrode 132 based on the middle area a1 are alternately designed along the first direction x, so that the light only penetrates one layer of the electrode film layer, thereby improving the overall transmittance.

[0048] Secondly, the display panel 100 of the embodiment of the present application is an FFS structure, so the vertical electric field formed by the overlap of the first electrode 12 and the second electrode 13 will interfere with the driving electric field of the FFS structure, resulting in a deviation in the deflection of the liquid crystal, and then the problem of uneven light output occurs, especially in the overlapping area of ​​two different electric fields, the liquid crystal disorder is more serious. Therefore, based on the fact that the first connecting electrode 121 does not serve as the capacitor plate of the storage capacitor, the electric field overlapping area is reduced, making the electric field more uniform, reducing the risk of uneven dark and bright to improve the uniformity of light output.

[0049] In addition, in some embodiments of the present application, the area based on the first connecting electrode 121 is a non-overlapping area of ​​the first electrode 12 and the second electrode 13. Since there is no interference from the vertical electric field, the risk of dark lines is reduced, and the shielding range of the black matrix layer 22 can be appropriately reduced. That is, the black matrix layer 22 does not need to completely shield the first connecting electrode 121 to appropriately expand the opening area, and the light only penetrates one electrode layer, thereby improving the overall light transmittance and reducing the storage capacitor to increase the refresh rate.

[0050] Optionally, in some embodiments of the present application, in the array substrate 10 in a top view, the second connection electrode 131 is spaced apart from the first electrode 12 .

[0051] It can be understood that the second connecting electrode 131 is spaced apart from the first electrode 12 so that the second connecting electrode 131 does not serve as a capacitor plate of a storage capacitor, and the area of ​​the second connecting electrode 131 is a non-overlapping area of ​​the first electrode 12 and the second electrode 13, so as to further improve the uniformity and refresh rate of light output; in some embodiments, the range in which the black matrix layer 22 blocks the second connecting electrode 131 can be reduced to improve the aperture ratio and transmittance.

[0052] Optionally, in some embodiments of the present application, a first electrode 12 and a second electrode 13 partially overlap to form a storage capacitor, and the storage capacitor is between 0.2 pF and 1.0 pF.

[0053] It is understandable that the storage capacitance formed by the first electrode 12 and the second electrode 13 is between 0.2 pF and 1.0 pF, so as to maintain the voltage stability of the pixel electrode, reduce the risk of uneven light output, and achieve a higher refresh rate.

[0054] Optionally, the storage capacitor may be 0.2 picofarads, 0.3 picofarads, 0.4 picofarads, 0.5 picofarads, 0.6 picofarads, 0.7 picofarads, 0.8 picofarads, 0.9 picofarads or 1.0 picofarads.

[0055] Optionally, this embodiment is described by taking the first electrode 12 as a pixel electrode and the second electrode 13 as a common electrode as an example, but is not limited thereto.

[0056] Optionally, in some embodiments of the present application, in the array substrate 10 in a top view, in the first direction x, the first first branch electrode 122 and the first second branch electrode 132 are located in the side area a2, the portion of the first second branch electrode 132 close to the middle area a1 overlaps with the first first branch electrode 122, and the portion of the first second branch electrode 132 away from the middle area a1 exceeds the first first branch electrode 122.

[0057] In the array substrate 10 viewed from a top perspective, in the first direction x, the last first branch electrode 122 and the last second branch electrode 132 are located in the side area a2, the portion of the last second branch electrode 132 close to the middle area a1 overlaps with the last first branch electrode 122, and the portion of the last second branch electrode 132 away from the middle area a1 exceeds the last first branch electrode 122.

[0058] It is understandable that, since the transmittance of the side area a2 is lower than that of the middle area a1, the first and last two first branch electrodes 122 overlap with the first and last two second branch electrodes 132 to reduce light loss and thus improve transmittance.

[0059] Optionally, in some embodiments, each side region a2 includes only one first branch electrode 122 and one second branch electrode 132 to reduce light loss as much as possible.

[0060] It should be noted that, each side area a2 can also be provided with a greater number of first branch electrodes 122 and second branch electrodes 132 to form a larger storage capacitor according to the requirements of the storage capacitor. However, based on the requirements of light transmittance and light output uniformity, the number of first branch electrodes 122 in each side area a2 is less than 1 / 3 of the number of first branch electrodes 122 in the middle area a1, and the number of second branch electrodes 132 in each side area a2 is less than 1 / 3 of the number of second branch electrodes 132 in the middle area a1.

[0061] Secondly, in the side area a2, the non-overlapping portion of the second branch electrode 132 is located on the side of the overlapping area away from the middle area a1, so that the non-overlapping portion of the second branch electrode 132 can form a lateral electric field with the first branch electrode 122 to affect the vertical electric field of the overlapping area of ​​the first branch electrode 122 and the second branch electrode 132, causing the overlapping area to be laterally deflected on the side away from the middle area a1, thereby improving the transmittance.

[0062] Optionally, the width of the second branch electrode 132 located in the side area a2 is greater than the width of the second branch electrode 132 located in the middle area a1 and the width of the first branch electrode 122 .

[0063] Optionally, in some embodiments of the present application, the array substrate 10 further includes a common wiring 16 connected to the second electrode 13 , and the common wiring 16 is disposed in a different layer from the first electrode 12 and the second electrode 13 .

[0064] In the array substrate 10 viewed from a top perspective, the common wiring 16 is spaced apart from the first electrode 12 , and the common wiring 16 is partially overlapped with the second connection electrode 131 .

[0065] It can be understood that, since the common wiring 16 and the second electrode 13 are connected to the same common signal, the common wiring 16 and the first electrode 12 are spaced apart so that the common wiring 16 and the first electrode 12 are non-overlappingly arranged to reduce storage capacitance and improve transmittance. Secondly, the common wiring 16 and the second connection electrode 131 are partially overlapped to improve the aperture ratio.

[0066] Optionally, the common wiring 16 and the scanning line 14 are arranged in the same layer, and the extension direction of the common wiring 16 is parallel to the extension direction of the scanning line 14 .

[0067] Optionally, in some embodiments of the present application, in the array substrate 10 in a top view, the shortest distance d1 from the common wiring 16 to the first electrode 12 is greater than the shortest distance d2 from the second connection electrode 131 to the first electrode 12 .

[0068] It can be understood that d1>d2, so that the common line 16 is arranged close to the scan line 14, so that the area of ​​the black matrix layer 22 covering the common line 16 and the scan line 14 can be reduced, thereby improving the aperture ratio. Secondly, the common line 16 is far away from the first electrode 12, which reduces the electric field effect of the common line 16 on the first electrode 12 area, so that the liquid crystal can be deflected more regularly, and the light uniformity is improved.

[0069] Optionally, in some embodiments of the present application, the first and last second branch electrodes 132 are located in the side area a2, and the other second branch electrodes 132 are located in the middle area a1. In the middle area a1, the distances between any adjacent first branch electrodes 122 and second branch electrodes 132 are equal.

[0070] It can be understood that the distances between any adjacent first branch electrodes 122 and second branch electrodes 132 are equal to provide uniform light output.

[0071] Optionally, in some embodiments of the present application, the distance d3 from a first second branch electrode 132 to an adjacent second branch electrode 132 is smaller than the distance d4 between two adjacent second branch electrodes 132 in the middle area a1. The distance between any two adjacent first branch electrodes 122 is equal.

[0072] It can be understood that, based on the fact that the distances between any adjacent first branch electrodes 122 and second branch electrodes 132 are equal and d3<d4 in the middle area a1, the first second branch electrode 132 extends toward the middle area a1 to overlap with the first first branch electrode 122 to form a storage capacitor, while maintaining a lateral electric field between the first first branch electrode 122 and the first second branch electrode 132, thereby improving light uniformity and transmittance.

[0073] Secondly, since the second electrode 13 (common electrode) is disposed on the side of the first electrode 12 (pixel electrode) close to the first substrate 11, the extended second branch electrode 132 can better shield the interference of the data line 15 on the first electrode 12 and improve the display effect.

[0074] Optionally, in some embodiments of the present application, the distance from the last second branch electrode 132 to the adjacent second branch electrode 132 is smaller than the distance d4 between two adjacent second branch electrodes 132 located in the middle area a1, so as to form a storage capacitor while maintaining a lateral electric field between the last first branch electrode 122 and the first second branch electrode 132, thereby improving light output uniformity and transmittance.

[0075] Optional, compared to Figure 1 and Figure 3Corresponding implementation manner, in some embodiments, such as Figure 4 As shown, the second electrode 13 (common electrode) may also be arranged on a side of the first electrode 12 (pixel electrode) away from the first substrate 11 .

[0076] Optionally, in some embodiments of the present application, reference may be made to Figures 1 to 4 The display panel 100 also includes a shielding portion 134 arranged on the same layer as the common electrode (the second electrode 13), the shielding portion 134 correspondingly covers the data line 15, and the shielding portion 134 connects the two sides of the common electrode, that is, one shielding portion 134 is connected to one side of (the second electrode 13), and the other shielding portion 134 is connected to the other side of (the second electrode 13).

[0077] It can be understood that the shielding portion 134 is connected to the common electrode (the second electrode 13), so that the shielding portion 134 is connected to the common signal, which can shield the interference of the external signal on the data line 15. Secondly, based on the shielding portion 134 being connected to the common signal, a weak lateral electric field is formed between the shielding portion 134 and the first electrode 12, which can cause the liquid crystal between the shielding portion 134 and the first electrode 12 to deflect, thereby improving the light transmittance.

[0078] Optional, such as Figure 3 As shown, the common electrode (second electrode 13) is located on one side of the pixel electrode (first electrode 12) close to the first substrate 11, and the shielding portion 134 is connected to both sides of the second connection electrode 131, so that the interference of the data line 15 on the pixel electrode can be shielded.

[0079] It should be noted that compared with Figures 1 to 3 For the corresponding embodiments, please refer to some embodiments of this application. Figure 5 , Figure 5 FIG. 1 is another structural diagram of a display panel according to an embodiment of the present application. Figure 5 In the embodiment, only the parts that are different from those in the above-mentioned embodiment are described to avoid redundancy. Figure 5In the embodiment, the second electrode 13 is arranged on the side of the first electrode 12 close to the liquid crystal layer, and the second electrode 13 is replaced by a pixel electrode, and the first electrode 12 is replaced by a common electrode; at this time, in the first direction x, the portion of the first second branch electrode 132 close to the middle area a1 overlaps with the first first branch electrode 122, and the portion of the first second branch electrode 132 away from the middle area a1 exceeds the first first branch electrode 122. In the array substrate 10 in a top view, in the first direction x, the portion of the last second branch electrode 132 close to the middle area a1 overlaps with the last first branch electrode 122, and the portion of the last second branch electrode 132 away from the middle area a1 exceeds the last first branch electrode 122. That is to say, compared with the implementation method in which the common electrode is extended toward the direction of the middle area a1, the pixel electrode is extended toward the direction of the shielding portion 134, which can not only form a storage capacitor, but also shorten the distance between the pixel electrode and the shielding portion 134, and increase the lateral electric field strength between the pixel electrode and the shielding portion 134, so that the liquid crystal deflection completion degree in the area between the pixel electrode and the shielding portion 134 is increased, thereby improving the transmittance.

[0080] Optionally, it is understood that the greater the thickness and width of the first electrode 12 and the second electrode 13, the lower the transmittance of the pixel area. In the middle area a1, the greater the distance between the first branch electrode 122 and the second branch electrode 132, the smaller the electric field strength, the weaker the completion of the liquid crystal deflection, and the transmittance will decrease. Therefore, based on the requirements of the transmittance of the pixel area and the limitations of process accuracy, the thickness of the first electrode 12 is set to be between 0.03 microns and 0.1 microns, the width of the first branch electrode 122 is set to be between 1.5 microns and 3 microns, the thickness of the second electrode 13 is set to be between 0.03 microns and 0.1 microns, and the width of the second branch electrode 132 is set to be between 1.5 microns and 3 microns. In the middle area a1, the distance between any adjacent first branch electrodes 122 and second branch electrodes 132 is between 0.5 microns and 2 microns.

[0081] Optionally, the thickness of the first electrode 12 can be 0.03 micrometers, 0.04 micrometers, 0.05 micrometers, 0.06 micrometers, 0.07 micrometers, 0.08 micrometers, 0.09 micrometers or 0.1 micrometers. The width of the first branch electrode 122 can be 1.5 micrometers, 1.6 micrometers, 1.7 micrometers, 1.8 micrometers, 1.9 micrometers, 2.0 micrometers, 2.1 micrometers, 2.2 micrometers, 2.3 micrometers, 2.4 micrometers, 2.5 micrometers, 2.6 micrometers, 2.7 micrometers, 2.8 micrometers, 2.9 micrometers or 3.0 micrometers. The thickness of the second electrode 13 can be 0.03 micrometers, 0.04 micrometers, 0.05 micrometers, 0.06 micrometers, 0.07 micrometers, 0.08 micrometers, 0.09 micrometers or 0.1 micrometers. The width of the second branch electrode 132 can be 1.5 micrometers, 1.6 micrometers, 1.7 micrometers, 1.8 micrometers, 1.9 micrometers, 2.0 micrometers, 2.1 micrometers, 2.2 micrometers, 2.3 micrometers, 2.4 micrometers, 2.5 micrometers, 2.6 micrometers, 2.7 micrometers, 2.8 micrometers, 2.9 micrometers or 3.0 micrometers. In the middle area a1, the distance between any adjacent first branch electrodes 122 and second branch electrodes 132 is 0.5 micrometers, 0.6 micrometers, 0.7 micrometers, 0.8 micrometers, 0.9 micrometers, 1.0 micrometers, 1.1 micrometers, 1.2 micrometers, 1.3 micrometers, 1.4 micrometers, 1.5 micrometers, 1.6 micrometers, 1.7 micrometers, 1.8 micrometers, 1.9 micrometers or 2 micrometers.

[0082] Optionally, in some embodiments of the present application, the array substrate 10 further includes a thin film transistor t1 , an organic insulating layer 17 and an inorganic insulating layer 18 .

[0083] One end of the thin film transistor t1 is connected to the first electrode 12 , and the other end of the thin film transistor t1 is connected to the data line 15 .

[0084] The organic insulating layer 17 covers the data line 15 and the thin film transistor t1, and the second electrode 13 is arranged on the side of the organic insulating layer 17 away from the first substrate 11. The inorganic insulating layer 18 covers the second electrode 13 and the organic insulating layer 17, and the first electrode 12 is arranged on the side of the inorganic insulating layer 18 away from the first substrate 11.

[0085] Optionally, the inorganic insulating layer 18 is disposed between the first electrode 12 and the second electrode 13. In the thickness direction of the array substrate 10, the distance between the second electrode 13 and the first electrode 12 is equal to the thickness of the inorganic insulating layer 18, and the thickness of the inorganic insulating layer 18 is between 0.05 micrometers and 2 micrometers.

[0086] It is understandable that the greater the thickness of the inorganic insulating layer 18, the greater the distance between the first electrode 12 and the second electrode 13, the stronger the insulation, the smaller the storage capacitor, the smaller the electric field strength, the greater the light loss, and the smaller the transmittance. Therefore, based on the requirements of insulation, storage capacitor capacitance, electric field strength and transmittance, the thickness of the inorganic insulating layer 18 can be set between 0.05 microns and 2 microns, for example, 0.05 microns, 0.1 microns, 0.2 microns, 0.3 microns, 0.4 microns, 0.5 microns, 0.6 microns, 0.7 microns, 0.8 microns, 0.9 microns, 1.0 microns, 1.1 microns, 1.2 microns, 1.3 microns, 1.4 microns, 1.5 microns, 1.6 microns, 1.7 microns, 1.8 microns, 1.9 microns or 2.0 microns.

[0087] Optionally, the thickness of the organic insulating layer 17 is between 1.5 micrometers and 4 micrometers, for example, 1.5 micrometers, 2 micrometers, 2.5 micrometers, 3 micrometers, 3.5 micrometers or 4 micrometers. The thickness of the organic insulating layer 17 is designed to meet the requirements of light transmittance and insulation.

[0088] Please refer to Figure 6 , Figure 6 is a comparison of the proportions and based on Figure 1 The curve diagram of the transmittance of the embodiment. In both the comparative example and the embodiment, the pixel electrode is arranged on the side of the common electrode close to the liquid crystal layer, the common electrode is connected to a 0 volt voltage, and the voltage value connected to the pixel electrode is a variable. The difference is that the common electrode in the comparative example is arranged in the pixel area as a whole, while the common electrode (second electrode 13) in the embodiment is as follows: Figure 1 shown.

[0089] according to Figure 6 It can be seen that, compared with the comparative example, the maximum light transmittance of the display panel 100 of the embodiment of the present application can be increased by about 4%.

[0090] Please refer to Figure 7 , Figure 7 FIG. 1 is another schematic diagram of a top view of the array substrate 10 of the display panel 100 according to an embodiment of the present application. Figure 1 and Figure 2 The corresponding embodiment, Figure 7 The corresponding embodiment further provides a third connection electrode 123 and a fourth connection electrode 133. Figure 7 In this paper, we will explain Figure 1 The different parts of the corresponding embodiments are described to avoid redundant explanation.

[0091] Optionally, in some embodiments of the present application, the first electrode 12 further includes a third connection electrode 123 extending along the first direction x. The second electrode 13 further includes a fourth connection electrode 133 extending along the first direction x.

[0092] The pixel area 10a includes a first domain area a01 and a second domain area a02. The first branch electrode 122 includes a first branch portion 22a and a second branch portion 22b. The second branch electrode 132 includes a third branch portion 32a and a fourth branch portion 32b. The extension direction of the first branch portion 22a is parallel to the extension direction of the third branch portion 32a, the extension direction of the second branch portion 22b is parallel to the extension direction of the fourth branch portion 32b, and the extension direction of the first branch portion 22a intersects with the extension direction of the second branch portion 22b.

[0093] The first branch portion 22a and the third branch portion 32a are located in the first domain a01, the second branch portion 22b and the fourth branch portion 32b are located in the second domain a02, and the third connection electrode 123 and the fourth connection electrode 133 are located at the junction of the first domain a01 and the second domain a02. The third connection electrode 123 is connected between the first branch portion 22a and the second branch portion 22b, and the fourth connection electrode 133 is connected between the third branch portion 32a and the fourth branch portion 32b.

[0094] In the array substrate viewed from a top perspective, the third connection electrode 123 and the fourth connection electrode 133 at least partially overlap.

[0095] It should be understood that, based on the specification requirements of different display panels 100, the capacitance requirements of the storage capacitor formed between the first electrode 12 and the second electrode 13 are different, so as to maintain the voltage stability of the pixel electrode, thereby reducing the risk of flickering or uneven light emission. Therefore, based on the increased demand for the capacitance of the storage capacitor, the display panel 100 of the embodiment of the present application is additionally provided with a third connection electrode 123 and a fourth connection electrode 133 that are at least partially overlapped to increase the capacitance of the storage capacitor.

[0096] Secondly, since the junction of the first domain a01 and the second domain a02 is an overlapping area of ​​different electric fields, the liquid crystal deflection in the junction area will be biased, resulting in a lower light transmittance in the junction area. Based on this, the third connection electrode 123 and the fourth connection electrode 133 are arranged at the junction, which can increase the capacitance of the storage capacitor and reduce light loss.

[0097] Optionally, the black matrix layer 22 penetrates the pixel region 10 a to cover the third connection electrode 123 and the fourth connection electrode 133 , thereby improving the contrast.

[0098] Please refer to Figure 8 , Figure 8 FIG. 1 is another schematic diagram of a top view of the array substrate 10 of the display panel 100 according to an embodiment of the present application. Figure 7 The corresponding embodiment, Figure 8 The corresponding embodiment adds a fifth connecting electrode 124. Figure 8 In this paper, we will explain Figure 7 The different parts of the corresponding embodiments are described to avoid redundant explanation.

[0099] Optionally, in some embodiments of the present application, the first electrode 12 further includes a fifth connection electrode 124 extending along the first direction x. The fifth connection electrode 124 is located on a side of the third connection electrode 123 away from the first connection electrode 121 and is connected to the plurality of first branch portions 22a.

[0100] The fifth connection electrode 124 and the second connection electrode 131 at least partially overlap, for example, they may partially overlap, or the fifth connection electrode 124 may be completely disposed within the region of the second connection electrode 131 .

[0101] It can be understood that the fifth connection electrode 124 and the second connection electrode 131 at least partially overlap to increase the capacitance of the storage capacitor and meet or improve the voltage stability of the pixel electrode.

[0102] Please refer to Fig. 9 Accordingly, an embodiment of the present application further provides a display device 1000, which includes the display panel 100 as described in any one of the above embodiments.

[0103] It should be noted that the structure of the display panel 100 of the display device 1000 of the embodiment of the present application is similar to or the same as the structure of the display panel 100 of any of the above embodiments. Figures 1 to 8 , so I will not repeat it here.

[0104] In the array substrate 10 of the embodiment of the present application in a top view, the first connection electrode 121 is spaced apart from the second electrode 13. The first connection electrode 121 and the second connection electrode 131 are spaced apart from the first branch electrode 122 and the second branch electrode 132. The pixel area 10a includes a middle area a1 and a side area a2. In the first direction x, the side area a2 is located on both sides of the middle area a1. In the middle area a1, a first branch electrode 122 and a second branch electrode 132 are alternately and spaced apart along the first direction x. In the side area a2, the first branch electrode 122 and the second branch electrode 132 are partially overlapped.

[0105] It can be understood that the first connecting electrode 121 does not serve as a capacitor plate of the storage capacitor, which reduces the storage capacitance to increase the refresh rate; and the first branch electrode 122 and the second branch electrode 132 of the side area a2 partially overlap to form a storage capacitor, so that the storage capacitance is maintained within the required range to avoid excessive decrease in the storage capacitance, resulting in the risk of uneven light output. In addition, since the transmittance of the side area a2 of the pixel area 10a is lower than the transmittance of the middle area a1, setting the storage capacitor in the side area a2 of the pixel area 10a can reduce light loss and improve the overall transmittance. Secondly, the first branch electrode 122 and the second branch electrode 132 based on the middle area a1 are alternately designed along the first direction x, so that the light only penetrates one layer of the electrode film layer, thereby improving the overall transmittance.

[0106] Secondly, since the first connection electrode 121 does not serve as a capacitor plate of a storage capacitor, the electric field overlap area is reduced, making the electric field more uniform, reducing the risk of uneven brightness and darkness to improve the uniformity of light output.

[0107] In addition, in some embodiments of the present application, the area based on the first connecting electrode 121 is a non-overlapping area of ​​the first electrode 12 and the second electrode 13. Since there is no interference from the vertical electric field, the risk of dark lines is reduced, and the shielding range of the black matrix layer 22 can be appropriately reduced. That is, the black matrix layer 22 does not need to completely shield the first connecting electrode 121 to appropriately expand the opening area, and the light only penetrates one electrode layer, thereby improving the overall light transmittance and reducing the storage capacitor to increase the refresh rate.

[0108] The above is a detailed introduction to a display panel and a display device provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A display panel, comprising an array substrate, a liquid crystal layer and an opposing substrate, wherein the array substrate comprises a plurality of pixel areas, characterized in that: The array substrate comprises: a first substrate; a first electrode, disposed on the first substrate and located in the pixel region, the first electrode comprising a first connecting electrode and a plurality of first branch electrodes, the plurality of first branch electrodes being arranged along a first direction and connected to the first connecting electrode, the first direction being parallel to an extending direction of the scanning line; the first electrode being one of a pixel electrode and a common electrode, and a second electrode, disposed on the first substrate and located in the pixel region, the second electrode and the first electrode being disposed in a different layer, the second electrode comprising a second connecting electrode and a plurality of second branch electrodes, the plurality of second branch electrodes being arranged along the first direction and connected to the second connecting electrode, the second electrode being the other of a pixel electrode and a common electrode; In the array substrate viewed from a top-down perspective, the first connecting electrode and the second electrode are spaced apart, the first branch electrode and the second branch electrode are spaced apart from each other, the pixel area includes a middle area and a side area, in the first direction, the side areas are located on both sides of the middle area, in the middle area, a first branch electrode and a second branch electrode are alternately and spaced apart along the first direction, and in the side area, the first branch electrode and the second branch electrode are partially overlapped.

2. The display panel according to claim 1, characterized in that: In the array substrate viewed from a top view, in the first direction, the first second branch electrode and the first first branch electrode are both located in the side area, a portion of the first second branch electrode close to the middle area overlaps with the first first branch electrode, and a portion of the first second branch electrode far from the middle area exceeds the first first branch electrode; In the array substrate viewed from a top-down perspective, in the first direction, the last second branch electrode and the last first branch electrode are both located in the other side area, a portion of the last second branch electrode close to the middle area overlaps with the last first branch electrode, and a portion of the last second branch electrode far from the middle area exceeds the last first branch electrode.

3. The display panel according to claim 2, characterized in that: The array substrate further comprises a common wiring connected to the second electrode, wherein the common wiring is arranged in a different layer from the first electrode and the second electrode; In the array substrate viewed from a top perspective, the common wiring is spaced apart from the first electrode, and the common wiring is partially overlapped with the second connection electrode.

4. The display panel according to claim 3, characterized in that: In the array substrate viewed from a top perspective, the shortest distance from the common wiring to the first electrode is greater than the shortest distance from the second connecting electrode to the first electrode.

5. The display panel according to claim 4, characterized in that: The first electrode further includes a third connection electrode extending along the first direction, the second electrode further includes a fourth connection electrode extending along the first direction, the pixel area includes a first domain area and a second domain area, the first branch electrode includes a first branch portion and a second branch portion, the second branch electrode includes a third branch portion and a fourth branch portion, the extension direction of the first branch portion is parallel to the extension direction of the third branch portion, the extension direction of the second branch portion is parallel to the extension direction of the fourth branch portion, and the extension direction of the first branch portion intersects with the extension direction of the second branch portion; The first branch portion and the third branch portion are located in the first domain area, the second branch portion and the fourth branch portion are located in the second domain area, the third connection electrode and the fourth connection electrode are located at the junction of the first domain area and the second domain area, the third connection electrode is connected between the first branch portion and the second branch portion, and the fourth connection electrode is connected between the third branch portion and the fourth branch portion; In the array substrate in a plan view, the third connection electrode at least partially overlaps with the fourth connection electrode.

6. The display panel according to any one of claims 1 to 5, characterized in that: In the array substrate viewed from a top perspective, the second connecting electrode is spaced apart from the first electrode.

7. The display panel according to claim 6, characterized in that: Partial overlap of a first electrode and a second electrode forms a storage capacitor, and the storage capacitor is between 0.2 pF and 1.0 pF.

8. The display panel according to claim 6, characterized in that: In the middle region, distances between any adjacent first branch electrodes and any adjacent second branch electrodes are equal.

9. The display panel according to claim 8, characterized in that: The distance between the first second branch electrode and the adjacent second branch electrode is smaller than the distance between two adjacent second branch electrodes located in the middle area, and the distance between any two adjacent first branch electrodes is equal.

10. The display panel according to claim 9, characterized in that: The thickness of the first electrode is between 0.03 micrometers and 0.1 micrometers, the width of the first branch electrode is between 1.5 micrometers and 3 micrometers, the thickness of the second electrode is between 0.03 micrometers and 0.1 micrometers, and the width of the second branch electrode is between 1.5 micrometers and 3 micrometers; In the middle region, a distance between any adjacent first branch electrodes and any adjacent second branch electrodes is between 0.5 micrometers and 2 micrometers.

11. A display device, characterized in that: Comprising a display panel as described in any one of claims 1-10.

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