Satellite-borne high-performance computing unit module

Through the modularly designed satellite-based high-performance computing unit module, the problem of long design and development verification cycle of satellite-based data processing equipment is solved, and the short-cycle design and production of satellite-based intelligent processing computers is realized to meet the needs of different satellites.

CN119988281APending Publication Date: 2025-05-13SHANDONG INST OF AEROSPACE ELECTRONICS TECH
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202411743119.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-29
Publication Date
2025-05-13

AI Technical Summary

Technical Problem

The long design and development verification cycle of existing satellite-borne data processing equipment has led to a contradiction between the satellite R&D design and production cycle and the actual design and production cycle of equipment, and it is difficult to meet the needs of satellite-borne intelligent processing equipment for different satellites.

Method used

The modularly designed satellite-based high-performance computing unit module includes power supply modules, interface modules and general computing modules. Through multi-stage plug-in replacement, it realizes a flexible combination of external interfaces and processing systems, adapting to the data volume and processing requirements of different satellites.

Benefits of technology

It realizes the short-cycle design, production and delivery of satellite-based intelligent processing computers, meets the needs of satellite-based intelligent processing equipment for different satellites, and reduces the occurrence of quality problems.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119988281A_ABST
    Figure CN119988281A_ABST
Patent Text Reader

Abstract

The invention discloses a satellite-borne high-performance computing unit module, which comprises a power supply module, an interface module and a general computing module, according to different power supply input ranges and different power consumption requirements, the power supply module is provided with a plurality of different external interfaces in advance. The interface module comprises a multi-path replaceable low-speed interface carrier plate, a mother board for reserving a selective installation basic interface and a high-speed interface, and a standardized high-speed internal connector; the general-purpose computing module comprises a fully-verified high-performance CPU small system mother board, an extensible GPU / NPU carrier board and a standardized high-speed internal connector. According to the invention, short-period design, production and debugging of the satellite-borne intelligent processing computer can be realized, and the quality problems in the process are reduced, so that the requirements of satellite-borne intelligent processing equipment of different satellites are met.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention belongs to the technical field of on-orbit data processing, and in particular relates to a satellite-borne high-performance computing unit module. Background Art

[0002] Satellite-borne data processing equipment processes remote sensing images and other data on-orbit and identifies sensitive targets. The mainstream solution for ground-based equipment to process images and other data is to use a combination of servers and GPU boards for processing or use. Since different satellites require different processing content, the requirements for satellite-borne data processing equipment are also different, so there is a need for customization, resulting in a long equipment design and development verification cycle. This leads to a contradiction between the R&D, design and production cycle allowed by the satellite and the actual design and production cycle of the equipment.

[0003] In order to resolve this contradiction, it is necessary to propose a modular design method for onboard high-performance computing units. In response to the needs of different satellites, the onboard intelligent processing computers can be designed, produced and delivered in a short period of time through plugging and replacing modules to meet the needs of onboard intelligent processing equipment of different satellites. Summary of the invention

[0004] In view of this, the present invention provides a satellite-borne high-performance computing unit module, which can realize the short-cycle design, production and debugging of satellite-borne intelligent processing computers, reduce quality problems in the process, and meet the needs of satellite-borne intelligent processing equipment for different satellites.

[0005] The technical solution for implementing the present invention is as follows:

[0006] A satellite-borne high-performance computing unit module, comprising a power module, an interface module and a general computing module;

[0007] The power module has pre-designed several different external interfaces according to different power input ranges and different power consumption requirements;

[0008] The interface module includes a multi-channel replaceable low-speed interface carrier board, a motherboard reserved for selectively mounting basic interfaces and high-speed interfaces, and a standardized high-speed internal connector;

[0009] The general computing module includes a fully verified high-performance CPU small system motherboard, an expandable GPU / NPU carrier board, and standardized high-speed internal connectors.

[0010] Furthermore, the power module is designed with different series of power modules for the commonly used 100V / 42V / 28V / 12V different on-board bus voltages, which can be selected and matched according to user requirements.

[0011] Furthermore, the motherboard of the interface module includes a highly expandable SRAM-type FPGA and a highly reliable FLASH-type FPGA, wherein the SRAM-type FPGA is connected to the outside via a high-speed interface, and a variety of multiple channels are designed, including but not limited to optical fiber, Gigabit Ethernet, 10 Gigabit Ethernet, GTX, 2711, all of which are reserved on the printed circuit board of the motherboard and can be selectively installed; the FLASH-type FPGA is connected to the outside via a basic low-speed interface, including but not limited to CAN / 422 / LVDS; inside the module, the SRAM-type FPGA and the FLASH-type FPGA are interconnected through multiple groups of GPIO; and the FLASH-type FPGA configures and refreshes the SRAM-type FPGA to ensure the reliable operation of the interface module; on the low-speed interface carrier board interface of the interface module, its nodes are respectively connected to the FLASH-type FPGA and the SRAM-type FPGA to ensure that the number and types of interfaces can be expanded using both types of FPGAs.

[0012] Furthermore, the general computing module designs a motherboard with a fully verified high-performance CPU small system as the core, and is connected to the SRAM type FPGA of the interface module with high-speed buses including but not limited to PCIe, SRIO, and network ports, and is connected to the FLASH type FPGA with three buses including but not limited to low-speed buses RS485, LVDS, and CAN; the high-speed bus ensures that the CPU can receive / send data received by the device in a timely manner, and send out processed data; the low-speed bus ensures that the CPU can receive instructions and upload data, and send down telemetry.

[0013] Furthermore, two types of general computing modules are currently designed. For GPUs or NPUs without built-in CPUs, a high-performance CPU is added to the general-purpose I-type computing module, the PCIe signal of the interface module is connected to the high-performance CPU, and the CPU is used to control the GPU or NPU; for GPUs or NPUs with built-in CPUs, the PCIe signal of the interface module is connected to the general-purpose II-type computing module GPU or NPU.

[0014] Beneficial effects:

[0015] 1. The present invention adopts a modular design and can achieve flexible combination of external interfaces and processing systems through multi-level plug-in and replacement, and can adapt to both high-speed and low-speed interfaces.

[0016] 2. The present invention can achieve a balance between performance and power consumption by matching different processors according to the data volume and processing requirements of the satellite.

[0017] 3. The present invention can realize the short-cycle design, production and delivery of onboard intelligent processing computers to meet the onboard intelligent processing equipment requirements of different satellites. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 Schematic diagram of the modular onboard intelligent processing computer that can be plugged in and replaced.

[0019] Figure 2 This is a schematic diagram of the interface module.

[0020] Figure 3 Schematic diagram of Type I general computing module.

[0021] Figure 4 This is a schematic diagram of a Type II general computing module. DETAILED DESCRIPTION

[0022] The present invention is described in detail below with reference to the accompanying drawings and embodiments.

[0023] The present invention provides a satellite-borne high-performance computing unit module, such as Figure 1 As shown, it includes a power module + an interface module + a general computing module, where:

[0024] The power module has been pre-designed with several different external interfaces according to different power input ranges and different power consumption requirements.

[0025] The interface module adopts "multi-channel replaceable low-speed interface carrier board + motherboard reserved for selective installation of basic interface and high-speed interface + standardized high-speed internal connector".

[0026] The general computing module uses "fully verified high-performance CPU small system motherboard + scalable GPU / NPU carrier board + standardized high-speed internal connectors".

[0027] The power module is designed with different series of power modules for the commonly used 100V / 42V / 28V / 12V different on-board bus voltages, which can be selected and matched according to user requirements.

[0028] like Figure 2As shown, the motherboard of the interface module includes a highly expandable SRAM-type FPGA and a highly reliable FLASH-type FPGA. The SRAM-type FPGA is connected to the high-speed interface, and a variety of multiple channels are designed, including but not limited to optical fiber, Gigabit network, 10 Gigabit network, GTX, 2711, all of which are reserved on the printed circuit board of the motherboard and can be selectively installed. The FLASH-type FPGA is connected to the basic low-speed interface, including but not limited to CAN / 422 / LVDS. Inside the module, the SRAM-type FPGA and the FLASH-type FPGA are interconnected through multiple groups of GPIO. And the FLASH-type FPGA configures and refreshes the SRAM-type FPGA to ensure the reliable operation of the interface module. On the low-speed interface carrier interface of the interface module, its nodes are connected to the FLASH-type FPGA and the SRAM-type FPGA respectively, ensuring that the number and types of interfaces can be expanded with both types of FPGAs.

[0029] The general computing module is designed with a fully verified high-performance CPU small system as the core motherboard, connected to the SRAM type FPGA of the interface module with high-speed buses including but not limited to PCIe, SRIO, network ports, etc., and connected to the FLASH type FPGA with low-speed buses including but not limited to RS485, LVDS, CAN, and three buses. The high-speed bus ensures that the CPU receives / sends the data received by the device in a timely manner and sends the processed data. The low-speed bus ensures that the CPU can receive instructions and upload data, and send telemetry.

[0030] There are currently two types of general computing modules designed, such as Figure 3 As shown, for GPUs or NPUs without built-in CPUs, such as Huawei Shengteng, Tiangai series, or other domestic alternative GPU / NPUs, add a high-performance CPU to the general I-type computing module, such as Feiteng D2000 series, or Intel's XEON series, connect the PCIe signal of the interface module to the high-performance CPU, and use the CPU to control the GPU or NPU. Figure 4 As shown, for a GPU or NPU with a built-in CPU, such as NVIDIA's ORIN, ORIN_NX, XAVIER, or Huawei Atlas, the PCIe signal of the interface module is connected to the general-purpose II computing module GPU or NPU.

[0031] A device can include multiple interface modules and general computing modules according to needs, and flexibly connect signals on the baseboard.

[0032] In summary, the above are only preferred embodiments of the present invention and are not intended to limit the protection scope of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A satellite-borne high-performance computing unit module, characterized in that: It includes a power module, an interface module and a general computing module; The power module has pre-designed several different external interfaces according to different power input ranges and different power consumption requirements; The interface module includes a multi-channel replaceable low-speed interface carrier board, a motherboard reserved for selectively mounting basic interfaces and high-speed interfaces, and a standardized high-speed internal connector; The general computing module includes a fully verified high-performance CPU small system motherboard, an expandable GPU / NPU carrier board, and standardized high-speed internal connectors.

2. The computing unit module according to claim 1, characterized in that: The power module is designed with different series of power modules for different onboard bus voltages of 100V / 42V / 28V / 12V, which can be selected and matched according to user requirements.

3. The computing unit module according to claim 1, characterized in that: The motherboard of the interface module includes a highly expandable SRAM-type FPGA and a highly reliable FLASH-type FPGA. The SRAM-type FPGA is connected to the outside through a high-speed interface, and multiple channels are designed, including but not limited to optical fiber, Gigabit Ethernet, 10 Gigabit Ethernet, GTX, 2711, which are all reserved on the motherboard's printed circuit board and can be selectively assembled. The FLASH-type FPGA is connected to the outside through basic low-speed interfaces, including but not limited to CAN / 422 / LVDS; inside the module, the SRAM-type FPGA and the FLASH-type FPGA are interconnected through multiple groups of GPIO; and the FLASH-type FPGA configures and refreshes the SRAM-type FPGA to ensure the reliable operation of the interface module; on the low-speed interface carrier interface of the interface module, its nodes are respectively connected to the FLASH-type FPGA and the SRAM-type FPGA to ensure that the number and types of interfaces can be expanded using both types of FPGAs.

4. The computing unit module according to claim 3, characterized in that: The general computing module is designed with a motherboard with a fully verified high-performance CPU small system as the core, and is connected to the SRAM type FPGA of the interface module with high-speed buses including but not limited to PCIe, SRIO, and network ports, and is connected to the FLASH type FPGA with three buses including but not limited to low-speed buses RS485, LVDS, and CAN; the high-speed bus ensures that the CPU can receive / send data received by the device in a timely manner, and send out processed data; the low-speed bus ensures that the CPU can receive instructions and upload data, and send telemetry.

5. The computing unit module according to claim 3 or 4, characterized in that: There are currently two types of general computing modules designed. For GPUs or NPUs without built-in CPUs, a high-performance CPU is added to the general I-type computing module, the PCIe signal of the interface module is connected to the high-performance CPU, and the CPU is used to control the GPU or NPU; for GPUs or NPUs with built-in CPUs, the PCIe signal of the interface module is connected to the general II-type computing module GPU or NPU.