Bandwidth adjustment method and device, storage medium and electronic equipment

Abstract

The invention provides a bandwidth adjustment method and device, a storage medium and electronic equipment. The method comprises the following steps: identifying a user state scene; wherein the user state scene is associated with the current process number and the current process identifier; and sending a bandwidth adjustment instruction to a system on chip (SOC), so that the SOC adjusts the memory bandwidth to the target bandwidth after determining the target bandwidth matched with the user state scene. According to the method and the device, the rationality of memory bandwidth allocation can be improved, the performance and the cruising ability of the electronic equipment can be improved, and the availability is high.

Description

Technical Field

[0001] The present disclosure relates to the computer field, and in particular to a bandwidth adjustment method and device, a storage medium and an electronic device. Background Art

[0002] The normal operation of a computer system requires the collaboration of the central processing unit (CPU) and memory. Memory is also known as Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM), which is mainly used in ordinary memory stick scenarios. DDR is an improvement on the original DRAM, while LPDDR is based on DDR with the prefix Low Power (LP). It has lower power consumption and smaller size than the same generation of DDR memory. LPDDR is a mobile phone running memory (DRAM), similar to a computer memory stick. LPDDR4 represents the fourth generation of mobile phone memory, and LPDDR5 represents the fifth generation of mobile phone memory.

[0003] Currently, although SOC can trigger memory bandwidth adjustment, the adjusted memory bandwidth may not be suitable for the current scenario, and the memory bandwidth adjustment plan needs to be optimized. Summary of the invention

[0004] In view of this, the present application discloses a bandwidth adjustment method and device, a storage medium and an electronic device.

[0005] According to a first aspect of an embodiment of the present disclosure, a bandwidth adjustment method is provided, including:

[0006] Identifying a user status scenario; wherein the user status scenario is associated with at least one of a current process number and a current process identifier;

[0007] A bandwidth adjustment instruction is sent to a system on chip (SOC), so that the SOC adjusts the memory bandwidth to the target bandwidth after determining a target bandwidth matching the user status scenario.

[0008] According to a second aspect of an embodiment of the present disclosure, a bandwidth adjustment device is provided, the device comprising:

[0009] A scene recognition module, used to recognize a user state scene; wherein the user state scene is associated with at least one of a current process number and a current process identifier;

[0010] The bandwidth adjustment module is used to send a bandwidth adjustment instruction to the system on chip SOC, so that the SOC adjusts the memory bandwidth to the target bandwidth after determining the target bandwidth matching the user status scenario.

[0011] According to a third aspect of an embodiment of the present disclosure, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps of the bandwidth adjustment method described in any one of the first aspects are implemented.

[0012] According to a fourth aspect of an embodiment of the present disclosure, there is provided an electronic device, including:

[0013] processor;

[0014] a memory for storing processor-executable instructions;

[0015] The processor is configured to execute the executable instructions to implement the steps of the bandwidth adjustment method described in any one of the first aspects.

[0016] The technical solution provided by the embodiments of the present disclosure may have the following beneficial effects:

[0017] In the present disclosure, user status scenarios can be automatically identified and bandwidth adjustment instructions can be sent to the SOC, so that the SOC adjusts the memory bandwidth to a target bandwidth that matches the user status scenario. This can improve the rationality of memory bandwidth allocation, and can improve the performance and battery life of electronic devices with high availability.

[0018] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0020] Figure 1 is a structural diagram showing an interaction between a system on chip and a DDR according to an exemplary embodiment of the present disclosure;

[0021] Figure 2 is a schematic diagram of a bandwidth adjustment method according to an exemplary embodiment of the present disclosure;

[0022] Figure 3 is a schematic diagram of another bandwidth adjustment method according to an exemplary embodiment of the present disclosure;

[0023] Figure 4A is a schematic diagram of another bandwidth adjustment method according to an exemplary embodiment of the present disclosure;

[0024] Figure 4B is a schematic diagram of another bandwidth adjustment method according to an exemplary embodiment of the present disclosure;

[0025] Figure 5 is a block diagram of a bandwidth adjustment device according to an exemplary embodiment of the present disclosure;

[0026] Figure 6 is a block diagram of another bandwidth adjustment device according to an exemplary embodiment of the present disclosure;

[0027] Fig. 7A is a block diagram of an electronic device according to an exemplary embodiment of the present disclosure;

[0028] Figure 7B is a schematic diagram of a system architecture according to an exemplary embodiment of the present disclosure;

[0029] Figure 8 It is a structural schematic diagram of an electronic device according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0030] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Instead, they are merely examples of devices and methods consistent with some aspects of the present invention as detailed in the appended claims.

[0031] In the disclosed embodiments, applications (Application software, APP) are installed on the data storage device of the mobile phone. When the user clicks to use an APP, the system will load this part of the program code and related data into the running memory to execute the next step. The so-called "loading" is essentially to perform read and write operations on the data storage device of the mobile phone. This work is mainly completed by the memory (when the memory includes DDR SDRAM, the subsequent memory can be directly replaced by DDR). The von Neumann architecture currently widely used in electronic devices not only separates the computing and storage functions, but also focuses more on computing. The data is constantly transmitted back and forth between the processor and the memory, which consumes a lot of time and power. In this context, it is necessary to focus on the intelligent perception frequency adjustment solution of DDR storage.

[0032] Reference Figure 1As shown, in the case where the memory is a double data rate synchronous dynamic random access memory, the SOC can access each DRAM based on the addresses of the two DRAMs, can send commands to each DRAM, and can read or write data from each DRAM.

[0033] For example, when a user opens a camera app, the system will load the code for the relevant camera part, prepare for possible photo operations, and read the user's previous photos for the user to click and review. If the user clicks to shoot, the content obtained by the camera sensor will be generated into a corresponding image data file, and finally written to the data storage device of the mobile phone, which is usually called the save operation, which is automatically completed by the system.

[0034] It can be seen that reading and writing data on electronic devices is the underlying logic supporting various applications. The reading and writing performance (IO performance) of data storage devices has become a key factor in determining the final electronic device usage experience, including whether it is smooth or not.

[0035] If DDR works at a higher frequency for a long time, the power consumption it generates will be greater. Considering that although SOC can trigger memory bandwidth adjustment, the adjusted memory bandwidth may not be suitable for the current scenario, in order to further optimize the memory bandwidth adjustment scheme, the present disclosure provides a bandwidth adjustment method and device, a storage medium and an electronic device, which can improve the rationality of memory bandwidth allocation, and can improve the performance and endurance of electronic devices, and have high availability.

[0036] The bandwidth adjustment method provided by the present disclosure is first introduced below.

[0037] Reference Figure 2 As shown, Figure 2 is a schematic diagram of a bandwidth adjustment method shown in an exemplary embodiment of the present disclosure. The bandwidth adjustment method can be deployed on an electronic device, and the electronic device can include but is not limited to a mobile phone, a laptop computer, a desktop computer, a tablet computer, etc. Figure 2 As shown, the bandwidth adjustment method may include:

[0038] In step 201, a user status scenario is identified.

[0039] In some embodiments, the user state context may be associated with at least one of a current process number and a current process identifier.

[0040] In some embodiments, different user status scenarios can be divided according to the current number of processes.

[0041] In one example, when the current number of processes is greater than a preset number, it can be considered that the user's application usage density is high, and the current user status scenario can be the first scenario, which can refer to a scenario where the memory bandwidth needs to be increased. The first scenario can also be called a "user high-density application scenario", and the present disclosure does not limit the name of the first scenario.

[0042] In one example, when the current number of processes is less than or equal to a preset number, it can be considered that the user's application usage density is low, and the current user status scenario can be the second scenario, which can refer to a scenario where the memory bandwidth needs to be reduced. The second scenario can also be called a "user low-density application scenario", and the present disclosure does not limit the name of the second scenario.

[0043] The preset number may be a positive integer.

[0044] For example, the preset number is 2, and the user is playing games and listening to music at the same time, then it can be determined that the user status scene is the first scene.

[0045] In some embodiments, different user status scenarios may be divided according to the current process identifier.

[0046] In one example, the number of preset identifiers may be one or more, and when at least one of the current process identifiers is the same as the preset identifier, the electronic device may determine that the user status scenario is the first scenario, wherein the first scenario is a scenario where the memory bandwidth needs to be increased.

[0047] For example, the preset identifier is "the identifier of game a", then no matter how many current processes there are, as long as the current process identifier includes the "identifier of game a", the electronic device can determine that the user status scene is the first scene.

[0048] In one example, the number of preset identifiers may be one or more, and when each of the current process identifiers is different from the preset identifiers, the electronic device may determine that the user status scenario is the second scenario, wherein the second scenario is a scenario where the memory bandwidth needs to be reduced.

[0049] For example, the preset identifier is "the identifier of game a", then no matter how many current processes there are, as long as the current process identifier does not include the "identifier of game a", the electronic device can determine that the user status scene is the second scene.

[0050] In some embodiments, different user status scenarios may be divided based on the current process number and the current process identifier.

[0051] In one example, when the current number of processes is greater than a preset number and at least one of the current process identifiers is the same as a preset identifier, the user state scenario is determined to be a first scenario, wherein the first scenario is a scenario where an increase in memory bandwidth is required.

[0052] For example, when the preset number is 1, the preset identifier is "the identifier of game a", the current process identifier includes the "identifier of game a", and the current process number is greater than 1, the electronic device can determine that the user status scene is the first scene.

[0053] In one example, when the current number of processes is less than or equal to a preset number and each of the current process identifiers is different from the preset identifier, the user state scenario is determined to be a second scenario, wherein the second scenario is a scenario where the memory bandwidth needs to be reduced.

[0054] For example, when the preset number is 1, the preset identifier is "the identifier of game a", the current process number is 1 and the current process identifier does not include the "identifier of game a", or the current process number is 0, the electronic device can determine that the user status scene is the second scene.

[0055] The above description is merely an exemplary description, and the present disclosure does not limit the method for identifying user status scenarios.

[0056] In some embodiments, the electronic device may monitor the input / output (IO) throughput of the operating system to determine at least one of the current process number and the current process identifier, and further identify the user status scenario.

[0057] Exemplarily, the electronic device may obtain the IO throughput by detecting the signaling sent by the SOC, and after determining at least one of the current process number and the current process identifier, identify the user status scenario.

[0058] In some embodiments, a scene recognition module may be deployed at the application layer of the electronic device, and the user status scene may be recognized through the scene recognition module.

[0059] In some embodiments, a scene recognition module can be deployed at the application layer of the electronic device. After the scene recognition module identifies and obtains the IO throughput, at least one of the current process number and the current process identifier is determined based on the IO throughput, thereby determining the user status scene.

[0060] The above description is merely an exemplary description, and the present disclosure does not limit the method for identifying user status scenarios.

[0061] In step 202, a bandwidth adjustment instruction is sent to a system on chip (SOC).

[0062] In some embodiments, when the electronic device determines that the condition for adjusting the memory bandwidth is met, the electronic device sends the bandwidth adjustment instruction to the SOC.

[0063] In one example, the above conditions include but are not limited to at least one of the following: adjusting the memory bandwidth will not cause system abnormalities; or the current memory bandwidth is not equal to the target bandwidth; or the user status scenario is the first scenario and the current memory bandwidth is less than the maximum bandwidth supported by the memory; wherein, the first scenario is a scenario where the memory bandwidth needs to be increased; or the user status scenario is the second scenario and the current memory bandwidth is greater than the minimum bandwidth supported by the memory; wherein, the second scenario is a scenario where the memory bandwidth needs to be reduced.

[0064] In one example, the electronic device sends the bandwidth adjustment instruction to the SOC when determining that adjusting the memory bandwidth will not cause system abnormality.

[0065] Exemplarily, the electronic device may send a bandwidth adjustment confirmation instruction to the process priority adjustment module through the bandwidth adjustment module, and the process priority adjustment module may determine, based on the bandwidth adjustment confirmation instruction, whether adjusting the memory bandwidth in the current user status scenario will cause system abnormalities; if it will not cause system abnormalities, the process priority adjustment module may send a confirmation result to the bandwidth adjustment module, and the confirmation result is used to indicate that adjusting the memory bandwidth in the current user status scenario will not cause system abnormalities.

[0066] Among them, the bandwidth adjustment module and the process priority adjustment module can be deployed between the physical layer and the application layer.

[0067] Exemplarily, the process priority adjustment module may store preset process priority information and / or the minimum memory bandwidth that each process is expected to occupy, so as to determine whether adjusting the memory bandwidth in the current user status scenario will cause system abnormality.

[0068] Exemplarily, the process priority adjustment module may determine the process priority information based on the IO throughput corresponding to each current process, wherein the process priority may be positively correlated with the IO throughput of the process. For example, if the IO throughput of process #1 is greater than the IO throughput of process #2, the priority of process #1 is higher than the priority of process #2.

[0069] And / or, the process priority adjustment module may determine the minimum memory bandwidth that each process is expected to occupy based on the current IO throughput corresponding to each process.

[0070] The process priority adjustment module determines whether adjusting the memory bandwidth will cause system abnormality in the current user state scenario based on the determined process priority information and / or the minimum memory bandwidth expected to be occupied by each process.

[0071] For example, the bandwidth adjustment module is about to instruct the SOC to reduce the memory bandwidth based on the current user status scenario, but the process priority adjustment module determines, based on the minimum memory bandwidth that each process expects to occupy and the current process identifier, that if the memory bandwidth is reduced, the minimum memory bandwidth of the current process cannot be ensured, which will cause system abnormalities. Therefore, the confirmation result may not be sent to the bandwidth adjustment module.

[0072] For another example, the bandwidth adjustment module is about to instruct the SOC to increase the memory bandwidth based on the current user status scenario, but the process priority adjustment module determines based on the process priority information and the current process identifier that if the memory bandwidth is increased, it cannot ensure that a certain process is scheduled preferentially, which will cause system abnormalities. Therefore, the confirmation result may not be sent to the bandwidth adjustment module.

[0073] Exemplarily, the process priority adjustment module may also send indication information to the bandwidth adjustment module when determining that adjusting the memory bandwidth will cause system abnormality, where the indication information is used to indicate that adjusting the memory bandwidth will cause system abnormality.

[0074] For another example, the process priority adjustment module determines, based on the bandwidth adjustment confirmation instruction, according to the process priority information and the minimum memory bandwidth that each process expects to occupy, that adjusting the memory bandwidth will not cause system abnormalities under the current user status scenario. At this time, the confirmation result can be sent to the bandwidth adjustment module.

[0075] In one example, when the electronic device determines that the current memory bandwidth is not equal to the target bandwidth, the electronic device sends the bandwidth adjustment instruction to the SOC.

[0076] In one example, when the electronic device determines that the user status scenario is the first scenario and the current memory bandwidth is less than the maximum bandwidth supported by the memory, the electronic device sends the bandwidth adjustment instruction to the SOC.

[0077] It is understandable that the electronic device can obtain the current memory bandwidth through the bandwidth adjustment module. In the first scenario, since the memory bandwidth needs to be increased, if the current memory bandwidth has reached the maximum bandwidth supported by the memory, it is obvious that the electronic device cannot increase the memory bandwidth any further. Therefore, the electronic device can send the bandwidth adjustment instruction to the SOC only when it determines that the user status scenario is the first scenario and the current memory bandwidth is less than the maximum bandwidth supported by the memory.

[0078] In one example, when the electronic device determines that the user status scenario is the second scenario and the current memory bandwidth is greater than the minimum bandwidth supported by the memory, the electronic device sends the bandwidth adjustment instruction to the SOC.

[0079] It is understandable that the electronic device can obtain the current memory bandwidth through the bandwidth adjustment module. In the second scenario, since the memory bandwidth needs to be reduced, if the current memory bandwidth has reached the minimum bandwidth supported by the memory, it is obvious that the electronic device cannot reduce the memory bandwidth any further. Therefore, the electronic device can send the bandwidth adjustment instruction to the SOC only when it determines that the user status scenario is the second scenario and the current memory bandwidth is greater than the minimum bandwidth supported by the memory.

[0080] In some embodiments, a bandwidth adjustment instruction may be sent to the SOC through the bandwidth adjustment module. The bandwidth adjustment instruction may include but is not limited to at least one of the following:

[0081] User status scenario identifier; or

[0082] Related information.

[0083] The associated information may include but is not limited to at least one of the following: process priority information; or the minimum memory bandwidth that each process is expected to occupy.

[0084] Of course, in the embodiment of the present disclosure, the process may be a running process.

[0085] In some embodiments, the SOC may determine a bandwidth adjustment strategy based on the bandwidth adjustment instruction. For example, after the SOC determines the user status scenario identifier based on the bandwidth adjustment instruction, it may determine to increase or decrease the memory bandwidth. For example, if the scenario identifier is the first scenario identifier, the SOC may increase the memory bandwidth. If the scenario identifier is the second scenario identifier, the SOC may decrease the memory bandwidth.

[0086] In some embodiments, the SOC may adjust the memory bandwidth to the target bandwidth based on the bandwidth adjustment instruction.

[0087] Exemplarily, the target bandwidth may be greater than or equal to the target value, and the target value may be determined based on the associated information carried in the bandwidth adjustment instruction, for example, the target value may be the minimum memory bandwidth that each (running) process is expected to occupy. Of course, the target bandwidth should not exceed the maximum bandwidth supported by the memory, nor should it be less than the minimum bandwidth supported by the memory.

[0088] In some embodiments, the memory may be a DDR SDRAM, and the SOC may adjust the bandwidth of each of the two DRAMs to a target bandwidth based on the bandwidth adjustment instruction.

[0089] For example, the memory bandwidth is calculated using the following formula 1:

[0090] Bandwidth = memory core frequency × memory bus bit number × multiplication factor Formula 1

[0091] The number of memory bus bits and the multiplication factor are determined when the memory leaves the factory. In the disclosed embodiment, the SOC can adjust the memory bandwidth by adjusting the memory core frequency.

[0092] In the above embodiment, the electronic device can automatically identify the user status scenario and send a bandwidth adjustment instruction to the SOC, so that the SOC adjusts the memory bandwidth to the target bandwidth matching the user status scenario, which can improve the rationality of memory bandwidth allocation, and can improve the performance and battery life of the electronic device, and has high availability.

[0093] In some optional embodiments, reference Figure 3 As shown, Figure 3 is based on Figure 2 The embodiment shown shows another bandwidth adjustment method. After step 202, the method may further include:

[0094] In step 203, a new bandwidth adjustment instruction is sent to the SOC at least at a preset time interval.

[0095] In some embodiments, after the electronic device sends a bandwidth adjustment instruction, it needs to wait for a certain period of time before sending a new bandwidth adjustment instruction to the SOC.

[0096] In the above embodiment, problems such as device heating and memory access failure caused by frequent updates of memory bandwidth can be avoided, and an increase in device power consumption can be avoided.

[0097] In some embodiments, reference Figure 4A As shown, Figure 4A is a schematic diagram of another bandwidth adjustment method shown in an exemplary embodiment of the present disclosure, comprising:

[0098] Step 401, detecting IO throughput.

[0099] In the embodiment of the present disclosure, the electronic device may detect the IO throughput of the system.

[0100] Step 402, detecting the process scheduling status.

[0101] In an embodiment of the present disclosure, the electronic device may determine at least one of the current process number and the current process identifier based on the IO throughput, and further determine the current user status scenario.

[0102] Step 403, obtaining DDR frequency status.

[0103] In the disclosed embodiment, the electronic device may obtain the current memory bandwidth, that is, obtain the current frequency of DDR, and / or may obtain DDR status information, which may be used to indicate whether DDR has reached the maximum bandwidth or minimum bandwidth supported by the memory.

[0104] Step 404, adjusting the DDR bandwidth.

[0105] In the embodiment of the present disclosure, a bandwidth adjustment instruction may be sent to the SOC, so that after the SOC determines a target bandwidth matching the user status scenario, the SOC adjusts the memory bandwidth to the target bandwidth.

[0106] In the above embodiment, the current user status scenario can be identified, and in the first scenario, the DDR bandwidth can be dynamically increased, and in the second scenario, the DDR bandwidth can be dynamically reduced, so that the memory bandwidth can meet the operation of the application, avoid or reduce the process limitation or tension, improve the overall performance of the electronic device, and reduce the power consumption of the electronic device.

[0107] In some embodiments, reference Figure 4B As shown, Figure 4B is a schematic diagram of another bandwidth adjustment method shown in an exemplary embodiment of the present disclosure, comprising:

[0108] In step 401 ′, the user status scenario is identified.

[0109] In some embodiments, the electronic device may determine the current user status scenario by detecting IO throughput and determining at least one of the current process number and the current process identifier.

[0110] In step 402', it is determined whether the condition for adjusting the memory bandwidth is met.

[0111] In some embodiments, the above conditions include but are not limited to at least one of the following: adjusting the memory bandwidth will not cause system abnormalities; or the current memory bandwidth is not equal to the target bandwidth; or the user status scenario is the first scenario and the current memory bandwidth is less than the maximum bandwidth supported by the memory; wherein, the first scenario is a scenario where the memory bandwidth needs to be increased; or the user status scenario is the second scenario and the current memory bandwidth is greater than the minimum bandwidth supported by the memory; wherein, the second scenario is a scenario where the memory bandwidth needs to be reduced.

[0112] In some embodiments, step 402' is similar to the aforementioned step 202 and will not be described in detail herein.

[0113] If the condition is met and the current user status scenario is the first scenario, step 403' is executed; if the current user status scenario is the second scenario, step 404' is executed; if the above condition is not met, the current bandwidth adjustment process is terminated.

[0114] In step 403', the DDR bandwidth is increased.

[0115] In some embodiments, the electronic device may increase the DDR bandwidth in the first scenario.

[0116] In step 404', the DDR bandwidth is reduced.

[0117] In some embodiments, the electronic device may reduce the DDR bandwidth in the second scenario.

[0118] In the above embodiment, after the user installation scenario is identified, the scenario identifier can be carried in the bandwidth adjustment instruction and sent to the SOC so that the SOC can modify the DDR bandwidth policy. In addition, the bandwidth adjustment instruction can also include parameters such as process priority information and the minimum memory bandwidth occupied by each process. By adjusting the DDR bandwidth through the SOC, software and hardware collaborative design is realized, and intelligent perception of user status scenarios is achieved. The purpose of dynamically adjusting the memory bandwidth is improved, the performance of electronic devices is improved, and the battery life of electronic devices is improved.

[0119] Corresponding to the aforementioned application function implementation method embodiment, the present disclosure also provides an application function implementation device embodiment.

[0120] Reference Figure 5 As shown, Figure 5 FIG. 1 is a schematic diagram of a bandwidth adjustment device according to an exemplary embodiment of the present disclosure. The device can be deployed on an electronic device, which may include but is not limited to a mobile phone, a laptop computer, a desktop computer, a tablet computer, etc. Figure 5 As shown, the device may include:

[0121] A scene recognition module 501 is used to recognize a user state scene; wherein the current scene is associated with at least one of a current process number and a current process identifier;

[0122] The bandwidth adjustment module 502 is used to send a bandwidth adjustment instruction to the system on chip SOC, so that the SOC adjusts the memory bandwidth to the target bandwidth after determining the target bandwidth matching the user status scenario.

[0123] In some optional embodiments, reference Figure 6 As shown, Figure 6 is based on Figure 5 The embodiment shown shows another bandwidth adjustment device, which may also include:

[0124] The process priority adjustment module 503 is used to send the associated information to the bandwidth adjustment module, so that the bandwidth adjustment module carries the associated information in the bandwidth adjustment instruction and sends it to the SOC; wherein the associated information includes at least one of the following:

[0125] process priority information; or

[0126] The minimum memory bandwidth that each process is expected to occupy.

[0127] In some embodiments, the process priority adjustment module 503 is further configured to:

[0128] After determining that adjusting the memory bandwidth in the user status scenario will not cause system abnormality based on the bandwidth adjustment confirmation instruction sent by the bandwidth adjustment module 502 , a confirmation result is sent to the bandwidth adjustment module 502 .

[0129] In some embodiments, reference Fig. 7A As shown, Fig. 7A : is a schematic diagram of the structure of an electronic device provided by the present disclosure, including:

[0130] A scene recognition module 701 is used to recognize a user state scene; wherein the user state scene is associated with at least one of a current process number and a current process identifier;

[0131] The bandwidth adjustment module 702 is used to send a bandwidth adjustment instruction to the system on chip SOC, so that the SOC adjusts the memory bandwidth to the target bandwidth after determining the target bandwidth matching the user status scenario;

[0132] The process priority adjustment module 703 is used to send the associated information to the bandwidth adjustment module 602, so that the bandwidth adjustment module carries the associated information in the bandwidth adjustment instruction and sends it to the SOC; wherein the associated information includes at least one of the following:

[0133] process priority information; or

[0134] The minimum memory bandwidth that each process is expected to occupy.

[0135] In some embodiments, reference Figure 7B As shown, Figure 7B This is a schematic diagram of an overall architecture provided by the present invention, in which the physical layer is composed of memory and SOC, wherein the memory includes two DRAMs, the scene recognition module can be deployed in the application layer, and the bandwidth adjustment module and the process priority adjustment module can be deployed in the scheduling layer above the physical layer.

[0136] The actions performed by the scene recognition module, the bandwidth adjustment module, and the process priority adjustment module have been introduced in the above embodiments and will not be repeated here.

[0137] For the device embodiments, since they basically correspond to the method embodiments, the relevant parts can refer to the partial description of the method embodiments. The device embodiments described above are only schematic, wherein the units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the disclosed solution. A person of ordinary skill in the art may understand and implement it without creative work.

[0138] Accordingly, the present disclosure further provides a computer-readable storage medium for storing a computer program, wherein the computer program is used to implement the steps of any of the above-mentioned bandwidth adjustment methods when executed by a processor.

[0139] Accordingly, the present disclosure also provides an electronic device, including:

[0140] processor;

[0141] a memory for storing processor-executable instructions;

[0142] The processor is configured to execute the executable instructions to implement the steps of any one of the bandwidth adjustment methods described above.

[0143] Figure 8 800 is a block diagram of a bandwidth adjustment device according to an exemplary embodiment. For example, the device 800 may be a terminal device such as a mobile phone, a computer, a digital broadcast terminal, a message transceiver device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc. The terminal device may correspond to the above electronic device.

[0144] Reference Figure 8 , the device 800 may include one or more of the following components: a processing component 802 , a memory 804 , a power component 806 , a multimedia component 808 , an audio component 810 , an input / output (I / O) interface 812 , a sensor component 816 , and a communication component 818 .

[0145] The processing component 802 generally controls the overall operation of the device 800, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 802 may include one or more processors 820 to execute instructions to complete all or part of the steps of the above-mentioned method. In addition, the processing component 802 may include one or more modules to facilitate the interaction between the processing component 802 and other components. For example, the processing component 802 may include a multimedia module to facilitate the interaction between the multimedia component 808 and the processing component 802.

[0146] One of the processors 820 in the processing component 802 may be configured to execute any of the bandwidth adjustment methods described above.

[0147] The memory 804 is configured to store various types of data to support operations on the device 800. Examples of such data include instructions for any application or method operating on the device 800, contact data, phone book data, messages, pictures, videos, etc. The memory 804 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0148] The power supply component 806 provides power to the various components of the device 800. The power supply component 806 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the device 800.

[0149] The multimedia component 808 includes a screen that provides an output interface between the device 800 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 808 includes a front camera and / or a rear camera. When the device 800 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera may receive external multimedia data. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

[0150] The audio component 810 is configured to output and / or input audio signals. For example, the audio component 810 includes a microphone (MIC), and when the device 800 is in an operating mode, such as a call mode, a recording mode, and a speech recognition mode, the microphone is configured to receive an external audio signal. The received audio signal can be further stored in the memory 804 or sent via the communication component 818. In some embodiments, the audio component 810 also includes a speaker for outputting audio signals.

[0151] I / O interface 812 provides an interface between processing component 802 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include but are not limited to: home button, volume button, start button, and lock button.

[0152] The sensor assembly 816 includes one or more sensors for providing various aspects of status assessment for the device 800. For example, the sensor assembly 816 can detect the open / closed state of the device 800, the relative positioning of components, such as the display and keypad of the device 800, the sensor assembly 816 can also detect the position change of the device 800 or a component of the device 800, the presence or absence of user contact with the device 800, the orientation or acceleration / deceleration of the device 800 and the temperature change of the device 800. The sensor assembly 816 can include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 816 can also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 816 can also include an accelerometer, a gyroscope sensor, a magnetic sensor, a pressure sensor or a temperature sensor.

[0153] The communication component 818 is configured to facilitate wired or wireless communication between the device 800 and other devices. The device 800 can access a wireless network based on a communication standard, such as WiFi, 3G, 4G, 5G, 6G or a combination thereof. In an exemplary embodiment, the communication component 818 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 818 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0154] In an exemplary embodiment, the apparatus 800 may be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors or other electronic components to perform the above method.

[0155] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 804 including instructions, and the instructions can be executed by the processor 820 of the device 800 to perform the above method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0156] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. The terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "comprises a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0157] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The description and examples are intended to be exemplary only, and the true scope and spirit of the present disclosure are indicated by the following claims.

[0158] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A bandwidth adjustment method, characterized in that: include: Identifying a user status scenario; wherein the user status scenario is associated with at least one of a current process number and a current process identifier; A bandwidth adjustment instruction is sent to a system on chip (SOC), so that the SOC adjusts the memory bandwidth to the target bandwidth after determining a target bandwidth matching the user status scenario.

2. The method according to claim 1, characterized in that The identifying user status scenario includes: When the current number of processes is greater than a preset number, determining that the user status scenario is a first scenario; wherein the first scenario is a scenario where an increase in memory bandwidth is required; or When the current number of processes is less than or equal to a preset number, the user state scenario is determined to be a second scenario; wherein the second scenario is a scenario where memory bandwidth needs to be reduced.

3. The method according to claim 1, characterized in that The identifying user status scenario includes: When at least one of the current process identifiers is the same as a preset identifier, determining that the user state scenario is a first scenario; wherein the first scenario is a scenario where an increase in memory bandwidth is required; or When each of the current process identifiers is different from the preset identifier, it is determined that the user state scenario is a second scenario; wherein the second scenario is a scenario where the memory bandwidth needs to be reduced.

4. The method according to claim 1, characterized in that: The sending of the bandwidth adjustment instruction to the system on chip SOC comprises: In response to satisfying the condition for adjusting the memory bandwidth, sending the bandwidth adjustment instruction to the SOC.

5. The method according to claim 4, characterized in that The conditions include at least one of the following: Adjusting memory bandwidth will not cause system anomalies; or The current memory bandwidth is not equal to the target bandwidth; or The user status scenario is the first scenario and the current memory bandwidth is less than the maximum bandwidth supported by the memory; wherein the first scenario is a scenario where the memory bandwidth needs to be increased; or The user status scenario is the second scenario and the current memory bandwidth is greater than the minimum bandwidth supported by the memory; wherein the second scenario is a scenario where the memory bandwidth needs to be reduced.

6. The method according to claim 1, characterized in that The method further comprises: After sending the bandwidth adjustment instruction to the SOC, a new bandwidth adjustment instruction is sent to the SOC at least after a preset time interval.

7. The method according to claim 1, characterized in that The bandwidth adjustment instruction includes at least one of the following: User status scenario identifier; or Related information; wherein the related information includes at least one of the following: process priority information; or The minimum memory bandwidth that each process is expected to occupy.

8. The method according to claim 7, characterized in that The target bandwidth is greater than or equal to a target value, and the target value is the sum of the minimum bandwidths that each process needs to occupy in memory.

9. The method according to any one of claims 1 to 8, characterized in that: The memory is a double data rate synchronous dynamic random access memory DDR SDRAM, and the SOC adjusts the bandwidth of each DRAM to the target bandwidth based on the bandwidth adjustment instruction.

10. A bandwidth adjustment device, characterized in that: include: A scene recognition module, used to recognize a user state scene; wherein the user state scene is associated with at least one of a current process number and a current process identifier; The bandwidth adjustment module is used to send a bandwidth adjustment instruction to the system on chip SOC, so that the SOC adjusts the memory bandwidth to the target bandwidth after determining the target bandwidth matching the user status scenario.

11. The device according to claim 10, characterized in that The device also includes: The process priority adjustment module is used to send the associated information to the bandwidth adjustment module, so that the bandwidth adjustment module carries the associated information in the bandwidth adjustment instruction and sends it to the SOC; wherein the associated information includes at least one of the following: process priority information; or The minimum memory bandwidth that each process is expected to occupy.

12. The device according to claim 11, characterized in that The process priority adjustment module is also used for: After determining, based on the bandwidth adjustment confirmation instruction sent by the bandwidth adjustment module, that adjusting the memory bandwidth in the user state scenario will not cause system abnormality, a confirmation result is sent to the bandwidth adjustment module.

13. The device according to any one of claims 10 to 12, characterized in that: The memory is a double data rate synchronous dynamic random access memory DDR SDRAM, and the SOC adjusts the bandwidth of each DRAM to the target bandwidth based on the bandwidth adjustment instruction.

14. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the bandwidth adjustment method according to any one of claims 1 to 9 are implemented.

15. An electronic device, characterized in that: include: processor; a memory for storing processor-executable instructions; The processor is configured to execute the executable instructions to implement the steps of the bandwidth adjustment method according to any one of claims 1 to 9.

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