Pixel compensation circuit, display panel and display driving method

Abstract

The invention discloses a pixel compensation circuit, a display panel and a display driving method. The driving circuit comprises a driving module, an input module, a first compensation module and a second compensation module, the driving module comprises a driving transistor, the control end receives first node voltage, and the first end receives second node voltage; the input module comprises a first switching tube, the first end of which receives data voltage corresponding to gray scale data, and the second end of which is connected with the first end of the driving transistor. The first compensation module is used for compensating the voltage of the first node; the second compensation module is used for compensating the voltage of a second node and comprises a second switching tube which is located between the reference voltage and the second node; the light emitting diode is connected with the second end of the driving transistor so as to receive the driving current; wherein the second compensation module is configured to conduct the second switch tube in the first bias compensation stage, so that the voltage of the second node is changed into the reference voltage, and the bias state of the driving transistor is changed.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and more specifically, to a pixel compensation circuit, a display panel and a display driving method. Background Art

[0002] In the field of display technology, with the advancement of technology and the growing demand for visualization, display screens have become an indispensable part of daily life. However, in order to ensure that the display screen can work normally and with high quality, the driving circuit technology behind it is particularly critical.

[0003] OLED (Organic Light-Emitting Diode) is an emerging display device. It has broad application prospects because of its advantages such as self-luminescence, high contrast, wide color gamut, simple preparation process, low cost, low power consumption, and easy to realize flexible display.

[0004] However, the display devices currently formed by light-emitting diodes still have some urgent problems to be solved in some specific application scenarios, especially in low refresh rate scenarios, such as 1Hz (refresh once per second) or even lower 0.1Hz (refresh once every 10 seconds). The threshold voltage Vth of the thin-film transistor is non-uniform. Long-term high grayscale or low grayscale images will cause the threshold voltage of the thin-film transistor to shift, and ultimately cause changes in the brightness of the image, resulting in flickering and other phenomena that affect the display effect.

[0005] Therefore, in order to meet the market's pursuit of high-quality display effects, developing a technology or method that can improve the above-mentioned problems has become an urgent need in the current field of display technology. Summary of the invention

[0006] The object of the present invention is to provide a pixel compensation circuit, a display panel and a display driving method, aiming to improve the threshold voltage offset problem of the driving transistor and enhance the display effect.

[0007] According to one aspect of the present invention, a pixel compensation circuit is provided, comprising: a driving module, the driving module comprising a driving transistor, a control end of which receives a first node voltage, a first path end of which receives a second node voltage, the second node is connected to a power supply voltage, and the second path end provides a driving current; an input module, comprising a first switch tube, a first end of the first switch tube of the first switch tube of the first switch tube receives a data voltage corresponding to grayscale data, and a second end of the first switch tube is connected to the first path end of the driving transistor; a first compensation module, for compensating the first node voltage, comprising a capacitor, a first end of the capacitor provides the first node voltage, and a second end of the capacitor is connected to the driving module; a second compensation module, for compensating the second node voltage , including a second switch tube, a first end of the second switch tube is connected to the reference voltage, and a second end of the second switch tube provides the second node voltage; a light-emitting diode, the light-emitting diode is connected to the second path end of the driving transistor to receive the driving current; wherein the first compensation module is configured to: connect the second path end of the driving transistor to the control end of the driving transistor in the writing stage, and charge the capacitor so that the first node voltage is compensated to the first voltage; and maintain the driving voltage in the light-emitting stage after the writing stage; the second compensation module is configured to: turn on the second switch tube in the first bias compensation stage, so that the second node voltage is changed to the reference voltage to change the bias state of the driving transistor.

[0008] Optionally, a reset module is further included, which is used to provide a first input voltage to the second end of the driving transistor; and provide a second input voltage to the light emitting diode.

[0009] Optionally, the working cycle of the pixel compensation circuit includes: a reset phase, in which the reset module and the first compensation module connect the first input voltage to the first node during the reset phase, and the reset module connects the second input voltage to the light-emitting diode during the reset phase; the second compensation module provides a first reference voltage to the second node during the reset phase; a write phase, in which the input module and the first compensation module charge the capacitor during the write phase and adjust the first node voltage to the drive voltage, and the drive module disconnects the drive transistor from the power supply voltage and the anode of the light-emitting diode during the write phase; a first bias compensation phase, in which the second compensation module provides a second reference voltage to the second node during the first bias compensation phase; and a light-emitting phase, in which the drive module connects the first path end of the drive transistor to the power supply voltage and the second path end of the drive transistor to the anode of the light-emitting diode during the light-emitting phase.

[0010] Optionally, the working cycle of the pixel compensation circuit also includes: a write preparation stage, which is arranged between the reset stage and the write stage, and the reset module and the first compensation module connect the first input voltage to the first node in the write preparation stage, and the reset module connects the second input voltage to the light-emitting diode in the write preparation stage; the second compensation module disconnects the reference voltage and the second node in the write preparation stage.

[0011] Optionally, the working cycle of the pixel compensation circuit includes a valid frame and a skip frame, the valid frame includes a reset stage, a write preparation stage, a write stage, a first bias compensation stage and a light emitting stage, and the skip frame includes a second bias compensation stage; wherein, in the second bias compensation stage, the second compensation module conducts the reference voltage with the second node in the second bias compensation stage and provides the reference voltage to the second node; the driving module disconnects the driving transistor from the power supply voltage and the anode of the light emitting diode in the second bias compensation stage;

[0012] Optionally, in the above-mentioned pixel compensation circuit, in the second bias compensation stage, the second switch tube performs a number of on-and-off cycles to change the second node voltage.

[0013] Optionally, the first compensation module further includes a third switch tube, a first end of the third switch tube is connected to the first node, and a second end of the third switch tube is connected to the second end of the driving transistor.

[0014] Optionally, the reset module also includes a fourth switch tube and a fifth switch tube, the first end of the fourth switch tube is connected to the first input voltage, and the second end of the fourth switch tube is connected to the second end of the driving transistor; the first end of the fifth switch tube is connected to the second input voltage, and the second end of the fifth switch tube is connected to the anode of the light-emitting diode.

[0015] Optionally, the driving module also includes a sixth switch tube and a seventh switch tube, the first end of the sixth switch tube is connected to the power supply voltage, and the second end of the sixth switch tube is connected to the first end of the driving transistor; the first end of the seventh switch tube is connected to the second end of the driving transistor, and the second end of the seventh switch tube is connected to the anode of the light-emitting diode.

[0016] Optionally, the third switch tube is an N-type channel metal oxide semiconductor field effect transistor; the driving transistor, the first switch tube, the second switch tube, the fourth switch tube, the fifth switch tube, the sixth switch tube and the seventh switch tube are all P-type channel low-temperature polysilicon field effect transistors.

[0017] According to another aspect of the present invention, there is also provided an electronic device, which includes the display panel as described above.

[0018] According to another aspect of the present invention, a chip is provided, which includes the pixel compensation circuit as described above.

[0019] According to another aspect of the present invention, a display panel is provided, comprising a plurality of the above-mentioned pixel compensation circuits, wherein the display panel is a display panel selected from the group consisting of a light emitting diode display panel, a mini light emitting diode display panel, a quantum dot light emitting diode display panel and an organic light emitting diode display panel.

[0020] According to another aspect of the present invention, a driving method of a pixel compensation circuit is provided, which is used to drive the above-mentioned pixel compensation circuit, and the driving method includes: in a writing stage, the input module and the first compensation module charge the capacitor in the writing stage and adjust the first node voltage to the driving voltage, and the driving module disconnects the driving transistor from the power supply voltage and the anode of the light-emitting diode in the writing stage; in a first bias compensation stage after the writing stage, the second compensation module provides a second reference voltage to the second node; in a light-emitting stage after the first bias compensation stage, the control terminal voltage of the driving transistor is controlled to maintain the driving voltage, so that the driving transistor provides a driving current according to the driving voltage, and the light-emitting diode generates an effective brightness corresponding to the data voltage according to the driving current, wherein the second reference voltage provided to the second node in the first bias compensation stage is used to change the bias state of the driving transistor.

[0021] The above-mentioned driving method also includes a second bias compensation stage in the skipped frame of the non-luminous stage. The second compensation module connects the reference voltage and the second node in the second bias compensation stage, and provides the reference voltage to the second node to change the bias state of the driving transistor; the driving module disconnects the driving transistor from the power supply voltage and the anode of the light-emitting diode in the second bias compensation stage.

[0022] The pixel compensation circuit, display panel and display driving method provided by the embodiment of the present invention can effectively compensate for the threshold voltage offset problem of the driving transistor by setting the first compensation module and the second compensation module, thereby avoiding the problem of the threshold voltage offset caused by the driving transistor being subjected to positive or negative bias for a long time, thereby improving the resulting picture brightness changes, picture flickering and other phenomena; the capacitor in the pixel compensation circuit can also improve the short-term afterimage problem of the light-emitting diode. For the low refresh mode, the second bias compensation stage can also be set in the skip frame to avoid the threshold voltage offset of the driving transistor in the low refresh mode. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings.

[0024] Figure 1 A schematic diagram showing a pixel compensation circuit according to an embodiment of the present invention;

[0025] Figure 2 A partial signal timing diagram of a pixel compensation circuit according to an embodiment of the present invention is shown;

[0026] Figure 3 A schematic diagram showing the operation of the pixel compensation circuit in the reset phase according to an embodiment of the present invention;

[0027] Figure 4 A schematic diagram showing the operation of the pixel compensation circuit in the writing preparation stage according to an embodiment of the present invention;

[0028] Figure 5 A schematic diagram showing the operation of the pixel compensation circuit in the writing stage according to an embodiment of the present invention;

[0029] Figure 6 A schematic diagram showing the operation of the pixel compensation circuit in the first bias voltage improvement stage according to an embodiment of the present invention;

[0030] Figure 7 A schematic diagram showing the operation of the pixel compensation circuit in the light emitting stage according to an embodiment of the present invention;

[0031] Figure 8 A schematic diagram showing a display state of a display device;

[0032] Fig. 9 A timing diagram showing a working cycle signal of a pixel compensation circuit according to an embodiment of the present invention;

[0033] Fig.10 A schematic diagram showing the operation of the pixel compensation circuit in the second bias voltage improvement stage according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0034] The present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, the same elements are represented by similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale. In addition, some well-known parts may not be shown.

[0035] In this application, many specific details of the present invention are described, such as the specific structure, size, connection relationship and technology of the modules, so as to make the present invention more clearly understood. However, as can be understood by those skilled in the art, the present invention can be implemented without following these specific details.

[0036] The present invention may be embodied in various forms, some examples of which will be described below.

[0037] Figure 1 FIG. 1 is a schematic diagram showing a pixel compensation circuit according to an embodiment of the present invention; Figure 1 As shown, the pixel compensation circuit is used to drive the light emitting diode OLED. The pixel compensation circuit includes: a driving module 10, a first compensation module 20, a second compensation module 30, an input module 40 and a reset module 50.

[0038] The driving module 10 includes a driving transistor M3, a control terminal of the driving transistor M3 receives a voltage at a first node N1, a first terminal of the driving transistor M3 receives a voltage at a second node N2, a second terminal of the driving transistor M3 receives a voltage at a third node N3 and provides a driving current to the light emitting diode OLED;

[0039] The driving module 10 also includes a switch tube M1 and a switch tube M7, wherein a first end of the switch tube M1 receives a power supply voltage ELVDD, and a second end of the switch tube M1 is connected to a second node N2; a first end of the switch tube M7 is connected to a second end of the driving transistor M3, and a second end of the switch tube M7 is connected to a third node N3 and to a positive electrode of the light-emitting diode OLED; control ends of the switch tube M1 and the switch tube M7 both receive a fifth control signal EM.

[0040] The first compensation module 20 includes a capacitor Cst and a switch tube M5, wherein a first end of the capacitor Cst is connected to the power supply voltage ELVDD, and a second end of the capacitor Cst is connected to the control end of the driving transistor M3 at a first node N1; a first end of the switch tube M5 is connected to the control end of the driving transistor M3 at the first node N1, a second end of the switch tube M5 is connected to the second end of the driving transistor M3, and the control end of the switch tube M5 receives a first control signal T1.

[0041] The second compensation module 30 includes a switch tube M2 , a first terminal of the switch tube M2 receives an input reference voltage VREF, a second terminal of the switch tube M2 connects the driving transistor M3 to a second node N2 , and a control terminal of the switch tube M2 receives a third control signal T3 .

[0042] The input module 40 includes a switch tube M4 , a first terminal of the switch tube M4 receives a data voltage Vdata corresponding to grayscale data, and a second terminal of the switch tube M4 and the driving transistor M3 are connected to a second node N2 .

[0043] The reset module 50 includes a switch tube M6 and a switch tube M8. The control ends of the switch tube M6 and the switch tube M8 receive the second control signal T2, for example. The first end of the switch tube M6 receives the first input voltage Vint1. The second end of the switch tube M6 is connected to the first end of the switch tube M7. The first end of the switch tube M8 receives the second input voltage Vint2. The second end of the switch tube M8 is connected to the positive electrode of the light-emitting diode OLED and the third node N3, so as to provide the second input voltage Vint2 to the light-emitting diode OLED.

[0044] An anode of the light emitting diode OLED is connected to the third node N3 , and a cathode of the light emitting diode OLED receives a common ground terminal voltage ELVSS, which has a level opposite to that of the power supply voltage ELVDD.

[0045] The circuit design can effectively compensate for the threshold voltage Vth of the driving transistor M3, effectively improve the problem of threshold voltage offset caused by long-term positive or negative bias of the driving transistor M3, and thus improve the resulting picture brightness changes, picture flickering and other phenomena; the pixel compensation circuit can also improve the short-term afterimage problem of the light-emitting diode OLED.

[0046] The light emitting diode OLED, for example, has a turn-on voltage, and emits light when the voltage difference between the anode and cathode of the light emitting diode OLED is greater than or equal to the turn-on voltage. In this embodiment, the light emitting diode OLED may also be a quantum dot light emitting diode (QLED).

[0047] Specifically, in this embodiment, the switch tube M5 is, for example, an N-type channel oxide semiconductor field effect transistor (Oxide MOS tube), the driving transistor M3 is a P-type channel low temperature polysilicon field effect transistor (LTPSMOS tube), the gate of the driving transistor M3 serves as the control terminal, the drain of the driving transistor M3 serves as the first terminal, the source of the driving transistor M3 serves as the second terminal, the control terminal of the switch tube M5 is the gate, the first terminal is the source, and the second terminal is the drain; or the first terminal is the drain, and the second terminal is the source, which is not distinguished here.

[0048] The switch tubes M1, M2, M4, M6, M7, and M8 are, for example, all P-channel low-temperature polysilicon field effect transistors (LTPSMOS tubes), and the control end of these switch tubes is the gate, the first end is the source, and the second end is the drain; or the first end is the drain, and the second end is the source, which is not distinguished here.

[0049] In this embodiment, the N-type MOS transistor is turned on by a high-level signal and turned off by a low-level signal, and the P-type MOS transistor is turned off by a high-level signal and turned on by a low-level signal.

[0050] Figure 2 FIG. 4 shows a timing diagram of a portion of periodic signals of a pixel compensation circuit according to an embodiment of the present invention. Figure 2 As shown, the working cycle of the pixel compensation circuit includes five stages, namely, a reset stage, a write preparation stage, a write stage, a first bias compensation stage and a light emitting stage, corresponding to Figure 2 The S1, S2, S3, S4 and S5 time periods in the .

[0051] The high-level signal and the low-level signal described below refer to logic signals, which are only used to more clearly explain the working process of the embodiment of the present application, and the specific voltage values ​​are not described in detail.

[0052] Figure 3 FIG. 2 is a schematic diagram showing the operation of the pixel compensation circuit in the reset phase according to an embodiment of the present invention; Figure 3 As shown, in the reset stage, the control signal EM is at a high level, the switch tubes M1 and M7 are turned off, and the driving transistor M3 is turned off; the control signal T1 is at a high level, the switch tube M5 is turned on; the control signal T2 is at a low level, the switch tube M6 is turned on, and the switch tube M8 is turned on; the control signal T3 is at a low level, the switch tube M2 is turned on; the control signal T4 is at a high level, and the switch tube M4 is turned off.

[0053] The first input voltage Vint1 is transmitted to the first node N1 through the switch tube M6 and the switch tube M5 to reset the capacitor Cst; the second input voltage Vint2 is transmitted to the third node N3 through the switch tube M8 to reset the anode of the light-emitting diode OLED; the reference voltage VREF provides a first reference voltage value VREF_1 and is transmitted to the second node N2 through the switch tube M2. The reference voltage VREF is, for example, greater than the first input voltage Vint1. The voltage difference Vgs between the gate and the source of the driving transistor M3 is a preset value, Vgs=VREF_1-Vint1, wherein VREF-Vint1 is a fixed voltage, which can improve the short-term residual image problem of the light-emitting diode OLED. In the reset stage, the voltage of the first node N1 is Vint1, the voltage of the second node N2 is VREF_1, and the voltage of the third node N3 is Vint2.

[0054] Figure 4 FIG. 2 is a schematic diagram showing the operation of the pixel compensation circuit in the writing preparation stage according to an embodiment of the present invention; Figure 4 As shown, in the write preparation stage, the control signal EM is at a high level, the switch tubes M1 and M7 are turned off, and the driving transistor M3 is turned off; the control signal T1 is at a high level, the switch tube M5 is turned on; the control signal T2 is at a low level, the switch tube M6 is turned on, and the switch tube M8 is turned on; the control signal T3 is at a high level, the switch tube M2 is turned off; the control signal T4 is at a high level, and the switch tube M4 is turned off.

[0055] Specifically, in the write preparation phase, Figure 3 On the basis of the reset stage, by changing the control signal T3 to a low level, the switch tube M2 is turned off, and the connection between the reference voltage VREF and the second node N2 is disconnected to complete the preparation for data writing. In the writing preparation stage, the voltage of the first node N1 is Vint1, and the voltage of the third node is Vint2.

[0056] Figure 5 FIG. 2 is a schematic diagram showing the operation of the pixel compensation circuit in the writing stage according to an embodiment of the present invention; Figure 5 As shown, in the writing stage, the control signal EM is at a high level, the switch tubes M1 and M7 are turned off, and the driving transistor M3 is turned off; the control signal T1 is at a high level, the switch tube M5 is turned on; the control signal T2 is at a high level, the switch tube M6 is turned off, and the switch tube M8 is turned off; the control signal T3 is at a high level, the switch tube M2 is turned off; the control signal T4 is at a low level, and the switch tube M4 is turned on.

[0057] The data voltage Vdata is transmitted to the second node N2 through the switch tube M4; further, the data voltage Vdata is transmitted to the first node N1 through the switch tube M4, the driving transistor M3, and the switch tube M5. Due to the capacitance characteristics of the capacitor Cst (the voltage across the capacitor will not change suddenly), the voltage of the first node N1 is coupled to Vdata+Vth, where Vth is the threshold voltage of the driving transistor M3. In the writing stage, the voltage of the first node N1 is Vdata+Vth, and the voltage of the second node N2 is Vdata.

[0058] Figure 6 FIG. 2 is a schematic diagram showing the operation of the pixel compensation circuit in the first bias voltage improvement stage according to an embodiment of the present invention; FIG. Figure 6 As shown, in the first bias improvement stage, the control signal EM is at a high level, the switch tubes M1 and M7 are turned off, and the driving transistor M3 is turned off; the control signal T1 is at a low level, and the switch tube M5 is turned off; the control signal T2 is at a high level, the switch tube M6 is turned off, and the switch tube M8 is turned off; the control signal T3 is at a low level, and the switch tube M2 is turned on; the control signal T4 is at a high level, and the switch tube M4 is turned off.

[0059] In the first bias improvement stage, the voltage of the first node N1 is Vdata+Vth; the reference voltage VREF provides a second reference voltage value VREF_2 which is transmitted to the second node N2 through the switch tube M2. Specifically, the second reference voltage value VREF_2 is different from the first reference voltage value VREF_1. By changing the voltage of the second node N2, the bias state of the driving transistor M3 is changed to avoid the threshold voltage shift caused by the driving transistor M3 being in a forward bias or negative bias state for a long time.

[0060] Figure 7 FIG. 2 is a schematic diagram showing the operation of the pixel compensation circuit in the light emitting stage according to an embodiment of the present invention; FIG. Figure 7 As shown, in the light-emitting stage, the control signal EM is at a low level, the switch tube M1 is turned on, and the switch tube M7 is turned on; the control signal T1 is at a low level, and the switch tube M5 is turned off; the control signal T2 is at a high level, the switch tube M6 is turned off, and the switch tube M8 is turned off; the control signal T3 is at a high level, and the switch tube M2 is turned off; the control signal T4 is at a high level, and the switch tube M4 is turned off.

[0061] In this light-emitting stage, the power supply voltage ELVDD is connected to the positive electrode of the light-emitting diode OLED through the switch tube M1, the driving transistor M3 and the switch tube M7, the negative electrode of the light-emitting diode OLED is connected to the common ground voltage ELVSS, the voltage of the first node N1 is Vdata+Vth, the driving transistor M3 is turned on, and the voltage of the second node N2 is ELVDD. According to the transistor saturation region current formula:

[0062] I OLED ∝(Vgs-Vth) 2

[0063] I OLED ∝[Vdata+Vth-ELVDD-Vth] 2

[0064] I OLED =WC ox u / 2L*(Vdata-ELVDD) 2

[0065] Among them, I OLED represents the driving current flowing to the light emitting diode OLED, ∝ represents proportional to, Vgs represents the rated voltage difference between the gate and source of the driving transistor M3 in the pixel compensation circuit, W represents the channel width of the driving transistor M3, L represents the channel length of the driving transistor M3, C ox is the capacitance of the control terminal Cst of the driving transistor M3 per unit area, Vth is the threshold voltage of the driving transistor M3, Vdata is the data voltage, ELVDD is the power supply voltage, W and L are fixed when designing the driving transistor, C ox Depends on the thickness and material of the control end insulation layer.

[0066] Figure 8 A schematic diagram showing a display state of a display device; Figure 8As shown, the display device adopts row drive, for example, and is currently used to display a clock. Its overall background is black, for example, and the middle of the dial is white, for example. In this display state, the display area of ​​the entire display device can be divided into three areas, area A, area B and area C. The three areas are arranged from top to bottom. Compared with the white gradient circular bright spots in area B that change in a breathing manner, the display graphics of areas A and C do not change for a long time, so areas A and C adopt a low refresh display mode at this time.

[0067] In the low refresh mode, the driving transistor M3 is subjected to a unidirectional Vgs bias for a long time. The long-term bias causes electrical stress to the driving transistor M3. Such stress may cause problems such as threshold voltage shift and performance degradation of the driving transistor.

[0068] Specifically, in the low refresh mode, for low grayscale images, the driving transistor M3 will be subjected to a negative Vgs bias for a long time, causing the threshold voltage of the driving transistor M3 to shift negatively; for high grayscale images, the driving transistor M3 will be subjected to a positive Vgs bias for a long time, causing the threshold voltage of the driving transistor M3 to shift positively; both of these situations will cause the threshold voltage of the driving transistor M3 to become more negative or more positive, and the change in the threshold voltage will cause the brightness of the displayed image to change, affecting the display effect and causing flickering and other problems.

[0069] Based on the above issues, see Fig. 9 The timing diagram shown and Fig.10 The working diagram of the pixel compensation circuit shown in FIG. 1 shows that in the low refresh mode, its working cycle includes an active frame (ActiveFrame) phase and a skip frame (SkipFrame) phase. The skip frame (SkipFrame) phase can also be called a non-luminous phase. Fig. 9 As shown, in Figure 2 On the basis of the non-luminous phase (SkipFrame) of the working cycle, a second bias improvement phase S6 is added. In the second bias improvement phase S6, the control signal EM is at a high level, the switch tubes M1 and M7 are turned off; the control signal T1 is at a low level, the switch tube M5 is turned off; the control signal T2 is at a high level, the switch tubes M6 and M8 are turned off; the control signal T3 switches between a low level and a high level, and the switch tube M2 switches between on and off with the control signal T3 ( Fig.10 Only the state of the switch tube M2 when it is turned on is shown in FIG); the control signal T4 is at a high level, and the switch tube M4 is turned off.

[0070] Specifically, in the second bias improvement stage S6, high-frequency control can be used to control the switch tube M2 to switch between on and off several times according to the control signal T3. The reference voltage VREF is connected to the second node N2 through the switch tube M2. By changing the on and off of the switch tube M2, the voltage of the second node N2 and the Vgs voltage corresponding to the driving transistor M3 are changed, thereby changing the bias state of the driving transistor M3 to avoid long-term unidirectional bias, thereby improving the threshold voltage offset problem of the driving transistor M3. Specifically, the specific voltage value of the reference voltage VREF can be adjusted according to the bias direction of the driving transistor M3 in the active frame (ActiveFrame) stage.

[0071] The pixel compensation circuit, display panel and display driving method provided by the embodiment of the present invention can effectively compensate for the threshold voltage offset problem of the driving transistor by setting the first compensation module and the second compensation module, thereby avoiding the problem of the threshold voltage offset caused by the driving transistor being subjected to positive or negative bias for a long time, thereby improving the resulting picture brightness changes, picture flickering and other phenomena; the capacitor in the pixel compensation circuit can also improve the short-term afterimage problem of the light-emitting diode. For the low refresh mode, the second bias compensation stage can also be set in the skip frame to avoid the threshold voltage offset of the driving transistor in the low refresh mode.

[0072] In the above description, the technical details of the patterning and etching of each electrode are not described in detail. However, those skilled in the art should understand that various technical means can be used to form layers, regions, etc. of desired shapes. In addition, in order to form the same structure, those skilled in the art can also design methods that are not completely the same as the methods described above. In addition, although the various embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage.

[0073] The embodiments of the present invention are described above. However, these embodiments are only for illustrative purposes and are not intended to limit the scope of the present invention. The scope of the present invention is defined by the appended claims and their equivalents. Without departing from the scope of the present invention, those skilled in the art may make various substitutions and modifications, which should all fall within the scope of the present invention.

Claims

1. A pixel compensation circuit, characterized in that: include: A driving module, the driving module comprising a driving transistor, a control terminal of which receives a first node voltage, a first path terminal receives a second node voltage, the second node is connected to a power supply voltage, and the second path terminal provides a driving current; An input module, comprising a first switch tube, a first end of the first switch tube receiving a data voltage corresponding to grayscale data, and a second end of the first switch tube connected to a first path end of the driving transistor; A first compensation module, used for compensating the first node voltage, comprising a capacitor, a first end of the capacitor providing the first node voltage, and a second end of the capacitor connected to the driving module; A second compensation module, used for compensating the second node voltage, comprising a second switch tube, a first end of the second switch tube is connected to the reference voltage, and a second end of the second switch tube provides the second node voltage; a light emitting diode, the light emitting diode being connected to the second channel end of the driving transistor to receive the driving current; The first compensation module is configured to: connect the second path end of the driving transistor to the control end of the driving transistor in the writing stage, and charge the capacitor so that the first node voltage is compensated to the first voltage; and maintain the driving voltage in the light emitting stage after the writing stage; The second compensation module is configured to: turn on the second switch tube in the first bias compensation stage, so that the second node voltage is changed to a reference voltage to change the bias state of the driving transistor.

2. The pixel compensation circuit according to claim 1, characterized in that: It also includes a reset module, which is used to provide a first input voltage to the second end of the driving transistor and a second input voltage to the light emitting diode.

3. The pixel compensation circuit according to claim 2, characterized in that: The working cycle of the pixel compensation circuit includes: In a reset phase, the reset module and the first compensation module connect the first input voltage to the first node in the reset phase, and the reset module connects the second input voltage to the light-emitting diode in the reset phase; the second compensation module provides a first reference voltage to the second node in the reset phase; In a writing phase, the input module and the first compensation module charge the capacitor and adjust the first node voltage to the driving voltage, and the driving module disconnects the driving transistor from the power supply voltage and the anode of the light-emitting diode in the writing phase; In a first bias compensation stage, the second compensation module provides a second reference voltage to the second node in the first bias compensation stage; In the light emitting stage, the driving module connects the first channel end of the driving transistor to the power supply voltage and connects the second channel end of the driving transistor to the anode of the light emitting diode.

4. The pixel compensation circuit according to claim 3, characterized in that: The working cycle of the pixel compensation circuit also includes: A write preparation stage, wherein the write preparation stage is arranged between the reset stage and the write stage, wherein the reset module and the first compensation module connect the first input voltage to the first node during the write preparation stage, and the reset module connects the second input voltage to the light-emitting diode during the write preparation stage; and the second compensation module disconnects the reference voltage from the second node during the write preparation stage.

5. The pixel compensation circuit according to claim 4, characterized in that: The working cycle of the pixel compensation circuit includes a valid frame and a skip frame, the valid frame includes a reset phase, a write preparation phase, a write phase, a first bias compensation phase and a light emitting phase, and the skip frame includes a second bias compensation phase; Among them, in the second bias compensation stage, the second compensation module connects the reference voltage and the second node in the second bias compensation stage to provide the reference voltage to the second node; the driving module disconnects the driving transistor from the power supply voltage and the anode of the light-emitting diode in the second bias compensation stage.

6. The pixel compensation circuit according to claim 5, characterized in that: In the second bias compensation stage, the second switch tube performs a number of on-and-off cycles to change the second node voltage.

7. The pixel compensation circuit according to claim 6, characterized in that: The first compensation module further includes a third switch tube, a first end of the third switch tube is connected to the first node, and a second end of the third switch tube is connected to the second end of the driving transistor.

8. The pixel compensation circuit according to claim 7, characterized in that: The reset module also includes a fourth switch tube and a fifth switch tube, wherein the first end of the fourth switch tube is connected to the first input voltage, and the second end of the fourth switch tube is connected to the second end of the driving transistor; the first end of the fifth switch tube is connected to the second input voltage, and the second end of the fifth switch tube is connected to the anode of the light-emitting diode.

9. The pixel compensation circuit according to claim 8, characterized in that: The driving module also includes a sixth switch tube and a seventh switch tube, wherein the first end of the sixth switch tube is connected to the power supply voltage, and the second end of the sixth switch tube is connected to the first end of the driving transistor; the first end of the seventh switch tube is connected to the second end of the driving transistor, and the second end of the seventh switch tube is connected to the anode of the light-emitting diode.

10. The pixel compensation circuit according to claim 9, characterized in that: The third switch tube is an N-type channel metal oxide semiconductor field effect transistor; the driving transistor, the first switch tube, the second switch tube, the fourth switch tube, the fifth switch tube, the sixth switch tube and the seventh switch tube are all P-type channel low temperature polysilicon field effect transistors.

11. A display panel comprising a plurality of pixel compensation circuits according to any one of claims 1 to 10, wherein the display panel is a display panel selected from the group consisting of a light emitting diode display panel, a mini light emitting diode display panel, a quantum dot light emitting diode display panel and an organic light emitting diode display panel.

12. An electronic device, characterized in that: Comprising the display panel according to claim 11.

13. A chip, characterized in that: The method comprises a pixel compensation circuit according to any one of claims 1 to 10.

14. A driving method of a pixel compensation circuit, for driving the pixel compensation circuit according to any one of claims 1 to 10, the driving method comprising: In the writing phase, the input module and the first compensation module charge the capacitor and adjust the first node voltage to the driving voltage, and the driving module disconnects the driving transistor from the supply voltage and the anode of the light-emitting diode in the writing phase; In a first bias compensation phase after the writing phase, the second compensation module provides a second reference voltage to the second node; In the light emitting stage after the first bias compensation stage, the control terminal voltage of the driving transistor is controlled to maintain the driving voltage, so that the driving transistor provides a driving current according to the driving voltage, and the light emitting diode generates an effective brightness corresponding to the data voltage according to the driving current, The bias state of the driving transistor is changed by providing a second reference voltage to the second node during the first bias compensation stage.

15. According to claim 14, the driving method further includes a second bias compensation stage in the skipped frame of the non-luminous stage, wherein the second compensation module connects the reference voltage to the second node in the second bias compensation stage and provides a reference voltage to the second node to change the bias state of the driving transistor; and the driving module disconnects the driving transistor from the power supply voltage and the anode of the light-emitting diode in the second bias compensation stage.

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