Light detection apparatus and electronic apparatus

Abstract

The invention relates to a light detection apparatus and an electronic apparatus. The light detection device may include: first to fourth photoelectric converters in a semiconductor substrate; first to fourth transfer transistors connected to the first to fourth photoelectric converters, respectively, in which the first to fourth transfer transistors are connected to the floating diffusion; a reset transistor, an amplification transistor, and a selection transistor; and a multilayer wiring layer on a surface of the semiconductor substrate opposite to a light receiving surface, the multilayer wiring layer including a first wiring connected to the floating diffusion and the amplification transistor, and a second wiring connected to the first transfer transistor, the first wiring being connected to the floating diffusion and the amplification transistor, and the second wiring being connected to the second transfer transistor. In a cross-sectional view, the first wiring is closer to the surface of the semiconductor substrate than the second wiring.

Description

[0001] This application is a divisional application of a patent application with application number 202210146522.7 (hereinafter referred to as the “sub-application”), whose application date is May 26, 2016 and whose invention name is “Camera equipment and electronic device”.

[0002] This application is filed when the National Intellectual Property Administration believes that the above-mentioned sub-case does not meet the unity requirement, specifically involving the second examination opinion notice of the said sub-case, the issuance date of which is July 13, 2024, and the issuance serial number is 2024071300183500.

[0003] In addition, the above-mentioned sub-case is a divisional application of patent application No. 201680031983.2 (hereinafter referred to as the "parent case"), the application date of which is May 26, 2016, and the name of the invention is "Image capture element, driving method and electronic device". Technical Field

[0004] The present invention relates to an image pickup element, a driving method, and an electronic device, and in particular, to an image pickup element, a driving method, and an electronic device capable of capturing clearer images with less noise. Background Art

[0005] Conventionally, in electronic devices including an imaging function such as a digital camera or a digital video camera, for example, solid-state imaging elements such as a charge coupled device (CCD) and a complementary metal oxide semiconductor (CMOS) image sensor are used. The solid-state imaging element has a pixel in which a photodiode (PD) for performing photoelectric conversion and a plurality of transistors are combined, and an image is constructed based on pixel signals output from a plurality of pixels arranged on an image surface on which an image of a subject is formed.

[0006] For example, in the image pickup element disclosed in Patent Document 1, wiring arrangement can be performed in a narrow area by forming wiring connecting a floating diffusion and a gate electrode of an amplification transistor in a silicide formation process in order to expand the numerical aperture of the PD.

[0007] Furthermore, the image pickup element disclosed in Patent Document 2 can improve the image quality of an image by providing a charge accumulation portion for adding capacitance to a charge-to-voltage conversion portion on a photodiode so as to overlap a region of the photodiode into which light from a subject cannot enter.

[0008] Citation list

[0009] Patent Literature

[0010] Patent Document 1: JP 2006-186187A

[0011] Patent Document 2: JP 2014-112580A Summary of the invention

[0012] Technical Problems to be Solved by the Invention

[0013] Incidentally, in recent years, there is a demand for further enhancement of the functions of image pickup elements, and, for example, there is a demand for obtaining clearer images with lower noise even in a low illumination environment (for example, in darkness).

[0014] The present invention has been made in view of the above circumstances, and the present invention can capture clearer images with lower noise.

[0015] Solutions to technical problems

[0016] An image pickup element according to a first aspect of the present invention includes a pixel, the pixel including: a photoelectric conversion unit configured to convert incident light into electric charges by photoelectric conversion and accumulate the electric charges; a charge transfer unit configured to transfer the electric charges generated in the photoelectric conversion unit; a diffusion layer to which the electric charges are transferred by the charge transfer unit, and the diffusion layer has a predetermined storage capacitance; a conversion unit configured to convert the electric charges transferred to the diffusion layer into a pixel signal; and a connection wiring configured to connect the diffusion layer and the conversion unit. The connection wiring is connected to the diffusion layer and the conversion unit by a contact wiring, the contact wiring extending in a vertical direction relative to a semiconductor substrate, the diffusion layer is formed on the semiconductor substrate, and the connection wiring is formed closer to the semiconductor substrate than other wirings provided in the pixel.

[0017] The driving method according to the first aspect of the present invention is an image pickup element driving method, the image pickup element including a pixel, the pixel including: a photoelectric conversion section configured to convert incident light into electric charge by photoelectric conversion and accumulate the electric charge; a charge transfer unit configured to transfer the electric charge generated in the photoelectric conversion section; a diffusion layer to which the electric charge is transferred by the charge transfer unit, and the diffusion layer has a predetermined storage capacitance; a conversion unit configured to convert the electric charge transferred to the diffusion layer into a pixel signal; a connecting wiring configured to connect the diffusion layer and the conversion unit; and a switching unit configured to switch the electric charge for accumulating the electric charge converted by the conversion unit into the pixel signal. The pixel is provided with a storage capacitor for storing the charge, the connection wiring is connected to the diffusion layer and the conversion unit through a contact wiring, the contact wiring extends in a vertical direction relative to a semiconductor substrate, the diffusion layer is formed on the semiconductor substrate, and the connection wiring is formed closer to the semiconductor substrate than other wirings arranged in the pixel, the driving method includes: setting the conversion efficiency of the conversion unit to a low conversion rate and performing the reading of the pixel signal by switching the storage capacitor to a large capacitor by using the switching unit; and setting the conversion efficiency of the conversion unit to a high conversion rate and performing the reading of the pixel signal by switching the storage capacitor to a small capacitor by using the switching unit.

[0018] An electronic device according to a first aspect of the present invention includes an imaging element, the imaging element including a pixel, the pixel including: a photoelectric conversion unit configured to convert incident light into electric charge by photoelectric conversion and accumulate the electric charge; a charge transfer unit configured to transfer the electric charge generated in the photoelectric conversion unit; a diffusion layer to which the electric charge is transferred by the charge transfer unit, and the diffusion layer has a predetermined storage capacitance; a conversion unit configured to convert the electric charge transferred to the diffusion layer into a pixel signal; and a connection wiring configured to connect the diffusion layer and the conversion unit. The connection wiring is connected to the diffusion layer and the conversion unit by a contact wiring, the contact wiring extending in a vertical direction relative to a semiconductor substrate, the diffusion layer is formed on the semiconductor substrate, and the connection wiring is formed closer to the semiconductor substrate than other wirings provided in the pixel.

[0019] According to a first aspect of the present invention, a pixel is provided, the pixel including: a photoelectric conversion unit configured to convert incident light into electric charges by photoelectric conversion and accumulate the electric charges; a charge transfer unit configured to transfer the electric charges generated in the photoelectric conversion unit; a diffusion layer to which the electric charges are transferred by the charge transfer unit, and the diffusion layer has a predetermined storage capacitance; a conversion unit configured to convert the electric charges transferred to the diffusion layer into a pixel signal; and a connection wiring configured to connect the diffusion layer and the conversion unit. The connection wiring is connected to the diffusion layer and the conversion unit by a contact wiring, the contact wiring extending in a vertical direction relative to a semiconductor substrate, the diffusion layer is formed on the semiconductor substrate, and the connection wiring is formed closer to the semiconductor substrate than other wirings provided in the pixel.

[0020] An imaging element according to a second aspect of the present invention includes a pixel, the pixel including: a plurality of photoelectric conversion portions configured to convert incident light into electric charges by photoelectric conversion and accumulate the electric charges, and the plurality of photoelectric conversion portions have different sensitivities from each other; a charge transfer unit configured to transfer the electric charges generated in the photoelectric conversion portions; a diffusion layer to which the electric charges are transferred by the charge transfer unit, and the diffusion layer has a predetermined storage capacitance; a conversion unit configured to convert the electric charges transferred to the diffusion layer into a pixel signal; a connecting wiring configured to connect the diffusion layer and the conversion unit; and an in-pixel capacitance configured to accumulate the electric charges transferred from a part of the plurality of photoelectric conversion portions.

[0021] A driving method according to a second aspect of the present invention is an imaging element driving method, the imaging element including pixels, the pixels including: a plurality of photoelectric converters configured to convert incident light into electric charges by photoelectric conversion and accumulate the electric charges, and the plurality of photoelectric converters have different sensitivities from each other; a charge transfer unit configured to transfer the electric charges generated in the photoelectric converters; a diffusion layer to which the electric charges are transferred by the charge transfer unit, and the diffusion layer has a predetermined storage capacitance; a conversion unit configured to convert the electric charges transferred to the diffusion layer into a pixel signal; a connecting wiring configured to connect the diffusion layer and the conversion unit; and an in-pixel capacitance configured to accumulate the electric charges transferred from a part of the plurality of photoelectric converters, the driving method including: sequentially transferring pixel signals corresponding to the electric charges generated in each of the plurality of photoelectric converters to the diffusion layer, and performing readout of the pixel signals.

[0022] An electronic device according to a second aspect of the present invention includes an imaging element, the imaging element including pixels, the pixels including: a plurality of photoelectric conversion sections, the plurality of photoelectric conversion sections being configured to convert incident light into electric charges by photoelectric conversion and accumulate the electric charges, and the plurality of photoelectric conversion sections having different sensitivities from each other; a charge transfer unit being configured to transfer the electric charges generated in the photoelectric conversion sections; a diffusion layer to which the electric charges are transferred by the charge transfer unit, and the diffusion layer having a predetermined storage capacitance; a conversion unit being configured to convert the electric charges transferred to the diffusion layer into a pixel signal; a connecting wiring being configured to connect the diffusion layer and the conversion unit; and an in-pixel capacitance being configured to accumulate electric charges transferred from a portion of the plurality of photoelectric conversion sections.

[0023] According to a second aspect of the present invention, a pixel is provided, the pixel comprising: a plurality of photoelectric converters configured to convert incident light into electric charges by photoelectric conversion and accumulate the electric charges, and the plurality of photoelectric converters have different sensitivities from each other; a charge transfer unit configured to transfer the electric charges generated in the photoelectric converters; a diffusion layer to which the electric charges are transferred by the charge transfer unit, and the diffusion layer has a predetermined storage capacitance; a conversion unit configured to convert the electric charges transferred to the diffusion layer into a pixel signal; a connection wiring configured to connect the diffusion layer and the conversion unit; and an in-pixel capacitance configured to accumulate electric charges transferred from a part of the plurality of photoelectric converters. The connection wiring is connected to the diffusion layer and the conversion unit by a contact wiring extending in a vertical direction relative to a semiconductor substrate on which the diffusion layer is formed, and the connection wiring is formed closer to the semiconductor substrate than other wirings provided in the pixel.

[0024] Beneficial effects of the present invention

[0025] According to the first and second aspects of the present invention, a good image can be captured even in a low-illuminance environment. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 is a block diagram illustrating a configuration example of an embodiment of an image pickup element to which the present technology is applied.

[0027] Figure 2 are a circuit diagram and a plan view illustrating a first configuration example of a pixel.

[0028] Figure 3 is a cross-sectional view of a pixel.

[0029] Figure 4This is a timing chart for explaining a pixel driving method.

[0030] Figure 5 are a circuit diagram and a plan view illustrating a second configuration example of a pixel.

[0031] Figure 6 is a plan view illustrating a third configuration example of a pixel.

[0032] Figure 7 is a plan view illustrating a fourth configuration example of a pixel.

[0033] Figure 8 are a circuit diagram and a plan view illustrating a fifth configuration example of a pixel.

[0034] Fig. 9 This is a timing chart for explaining a pixel driving method.

[0035] Fig.10 is a block diagram illustrating an embodiment of an electronic device to which the present technology is applied.

[0036] Fig.11 An example of use of an image sensor is illustrated. DETAILED DESCRIPTION

[0037] Specific embodiments to which the present technology is applied will be described in detail below with reference to the accompanying drawings.

[0038] <Structure Example of Image Pickup Element>

[0039] Figure 1 is a block diagram illustrating a configuration example of an embodiment of an image pickup element to which the present technology is applied.

[0040] like Figure 1 As shown, the imaging element 11 includes a pixel region 12 , a vertical drive circuit 13 , a column signal processing circuit 14 , a horizontal drive circuit 15 , an output circuit 16 , and a control circuit 17 .

[0041] The pixel area 12 is a light receiving surface for receiving light collected by an optical system not shown. In the pixel area 12, a plurality of pixels 21 are arranged in a matrix state, and each pixel 21 is connected to the vertical drive circuit 13 through a horizontal signal line 22 in a row unit and is connected to the column signal processing circuit 14 through a vertical signal line 23 in a column unit. The plurality of pixels 21 respectively output pixel signals at a level corresponding to the amount of light received, and the subject image formed on the pixel area 12 is constructed by these pixel signals.

[0042] The vertical drive circuit 13 sequentially supplies drive signals for driving (transferring, selecting, resetting, etc.) each pixel 21 to the pixel 21 through the horizontal signal line 22 for each row of the plurality of pixels 21 arranged on the pixel area 12. The column signal processing circuit 14 performs AD conversion of the pixel signal and removes reset noise by applying a correlated double sampling (CDS) process to the pixel signal output from the plurality of pixels 21 through the vertical signal line 23.

[0043] The horizontal driving circuit 15 sequentially supplies a driving signal for causing the column signal processing circuit 14 to output a pixel signal to the data output signal line 24 for each column of the plurality of pixels 21 arranged on the pixel region 12. The output circuit 16 amplifies the pixel signal supplied from the column signal processing circuit 14 through the data output signal line 24 at a timing according to the driving signal of the horizontal driving circuit 15, and the output circuit 16 outputs the amplified pixel signal to the signal processing circuit of the subsequent stage. The control circuit 17 controls the driving of each of the modules of the imaging element 11 by, for example, generating and supplying a clock signal according to the driving cycle of each module of the imaging element 11.

[0044] In the imaging element 11 configured as above, each pixel 21 is arranged with a color filter that transmits red light, green light, and blue light according to the so-called Bayer array, for example, and each pixel 21 outputs a pixel signal corresponding to the light amount of each color of light. In addition, the imaging element 11 can use a back-type structure in which light is incident from the back side of the semiconductor substrate by making a thin film of a semiconductor substrate and by laminating a wiring layer on the surface of the semiconductor substrate, and a photodiode constituting the pixel 21 is formed on the semiconductor substrate.

[0045] <First Configuration Example of Pixel>

[0046] Reference Figure 2 , a first configuration example of the pixel 21 will be described.

[0047] exist Figure 2 A of FIG. 1 shows a circuit diagram of a pixel 21, and Figure 2 In B, a planar structure of the pixel 21 is illustrated.

[0048] like Figure 2 As shown in FIG. 1A , the pixel 21 includes a PD 31 , a transfer transistor 32 , a floating diffusion (FD: Floating Diffusion) portion 33 , an amplification transistor 34 , a selection transistor 35 , a connection transistor 36 , and a reset transistor 37 .

[0049] The PD 31 is a photoelectric conversion section for converting incident light into electric charges by photoelectric conversion and for accumulating the electric charges. The positive terminal of the PD 31 is grounded, and the negative terminal of the PD 31 is connected to the transfer transistor 32 .

[0050] The transfer transistor 32 is driven according to the transfer signal TRG supplied from the vertical drive circuit 13 , and when the transfer transistor 32 is turned on, the charge accumulated in the PD 31 is transferred to the FD portion 33 .

[0051] The FD portion 33 is a floating diffusion region having a predetermined storage capacitance connected to the gate electrode of the amplifying transistor 34, and the FD portion 33 accumulates the charge transferred from the PD 31. Figure 2 As shown in FIG. 2B , the FD portion 33 has a configuration in which a diffusion layer 39 formed on a semiconductor substrate is connected to a gate electrode of the amplifying transistor 34 through an FD connecting wiring 38 .

[0052] The amplifying transistor 34 outputs a pixel signal at a level corresponding to the charge accumulated in the FD portion 33 (i.e., the potential of the FD portion 33) to the vertical signal line 23 via the selecting transistor 35. That is, with the configuration in which the FD portion 33 is connected to the gate electrode of the amplifying transistor 34, the FD portion 33 and the amplifying transistor 34 function as a conversion portion for converting the charge generated in the PD 31 into a pixel signal at a level corresponding to the charge.

[0053] The selection transistor 35 is driven according to the selection signal SEL supplied from the vertical drive circuit 13 , and when the selection transistor 35 is turned on, the pixel signal output from the amplification transistor 34 can be output to the vertical signal line 23 .

[0054] The connection transistor 36 is formed to connect the FD portion 33 and the reset transistor 37, and the connection transistor 36 is capable of switching the storage capacitance of the charge to be converted by the amplifier transistor 34 to the pixel signal. That is, the connection transistor 36 is driven according to the connection signal FDG supplied from the vertical drive circuit 13, and the storage capacitance of the FD portion 33 is changed by switching the connection transistor 36 to on / off. As a result, the conversion efficiency of the amplifier transistor 34 is switched. That is, when the connection transistor 36 is turned off, the storage capacitance of the FD portion 33 becomes small, and the conversion efficiency of the amplifier transistor 34 is set to a high conversion rate. On the other hand, when the connection transistor 36 is turned on, the storage capacitance of the FD portion 33 becomes large, and the conversion efficiency of the amplifier transistor 34 is set to a low conversion rate.

[0055] The reset transistor 37 is driven according to the reset signal RST supplied from the vertical drive circuit 13. When the reset transistor 37 is turned on, the charge accumulated in the FD portion 33 is discharged to the drain power source Vdd through the reset transistor 37 and the connection transistor 36, and the FD portion 33 is reset.

[0056] The pixel 21 configured as above can switch the conversion efficiency of the amplifier transistor 34 by turning on / off the connection transistor 36. As a result, in the image pickup element 11, by switching the conversion efficiency according to the exposure state of the subject, for example, an image with appropriate brightness can be captured.

[0057] Then, Figure 3 A part of the cross-sectional structure of the pixel 21 is shown in the figure.

[0058] like Figure 3 As shown, the imaging element 11 includes a wiring layer 43 stacked on a semiconductor substrate 41 via an insulating layer 42 , and the PD 31 and the diffusion layer 39 of the FD portion 33 are formed on the semiconductor substrate 41 .

[0059] On the semiconductor substrate 41, the diffusion layer 39 is formed by, for example, implanting P-type impurity ions into an N-type silicon substrate. In addition, on the semiconductor substrate 41, a gate electrode 51 constituting the transfer transistor 32 and a gate electrode 52 constituting the amplifier transistor 34 are stacked. It is to be noted that, although not shown, similarly to the diffusion layer 39, a diffusion layer that becomes a drain and a source constituting the amplifier transistor 34 and the selection transistor 35 is formed on the semiconductor substrate 41.

[0060] The insulating layer 42 is formed by depositing a thin film of silicon dioxide (SiO2), for example, and insulates the surface of the semiconductor substrate 41. Although not shown, an insulating layer is also formed between the semiconductor substrate 41 and the gate electrodes 51 and 52.

[0061] The wiring layer 43 is formed by laminating a plurality of layers of metal wiring 53 via an interlayer insulating film, and Figure 3 The diagram shows a configuration example in which three layers of metal wiring 53-1 to metal wiring 53-3 are stacked. The metal wiring 53-1 to metal wiring 53-3 are used for input / output of signals between the pixel 21 and the outside. For example, a drive signal is input to the pixel 21 through the metal wiring 53-1 to metal wiring 53-3, and a pixel signal obtained in the pixel 21 is output through the metal wiring 53-1 to metal wiring 53-3.

[0062] Furthermore, the stacked metal wirings 53-1 to 53-3 are connected by contact wirings 54 formed so as to penetrate the interlayer insulating film. Figure 3 In the configuration example, the metal wiring 53-1 is connected to the gate electrode 51 through the contact wiring 54-1, the metal wiring 53-2 is connected to the metal wiring 53-1 through the contact wiring 54-2, and the metal wiring 53-3 is connected to the metal wiring 53-2 through the contact wiring 54-3.

[0063] Then, in the wiring layer 43, the diffusion layer 39 in the FD portion 33 is connected to the FD connection wiring 38 through the contact wiring 55, and the gate electrode 52 constituting the amplifying transistor 34 is connected to the FD connection wiring 38 through the contact wiring 56. The contact wiring 55 and the contact wiring 56 are formed to extend in the vertical direction with respect to the semiconductor substrate 41, and the contact wiring 55 and the contact wiring 56 are formed to have a different height from the contact wiring 54-1 connected to the metal wiring 53-1.

[0064] Here, the FD connection wiring 38 is formed closer to the semiconductor substrate 41 than the metal wirings 53-1 to 53-3 formed in the wiring layer 43, that is, the FD connection wiring 38 is formed as a layer lower than the metal wiring 53-1 as the first layer. That is, the FD connection wiring 38 connecting the diffusion layer 39 and the gate electrode 52 is formed by the following steps: a thin interlayer insulating film is formed and a metal film is formed relative to the interlayer insulating film, and sputtering is performed before forming the metal wiring 53 for connection at other locations. Thereafter, the interlayer insulating film is formed to a predetermined thickness so as to form the metal wiring 53-1 as the first layer, and the metal wiring 53-2 and the metal wiring 53-3 are formed similarly.

[0065] In addition, the FD connection wiring 38 is formed into a thin film having a thickness of 50 nm or less, for example. In addition, the FD connection wiring 38 can include titanium (Ti), titanium nitride (TiN), tungsten (W), aluminum (Al) or copper (Cu). In addition, the FD connection wiring 38 can include a stacked structure (Ti / TiN / Ti) of titanium and titanium nitride.

[0066] In the pixel 21 configured as above, by forming the FD connection wiring 38 as a layer lower than the metal wiring 53-1, the storage capacitance of the FD portion 33 can be reduced, and the conversion efficiency of the amplifier transistor 34 can be increased. In addition, in the pixel 21, by forming the FD connection wiring 38 as a thin film, the conversion rate of the amplifier transistor 34 can also be increased.

[0067] In addition, in the pixel 21, as Figure 2As shown in FIG. 1B, by arranging the FD connection wiring 38 so as to avoid plane overlap with the gate electrode of the transfer transistor 32 or the connection transistor 36, etc., it is possible to prevent the generation of capacitance between the FD connection wiring 38 and the gate electrode. With this arrangement, the storage capacitance of the FD portion 33 can also be reduced.

[0068] In particular, the pixel 21 is configured so that the conversion efficiency of the amplifier transistor 34 can be switched by the connection transistor 36, and the image pickup element 11 can effectively utilize the effect obtained by the reduction of the storage capacitance of the FD portion 33. That is, when the conversion efficiency of the amplifier transistor 34 is high, there is a concern that if an image is captured under bright conditions, the pixel signal will be saturated. On the other hand, in the case of the image pickup element 11, if an image is captured under bright conditions, since the conversion efficiency of the amplifier transistor 34 can be set to be low by turning on the connection transistor 36, saturation of the image signal can be avoided.

[0069] Therefore, by setting the conversion efficiency of the amplifier transistor 34 to high, the image pickup element 11 can capture a clear image with low noise in a low illumination environment (for example, in the dark). In addition, by switching the conversion efficiency of the amplifier transistor 34 to low in a high illumination environment (for example, during the day), the image pickup element 11 can capture an image with proper exposure without pixel signal saturation. As described above, the image pickup element 11 can capture good images in any illumination environment and is suitable for monitoring or vehicle-mounted applications, for example.

[0070] Furthermore, the imaging element in the aforementioned Patent Document 1 has a structure in which parasitic capacitance becomes large by bringing the wiring connected to the FD portion close to the substrate, and the imaging element in the aforementioned Patent Document 2 has a structure in which parasitic capacitance is generated between adjacent wirings. Therefore, with the imaging element of the prior art, it is difficult to achieve conversion efficiency as high as that of the imaging element 11.

[0071] On the other hand, in the imaging element 11, the FD connection wiring 38 is formed to such an extent that a small parasitic capacitance is generated between the semiconductor substrate 41 and the FD connection wiring 38 by providing an appropriate interval using the contact wiring 55 and the contact wiring 56. In addition, since the FD connection wiring 38 and the metal wiring 53 are formed in different layers, respectively, the imaging element 11 can avoid the generation of parasitic capacitance between these wirings. Therefore, in the imaging element 11, since the storage capacitance of the FD portion 33 can be reduced more than before, a high conversion efficiency of the amplifier transistor 34 can be achieved.

[0072] Furthermore, since the barrier metal is formed so that the Schottky junction cannot be formed, the FD connection wiring 38 can reduce the capacitance generated between the FD connection wiring 38 and the semiconductor substrate 41 by making an ohmic junction.

[0073] Reference Figure 4 , a driving method of the pixel 21 will be described.

[0074] Figure 4 A timing diagram of a selection signal SEL, a reset signal RST, a connection signal FDG, and a transfer signal TRG for driving the pixel 21 is illustrated.

[0075] First, we will explain Figure 4 The upper side of the figure shows the drive when a high conversion rate (high gain) is set.

[0076] For example, in a state where a row in which pixels 21 are arranged is not selected as a row for performing shutter operation and readout operation (hereinafter referred to as non-selection), the selection signal SEL, reset signal RST, connection signal FDG and transfer signal TRG are all set to L (low) level.

[0077] Then, when the row in which the predetermined pixels 21 are arranged becomes the shutter row, within 1 horizontal period in which the row is driven, first, the reset signal RST is changed to the H (high) level only within the predetermined period, and the connection signal FDG is changed to the H level only within the period shorter than the predetermined period. As a result, the FD section 33 is connected to the drain power supply Vdd through the connection transistor 36 and the reset transistor 37, and the charge accumulated in the FD section 33 is discharged to the drain power supply Vdd. Then, within the period in which the connection signal FDG is at the H level, when the transfer signal TRG is changed to the H level in a pulse state, the charge accumulated in the PD 31 is discharged, and then the PD 31 starts to accumulate charge.

[0078] In parallel with the shutter operation as described above being performed for the other rows, the pixels 21 in the non-selected rows enter a state where the generated charges are accumulated in the PD 31. Figure 4 , 1 horizontal period for a plurality of rows that are sequentially executed is expressed as one horizontal period.

[0079] Thereafter, when a row in which predetermined pixels 21 are arranged becomes a read row, first, the selection signal SEL is changed to an H level in 1 horizontal period, and the amplification transistor 34 is connected to the vertical signal line 23 through the selection transistor 35. Then, the reset signal RST is changed to an H level, the connection signal FDG is changed to an H level in a pulse state, and the FD portion 33 is reset, and then, a pixel signal at a reset level is read out (P phase). Subsequently, the transfer signal TRG is changed to an H level in a pulse state, and the charge accumulated in the PD 31 is transferred to the FD portion 33, and a pixel signal at a data level is read out (D phase).

[0080] In addition, when set to Figure 4 In the case of the low conversion rate (low gain) shown on the lower side of , driving similar to the case of setting to the high conversion rate (high gain) is performed in the non-selected rows and the shutter rows.

[0081] Then, in the case of setting to a low conversion rate (low gain), when the row in which the predetermined pixel 21 is arranged becomes the read row, first, the selection signal SEL is changed to the H level within 1 horizontal period, and the amplification transistor 34 is connected to the vertical signal line 23 through the selection transistor 35. Thereafter, the reset signal RST is changed to the H level, and then, the connection signal FDG is changed to the H level, and while the connection transistor 36 is kept turned on, the pixel signal (P phase) at the reset level is read out. In addition, while the connection signal FDG is kept at the H level, the transfer signal TRG is changed to the H level in a pulse state, the charge accumulated in the PD 31 is transferred to the FD portion 33, and the pixel signal (D phase) at the data level is read out, and thereafter, the connection signal FDG is changed to the L level.

[0082] As described above, when the pixel 21 is set to a high conversion rate, after the connection signal FDG is changed to the H level in a pulse state and the FD portion 33 is reset, the connection transistor 36 is turned off, and the P phase and the D phase are read out in a state where the storage capacitance of the FD portion 33 is small. On the other hand, when the pixel 21 is set to a low conversion rate, the connection transistor 36 remains turned on, and the P phase and the D phase are read out in a state where the storage capacitance of the FD portion 33 is large.

[0083] By the above driving method, the pixel 21 can switch between a high conversion rate and a low conversion rate, and can read out a pixel signal with an appropriate conversion efficiency according to the exposure state. That is, by switching the storage capacitance of the FD portion 33 using the connection transistor 36 and turning on the connection transistor 36, the conversion efficiency of the amplifier transistor 34 is set to a low conversion rate, and the pixel signal can be read out; and by turning off the connection transistor 36, the conversion efficiency of the amplifier transistor 34 is set to a high conversion rate, and the pixel signal can be read out.

[0084] It should be noted that if Figure 3 The pixel 21 shown employing the FD connecting wiring 38 is not limited to a configuration capable of changing the amplification factor of the amplifying transistor 34 by using the connecting transistor 36 , but may be a configuration not including the connecting transistor 36 .

[0085] <Second Configuration Example of Pixel>

[0086] Then, refer to Figure 5 , a second configuration example of the pixel 21 will be described.

[0087] exist Figure 5 A of FIG. 1 shows a circuit diagram of a pixel 21A, and Figure 5 In B of FIG. 1 , a planar structure of the pixel 21A is shown. Figure 5 In the pixel 21A shown in FIG. 1 , the same reference numerals are used to designate the same pixels as those in FIG. Figure 2 The pixel 21 has the same structure as in FIG. 1 , and detailed description will be omitted.

[0088] like Figure 5 As shown in FIG. 1A , the pixel 21A includes a PD 31, a transfer transistor 32, an FD portion 33, an amplifying transistor 34, a selecting transistor 35, and a reset transistor 37. That is, the pixel 21A has Figure 2 The pixel 21 in FIG. 1 excludes the configuration of the connection transistor 36 .

[0089] In addition, if Figure 5 As shown in FIG. 1B , the diffusion layer 39 in the FD portion 33 is connected to the gate electrode of the amplification transistor 34 through the FD connection wiring 38 , and the FD connection wiring 38 is arranged so as not to overlap with the gate electrode of the transfer transistor 32 or the reset transistor 37 .

[0090] As described above, the pixel 21A has a structure (4Tr structure) including four transistors (i.e., the transfer transistor 32, the amplifying transistor 34, the selecting transistor 35, and the reset transistor 37). Then, the pixel 21A is formed so that the FD connecting wiring 38 connecting the diffusion layer 39 in the FD portion 33 and the gate electrode of the amplifying transistor 34 becomes smaller than the reference Figure 3 As a result, in the pixel 21A, similar to Figure 2 The pixel 21 in the embodiment can increase the conversion efficiency of the amplifier transistor 34.

[0091] Note that the pixel 21 may adopt a structure (3Tr structure) including three transistors, that is, for example, the transfer transistor 32 excluding the selection transistor 35 , the amplification transistor 34 , and the selection transistor 35 .

[0092] In addition, the pixel 21 may adopt a method as will be described later. Figure 6 and Figure 7The pixel sharing structure shown in FIG. 1 is a pixel sharing structure in which a plurality of PDs 31 share an FD portion 33 , an amplifying transistor 34 , a selecting transistor 35 , and a reset transistor 37 .

[0093] <Third Configuration Example of Pixel>

[0094] Then, refer to Figure 6 , a third configuration example of the pixel 21 will be described.

[0095] Figure 6 FIG. 2 shows a planar structure of a pixel 21B. Figure 6 In the pixel 21B shown in FIG. 1 , the same reference numerals are used to designate the pixels corresponding to the pixels 21B. Figure 2 The pixel 21 has the same structure as in FIG. 1 , and detailed description will be omitted.

[0096] like Figure 6 As shown, the pixel 21B includes two PDs 31-1 and 31-2, two transfer transistors 32-1 and 32-2, an FD section 33, an amplifier transistor 34, a selection transistor 35, and a reset transistor 37. That is, the pixel 21B adopts a two-pixel sharing structure in which the amplifier transistor 34 is shared by the two PDs 31-1 and 31-2.

[0097] In addition, if Figure 6 As shown, the FD connection wiring 38B is formed to connect the diffusion layer 39 in the FD portion 33 and the gate electrode of the amplifying transistor 34 and to connect the diffusion layer 39 in the FD portion 33 and the source region in the reset transistor 37. Figure 2 The FD connection wiring 38 in the FD connection wiring 38B is arranged so as not to overlap with the gate electrodes of the transfer transistors 32 - 1 and 32 - 2 or the reset transistor 37 or the like.

[0098] Furthermore, in the pixel 21B configured as above, the FD connection wiring 38B is formed as shown in FIG. Figure 3 As a result, in the pixel 21B, similar to Figure 2 The pixel 21 in the embodiment can increase the conversion efficiency of the amplifier transistor 34.

[0099] <Fourth Configuration Example of Pixel>

[0100] Then, refer to Figure 7 , a fourth configuration example of the pixel 21 will be described.

[0101] Figure 7 The planar structure of the pixel 21C is shown in FIG. Figure 7 In the pixel 21C shown in FIG. 1 , the same reference numerals are used to designate the pixels corresponding to the pixels 21C. Figure 2 The pixel 21 has the same structure as in FIG. 1 , and detailed description will be omitted.

[0102] like Figure 7 As shown, the pixel 21C includes four PDs 31-1 to 31-4, four transfer transistors 32-1 to 32-4, an FD section 33, an amplifier transistor 34, a selection transistor 35, and a reset transistor 37. That is, the pixel 21C adopts a 4-pixel sharing structure in which the amplifier transistor 34 is shared by the four PDs 31-1 to 31-4.

[0103] In addition, if Figure 7 As shown, the FD connection wiring 38C is formed to connect the diffusion layer 39 in the FD portion 33 and the gate electrode of the amplifying transistor 34 and to connect the diffusion layer 39 in the FD portion 33 and the source region in the reset transistor 37. Figure 2 The FD connection wiring 38 in the FD connection wiring 38C is arranged so as not to overlap with the gate electrodes of the transfer transistors 32 - 1 to 32 - 4 or the reset transistor 37 or the like.

[0104] Furthermore, in the pixel 21C configured as above, the FD connection wiring 38C is formed as shown in FIG. Figure 3 As a result, in the pixel 21C, similar to Figure 2 The pixel 21 in the embodiment can increase the conversion efficiency of the amplifier transistor 34.

[0105] <Fifth Configuration Example of Pixel>

[0106] Then, refer to Figure 8 , a fifth configuration example of the pixel 21 will be described.

[0107] exist Figure 8 A of FIG. 1 shows a circuit diagram of a pixel 21D, and Figure 8 In B of FIG. 1 , a planar structure of a pixel 21D is shown. Figure 8 In the pixel 21D shown in FIG. 1 , the same reference numerals are used to designate the same pixels as those in FIG. Figure 2 The pixel 21 has the same structure as in FIG. 1 , and detailed description will be omitted.

[0108] like Figure 8 As shown in FIG. 2A , the pixel 21D includes PD 31L and PD 31S, two transfer transistors 32 - 1 and 32 - 2 , an FD portion 33 , an amplification transistor 34 , a selection transistor 35 , two connection transistors 36 - 1 and 36 - 2 , a reset transistor 37 , and an in-pixel capacitor 61 .

[0109] The PD 31L and the PD 31S are photoelectric conversion sections having different sensitivities from each other, and each converts incident light into electric charges by photoelectric conversion and accumulates the electric charges. Figure 8As shown in FIG. 8B , for example, the PD 31L is formed to have a large area so as to have high sensitivity, while the PD 31S is formed to have a small area so as to have low sensitivity.

[0110] The transfer transistor 32 - 1 is driven according to the transfer signal TGL supplied from the vertical drive circuit 13 , and when the transfer transistor 32 - 1 is turned on, the charge accumulated in the PD 31L is transferred to the FD portion 33 .

[0111] The transfer transistor 32 - 2 is driven according to the transfer signal TGS supplied from the vertical drive circuit 13 , and when the transfer transistor 32 - 2 is turned on, the charge accumulated in the PD 31S is transferred to the in-pixel capacitance 61 .

[0112] The connection transistor 36 - 1 is formed to connect the FD portion 33 and the reset transistor 37 , is driven according to a connection signal FDG supplied from the vertical drive circuit 13 , and can switch the storage capacitance of the FD portion 33 .

[0113] The connection transistor 36-2 is formed so that the in-pixel capacitance 61 and the connection portion between the connection transistor 36-1 and the reset transistor 37 are connected to each other. The connection transistor 36-2 is driven according to the connection signal FCG supplied from the vertical drive circuit 13, and when the connection transistor 36-2 is turned on, the charge accumulated in the in-pixel capacitance 61 is transferred to the FD portion 33 through the connection transistor 36-1.

[0114] The pixel internal capacitor 61 is formed by, for example, a wiring layer 43 (see Figure 3 ) is a capacitor composed of two metal layers in the pixel, and the in-pixel capacitor 61 accumulates the charge transferred from the PD 31S.

[0115] Note that, for example, the wiring 62 connected to the in-pixel capacitance 61 or the wiring 63 connecting the connection transistor 36-2 and the diffusion layer between the connection transistor 36-1 and the reset transistor 37 is formed by Figure 3 Then, similarly to the FD connection wiring 38D, the wiring 62 and the wiring 63 are also arranged so as not to overlap with the gate electrodes of other transistors in a plan view.

[0116] Then, if Figure 8 As shown in B, it is similar to Figure 3 The FD connection wiring 38D connects the diffusion layer 39 in the FD portion 33 and the gate electrode of the amplifying transistor 34 to each other, and the FD connection wiring 38D is formed as a layer lower than the metal wiring 53-1. As a result, in the pixel 21D, similar to Figure 2The pixel 21 in the embodiment can increase the conversion efficiency of the amplifier transistor 34.

[0117] In particular, by forming the FD connection wiring 38D connected to the FD section 33 to be low, the pixel 21D can suppress noise generated in the pixel signal even in a relatively low illumination environment, and the charge is transferred from the PD 31L having high sensitivity and formed to have a large area to the FD section 33 through the transfer transistor 32-1. That is, by combining the characteristics of the higher sensitivity of the PD 31L and the higher sensitivity of the FD connection wiring 38D, the image pickup element 11 including the pixel 21D can capture an image with higher sensitivity. In addition, in the image pickup element 11 including the pixel 21D, the pixel signal obtained from the PD 31S is used to construct an image in a high illumination environment, and it is possible to capture an image while avoiding saturation of the pixel signal.

[0118] As described above, by providing the PD 31L and the PD 31S having different sensitivities, the image pickup element 11 including the pixel 21D can capture a good image in any of a low illuminance environment and a high illuminance environment.

[0119] Then, refer to Fig. 9 , a driving method of the pixel 21D will be described.

[0120] Fig. 9 A timing chart of the selection signal SEL, the connection signal FDG, the reset signal RST, the transfer signal TGS, the connection signal FCG, and the transfer signal TGL in the shutter row, the readout row, and the non-selection row is illustrated.

[0121] The horizontal synchronization signal XHS is a signal for synchronizing operations in a row in which the pixels 21D are arranged within one horizontal period.

[0122] When a row in which predetermined pixels 21D are arranged becomes a shutter row, first, the connection signal FDG and the reset signal RST are turned to the H level within one horizontal period in which the row is driven. As a result, the FD portion 33 is connected to the drain power supply Vdd through the connection transistor 36-1 and the reset transistor 37, and the charge accumulated in the FD portion 33 is discharged to the drain power supply Vdd.

[0123] Subsequently, the connection signal FCG changes to the H level, and since the in-pixel capacitance 61 is connected to the drain power source Vdd through the connection transistor 36-2 and the reset transistor 37, the charge accumulated in the in-pixel capacitance 61 is discharged to the drain power source Vdd. At this time, the transfer signal TGS and the transfer signal TGL change to the H level in a pulse state, and therefore, the charge accumulated in the PD 31L and the PD 31S is also discharged, and then the PD 31L and the PD 31S start to accumulate charge.

[0124] Thereafter, the reset signal RST transitions to L level, the connection signal FCG transitions to L level, and the connection signal FDG transitions to L level. Note that, in the shutter row, the selection signal SEL is always at L level.

[0125] Then, when the row in which the predetermined pixel 21D is arranged becomes the read row, first, the selection signal SEL is turned to the H level, and the amplification transistor 34 is connected to the vertical signal line 23 through the selection transistor 35. At this time, the connection signal FDG is also turned to the H level, and the FD portion 33 enters a state of being connected to the reset transistor 37. Then, the reset signal RST is turned to the H level in a pulse state, and the FD portion 33 is reset. Then, at the same time as the connection signal FCG is turned to the H level, the transfer signal TGS is turned on in a pulse state, and the charge accumulated in the PD 31S is transferred to the in-pixel capacitance 61.

[0126] As a result, a pixel signal at a data level corresponding to the charge generated in PD 31S is read out (D phase of small PD), and then the reset signal RST changes to H level in a pulse state, and a pixel signal at a reset level is read out (P phase of small PD).

[0127] Thereafter, the connection signal FCG changes to the L level, the in-pixel capacitor 61 is disconnected from the FD portion 33, the reset signal RST changes to the H level in a pulse state, the FD portion 33 is reset, and the pixel signal at the reset level is read out (P phase of the large PD). Then, the transfer signal TGL changes to the H level in a pulse state, and the charge accumulated in the PD 31L is transferred to the FD portion 33 through the transfer transistor 32-1. As a result, the pixel signal at the data level corresponding to the charge generated in the PD 31L is read out (D phase of the large PD).

[0128] Furthermore, in the non-selected row, the horizontal synchronization signal XHS, the selection signal SEL, the connection signal FDG, the reset signal RST, the transfer signal TGS, the connection signal FCG, and the transfer signal TGL are always set to the L level.

[0129] By the driving method as described above, the pixel 21D can perform the readout of the pixel signal from the PD 31S having low sensitivity and the readout of the pixel signal from the PD 31L having high sensitivity. Therefore, by using the pixel signal of the PD 31L in an exposure environment where the pixel signal of the PD 31L is not saturated and by using the pixel signal of the PD 31S in an exposure environment where the pixel signal of the PD 31L is saturated, the image pickup element 11 including the pixel 21D can construct an image with a wide dynamic range.

[0130] <Configuration Example of Electronic Equipment>

[0131] It should be noted that the imaging element 11 having the pixel 21 in each embodiment described above can be applied to various electronic devices, for example, including imaging systems such as digital cameras and digital video cameras, mobile phones with imaging functions, or other devices with imaging functions.

[0132] Fig.10 is a block diagram illustrating a configuration example of an imaging device mounted on an electronic device.

[0133] like Fig.10 As shown, the imaging device 101 includes an optical system 102, an imaging element 103, a signal processing circuit 104, a monitor 105, and a memory 106, and the imaging device 101 can capture still images and moving images.

[0134] The optical system 102 includes one or more lenses, guides image light (incident light) from a subject to the imaging element 103 , and forms an image on a light receiving surface (sensor portion) of the imaging element 103 .

[0135] As the imaging element 103, the imaging element 11 having the pixels 21 in the aforementioned embodiments is applied. In the imaging element 103, electrons are accumulated for a certain period of time according to an image formed on a light receiving surface by the optical system 102. Then, a signal corresponding to the electrons accumulated in the imaging element 103 is supplied to the signal processing circuit 104.

[0136] The signal processing circuit 104 applies various types of signal processing to the pixel signal output from the imaging element 103. An image (image data) obtained by applying the signal processing by the signal processing circuit 104 is supplied to the monitor 105 for display or to the memory 106 for storage (recording).

[0137] In the image pickup device 101 configured as above, by applying the image pickup element 11 having the pixels 21 in each of the aforementioned embodiments, a clearer image can be picked up with less noise.

[0138] <Examples of using image sensors>

[0139] Fig.11 An example of use of the above-mentioned image sensor is illustrated.

[0140] For example, the above-mentioned image sensor can be used in various cases of detecting light such as visible light, infrared light, ultraviolet light, or X-rays as follows.

[0141] Devices that capture images for viewing, such as digital cameras and portable devices with camera functions.

[0142] Devices for traffic, such as on-board sensors that capture images of the front, back, surroundings, and interior of a car, etc., for safe driving (e.g., automatic stopping) and driver status recognition, surveillance cameras that monitor traveling vehicles and roads, and distance sensors that measure the distance between vehicles.

[0143] Devices for home appliances such as TVs, refrigerators, and air conditioners to capture images of user gestures and perform appliance operations according to the gestures.

[0144] Devices used in medical and health care, such as endoscopes and devices for angiography by receiving infrared rays.

[0145] Devices used for security, such as surveillance cameras for crime prevention and cameras for personal identification.

[0146] Devices for beauty care, such as a dermatometer that takes images of the skin and a microscope that takes images of the scalp.

[0147] Devices for sports, such as action cameras and wearable cameras for sports.

[0148] Devices used in agriculture, such as cameras used to monitor the condition of fields and crops.

[0149] Furthermore, the present technology can also be configured as follows.

[0150] (1) An imaging device comprising:

[0151] A pixel, the pixel comprising:

[0152] a photoelectric conversion unit configured to convert incident light into electric charges by photoelectric conversion and accumulate the electric charges,

[0153] a charge transfer unit configured to transfer the charge generated in the photoelectric conversion portion,

[0154] a diffusion layer, the charges are transferred to the diffusion layer through the charge transfer unit, and the diffusion layer has a predetermined storage capacitance,

[0155] a conversion unit configured to convert the charges transferred to the diffusion layer into a pixel signal, and

[0156] a connection wiring configured to connect the diffusion layer and the conversion unit,

[0157] The connection wiring is connected to the diffusion layer and the conversion unit through a contact wiring, the contact wiring extends in a vertical direction relative to a semiconductor substrate, the diffusion layer is formed on the semiconductor substrate, and the connection wiring is formed closer to the semiconductor substrate than other wirings arranged in the pixel.

[0158] (2) The imaging element according to (1), wherein:

[0159] The pixel further includes a switching unit configured to switch a storage capacitor for accumulating the charge converted into the pixel signal by the conversion unit.

[0160] (3) The imaging device according to (1) or (2), further comprising:

[0161] A driving unit, wherein the driving unit is configured to set the conversion efficiency of the conversion unit to a low conversion rate and perform the reading of the pixel signal by switching the storage capacitor to a large capacitor using the switching unit, and the driving unit is configured to set the conversion efficiency of the conversion unit to a high conversion rate and perform the reading of the pixel signal by switching the storage capacitor to a small capacitor using the switching unit.

[0162] (4) The imaging element according to any one of (1) to (3), wherein

[0163] The connecting wiring is formed as a thinner film than the other wirings provided in the pixel.

[0164] (5) The imaging element according to any one of (1) to (4), wherein

[0165] The connection wiring is arranged so as to avoid overlapping with a gate electrode of a transistor provided in the pixel in a plan view.

[0166] (6) The imaging element according to any one of (1) to (5), wherein

[0167] The connection wiring includes titanium, titanium nitride, tungsten, aluminum, or copper, or a stacked structure including titanium and titanium nitride.

[0168] (7) The imaging element according to (1), wherein:

[0169] The pixel includes a plurality of photoelectric conversion portions having sensitivities different from each other.

[0170] (8) The imaging device according to (7), further comprising:

[0171] A driving unit configured to sequentially transfer pixel signals corresponding to the charges generated in each of the plurality of photoelectric conversion portions to the diffusion layer and perform readout of the pixel signals.

[0172] (9) A method for driving an image pickup element, wherein the image pickup element includes a pixel, wherein the pixel includes:

[0173] a photoelectric conversion unit configured to convert incident light into electric charges by photoelectric conversion and accumulate the electric charges,

[0174] a charge transfer unit configured to transfer the charge generated in the photoelectric conversion portion,

[0175] a diffusion layer, the charges are transferred to the diffusion layer through the charge transfer unit, and the diffusion layer has a predetermined storage capacitance,

[0176] a conversion unit configured to convert the charges transferred to the diffusion layer into a pixel signal,

[0177] a connection wiring configured to connect the diffusion layer and the conversion unit, and

[0178] a switching unit configured to switch a storage capacitor for accumulating the charge converted by the conversion unit into the pixel signal,

[0179] The connection wiring is connected to the diffusion layer and the conversion unit through a contact wiring, the contact wiring extending in a vertical direction with respect to a semiconductor substrate on which the diffusion layer is formed, and the connection wiring is formed closer to the semiconductor substrate than other wirings provided in the pixel,

[0180] The driving method comprises:

[0181] setting the conversion efficiency of the conversion unit to a low conversion rate and performing readout of the pixel signal by switching the storage capacitor to a large capacitor using the switching unit; and

[0182] The conversion efficiency of the conversion unit is set to a high conversion rate by switching the storage capacitance to a small capacitance using the switching unit and reading out of the pixel signal is performed.

[0183] (10) An electronic device comprising:

[0184] An imaging element, the imaging element comprising pixels, the pixels comprising:

[0185] a photoelectric conversion unit configured to convert incident light into electric charges by photoelectric conversion and accumulate the electric charges,

[0186] a charge transfer unit configured to transfer the charge generated in the photoelectric conversion portion,

[0187] a diffusion layer, the charges are transferred to the diffusion layer through the charge transfer unit, and the diffusion layer has a predetermined storage capacitance,

[0188] a conversion unit configured to convert the charges transferred to the diffusion layer into a pixel signal, and

[0189] a connection wiring configured to connect the diffusion layer and the conversion unit,

[0190] The connection wiring is connected to the diffusion layer and the conversion unit through a contact wiring, the contact wiring extends in a vertical direction relative to a semiconductor substrate, the diffusion layer is formed on the semiconductor substrate, and the connection wiring is formed closer to the semiconductor substrate than other wirings arranged in the pixel.

[0191] (11) An imaging device comprising:

[0192] A pixel, the pixel comprising:

[0193] a plurality of photoelectric conversion units configured to convert incident light into electric charges by photoelectric conversion and to accumulate the electric charges, and the plurality of photoelectric conversion units have different sensitivities from each other,

[0194] a charge transfer unit configured to transfer the charge generated in the photoelectric conversion portion,

[0195] a diffusion layer, the charges are transferred to the diffusion layer through the charge transfer unit, and the diffusion layer has a predetermined storage capacitance,

[0196] a conversion unit configured to convert the charges transferred to the diffusion layer into a pixel signal,

[0197] a connection wiring configured to connect the diffusion layer and the conversion unit, and

[0198] An in-pixel capacitor configured to accumulate charges transferred from a portion of the plurality of photoelectric converters.

[0199] (12) The imaging device according to (11), further comprising:

[0200] A driving unit configured to sequentially transfer pixel signals corresponding to the charges generated in each of the plurality of photoelectric conversion portions to the diffusion layer and perform readout of the pixel signals.

[0201] (13) The imaging element according to (11) or (12), wherein:

[0202] The connection wiring is connected to the diffusion layer and the conversion unit through a contact wiring extending in a vertical direction with respect to a semiconductor substrate on which the diffusion layer is formed and formed closer to the semiconductor substrate than other wirings provided in the pixel.

[0203] (14) The imaging element according to any one of (11) to (13), wherein:

[0204] The connection wiring is formed as a thinner film than other wirings provided in the pixel.

[0205] (15) The imaging element according to any one of (11) to (14), wherein:

[0206] The connection wiring is arranged so as to avoid overlapping with a gate electrode of a transistor provided in the pixel in a plan view.

[0207] (16) The imaging element according to any one of (11) to (15), wherein:

[0208] The connection wiring includes titanium, titanium nitride, tungsten, aluminum, or copper, or a stacked structure including titanium and titanium nitride.

[0209] (17) A method for driving an image pickup element, wherein the image pickup element includes a pixel, wherein the pixel includes:

[0210] a plurality of photoelectric conversion units configured to convert incident light into electric charges by photoelectric conversion and to accumulate the electric charges, and the plurality of photoelectric conversion units have different sensitivities from each other,

[0211] a charge transfer unit configured to transfer the charge generated in the photoelectric conversion portion,

[0212] a diffusion layer, the charges are transferred to the diffusion layer through the charge transfer unit, and the diffusion layer has a predetermined storage capacitance,

[0213] a conversion unit configured to convert the charges transferred to the diffusion layer into a pixel signal,

[0214] a connection wiring configured to connect the diffusion layer and the conversion unit, and

[0215] an in-pixel capacitance configured to accumulate charges transferred from a portion of the plurality of photoelectric conversion portions,

[0216] The driving method comprises:

[0217] Pixel signals corresponding to the charges generated in each of the plurality of photoelectric conversion portions are sequentially transferred to the diffusion layer, and readout of the pixel signals is performed.

[0218] (18) An electronic device comprising:

[0219] An imaging element, the imaging element comprising pixels, the pixels comprising:

[0220] a plurality of photoelectric conversion units configured to convert incident light into electric charges by photoelectric conversion and to accumulate the electric charges, and the plurality of photoelectric conversion units have different sensitivities from each other,

[0221] a charge transfer unit configured to transfer the charge generated in the photoelectric conversion portion,

[0222] a diffusion layer, the charges are transferred to the diffusion layer through the charge transfer unit, and the diffusion layer has a predetermined storage capacitance,

[0223] a conversion unit configured to convert the charges transferred to the diffusion layer into a pixel signal,

[0224] a connection wiring configured to connect the diffusion layer and the conversion unit, and

[0225] An in-pixel capacitor configured to accumulate charges transferred from a portion of the plurality of photoelectric converters.

[0226] Furthermore, the embodiments of the present invention are not limited to the above-described embodiments, and various alternatives are possible as long as they are within the scope of the present invention.

[0227] Reference numerals list

[0228] 11. Camera Components

[0229] 12 pixel area

[0230] 13 Vertical drive circuit

[0231] 14 columns signal processing circuit

[0232] 15 Horizontal drive circuit

[0233] 16 Output Circuit

[0234] 17 Control Circuit

[0235] 21 pixels

[0236] 22 horizontal signal lines

[0237] 23 vertical signal line

[0238] 24 Data output signal line

[0239] 31PD

[0240] 32 Pass transistor

[0241] 33 FD Department

[0242] 34 Amplifier transistor

[0243] 35 Select transistor

[0244] 36 Connecting the transistor

[0245] 37 Reset transistor

[0246] 38 FD connection wiring

[0247] 39 Diffusion layer

[0248] 41 Semiconductor substrate

[0249] 42 Insulation layer

[0250] 43 wiring layer

[0251] 51 and 52 gate electrodes

[0252] 53 Metal wiring

[0253] 54 to 56 contact wiring

[0254] 61 Pixel internal capacitance

[0255] 62 and 63 wiring

Claims

1. A light detection device, comprising: a first photoelectric converter, a second photoelectric converter, a third photoelectric converter, and a fourth photoelectric converter disposed in the semiconductor substrate; a first transfer transistor connected to the first photoelectric converter; a second transfer transistor connected to the second photoelectric converter; a third transfer transistor connected to the third photoelectric converter; a fourth transmission transistor, the third transmission transistor being connected to the fourth photoelectric converter; wherein the first transfer transistor, the second transfer transistor, the third transfer transistor, and the fourth transfer transistor are connected to a floating diffusion; a reset transistor connected to the floating diffusion; an amplifying transistor connected to the floating diffusion; a selection transistor connected to the amplification transistor; and a multilayer wiring layer located on a surface of the semiconductor substrate opposite to the light receiving surface, the multilayer wiring layer including a first wiring and a second wiring, wherein the first wiring is connected to the floating diffusion and the amplifying transistor, The second wiring is connected to the first transfer transistor, and In a cross-sectional view, the first wiring is closer to the surface of the semiconductor substrate than the second wiring.

2. The light detection device according to claim 1, further comprising: A connection transistor is connected to the floating diffusion, wherein the connection transistor is configured to change a capacitance of the floating diffusion.

3. The light detection device according to claim 2, wherein: The reset transistor is configured to reset the capacitance of the floating diffusion.

4. An electronic device comprising the light detection apparatus according to any one of claims 1 to 3.

Images