Mini-LED chip, preparation method thereof and related equipment

Abstract

The invention provides a Mini-LED chip, a preparation method thereof and related equipment, and relates to the technical field of semiconductors. The position of the groove is changed from one side of one long side to one side of one short side in the prior art, based on the adjustment of the position of the groove on a layout, a multi-quantum well layer with a symmetric structure based on a symmetric axis can be formed when the epitaxial structure is processed, the symmetric axis is a midpoint connecting line of the two short sides, and the thickness of the multi-quantum well layer is smaller than that of the groove. The Mini-LED chip is provided with a symmetric axis, so that the light-emitting area of the Mini-LED chip is of a symmetric structure based on the symmetric axis, it is guaranteed that after the Mini-LED chip is fixed to the blue film, the symmetric light-emitting area can be made to have the same adhesive degree with the colloid of the blue film on the two sides of the symmetric axis, and the problems that after the front face of the Mini-LED chip faces downwards and is subjected to external force, the adhesive force is not enough for supporting, and the chip inclines, falls and the like are solved, and the service life of the Mini-LED chip is prolonged. And after delivery to the client, the die bonding efficiency of the client is improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a Mini-LED chip and a preparation method and related equipment thereof. Background Art

[0002] The appearance of the Mini-LED (Mini-Light Emitting Diode) chip is a rectangular design with electrodes on the same side. It is necessary to make grooves to lead out the P electrode and expand the current based on the P electrode fingers. Figure 1 As shown, Figure 1 : is a schematic diagram of the layout of the Mini-LED chip in the prior art. Currently, the P electrode 11 and the P electrode finger 12 are located on one side of one of the long sides of the rectangular Mini-LED chip, and the length extension direction of the P electrode finger 12 is roughly parallel to the long side; the N electrode 13 and the N electrode finger 14 are located on one side of the other long side of the rectangular Mini-LED chip, and the length extension direction of the N electrode finger 14 is roughly parallel to the long side; because the positions of the P electrode 11 and the P electrode finger 12 are grooved to form a groove 15, the height of the plane where the P electrode 11 and the P electrode finger 12 are located will be lower than the height of the plane where the N electrode 13 and the N electrode finger 14 are located, that is, there is a height difference (or step difference) between the two long sides of the rectangular Mini-LED chip. When the midpoint line connecting the two short sides of the rectangular Mini-LED chip is used as the symmetry axis M, the light-emitting area K1 of the current Mini-LED chip is an asymmetric structure, that is, the multi-quantum well layer is an asymmetric structure based on the symmetry axis M.

[0003] Mini-LED chips are normally shipped with the front side (i.e. the surface where the electrode is located) facing the blue film, and the sapphire substrate on the back side facing the release film. The effective bonding area between the Mini-LED chip and the blue film is the area where the light-emitting area K1 is located. Figure 1 As shown, there is a large difference in the degree of colloidal adhesion between the asymmetric light-emitting area K1 and the blue film on both sides of the symmetry axis M. Since the force applied to the long side is relatively large, when the Mini-LED chip is facing downward and subjected to external force, the adhesion on the long side where the P electrode 11 is located is insufficient to support the chip, causing problems such as chip tilting and inverted crystal. This will affect the customer's crystal bonding efficiency when shipped to the client. Summary of the invention

[0004] In view of the above problems, this application provides a Mini-LED chip and its preparation method and related equipment to solve the problems of chip tilt and crystal flipping of Mini-LED chips and improve the customer's crystal bonding efficiency. The specific solution is as follows:

[0005] In a first aspect, the present application provides a Mini-LED chip, wherein the Mini-LED chip is a rectangular Mini-LED chip, wherein the Mini-LED chip includes two short sides arranged opposite to each other, and wherein the Mini-LED chip includes:

[0006] target substrate;

[0007] An epitaxial structure located on one side of the target substrate, the epitaxial structure comprising a P-type semiconductor layer, a multi-quantum well layer, and an N-type semiconductor layer stacked in sequence in a first direction; the first direction is perpendicular to the plane where the target substrate is located, and points from the target substrate to the epitaxial structure;

[0008] The epitaxial structure on one side of one short side of the Mini-LED chip has a groove, and the groove exposes a portion of the surface of the P-type semiconductor layer;

[0009] A P electrode located in the groove and connected to the P-type semiconductor layer; an N electrode located on one side of the other short side of the Mini-LED chip and connected to the N-type semiconductor layer;

[0010] The multi-quantum well layer is a symmetrical structure based on a symmetry axis, and the symmetry axis is a line connecting the midpoints of two short sides.

[0011] Preferably, in the above-mentioned Mini-LED chip, the Mini-LED chip further includes:

[0012] N electrode fingers connected to the N electrode; the N electrode is a symmetrical structure based on the symmetry axis, and / or the N electrode fingers are a symmetrical structure based on the symmetry axis.

[0013] Preferably, in the above-mentioned Mini-LED chip, the Mini-LED chip further includes:

[0014] A P electrode finger is located in the groove and connected to the P electrode; the P electrode is a symmetrical structure based on the symmetry axis, and / or the P electrode finger is a symmetrical structure based on the symmetry axis.

[0015] Preferably, in the above-mentioned Mini-LED chip, the Mini-LED chip further includes: a P-type window layer located between the P-type semiconductor layer and the target substrate.

[0016] Preferably, in the above-mentioned Mini-LED chip, the doping concentration range of the P-type window layer is 1E18cm -3 -2E18cm -3 .

[0017] Preferably, in the above-mentioned Mini-LED chip, the Mini-LED chip further includes:

[0018] A bonding layer is located between the P-type window layer and the target substrate.

[0019] Preferably, in the above-mentioned Mini-LED chip, the Mini-LED chip further includes:

[0020] A protective layer and a DBR layer covering the epitaxial structure; the protective layer and the DBR layer expose a portion of the surface of the P electrode and a portion of the surface of the N electrode.

[0021] A second aspect of the present application provides a method for preparing a Mini-LED chip, wherein the prepared Mini-LED chip is a rectangular Mini-LED chip, and the Mini-LED chip includes two short sides arranged opposite to each other. The method for preparing the Mini-LED chip includes:

[0022] providing a temporary substrate and a target substrate;

[0023] forming an epitaxial structure on the temporary substrate, wherein the epitaxial structure comprises an N-type semiconductor layer, a multi-quantum well layer, and a P-type semiconductor layer stacked in sequence;

[0024] The target substrate and the epitaxial structure are bonded together, and the temporary substrate is removed; the epitaxial structure on the target substrate comprises a P-type semiconductor layer, a multi-quantum well layer, and an N-type semiconductor layer stacked in sequence in a first direction; the first direction is perpendicular to the plane where the target substrate is located, and points from the target substrate to the epitaxial structure;

[0025] Performing a groove processing on the epitaxial structure located on one side of one of the short sides to form a groove, wherein the groove exposes a portion of the surface of the P-type semiconductor layer;

[0026] A P electrode and an N electrode are formed; the P electrode is located in the groove and connected to the P-type semiconductor layer, and the N electrode is located on the epitaxial structure on one side of the other short side and connected to the N-type semiconductor layer; wherein the multi-quantum well layer is a symmetrical structure based on a symmetry axis, and the symmetry axis is a line connecting the midpoints of the two short sides.

[0027] A third aspect of the present application provides a display device, comprising any one of the above-mentioned Mini-LED chips.

[0028] A fourth aspect of the present application provides a lighting device, comprising any one of the above-mentioned Mini-LED chips.

[0029] By means of the above technical scheme, the present application provides a Mini-LED chip and its preparation method and related equipment, wherein a groove in the area where the P electrode is located is formed on one side of one of the short sides of the rectangular Mini-LED chip, the P electrode is located in the groove, and the N electrode is located on the epitaxial structure on the other side of the short side; that is, the position of the groove is changed from being located on one side of one of the long sides in the prior art to being located on one side of one of the short sides. Based on the adjustment of the position of the groove on the layout, a multi-quantum well layer with a symmetrical structure based on a symmetry axis can be formed when processing the epitaxial structure, and the symmetry axis is a line connecting the midpoints of the two short sides, so that the light-emitting area of ​​the Mini-LED chip is a symmetrical structure based on the symmetry axis, thereby ensuring that after the Mini-LED chip is fixed on the blue film, the symmetrical light-emitting area can have the same degree of colloidal adhesion with the blue film on both sides of the symmetry axis, thereby solving the problem of chip tilting and inverted crystal due to insufficient adhesion when the Mini-LED chip is subjected to external force facing down, and improving the customer's crystal bonding efficiency after shipment to the client. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. Throughout the accompanying drawings, the same or similar reference numerals represent the same or similar elements. It should be understood that the drawings are schematic and the originals and elements are not necessarily drawn to scale.

[0031] Figure 1 It is a schematic diagram of the layout of Mini-LED chip in the prior art;

[0032] Figure 2 A schematic diagram of a layout of a Mini-LED chip provided in an embodiment of the present invention;

[0033] Figure 3 A method for providing an embodiment of the present invention Figure 2 Schematic diagram of the cross section along the AA' direction;

[0034] Figure 4 A schematic diagram of a layout of another Mini-LED chip provided in an embodiment of the present invention;

[0035] Figure 5 A schematic diagram of a layout of another Mini-LED chip provided in an embodiment of the present invention;

[0036] Figure 6 A schematic diagram of a layout of another Mini-LED chip provided in an embodiment of the present invention;

[0037] Figure 7 A schematic diagram of a layout of another Mini-LED chip provided in an embodiment of the present invention;

[0038] Figure 8 A schematic diagram of a layout of another Mini-LED chip provided in an embodiment of the present invention;

[0039] Fig. 9 A schematic diagram of a layout of another Mini-LED chip provided in an embodiment of the present invention;

[0040] Fig.10 A schematic diagram of a layout of another Mini-LED chip provided in an embodiment of the present invention;

[0041] Fig.11 Another embodiment of the present invention provides Figure 2 Schematic diagram of the cross section along the AA' direction;

[0042] Fig.12 Another embodiment of the present invention provides a Figure 2 Schematic diagram of the cross section along the AA' direction;

[0043] Fig.13 A schematic flow chart of a method for preparing a Mini-LED chip provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0044] The embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application. The terms used in the implementation mode of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application. It is known to those skilled in the art that with the development of technology and the emergence of new scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0045] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0046] It should be noted that the directional words appearing in the present invention are based on the relative position relationship shown in the drawings and cannot be used as an absolute limitation to the present application.

[0047] refer to Figure 2 , Figure 2 A schematic diagram of a layout of a Mini-LED chip provided in an embodiment of the present invention, referring to Figure 3 , Figure 3 A method for providing an embodiment of the present invention Figure 2 The Mini-LED chip provided in the embodiment of the present invention is a rectangular Mini-LED chip, and the Mini-LED chip includes two short sides arranged opposite to each other. The Mini-LED chip provided in the embodiment of the present invention includes: a target substrate 16.

[0048] An epitaxial structure located on one side of the target substrate 16, the epitaxial structure comprising a P-type semiconductor layer 17, a multi-quantum well layer 18 and an N-type semiconductor layer 19 stacked in sequence in a first direction X; the first direction X is perpendicular to the plane where the target substrate 16 is located, and points from the target substrate 16 to the epitaxial structure.

[0049] The epitaxial structure on one side of one short side of the Mini-LED chip has a groove 15 , and the groove 15 exposes a portion of the surface of the P-type semiconductor layer 17 .

[0050] A P electrode 11 located in the groove 15 and connected to the P-type semiconductor layer 17 ; and an N electrode 13 located on one side of the other short side of the Mini-LED chip and connected to the N-type semiconductor layer 19 .

[0051] The multi-quantum well layer 18 is a symmetrical structure based on a symmetry axis M, and the symmetry axis M is a line connecting the midpoints of two short sides.

[0052] Specifically, in the embodiment of the present invention, the target substrate 16 includes but is not limited to a sapphire substrate, and the target substrate 16 is only described as a sapphire substrate, and the N-type semiconductor layer 19 is an N-type doped semiconductor layer, and the P-type semiconductor layer 17 is a P-type doped semiconductor layer. For example, the N-type semiconductor layer 19 may be an N-type doped GaN layer, and the P-type semiconductor layer 17 may be a P-type doped GaN layer. It should be noted that in the embodiment of the present invention, only the GaN layer is used as an example of the semiconductor layer, and it is obvious that the semiconductor layer can also be a semiconductor layer of other semiconductor materials.

[0053] Among them, the core structure of the Mini-LED chip is a PN junction. When a forward bias is applied to the PN junction, electrons flow from the N-type region to the P-type region, and holes flow from the P-type region to the N-type region. These carriers recombine near the PN junction, release energy and generate photons to emit light. The multi-quantum well layer 18 is a key structure in the Micro-LED chip, and its function is to improve the recombination efficiency and luminescence efficiency of carriers. The multi-quantum well layer 18 is composed of multiple quantum wells (Quantum Well, referred to as QW) and quantum barriers (Quantum Barrier, referred to as QB) alternating. Usually, the bandgap width of the quantum well is smaller than the bandgap width of the quantum barrier, which causes electrons and holes to be confined in the quantum well under the action of an external electric field, thereby increasing the recombination probability of electrons and holes, and thus improving the luminescence efficiency.

[0054] The Mini-LED chip provided by the embodiment of the present invention forms a groove 15 in the area where the P electrode 11 is located on one side of one short side of the rectangular Mini-LED chip, the P electrode 11 is located in the groove 15, and the N electrode 13 is located on the epitaxial structure on the other short side. Figure 1 and Figure 2 As shown, the position of the groove 15 is changed from being located on one side of one of the long sides in the prior art to being located on one side of one of the short sides. Based on the adjustment of the position of the groove 15 on the layout, a multi-quantum well layer 18 with a symmetrical structure based on the symmetry axis M can be formed when processing the epitaxial structure, so that the light-emitting area K1 of the Mini-LED chip is a symmetrical structure based on the symmetry axis M, thereby ensuring that after the Mini-LED chip is fixed on the blue film, the symmetrical light-emitting area K1 can have the same degree of colloidal adhesion with the blue film on both sides of the symmetry axis M, solving the problem of the Mini-LED chip tilting and inverted crystal due to insufficient adhesion when the front side of the chip is subjected to external force, and improving the customer's crystal bonding efficiency after shipment to the client.

[0055] Furthermore, based on the technical solution of the present application, the position of the groove 15 is changed from being located on one side of one of the long sides in the prior art to being located on one side of one of the short sides, and the area of ​​the etched multi-quantum well layer 18 will be reduced, thereby achieving the purpose of increasing the area of ​​the light-emitting area and increasing the brightness.

[0056] Optionally, the groove 15 can also be designed as a symmetrical structure based on the symmetry axis M, so as to improve the symmetry of the Mini-LED chip based on the symmetry axis M and reduce the probability of the Mini-LED chip tilting or flipping when it is facing downward and subjected to external force.

[0057] In an optional embodiment of the present invention, reference Figure 4 , Figure 4 A schematic diagram of another Mini-LED chip layout provided in an embodiment of the present invention, referring to Figure 5 , Figure 5 A schematic diagram of a layout of another Mini-LED chip provided in an embodiment of the present invention, referring to Figure 6 , Figure 6 A schematic diagram of a layout of another Mini-LED chip provided in an embodiment of the present invention, referring to Figure 7 , Figure 7 A schematic diagram of a layout of another Mini-LED chip provided in an embodiment of the present invention, referring to Figure 8 , Figure 8 A schematic diagram of a layout of another Mini-LED chip provided in an embodiment of the present invention. The Mini-LED chip provided in an embodiment of the present invention further includes:

[0058] The N electrode finger 14 is connected to the N electrode 13 ; the N electrode 13 is a symmetrical structure based on the symmetry axis M, and / or the N electrode finger 14 is a symmetrical structure based on the symmetry axis M.

[0059] Specifically, in the embodiment of the present invention, the Mini-LED chip is not provided with a P electrode finger 12, but only with an N electrode finger 14 connected to the N electrode 13. The N electrode 13 is a symmetrical structure based on the symmetry axis M, and / or the N electrode finger 14 is a symmetrical structure based on the symmetry axis M, thereby further improving the symmetry of the Mini-LED chip based on the symmetry axis M, and reducing the probability of tilting and inverting of the Mini-LED chip when the front side is facing down and subjected to external force. In the embodiment of the present invention, by providing the N electrode finger 14, the current expansion capability at the N electrode 13 can be improved, thereby improving the luminous performance of the Mini-LED chip.

[0060] It should be noted that the pattern of the N electrode finger 14 can also be other symmetrical patterns based on the symmetry axis M. In the embodiment of the present invention, only the symmetric pattern M is used. Figure 4-Figure 8 The figure shown is used as an example for explanation.

[0061] In an optional embodiment of the present invention, reference Fig. 9 , Fig. 9 A schematic diagram of a layout of another Mini-LED chip provided in an embodiment of the present invention, referring to Fig.10 , Fig.10 A schematic diagram of a layout of another Mini-LED chip provided in an embodiment of the present invention. The Mini-LED chip provided in an embodiment of the present invention further includes:

[0062] A P electrode finger 12 is located in the groove 15 and connected to the P electrode 11; the P electrode 11 is a symmetrical structure based on the symmetry axis M, and / or the P electrode finger 12 is a symmetrical structure based on the symmetry axis M.

[0063] Specifically, in the embodiment of the present invention, the Mini-LED chip is provided with a P electrode finger 12 connected to the P electrode 11, and an N electrode finger 14 connected to the N electrode 13. The N electrode 13 is a symmetrical structure based on the symmetry axis M, and / or the N electrode finger 14 is a symmetrical structure based on the symmetry axis M; the P electrode 11 is a symmetrical structure based on the symmetry axis M, and / or the P electrode finger 12 is a symmetrical structure based on the symmetry axis M, thereby further improving the symmetry of the Mini-LED chip based on the symmetry axis M, and reducing the probability of tilting and inverting of the Mini-LED chip when the front side is facing down and subjected to external force. In the embodiment of the present invention, the current expansion capability at the N electrode 13 can be improved by setting the N electrode finger 14, and the current expansion capability at the P electrode 11 can be improved by setting the P electrode finger 12, thereby maximizing the luminous performance of the Mini-LED chip.

[0064] In an optional embodiment of the present invention, reference Fig.11 , Fig.11 Another embodiment of the present invention provides Figure 2 The Mini-LED chip provided by the embodiment of the present invention also includes:

[0065] A P-type window layer 20 is located between the P-type semiconductor layer 17 and the target substrate 16 .

[0066] Specifically, in the embodiment of the present invention, the P-type window layer 20 includes but is not limited to a P-type GaP window layer. To ensure good current expansion on the P-side, the doping concentration range of the P-type window layer 20 is set to 1E18 cm -3 -2E18cm -3 , thereby improving the luminous performance of the Mini-LED chip.

[0067] It should be noted that Fig.11 As shown, when the Mini-LED chip includes a P-type window layer 20 , the groove 15 exposes a portion of the surface of the P-type window layer 20 , and the P electrode 11 contacts the exposed P-type window layer 20 .

[0068] In an optional embodiment of the present invention, Fig.11 As shown, the Mini-LED chip provided in the embodiment of the present invention further includes:

[0069] A bonding layer 21 is located between the P-type window layer 20 and the target substrate 16 .

[0070] Specifically, in the embodiment of the present invention, the bonding layer 21 includes but is not limited to an oxide bonding layer, for example, the bonding layer 21 can be a SiO2 bonding layer. It should be noted that the contact surface between the bonding layer 21 and the P-type window layer 20 is a roughened surface to improve the adhesion between the bonding layer 21 and the P-type window layer 20, thereby improving the structural stability of the Mini-LED chip.

[0071] For example, in the process of preparing Mini-LED chips, acetone, isopropyl alcohol, deionized water, etc. are used to clean the surface of the epitaxial structure, and the surface of the P-type GaP window layer is roughened with a Gap roughening liquid, so that when the SiO2 bonding layer is deposited later, the SiO2 bonding layer and the P-type GaP window layer will have better adhesion.

[0072] In an optional embodiment of the present invention, reference Fig.12 , Fig.12 Another embodiment of the present invention provides a Figure 2 The Mini-LED chip provided by the embodiment of the present invention also includes:

[0073] A protective layer 22 and a DBR layer 23 covering the epitaxial structure; the protective layer 22 and the DBR layer 23 expose a portion of the surface of the P electrode 11 and a portion of the surface of the N electrode 13 .

[0074] Specifically, in the embodiment of the present invention, the protective layer 22 is also referred to as a PV layer in the field, which realizes passivation protection of the epitaxial structure. The protective layer 22 includes but is not limited to a multi-layer stacked structure of Al2O3 / SiO2. In addition, the DBR (Distributed Bragg Reflector) layer 23 is provided to make the light emitted from one side of the sapphire substrate as much as possible, thereby improving the luminous performance of the Mini-LED chip.

[0075] Based on the above embodiment of the present invention, another embodiment of the present invention further provides a method for preparing a Mini-LED chip, wherein the prepared Mini-LED chip is a rectangular Mini-LED chip, and the Mini-LED chip includes two short sides arranged opposite to each other, Fig.13 , Fig.13 A schematic diagram of a process for preparing a Mini-LED chip provided in an embodiment of the present invention. The process for preparing a Mini-LED chip provided in an embodiment of the present invention comprises:

[0076] S101: providing a temporary substrate and a target substrate 16 .

[0077] S102: forming an epitaxial structure on the temporary substrate, wherein the epitaxial structure comprises an N-type semiconductor layer 19, a multi-quantum well layer 18 and a P-type semiconductor layer 17 which are stacked in sequence.

[0078] S103: Bonding the target substrate 16 to the epitaxial structure, and removing the temporary substrate; the epitaxial structure on the target substrate 16 includes a P-type semiconductor layer 17, a multi-quantum well layer 18, and an N-type semiconductor layer 19 stacked in sequence in a first direction X; the first direction X is perpendicular to the plane where the target substrate 16 is located, and points from the target substrate 16 to the epitaxial structure.

[0079] S104 : performing a groove process on the epitaxial structure located on one side of one of the short sides to form a groove 15 , wherein the groove 15 exposes a portion of the surface of the P-type semiconductor layer 17 .

[0080] S105: forming a P electrode 11 and an N electrode 13; the P electrode 11 is located in the groove 15 and connected to the P-type semiconductor layer 17, and the N electrode 13 is located on the epitaxial structure on one side of the other short side and connected to the N-type semiconductor layer 19; wherein the multi-quantum well layer 18 is a symmetrical structure based on a symmetry axis M, and the symmetry axis M is a line connecting the midpoints of the two short sides.

[0081] The Mini-LED chip prepared by the embodiment of the present invention forms a groove 15 in the area where the P electrode 11 is located on one side of one of the short sides of the rectangular Mini-LED chip, the P electrode 11 is located in the groove 15, and the N electrode 13 is located on the epitaxial structure on the other side of the short side; that is, the position of the groove 15 is changed from being located on one side of one of the long sides in the prior art to being located on one side of one of the short sides. Based on the adjustment of the position of the groove 15 on the layout, a multi-quantum well layer 18 with a symmetrical structure based on the symmetry axis M can be formed when processing the epitaxial structure, so that the light-emitting area K1 of the Mini-LED chip is a symmetrical structure based on the symmetry axis M, thereby ensuring that after the Mini-LED chip is fixed on the blue film, the symmetrical light-emitting area K1 can have the same degree of colloidal adhesion with the blue film at both sides of the symmetry axis M, solving the problem of chip tilting and inverted crystal due to insufficient adhesion when the Mini-LED chip is facing down and subjected to external force, and improving the customer's crystal bonding efficiency after shipment to the customer.

[0082] Based on the above embodiments of the present invention, another embodiment of the present invention further provides a display device, wherein the display device includes the Mini-LED chip described in any of the above embodiments. The display device includes but is not limited to a display device such as a liquid crystal display screen.

[0083] Based on the above embodiments of the present invention, another embodiment of the present invention further provides a lighting device, the lighting device includes the Mini-LED chip described in any of the above embodiments. The lighting device includes but is not limited to lighting devices such as lighting fixtures.

[0084] The Mini-LED chip, preparation method and related equipment provided by the present invention are introduced in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method and core idea of ​​the present invention. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as limiting the present invention.

[0085] It should be noted that each embodiment of the present specification focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referenced to each other.

[0086] It should also be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device that includes a series of elements is inherent to the elements, or also includes elements inherent to these processes, methods, articles or devices. In the absence of further restrictions, the elements defined by the sentence "including a..." do not exclude the presence of other identical elements in the process, method, article or device that includes the elements.

[0087] The above description of the disclosed embodiments enables one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A Mini-LED chip, characterized in that: The Mini-LED chip is a rectangular Mini-LED chip, and the Mini-LED chip includes two short sides arranged opposite to each other. The Mini-LED chip includes: target substrate; An epitaxial structure located on one side of the target substrate, the epitaxial structure comprising a P-type semiconductor layer, a multi-quantum well layer, and an N-type semiconductor layer stacked in sequence in a first direction; the first direction is perpendicular to the plane where the target substrate is located, and points from the target substrate to the epitaxial structure; The epitaxial structure on one side of one short side of the Mini-LED chip has a groove, and the groove exposes a portion of the surface of the P-type semiconductor layer; A P electrode located in the groove and connected to the P-type semiconductor layer; an N electrode located on one side of the other short side of the Mini-LED chip and connected to the N-type semiconductor layer; The multi-quantum well layer is a symmetrical structure based on a symmetry axis, and the symmetry axis is a line connecting the midpoints of two short sides.

2. The Mini-LED chip according to claim 1, characterized in that: The Mini-LED chip further includes: N electrode fingers connected to the N electrode; the N electrode is a symmetrical structure based on the symmetry axis, and / or the N electrode fingers are a symmetrical structure based on the symmetry axis.

3. The Mini-LED chip according to claim 2, characterized in that: The Mini-LED chip further includes: A P electrode finger is located in the groove and connected to the P electrode; the P electrode is a symmetrical structure based on the symmetry axis, and / or the P electrode finger is a symmetrical structure based on the symmetry axis.

4. The Mini-LED chip according to claim 1, characterized in that: The Mini-LED chip further includes: A P-type window layer is located between the P-type semiconductor layer and the target substrate.

5. The Mini-LED chip according to claim 4, characterized in that: The doping concentration range of the P-type window layer is 1E18cm -3 -2E18cm -3 .

6. The Mini-LED chip according to claim 4, characterized in that: The Mini-LED chip further includes: A bonding layer is located between the P-type window layer and the target substrate.

7. The Mini-LED chip according to any one of claims 1 to 6, characterized in that: The Mini-LED chip further includes: A protective layer and a DBR layer covering the epitaxial structure; the protective layer and the DBR layer expose a portion of the surface of the P electrode and a portion of the surface of the N electrode.

8. A method for preparing a Mini-LED chip, characterized in that: The prepared Mini-LED chip is a rectangular Mini-LED chip, and the Mini-LED chip includes two short sides arranged opposite to each other. The preparation method of the Mini-LED chip includes: providing a temporary substrate and a target substrate; forming an epitaxial structure on the temporary substrate, wherein the epitaxial structure comprises an N-type semiconductor layer, a multi-quantum well layer, and a P-type semiconductor layer stacked in sequence; The target substrate and the epitaxial structure are bonded together, and the temporary substrate is removed; the epitaxial structure on the target substrate comprises a P-type semiconductor layer, a multi-quantum well layer, and an N-type semiconductor layer stacked in sequence in a first direction; the first direction is perpendicular to the plane where the target substrate is located, and points from the target substrate to the epitaxial structure; Performing a groove processing on the epitaxial structure located on one side of one of the short sides to form a groove, wherein the groove exposes a portion of the surface of the P-type semiconductor layer; A P electrode and an N electrode are formed; the P electrode is located in the groove and connected to the P-type semiconductor layer, and the N electrode is located on the epitaxial structure on one side of the other short side and connected to the N-type semiconductor layer; wherein the multi-quantum well layer is a symmetrical structure based on a symmetry axis, and the symmetry axis is a line connecting the midpoints of the two short sides.

9. A display device, characterized in that: The display device comprises the Mini-LED chip according to any one of claims 1 to 7.

10. A lighting device, characterized in that: The lighting device comprises the Mini-LED chip according to any one of claims 1 to 7.

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