A display panel and display device

Abstract

The application discloses a display panel and a display device, and relates to the technical field of display panels, and discloses a display panel and a display device, which comprises an array substrate, wherein the array substrate comprises a display area and a non-display area; the non-display area surrounds at least part of the display area; the display area of the array substrate is provided with a light-emitting structure layer; and the non-display area of the array substrate comprises a shielding ring which surrounds at least part of the display area. The application can shield static electricity outside a screen body, and improve the reliability of the display panel.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel and a display device. BACKGROUND

[0002] With the development of display technology, people have higher and higher requirements for display panels. However, the existing display panel has poor reliability. SUMMARY

[0003] The present application provides a display panel and a display device, which can shield static electricity outside the screen body and improve the reliability of the display panel.

[0004] According to an aspect of the present application, a display panel is provided, comprising:

[0005] An array substrate, the array substrate comprising a display area and a non-display area; the non-display area surrounds at least part of the display area;

[0006] The display area of the array substrate is provided with a light-emitting structure layer; the non-display area of the array substrate comprises a shielding ring, and the shielding ring surrounds at least part of the display area.

[0007] Optionally, the shielding ring is at least two,

[0008] Optionally, the at least two shielding rings are arranged at intervals in a direction from the display area to the non-display area,

[0009] In the direction from the display area to the non-display area, the spacing between adjacent shielding rings is greater than or equal to 1 μm;

[0010] Optionally, in the direction from the display area to the non-display area, the width of each shielding ring is greater than or equal to 2 μm and less than or equal to 3 μm;

[0011] Optionally, at least part of the shielding rings are arranged in different layers;

[0012] Optionally, the shielding ring comprises a first shielding ring and a second shielding ring, and the first shielding ring and the second shielding ring are arranged alternately in the direction from the display area to the non-display area, and the first shielding ring and the second shielding ring are arranged in different layers.

[0013] Optionally, the shielding ring is connected to a direct current voltage or a power supply voltage;

[0014] Optionally, the material of the shielding ring comprises metal;

[0015] Optionally, the array substrate comprises a circuit layer, the circuit layer comprises a plurality of metal layers, and the shielding ring is arranged in the same layer as at least one metal layer of the plurality of metal layers;

[0016] Optionally, the material of the shielding ring comprises at least one of molybdenum, titanium and aluminum.

[0017] Optionally, the array substrate comprises a first circuit layer and a second circuit layer, the first circuit layer is arranged on a side of the second circuit layer away from the light-emitting structure layer, the first circuit layer comprises a shift register circuit and / or an auxiliary circuit, the second circuit layer comprises a pixel driving circuit, and the auxiliary circuit comprises at least one of a multiplexing circuit, a test circuit, a crack detection circuit and an electrostatic protection circuit;

[0018] The shift register circuit and / or the auxiliary circuit are located in the display area.

[0019] Optionally, the non-display area of the array substrate further comprises at least three dams, the dams are located on a side of the second circuit layer away from the first circuit layer; in a direction from the display area to the non-display area, the at least three dams are arranged in sequence and are arranged at intervals.

[0020] Optionally, the light-emitting structure layer comprises a plurality of light-emitting structures, the pixel driving circuit is electrically connected with the light-emitting structures, and the pixel driving circuit is configured to drive the light-emitting structures to emit light; the shift register circuit is electrically connected with the pixel driving circuit through a via hole.

[0021] Optionally, the array substrate comprises a substrate, the first circuit layer, the second circuit layer and the light-emitting structure layer are located on the substrate and are arranged in sequence away from the substrate.

[0022] Optionally, a normal projection of the auxiliary circuit on the substrate overlaps a normal projection of the light-emitting structure layer on the substrate.

[0023] Optionally, the test circuit comprises a point screen test circuit.

[0024] Optionally, the second circuit layer comprises a data line, and the auxiliary circuit is connected with the data line.

[0025] Optionally, the auxiliary circuit is connected with the pixel driving circuit through the data line.

[0026] Optionally, at least part of a film layer in which the dam is located is located on a side of a film layer in which the shielding ring is located away from the substrate.

[0027] Optionally, a normal projection of the shielding ring on the substrate overlaps a normal projection of the dam on the substrate, and / or at least part of the normal projection of the shielding ring on the substrate is located between normal projections of adjacent dams on the substrate.

[0028] Optionally, the height of each dam is the same.

[0029] Optionally, the spacing between adjacent dams is equal.

[0030] Optionally, the spacing between adjacent dams is greater than or equal to 10 μm.

[0031] Optionally, the display panel further comprises:

[0032] a packaging layer, the packaging layer is arranged on a side of the light-emitting structure layer away from the first circuit layer;

[0033] The packaging layer comprises at least two inorganic layers and at least one organic layer arranged in a stack, and an organic layer is arranged between each two adjacent inorganic layers;

[0034] The at least two inorganic layers extend from the display area to the non-display area, and are arranged in contact with each other on a side of the dam away from the substrate and in a preset area, wherein the preset area is a non-display area on a side of the dam away from the display area, and the width of the preset area is greater than or equal to 90 μm and less than or equal to 130 μm in a direction from the display area to the non-display area;

[0035] Optionally, the boundary of the organic layer is located on a side of the dam away from the display area and close to the display area.

[0036] Optionally, the first circuit layer comprises a first conductive layer, a second conductive layer and a third conductive layer arranged in a stack; the first conductive layer is arranged on a side of the second conductive layer away from the third conductive layer;

[0037] Optionally, the first conductive layer is a first gate conductive layer, the second conductive layer is a capacitor plate layer, and the third conductive layer is a signal line layer.

[0038] Optionally, the shielding ring is arranged in the same layer as at least one conductive layer in the first circuit layer and the second circuit layer.

[0039] Optionally, the display area comprises a first edge area, a second edge area and a third edge area.

[0040] The first edge area and the second edge area are arranged opposite to each other in the first direction, the third edge area is adjacent to the first edge area, and the third edge area is adjacent to the second edge area.

[0041] The shift register circuit is arranged in the first edge area and the second edge area.

[0042] The auxiliary circuit is arranged in the third edge area.

[0043] Optionally, the second circuit layer comprises a gate line, the shift register circuit is connected to the pixel driving circuit through the gate line, and the gate line extends in the first direction.

[0044] Optionally, the shielding ring is electrically connected to the electrostatic protection circuit, or the second circuit layer comprises a power supply line, the power supply line is electrically connected to the light-emitting structure layer, and the shielding ring is electrically connected to the power supply line.

[0045] According to another aspect of the present application, a display panel is provided, comprising:

[0046] The array substrate comprises a display area and a non-display area; the array substrate comprises a first circuit layer, and the first circuit layer comprises auxiliary circuits, wherein the auxiliary circuits comprise at least one of a multiplexing circuit, a point screen test circuit, a crack detection circuit and an electrostatic protection circuit; and the auxiliary circuits are located in the display area.

[0047] The display area of the array substrate is provided with a light-emitting structure layer. According to another aspect of the present application, a display device is provided, comprising the display panel provided by any of the embodiments of the present application.

[0048] The display panel provided by the technical scheme of the embodiment of the present application comprises an array substrate; the array substrate comprises a display area and a non-display area; the non-display area surrounds at least part of the display area; the display area of the array substrate is provided with a light-emitting structure layer; and the non-display area of the array substrate comprises a shielding ring, which surrounds at least part of the display area. By arranging the shielding ring in the non-display area, when static electricity is generated at the edge of the display panel, the shielding ring can shield the static electricity outside the screen body, so that the electrostatic protection capability of the display panel can be improved, thereby improving the reliability of the display panel.

[0049] It should be understood that the content described in this part is not intended to identify key or important features of the embodiments of the present application, nor is it used to limit the scope of the present application. Other features of the present application will become apparent through the following description. BRIEF DESCRIPTION OF DRAWINGS

[0050] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0051] Figure 1 is a schematic diagram of a display panel provided by an embodiment of the present application.

[0052] Figure 2 is Figure 1 is a schematic diagram of a cross-sectional structure along the cross-sectional line BB.

[0053] Figure 3 is a schematic diagram of a cross-sectional structure of another display panel provided by an embodiment of the present application.

[0054] Figure 4 is a schematic diagram of a cross-sectional structure of another display panel provided by an embodiment of the present application.

[0055] Figure 5 is a schematic diagram of another display panel provided by an embodiment of the present application. DETAILED DESCRIPTION

[0056] In order to better understand the technical scheme of the present application, the technical scheme in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts should fall within the scope of the present application.

[0057] It should be noted that the terms "first", "second" and the like in the present application are used to distinguish similar objects, and do not necessarily indicate a specific order or a chronological sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "comprise" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device comprising a series of steps or units does not have to be limited to only those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0058] The present application provides a display panel, Figure 1 is a structural schematic diagram of a display panel provided by the present application, Figure 2 is Figure 1 is a schematic diagram of a cross-sectional structure along the cross-sectional line BB, referring to Figures 1-2 The display panel comprises an array substrate 10, the array substrate 10 comprises a display area AA and a non-display area NA; the non-display area NA surrounds at least part of the display area AA; for example, the non-display area NA surrounds the display area AA; the display area AA of the array substrate 10 is provided with a light-emitting structure layer 40; the non-display area NA of the array substrate 10 comprises a shielding ring 60, the shielding ring 60 surrounds at least part of the display area, for example, the shielding ring 60 surrounds the display area.

[0059] The display area AA is used for displaying a picture. The array substrate 10 can comprise a circuit layer, the circuit layer comprises a plurality of pixel driving circuits. The light-emitting structure layer 40 comprises a plurality of light-emitting structures, for example, each pixel driving circuit corresponds to a light-emitting structure, the pixel driving circuit is used for sending a driving signal to the light-emitting structure to drive the light-emitting structure to emit light. The shielding ring 60 can be used for static electricity release, and / or can shield static electricity to improve the static electricity protection capability of the display panel. For example, the shielding ring 60 is at least two, the at least two shielding rings 60 are arranged at intervals along the direction from the display area AA to the non-display area NA.

[0060] The non-display area NA of the array substrate 10 comprises at least two shielding rings 60, the material of the shielding ring 60 can be a conductive material, for example, a metal material or a metal oxide material, the materials of the at least two shielding rings 60 can be the same or different, the at least two shielding rings 60 can be arranged in the same layer or different layers; the two adjacent shielding rings 60 can form a capacitor, the two adjacent shielding rings 60 correspond to two plates of the capacitor, and the electric field intensity generated by the two plates under the action of static electricity is equal in size and opposite in direction to the electric field intensity generated by static electricity, the electric field intensity inside the capacitor is zero, which corresponds to shielding external static electricity, and the static protection capability of the display panel can be improved; the shielding ring 60 is arranged in the non-display area NA, when static electricity is generated at the edge of the display panel, the external static electricity of the screen body can be shielded by the shielding ring 60, and the static protection capability of the display panel can be improved, thereby improving the reliability of the display panel. The shielding ring 60 can be a closed ring or a non-closed ring. The shielding ring 60 can be a ring, for example, a rectangular ring or a circular ring. The closed ring corresponds to no notch. The non-closed ring corresponds to a notch.

[0061] The display panel provided by the technical scheme of the embodiment of the application comprises an array substrate 10; the array substrate 10 comprises a display area AA and a non-display area NA; the non-display area NA surrounds at least part of the display area AA; the display area of the array substrate 10 is provided with a light-emitting structure layer 40; and the non-display area NA of the array substrate 10 comprises a shielding ring 60, and the shielding ring 60 surrounds at least part of the display area. By arranging the shielding ring 60 in the non-display area NA, when static electricity is generated at the edge of the display panel, the external static electricity of the screen body can be shielded by the shielding ring 60, the static protection capability of the display panel can be improved, and the reliability of the display panel can be improved.

[0062] Optionally, referring to Figure 2 , the distance between the two adjacent shielding rings 60 in the direction from the display area AA to the non-display area NA is greater than or equal to 1 μm.

[0063] The distance between the two adjacent shielding rings 60 in the direction from the display area AA to the non-display area NA can be 1 μm, 1.5 μm or 2 μm, etc. If the distance between the two adjacent shielding rings 60 in the direction from the display area AA to the non-display area NA is less than 1 μm, the process is difficult and the device is easily broken down, which affects the protection capability of the device. By setting the distance between the two adjacent shielding rings 60 in the direction from the display area AA to the non-display area NA to be greater than or equal to 1 μm, the process is simple and the shielding capability is strong, thereby improving the reliability of the display panel.

[0064] Optionally, referring to Figure 2 , the width of each shielding ring 60 in the direction from the display area AA to the non-display area NA is greater than or equal to 2 μm and less than or equal to 3 μm.

[0065] The width of each shielding ring 60 can be 2 μm, 2.2 μm, 2.5 μm, 2.7 μm, or 3 μm, etc. The width of each shielding ring 60 is 2-3 μm in the direction from the display area AA to the non-display area NA, so that the width of the non-display area NV occupied by each shielding ring is reduced, and thus a plurality of shielding rings 60 can be arranged in the non-display area NV. The two adjacent shielding rings 60 can form a capacitor, thereby forming a plurality of capacitors, improving the electrostatic shielding capability, and thus the reliability of the display panel can be improved.

[0066] Optionally, referring to Figure 2 At least part of the shielding rings 60 are arranged in different layers.

[0067] At least part of the shielding rings 60 are arranged in different layers. For example, part of the shielding rings 60 are arranged in a first film layer, and part of the shielding rings 60 are arranged in a second film layer. The vertical projection of the shielding rings 60 in the first film layer on the second film layer at least partially overlaps the vertical projection of the shielding rings 60 in the second film layer, or the vertical projection of the shielding rings 60 in the first film layer on the second film layer does not overlap the vertical projection of the shielding rings 60 in the second film layer. The spacing of the shielding rings 60 in different layers can be set to be small, or the facing area of the shielding rings 60 in different layers can be designed to be large, thereby forming a large capacitor and improving the electrostatic shielding capability of the shielding rings 60. While ensuring the electrostatic shielding capability, the width of the non-display area NV occupied by the shielding rings 60 is reduced, so that a plurality of shielding rings 60 can be arranged in the non-display area NV, a plurality of capacitors are formed, the electrostatic shielding capability of the display panel is improved, and the reliability of the display panel is improved.

[0068] Optionally, referring to Figure 2 The shielding ring 60 includes a first shielding ring 61 and a second shielding ring 62. The first shielding ring 61 and the second shielding ring 62 are arranged alternately in sequence in the direction from the display area AA to the non-display area NA. The first shielding ring 61 and the second shielding ring 62 are arranged in different layers. The first shielding ring 61 can be one or more. The second shielding ring 62 can be one or more.

[0069] The first shielding ring 61 and the second shielding ring 62 can form two plates of a capacitor, the electric field intensity generated by the two plates under the action of static electricity is equal in size and opposite in direction to the electric field intensity generated by static electricity, the electric field intensity inside the capacitor is zero, which is equivalent to shielding external static electricity, and the static protection capability of the display panel can be improved; the first shielding ring 61 and the second shielding ring 62 are arranged in different layers, the spacing of the shielding rings 60 in different layers is small, or the opposite area of the shielding rings 60 in different layers is large, so that a larger capacitor is formed, the electric shielding capability of the shielding ring 60 is improved, the width of the non-display area NA is reduced while ensuring the static shielding capability, so that multiple shielding rings 60 can be arranged in the non-display area NA to form multiple capacitors, and the reliability of the display panel is improved.

[0070] Optionally, referring to Figure 2 The shielding ring 60 is connected to a direct current voltage or a power supply voltage.

[0071] The shielding ring 60 is connected to a direct current voltage or a power supply voltage, and the direct current voltage or the power supply voltage can make the shielding ring 60 in a relatively stable potential state, so that the shielding ring 60 has higher static voltage resistance capability. When subjected to a strong static shock, the shielding ring 60 can withstand a higher static voltage without being punctured, thereby providing a discharge path for static electricity and improving the static protection capability of the display panel. The shielding ring 60 can be connected to a power supply line or an initialization signal line. The power supply line or the initialization signal line can be connected to a pixel driving circuit.

[0072] Optionally, referring to Figure 2 The material of the shielding ring 60 includes metal.

[0073] The material of the shielding ring 60 includes metal, and the metal material has strong conductivity, which can facilitate the formation of an electric field opposite to the direction of the static electric field to achieve the effect of static shielding.

[0074] Optionally, referring to Figure 2 The array substrate 10 includes a circuit layer, the circuit layer includes a plurality of conductive layers, and the shielding ring 60 is arranged in the same layer as at least one of the plurality of conductive layers.

[0075] For example, the circuit layer includes a plurality of metal layers, and the shielding ring 60 is arranged in the same layer as at least one of the plurality of metal layers.

[0076] The shielding ring 60 is arranged in the same layer as at least one of the plurality of metal layers, without the need to add a film layer for the shielding ring 60 or to change the thickness of the display panel, so that the display panel has a small thickness, and the shielding ring 60 can be prepared in the same process as the metal layer, thereby reducing the process cost.

[0077] Optionally, referring to Figure 2The material of the shielding ring 60 includes at least one of molybdenum, titanium and aluminum.

[0078] The molybdenum, titanium and aluminum material has good electric conductivity, is mature in process and simple to prepare. For example, the material of the shielding ring 60 can be molybdenum or titanium-aluminum-titanium.

[0079] Optionally, Figure 3 is another schematic diagram of a cross section structure of a display panel provided by an embodiment of the present application, referring to Figure 3 The array substrate 10 includes a first circuit layer 20 and / or a second circuit layer 30. The first circuit layer 20 is arranged on a side of the second circuit layer 30 away from the light-emitting structure layer 40. The first circuit layer 20 includes a shift register circuit 201 and / or an auxiliary circuit. The second circuit layer 30 includes a pixel driving circuit 31. The auxiliary circuit includes at least one of a multiplexing circuit, a test circuit, a crack detection circuit and an electrostatic protection circuit. The shift register circuit 201 and / or the auxiliary circuit are located in the display area AA.

[0080] For example, the non-display area NA of the array substrate 10 further includes a dam 70. Optionally, at least part of a film layer where the dam 70 is located is located on a side of a film layer where the shielding ring 60 is located away from the substrate 80. For example, the dam 70 is located on a side of the first circuit layer 20 away from the substrate 80.

[0081] For example, the non-display area NA of the array substrate 10 further includes a plurality of or at least three dams 70. The dams 70 are located on a side of the second circuit layer 30 away from the first circuit layer 20. In a direction from the display area AA to the non-display area NA, the at least three dams 70 are arranged in sequence and are spaced apart.

[0082] The shift register circuit 201 is used to send a scanning signal and a light-emitting control signal to the pixel driving circuit. The auxiliary circuit includes one or more of a multiplexing circuit (Demux circuit), a test circuit (CT circuit), a crack detection circuit (PCD circuit) and an electrostatic protection circuit (ESD circuit). The multiplexing circuit can reduce the number of fanout lines, reduce the width of the frame, improve the screen-to-body ratio of the display panel, and / or reduce the number of data output ports of the driving chip, thereby reducing the cost of the driving chip. The test circuit is used to test the display panel before the display panel is bound with the driving chip after the display panel is shipped. The crack detection circuit is used to detect whether a crack appears on the edge of the display panel. The electrostatic protection circuit is used for electrostatic discharge, thereby improving the anti-ability of the display panel. For example, the auxiliary circuit is connected with the driving chip.

[0083] For example, the dam 70 is located in the non-display area NA and is located on a side of the second circuit layer 30 away from the first circuit layer 20.

[0084] For example, the orthogonal projection of the dam 70 on the substrate 80 overlaps with the orthogonal projection of the shielding ring 60 on the substrate 80, or the orthogonal projection of the dam 70 on the substrate 80 partially overlaps with the orthogonal projection of the shielding ring 60 on the substrate 80, and / or at least part of the orthogonal projection of the shielding ring 60 on the substrate 80 is located between the gaps between the orthogonal projections of the adjacent dams 70 on the substrate 80.

[0085] In some other embodiments, the auxiliary circuit and the pixel driving circuit 31 are located in the same circuit layer, for example, the first circuit layer.

[0086] In some other embodiments, the shift register circuit 201, the auxiliary circuit and the pixel driving circuit 31 are located in the same circuit layer, for example, the first circuit layer.

[0087] In the related technical solutions, the shift register circuit 21 is usually designed in the non-display area on the left and right sides of the display area AA, occupying a large screen space; the fan-out line of the auxiliary circuit occupies a large wiring space, and the shift register circuit 201 is mainly designed by the metal layer of the pixel driving circuit for wiring design and is connected with the display area AA; the auxiliary circuit is mainly designed by the metal layer of the pixel driving circuit for wiring design and is connected with the driving chip IC. In the embodiments of the present application, the shift register circuit 201 and the auxiliary circuit are arranged in the first circuit layer 20, so that the shift register circuit 201 and the auxiliary circuit are located in the display area AA, and the area of the non-display area NA left free can be provided with at least three dams 70. The dam 70 effectively reduces the risk of ink overflow during organic layer packaging of the display area AA, and at least three dams 70 can reduce the flow rate of the ink during organic layer packaging, avoid affecting the packaging effect, and can further improve the packaging reliability.

[0088] Optionally, referring to Figure 3 The light-emitting structure layer 40 includes a plurality of light-emitting structures, the pixel driving circuit is electrically connected with the light-emitting structure, and the pixel driving circuit is used for driving the light-emitting structure to emit light; and the shift register circuit 201 is electrically connected with the pixel driving circuit 31 through the via hole.

[0089] The light-emitting structure can include light-emitting structures of multiple colors, and the light-emitting structure can be a red light-emitting structure, a green light-emitting structure or a blue light-emitting structure. The pixel driving circuit is electrically connected with the light-emitting structure, and the pixel driving circuit is used for driving the light-emitting structure to emit light. The shift register circuit 201 is electrically connected with the pixel driving circuit 31 through the via hole, which can reduce the wiring space. The light-emitting structure layer 40 can include an anode layer, a light-emitting layer and a cathode layer which are sequentially stacked along the thickness direction of the substrate.

[0090] Optionally, referring to Figure 3The array substrate 10 includes a substrate 80, a first circuit layer 20, a second circuit layer 30, and a light-emitting structure layer 40 located on the substrate 80 and stacked sequentially in a direction away from the substrate 80.

[0091] The substrate 80 can serve as a support, allowing the first circuit layer 20, the second circuit layer 30, and the light-emitting structure layer 40 to be stacked sequentially.

[0092] Optional, see reference Figure 3 The orthographic projection of the auxiliary circuit on the substrate 80 overlaps with the orthographic projection of the light-emitting structure layer 40 on the substrate 80. For example, the orthographic projection of the auxiliary circuit on the substrate 80 overlaps with the orthographic projection of the light-emitting structure on the substrate 80. For example, the orthographic projection of the auxiliary circuit on the substrate 80 overlaps with the orthographic projection of at least one of the anode layer, the light-emitting layer, and the cathode layer on the substrate 80.

[0093] The orthographic projection of the auxiliary circuit on the substrate 80 overlaps with the orthographic projection of the light-emitting structure layer 40 on the substrate 80, indicating that the auxiliary circuit is located in the display area AA and will not occupy the area of ​​the non-display area NA. The remaining area of ​​the non-display area NA can be used to set at least three dikes 70. The dikes 70 effectively reduce the risk of ink overflow when the display area AA is encapsulated with organic layers. At least three dikes 70 can reduce the ink flow rate during organic layer encapsulation, avoid affecting the encapsulation effect, and further improve the reliability of the encapsulation.

[0094] Optional, see reference Figure 3 The test circuit includes a screen test circuit.

[0095] The screen test circuit can be used to test the pixels in the display area. By sending test signals to the pixels, it can detect the pixel's light emission, whether the color display is normal, whether the brightness is uniform, etc., to determine whether the pixel can work normally and promptly detect problems such as dead pixels, bright pixels, and dark pixels.

[0096] Optional, see reference Figure 3 The second circuit layer 30 includes data lines, and auxiliary circuits are connected to the data lines.

[0097] Optional, see reference Figure 3 The auxiliary circuit is connected to the pixel driving circuit via a data line.

[0098] The auxiliary circuit is connected to the pixel driving circuit via a data line and is used to transmit data signals to the pixel driving circuit.

[0099] Optionally, the orthographic projection of the shielding ring 60 on the substrate 80 overlaps with the orthographic projection of the dam 70 on the substrate 80, and / or, at least a portion of the orthographic projection of the shielding ring 60 on the substrate 80 lies in the gap between the orthographic projections of adjacent dams 70 on the substrate 80.

[0100] Optionally, referring to Figure 3 The height of each dam 70 is the same, and / or the spacing between adjacent dams 70 is equal.

[0101] The height of each dam 70 is the same, which can reduce the flow rate of the ink during encapsulation of the organic layer, avoid affecting the encapsulation effect, and further improve the reliability of encapsulation.

[0102] The spacing between adjacent dams 70 is equal, which can stabilize the flow rate of the ink during encapsulation of the organic layer, and simplify the process difficulty and improve the process efficiency.

[0103] The height of each dam 70 is the same and the spacing between adjacent dams 70 is equal, which can reduce the flow rate of the ink during encapsulation of the organic layer, avoid affecting the encapsulation effect, and further improve the reliability of encapsulation; and can simplify the process difficulty and improve the process efficiency.

[0104] Optionally, referring to Figure 3 The spacing between adjacent dams 70 is greater than or equal to 10 μm.

[0105] The width of the dam can be greater than or equal to 25 μm; if the spacing between adjacent dams 70 is less than 10 μm, the smaller spacing will result in poor flow rate reduction of the ink during encapsulation of the organic layer; therefore, the spacing between adjacent dams 70 is greater than or equal to 10 μm, which can slow down the flow rate of the ink during encapsulation of the organic layer and ensure the reliability of encapsulation. For example, the spacing between adjacent dams 70 can be 10 μm, 11 μm, 12 μm, or 15 μm, etc.

[0106] Optionally, referring to Figure 3 The display panel further includes an encapsulation layer 50 disposed on a side of the light-emitting structure layer 40 away from the first circuit layer 20; for example, the encapsulation layer 50 includes at least two inorganic layers and at least one organic layer stacked; one organic layer is disposed between each adjacent two inorganic layers; the at least two inorganic layers extend from the display area AA to the non-display area NA, and the at least two inorganic layers are located on a side of the dam 70 away from the substrate 80, and are in contact in a preset area, wherein the preset area is a non-display area NA located on a side of the dam away from the display area AA, and the width C of the preset area in a direction from the display area AA to the non-display area NA is greater than or equal to 90 μm and less than or equal to 130 μm.

[0107] One organic layer is disposed between each adjacent two inorganic layers, and the encapsulation layer 50 is closest to the light-emitting structure layer 40, and the film layer farthest from the light-emitting structure layer 40 is an inorganic layer. Figure 3The encapsulation layer 50 includes a first inorganic layer 51, an organic layer 52, and a second inorganic layer 53. The organic layer 52 is fluid and flows from the display area AA to the non-display area NA during encapsulation. The dam 70 reduces the flow rate of the organic layer 52, preventing it from spreading too widely and affecting the width of the non-display area NA, thus impacting the encapsulation effect. The first inorganic layer 51 and the second inorganic layer 53 prevent moisture and oxygen from entering. The organic layer 52 can alleviate stress between the first inorganic layer 51 and the second inorganic layer 53, improving the reliability of the display panel. Since the shift register circuit and auxiliary circuits are located in the display area AA, the non-display area NA can have a larger free space, allowing for a larger preset area. The width C of the preset area is greater than or equal to 90 μm and less than or equal to 130 μm, resulting in a larger area covered by the inorganic layer. This better blocks moisture and oxygen, lengthens the moisture and oxygen pathway, and increases the contact area between the inorganic layer and the substrate, preventing peeling of the inorganic layer and improving the encapsulation reliability of the display panel.

[0108] Since the shift register circuit and auxiliary circuit are both located in the display area AA, the area of ​​the preset region can be relatively large. The width C of the preset region is greater than or equal to 90μm-130μm. For example, the width C of the preset region can be 90μm, 100μm, 110μm, 120μm or 130μm, etc. This is three times larger than the preset region of the display panel in the prior art, which can block water and oxygen, increase the water and oxygen path, and the contact area between the preset region and the substrate is larger, which can avoid the peeling of the inorganic layer and improve the packaging reliability of the display panel.

[0109] Optional, see reference Figure 4 The boundary of organic layer 52 is located on the side of dam 70 away from display area AA and on the side closer to display area AA.

[0110] The boundary of the organic layer 52 refers to the boundary of the organic layer 52 furthest from the display area AA in the direction from the display area AA to the non-display area NA. The boundary of the organic layer 52 is located on the side of the dam 70 furthest from the display area AA and close to the display area AA, that is, in the direction from the display area AA to the non-display area NA, the boundary of the organic layer 52 is located within the boundary of the dam 70 furthest from the display area AA on the side furthest from the display area AA.

[0111] Optional, Figure 4 This is a cross-sectional structural diagram of another display panel provided in an embodiment of the present invention, for reference. Figure 4The first circuit layer 20 comprises a first conductive layer 21, a second conductive layer 22 and a third conductive layer 23 which are sequentially stacked. The first conductive layer 21 is arranged on the side of the second conductive layer 22 away from the third conductive layer 23. For example, an insulating layer 202 is arranged between any two adjacent conductive layers among the first conductive layer 21, the second conductive layer 22 and the third conductive layer 23. The first conductive layer 21 can comprise a metal layer. The second conductive layer 22 can comprise a metal layer. The third conductive layer 23 can comprise a metal layer. The first conductive layer 21, the second conductive layer 22 and the third conductive layer 23 can be arranged on a substrate 80 and sequentially stacked in a direction away from the substrate 80.

[0112] The first conductive layer 21, the second conductive layer 22 and the third conductive layer 23 are used to form a shift register circuit and an auxiliary circuit. The first conductive layer 21 can be used to form a gate of a transistor. The second conductive layer 22 can be a capacitor plate layer. The third conductive layer 23 can be used to form a source metal and a drain metal of a transistor. Part of the first conductive layer 21 and part of the second conductive layer 22 can be used as two plates of a capacitor. The third conductive layer can be used to form a signal line layer. A substrate can be arranged on the side of the first conductive layer 21 away from the second conductive layer 22. A pad can be arranged on the side of the substrate and used to bond a driving chip. The pad can be arranged on at least one of the first conductive layer 21, the second conductive layer 22 and the third conductive layer 23. The pad can be connected to the auxiliary circuit. The pad can be arranged in a non-display area. The shift register circuit can comprise a transistor. The auxiliary circuit can comprise a transistor. The pixel driving circuit can comprise a transistor and a capacitor.

[0113] Optionally, the first conductive layer is a first gate conductive layer, the second conductive layer is a capacitor plate layer, and the third conductive layer is a signal line layer.

[0114] The first conductive layer is a first gate conductive layer, the second conductive layer is a capacitor plate layer, and the third conductive layer is a signal line layer. The packaging reliability can be ensured without increasing the lateral size of the device, and the display panel has a better appearance effect.

[0115] Optionally, the first conductive layer is a first gate conductive layer, the second conductive layer is a capacitor plate layer, and the third conductive layer is a signal line layer. Figure 5 The shielding ring 60 is arranged in the same layer as at least one conductive layer in the first circuit layer 20 and the second circuit layer 30. For example, at least part of the shielding ring 60 is arranged in the same layer as at least one conductive layer in the first circuit layer 20. For example, at least part of the shielding ring 60 is arranged in the same layer as at least one conductive layer in the second circuit layer 30.

[0116] Optionally, the second circuit layer 30 comprises a second gate conductive layer, a second capacitor plate layer and a second signal line layer which can be arranged on the substrate 80 and sequentially stacked in a direction away from the substrate 80.

[0117] The shielding ring 60 is arranged in the same layer as at least one conductive layer in the first circuit layer 20 and the second circuit layer 30, without the need to add a film layer for the shielding ring 60, without the need to change the thickness of the display panel, and ensuring that the display panel has a smaller thickness.

[0118] Optionally, Figure 5 is a schematic diagram of yet another display panel provided by an embodiment of the present application, referring to Figure 3 The display area AA includes a first edge area D1, a second edge area D2, and a third edge area D3; the first edge area D1 and the second edge area D2 are arranged opposite to each other along a first direction X, the third edge area D3 is adjacent to the first edge area D1, and the third edge area D3 is adjacent to the second edge area D2; the shift register circuit 201 is arranged in the first edge area D1 and / or the second edge area D2; and / or, the auxiliary circuit 203 is arranged in the third edge area D3.

[0119] The shift register circuit is connected to the driving circuit through the via hole 204; and / or, the auxiliary circuit is connected to the pixel driving circuit through the via hole 204. By arranging the shift register circuit and the auxiliary circuit in the display area AA, the area of the non-display area NA that is left empty can be used to set up a dam and increase the area of the non-display area NA, thereby improving the reliability of the display panel. The first edge area D1 can correspond to a left frame area. The second edge area D2 can correspond to a right frame area. The third edge area D3 can correspond to a lower frame area.

[0120] Optionally, referring to Figure 5 and Figure 3 The second circuit layer 30 includes a gate line, and the shift register circuit 201 is connected to the pixel driving circuit 31 through the gate line 301. The gate line 301 extends along the first direction X.

[0121] The second circuit layer 30 includes a data line 302 and a gate line 301. The gate line includes a scan line and / or a light-emitting control line, and extends along the first direction X. The data line extends along a second direction Y, and the first direction X and the second direction Y intersect each other. The scan line and / or the light-emitting control line work synchronously with the data line. When a certain row or column of pixels is selected by the scan line, the data line transmits corresponding data to these pixel driving circuits, ensuring that the data is accurately transmitted to the corresponding pixel driving circuits.

[0122] Optionally, referring to Figure 3 The shielding ring 60 is electrically connected to the electrostatic protection circuit, or the second circuit layer 30 includes a power line, the power line is electrically connected to the light-emitting structure layer 40, and the shielding ring 60 is electrically connected to the power line.

[0123] The shielding ring 60 is electrically connected with the electrostatic protection circuit, and electrostatic discharge can be performed through the electrostatic protection circuit, so that the electrostatic protection capability of the display panel is improved. The second circuit layer 30 includes a power supply line, the power supply line is electrically connected with the light-emitting structure layer 40, the shielding ring 60 is electrically connected with the power supply line, the power supply line has good conductivity and current carrying capacity, and can provide a discharge path for electrostatic, so that the electrostatic protection capability of the display panel is improved.

[0124] The embodiment of the present application provides another display panel, referring to ​ , the display panel comprises:

[0125] The array substrate 10 comprises a display area AA and a non-display area NA; the array substrate 10 comprises a first circuit layer 20, the first circuit layer 20 comprises an auxiliary circuit, the auxiliary circuit comprises at least one of a multiplexing circuit, a point screen test circuit, a crack detection circuit and an electrostatic protection circuit; the auxiliary circuit is located in the display area AA; and the display area AA of the array substrate 10 is provided with a light-emitting structure layer.

[0126] In the embodiment of the present application, the auxiliary circuit is located in the display area AA, and the area of the non-display area NA is not occupied, and the area of the non-display area NA is left empty, for example, at least three dams 70 can be arranged, the dam 70 effectively reduces the risk of ink overflow when the organic layer is encapsulated in the display area AA, the at least three dams 70 can reduce the flow rate of the ink when the organic layer is encapsulated, avoid affecting the encapsulation effect, and can further improve the reliability of encapsulation and improve the customer experience; and / or, the frame width is reduced.

[0127] The embodiment can be combined with part or all of the features in the above-mentioned embodiments, which will not be repeated here.

[0128] The embodiment of the present application further comprises a display device on the basis of the above-mentioned embodiments, which comprises the display panel described in any embodiment of the present application. The display device can comprise a mobile phone, a tablet computer, a notebook computer, a wearable device or a vehicle-mounted display device.

[0129] It should be understood that the various forms of flow shown above can be used to reorder, add or delete steps. For example, the steps described in the present application can be executed in parallel, in sequence or in different orders, as long as the desired results of the technical solutions of the present application can be achieved, which are not limited herein.

[0130] The above detailed description does not constitute a limitation on the protection scope of the present application. Those skilled in the art should understand that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent replacement and improvement made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A display panel, characterized in that, include: An array substrate, the array substrate including a display area and a non-display area; the non-display area surrounds at least a portion of the display area; The display area of ​​the array substrate is provided with a light-emitting structure layer; The non-display area of ​​the array substrate includes a shielding ring that surrounds at least a portion of the display area. The array substrate includes a first circuit layer and a second circuit layer. The first circuit layer is disposed on the side of the second circuit layer away from the light-emitting structure layer. The first circuit layer includes a shift register circuit and / or an auxiliary circuit. The second circuit layer includes a pixel driving circuit. The auxiliary circuit includes at least one of a multiplexer circuit, a test circuit, a crack detection circuit, and an electrostatic discharge protection circuit. The shift register circuit and / or the auxiliary circuit are located in the display area; At least part of the shielding ring is disposed in the same layer as at least one conductive layer in the first circuit layer.

2. The display panel according to claim 1, characterized in that: The shielding rings are at least two, and the at least two shielding rings are spaced apart along the direction from the display area to the non-display area, and at least some of the shielding rings are arranged in different layers.

3. The display panel according to claim 1, characterized in that: Along the direction from the display area to the non-display area, the spacing between adjacent shielding rings is greater than or equal to 1 μm.

4. The display panel according to claim 1, characterized in that: Along the direction from the display area to the non-display area, the width of each shielding ring is greater than or equal to 2μm and less than or equal to 3μm.

5. The display panel according to claim 1, characterized in that: The shielding ring includes a first shielding ring and a second shielding ring, which are arranged alternately along the direction from the display area to the non-display area. The first shielding ring and the second shielding ring are arranged in different layers.

6. The display panel according to claim 1, characterized in that: The shielding ring is connected to a DC voltage or a power supply voltage.

7. The display panel according to claim 1, characterized in that: The material of the shielding ring includes metal.

8. The display panel according to claim 1, characterized in that: The array substrate includes a circuit layer, which includes multiple metal layers, and the shielding ring is disposed in the same layer as at least one of the multiple metal layers.

9. The display panel according to claim 1, characterized in that: The material of the shielding ring includes at least one of molybdenum, titanium, and aluminum.

10. The display panel according to claim 1, characterized in that: The non-display area of ​​the array substrate also includes at least three dikes, which are located on the side of the second circuit layer away from the first circuit layer; the at least three dikes are arranged sequentially and spaced apart along the direction from the display area to the non-display area.

11. The display panel according to claim 1, characterized in that: The light-emitting structure layer includes multiple light-emitting structures. The pixel driving circuit is electrically connected to the light-emitting structures and is used to drive the light-emitting structures to emit light. The shift register circuit is electrically connected to the pixel driving circuit through a via.

12. The display panel according to claim 1, characterized in that: The array substrate includes a substrate, and the first circuit layer, the second circuit layer, and the light-emitting structure layer are located on the substrate and are stacked sequentially in a direction away from the substrate.

13. The display panel according to claim 12, characterized in that: The orthographic projection of the auxiliary circuit on the substrate overlaps with the orthographic projection of the light-emitting structure layer on the substrate.

14. The display panel according to claim 1, characterized in that: The test circuit includes a screen test circuit.

15. The display panel according to claim 12, characterized in that: The second circuit layer includes data lines, and the auxiliary circuit is connected to the data lines.

16. The display panel according to claim 15, characterized in that: The auxiliary circuit is connected to the pixel driving circuit via the data line.

17. The display panel according to claim 10, characterized in that: The array substrate includes a substrate, and at least a portion of the membrane layer containing the dam is located on the side of the membrane layer containing the shielding ring away from the substrate.

18. The display panel according to claim 17, characterized in that: The orthographic projection of the shielding ring on the substrate overlaps with the orthographic projection of the dam on the substrate, and / or, at least a portion of the orthographic projection of the shielding ring on the substrate is located in the gap between the orthographic projections of adjacent dams on the substrate.

19. The display panel according to claim 1, characterized in that: The array substrate includes a substrate, and the non-display area of ​​the array substrate also includes a dam, at least a portion of the film layer containing the dam being located on the side of the film layer containing the shielding ring away from the substrate.

20. The display panel according to claim 19, characterized in that: The orthographic projection of the shielding ring on the substrate overlaps with the orthographic projection of the dam on the substrate, and / or, there are multiple dams, at least a portion of the orthographic projection of the shielding ring on the substrate is located in the gap between the orthographic projections of adjacent dams on the substrate.

21. The display panel according to claim 19, characterized in that: There are multiple dams, and each dam has the same height. And / or, the spacing between adjacent dikes is equal.

22. The display panel according to claim 19, characterized in that: There are multiple dams, and the distance between adjacent dams is greater than or equal to 10 μm.

23. The display panel according to claim 1, characterized in that, Also includes: An encapsulation layer is disposed on the side of the light-emitting structure layer away from the first circuit layer; The encapsulation layer includes at least two inorganic layers and at least one organic layer stacked together, with an organic layer disposed between each pair of adjacent inorganic layers; The array substrate includes a substrate, and the at least two inorganic layers extend from the display area to the non-display area. The at least two inorganic layers are located on the side of the dam away from the substrate and are contacted in a preset area. The non-display area of ​​the array substrate also includes a dam. The preset area is a non-display area located on the side of the dam away from the display area and is in the direction from the display area to the non-display area. The width of the preset area is greater than or equal to 90 μm and less than or equal to 130 μm.

24. The display panel according to claim 23, characterized in that: The boundary of the organic layer is located on the side of the dam furthest from the display area and on the side closer to the display area.

25. The display panel according to claim 1, characterized in that: The first circuit layer includes a first conductive layer, a second conductive layer, and a third conductive layer stacked sequentially; wherein the first conductive layer is disposed on the side of the second conductive layer away from the third conductive layer.

26. The display panel according to claim 25, characterized in that: The first conductive layer is a first gate conductive layer, the second conductive layer is a capacitor electrode layer, and the third conductive layer is a signal line layer.

27. The display panel according to claim 1, characterized in that: The shielding ring is disposed on the same layer as at least one conductive layer of the first circuit layer and the second circuit layer.

28. The display panel according to claim 1, characterized in that: The display area includes a first edge area, a second edge area, and a third edge area; The first edge region and the second edge region are disposed opposite to each other along a first direction, and the third edge region is adjacent to the first edge region and the second edge region. The shift register circuit is disposed in the first edge region and the second edge region; The auxiliary circuit is located in the third edge region.

29. The display panel according to claim 1, characterized in that: The second circuit layer includes a gate line, and the shift register circuit is connected to the pixel driving circuit through the gate line, which extends along a first direction.

30. The display panel according to claim 1, characterized in that: The shielding ring is electrically connected to the electrostatic protection circuit, or the second circuit layer includes a power line, the power line is electrically connected to the light-emitting structure layer, and the shielding ring is electrically connected to the power line.

31. A display panel, characterized in that, include: An array substrate, comprising a display area and a non-display area; the array substrate includes a first circuit layer, the first circuit layer including auxiliary circuitry, the auxiliary circuitry including at least one of a multiplexer circuit, a screen testing circuit, a crack detection circuit, and an electrostatic discharge protection circuit; all the auxiliary circuitry are located in the display area. The display area of ​​the array substrate is provided with a light-emitting structure layer; The non-display area of ​​the array substrate includes a shielding ring that surrounds at least a portion of the display area. At least part of the shielding ring is disposed in the same layer as at least one conductive layer in the first circuit layer.

32. A display device, characterized in that, Includes the display panel as described in any one of claims 1-31.

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