Method for determining cyclic redundancy check bits, communication method and device

CN119999159APending Publication Date: 2025-05-13HUAWEI TECH CO LTD
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Patent Information

Application Number
CN202280100615.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2022-10-11
Publication Date
2025-05-13

AI Technical Summary

Technical Problem

In the new wireless (NR) system, during the encoding process of the cyclic redundancy check (CRC) code, the existing technology cannot flexibly select the appropriate check bit length according to the code length and code rate, resulting in reduced communication performance.

Method used

The length of the check bits is flexibly determined by determining the code length and length information of the information bits, and the CRC polynomial is used to generate adaptive check bits to improve communication performance.

Benefits of technology

It reduces the complexity of channel estimation at the receiving end, improves the performance of the receiving end, improves communication performance, and avoids an increase in system delay.

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Abstract

A method for determining a cyclic redundancy check bit, a communication method and a device wherein the method for determining the cyclic redundancy check bit comprises: acquiring an information bit, determining a check bit length L according to a first correspondence, and determining a first check bit according to a first CRC polynomial wherein L is a natural number and L is a natural number; the first corresponding relation comprises the corresponding relation among the code length information of the data to be transmitted, the length information of the information bit and the length of the check bit, the data to be transmitted comprises the information bit, the highest power of the item in the first CRC polynomial is Lmax, and the Lmax is a positive integer and is greater than or equal to L. According to the invention, the check bit with the length adaptive to the code length and the code rate can be flexibly generated, so that the communication performance is improved.
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Description

Method for determining cyclic redundancy check bits, communication method and device Technical Field

[0001] The present application relates to the field of mobile communication technology, and in particular to a method for determining cyclic redundancy check bits, a communication method, and a device. Background Art

[0002] In new radio (NR) systems, the cyclic redundancy check (CRC) encoding process performs CRC encoding on information bits, and then the CRC-encoded bits (i.e., CRC codewords) are processed later. CRC codewords consist of information bits and check bits. For example, in CRC-aided-polar (CA-polar) encoding, the CRC codewords are interleaved, and the resulting sequence is then polar-encoded.

[0003] Among them, the length of the optimal check bit of the CRC code changes with the change of code length and code rate. In the existing CRC coding scheme, only one check bit length is supported for a CRC polynomial, and it is impossible to flexibly select the appropriate length of check bits according to the code length and code rate, resulting in reduced communication performance.

[0004] Summary of the Invention

[0005] The present application provides a method for determining cyclic redundancy check bits, a communication method, and an apparatus for flexibly determining CRC check bits and improving communication performance.

[0006] In a first aspect, the present application provides a method for determining cyclic redundancy check (CRC) bits, thereby reducing the complexity of channel estimation at a receiving end and improving receiver performance. The method can be implemented by a first communication device. The first communication device can be a terminal device, a network device, a component within a network device, or a component within a terminal device. The component in the present application can, for example, include at least one of a chip, a chip system, a processor, a transceiver, a processing unit, or a transceiver unit. Taking the first communication device as an example, the method can be implemented by the following steps: the first communication device obtains information bits. The first communication device can also determine a CRC bit length, L, based on a first correspondence relationship, where L is a natural number. The first correspondence relationship includes a correspondence between code length information of data to be transmitted, information bit length information, and the CRC bit length, and the transmitted data includes information bits. The first communication device determines a first CRC bit based on a first CRC polynomial, where the highest power of a term in the first CRC polynomial is Lmax, where Lmax is a positive integer greater than or equal to L, and the first CRC bit length is L.

[0007] Based on this method, the first communication device can determine the length L of the corresponding check bit according to the code length of the data to be transmitted where the information bit is located and the length of the information bit, and generate a first check bit of length L according to the first CRC polynomial. Therefore, it can flexibly generate check bits with a length that is suitable for the code length and code rate to improve communication performance.

[0008] In a possible implementation, the first communication device may determine a second check bit according to the first CRC polynomial, wherein the length of the second check bit is Lmax. The first communication device may also determine the first check bit according to the second check bit.

[0009] Based on this implementation, the first communication device can determine the second check bit with a length of Lmax according to the first CRC polynomial, and then determine the first check bit with a length of L through the second check bit, so as to achieve flexible determination of the first check bit.

[0010] In a possible implementation, the first communication device may determine a second CRC polynomial based on the first CRC polynomial, where the highest power of the second CRC is L. The first communication device may also determine the first check bit based on the second CRC polynomial.

[0011] Based on this implementation, the first communication device can determine the second CRC polynomial according to the first CRC polynomial, and determine the first check bit with a length of L according to the second CRC polynomial, so as to achieve flexible determination of the first check bit.

[0012] In one possible implementation, the first CRC polynomial includes terms whose power is L, and the terms in the second CRC polynomial include terms in the first CRC polynomial whose power is not higher than L. Therefore, flexible determination of the second CRC polynomial can be achieved.

[0013] In one possible implementation, the first CRC polynomial does not include terms whose power is L, and the terms in the second CRC polynomial include terms whose power is L and at least one term in the first CRC polynomial whose power is less than L. Thus, flexible determination of the second CRC polynomial can be achieved. Optionally, the first communication device may determine the second CRC polynomial based on a correspondence between L and the second CRC polynomial.

[0014] In one possible implementation, the first communications device may delete at least one term other than a term with a power of L from the second CRC polynomial to obtain a third polynomial, wherein the second CRC polynomial is a reducible polynomial and the third polynomial is not a reducible polynomial. The first communications device may also determine the first check bit based on the third polynomial.

[0015] Based on this implementation, the first communication device can ensure that the first check bit is generated according to the irreducible CRC polynomial, thereby improving the error detection capability.

[0016] In a possible implementation manner, the first communication device may further obtain first indication information, where the first indication information is used to indicate the first corresponding relationship.

[0017] Based on this implementation, the first communication device may obtain the first corresponding relationship based on the obtained first indication information. For example, the first indication information comes from a network device. In addition, the first communication device may also obtain the first corresponding relationship through pre-configuration, pre-determined, or based on a protocol definition.

[0018] In a possible implementation, the first communication device may further send second indication information to the second communication device, where the second indication information is used to indicate that the check bit length is L.

[0019] Based on this implementation, the first communication device may indicate the value of L to the second communication device, so that the second communication device can flexibly determine L. Optionally, the second communication device may also determine the value of L in the same manner as the first communication device.

[0020] In a second aspect, the present application provides a communication method for reducing the complexity of channel estimation at the receiving end and improving the performance of the receiving end. The method can be implemented by a first device. The first device can be a terminal device, a network device, a component in a network device, or a component in a terminal device. The components in the present application can, for example, include at least one of a chip, a chip system, a processor, a transceiver, a processing unit, or a transceiver unit. Taking the execution subject as the first device as an example, the method can be implemented by the following steps: the first device determines second indication information, wherein the second indication information is used to indicate the check bit length L, L is a natural number, and the L is determined according to a first corresponding relationship, and the first corresponding relationship includes the correspondence between the code length information of the data to be transmitted including the information bits, the length information of the information bits, and the check bit length. The first device can also send the second indication information to the second device.

[0021] Based on the second aspect, the first device can determine the length L of the corresponding check bits based on the code length of the data to be transmitted in which the information bits are located and the length of the information bits, and indicate the check bit length L to the second device through the second indication information, so that the second device can know L. Therefore, the second device can flexibly generate check bits with a length that is compatible with the code length and code rate, thereby improving communication performance.

[0022] In one possible implementation, the first device may also determine a first check bit based on a first CRC polynomial, wherein the length of the first check bit is L, the highest power of the terms in the first CRC polynomial is Lmax, Lmax is a positive integer and Lmax is greater than or equal to L.

[0023] Based on this implementation, the first device can also obtain a first check bit of length L according to the first CRC polynomial, and thus can flexibly generate check bits with a length adapted to the code length and code rate to improve communication performance.

[0024] In a possible implementation, the first device may determine a second check bit according to the first CRC polynomial, wherein the length of the second check bit is Lmax. The first device may also determine the first check bit according to the second check bit.

[0025] Based on this implementation, the first device can determine the second check bit with a length of Lmax according to the first CRC polynomial, and then determine the first check bit with a length of L through the second check bit, so as to achieve flexible determination of the first check bit.

[0026] In a possible implementation, the first device may determine a second CRC polynomial based on the first CRC polynomial, where the highest power of the second CRC is L. The first device may also determine the first check bit based on the second CRC polynomial.

[0027] Based on this implementation, the first device may determine the second CRC polynomial according to the first CRC polynomial, and determine the first check bit of length L according to the second CRC polynomial, so as to achieve flexible determination of the first check bit.

[0028] In one possible implementation, the first CRC polynomial includes terms whose power is L, and the terms in the second CRC polynomial include terms in the first CRC polynomial whose power is not higher than L. Therefore, flexible determination of the second CRC polynomial can be achieved.

[0029] In one possible implementation, the first CRC polynomial does not include terms whose power is L, and the terms in the second CRC polynomial include terms whose power is L and at least one term in the first CRC polynomial whose power is less than L. Thus, flexible determination of the second CRC polynomial can be achieved. Optionally, the first device may determine the second CRC polynomial based on a correspondence between L and the second CRC polynomial.

[0030] In one possible implementation, the first device may delete at least one term other than a term with a power of L from the second CRC polynomial to obtain a third polynomial, wherein the second CRC polynomial is a reducible polynomial and the third polynomial is not a reducible polynomial. The first device may also determine the first check bit based on the third polynomial.

[0031] Based on this implementation, the first device can ensure that the first check bit is generated according to the irreducible CRC polynomial, thereby improving the error detection capability.

[0032] In a possible implementation manner, the first device may further obtain first indication information, where the first indication information is used to indicate the first corresponding relationship.

[0033] Based on this implementation, the first device may obtain the first corresponding relationship based on the obtained first indication information. For example, the first indication information comes from the network device. In addition, the first device may also obtain the first corresponding relationship through pre-configuration, pre-determined, or based on protocol definition.

[0034] In a third aspect, the present application provides a communication method for reducing the complexity of channel estimation at the receiving end and improving the performance of the receiving end. The method can be implemented by a second device. The second device can be a terminal device, a network device, a component in a network device, or a component in a terminal device. The components in the present application may include, for example, at least one of a chip, a chip system, a processor, a transceiver, a processing unit, or a transceiver unit. Taking the execution subject as the second device as an example, the method can be implemented by the following steps: the second device obtains second indication information, wherein the second indication information is used to indicate the check bit length L, where L is a natural number. The second device can also determine the first check bit based on a first cyclic redundancy check CRC polynomial, wherein the length of the first check bit is L, the highest power of the term in the first CRC polynomial is Lmax, Lmax is a positive integer, and Lmax is greater than or equal to L.

[0035] Based on this third aspect, the second device can determine the parity bit length L according to the second indication information, and generate first parity bits of length L according to the first CRC polynomial. Therefore, the second device can flexibly generate parity bits with a length that is compatible with the code length and code rate to improve communication performance.

[0036] In a possible implementation, the second device may determine a second check bit according to the first CRC polynomial, wherein the length of the second check bit is Lmax. The second device may also determine the first check bit according to the second check bit.

[0037] Based on this implementation, the second device can determine the second check bit with a length of Lmax according to the first CRC polynomial, and then determine the first check bit with a length of L through the second check bit, so as to achieve flexible determination of the first check bit.

[0038] In a possible implementation, the second device may determine a second CRC polynomial according to the first CRC polynomial, where the highest power of the second CRC is L. The second device may also determine the first check bit according to the second CRC polynomial.

[0039] Based on this implementation, the second device may determine the second CRC polynomial according to the first CRC polynomial, and determine the first check bit of length L according to the second CRC polynomial, so as to achieve flexible determination of the first check bit.

[0040] In one possible implementation, the first CRC polynomial includes terms whose power is L, and the terms in the second CRC polynomial include terms in the first CRC polynomial whose power is not higher than L. Therefore, flexible determination of the second CRC polynomial can be achieved.

[0041] In one possible implementation, the first CRC polynomial does not include terms whose power is L, and the terms in the second CRC polynomial include terms whose power is L and at least one term in the first CRC polynomial whose power is less than L. Thus, flexible determination of the second CRC polynomial can be achieved. Optionally, the second device can determine the second CRC polynomial based on a correspondence between L and the second CRC polynomial.

[0042] In one possible implementation, the second device may delete at least one term other than a term with a power of L from the second CRC polynomial to obtain a third polynomial, wherein the second CRC polynomial is a reducible polynomial and the third polynomial is not a reducible polynomial. The second device may also determine the first check bit based on the third polynomial.

[0043] Based on this implementation, the second device can ensure that the first check bit is generated according to the irreducible CRC polynomial, thereby improving the error detection capability.

[0044] In a possible implementation, the second device may further obtain first indication information, where the first indication information is used to indicate the first corresponding relationship.

[0045] Based on this implementation, the second device may obtain the first corresponding relationship based on the obtained first indication information. For example, the first indication information comes from the network device. In addition, the second device may also obtain the first corresponding relationship through pre-configuration, pre-determined, or based on protocol definition.

[0046] In a fourth aspect, a communication device is provided. The device can implement the method performed by the first terminal device, the first device, or the second device, respectively, in any possible implementation manner of the first to third aspects. The device is, for example, the first terminal device.

[0047] In an optional implementation, the device may include a module that performs the methods / operations / steps / actions described in the first to third aspects and any possible implementations above. The module may be a hardware circuit, software, or a combination of a hardware circuit and software. In an optional implementation, the device includes a processing unit (sometimes also referred to as a processing module) and a communication unit (sometimes also referred to as a communication module, a transceiver module, or a transceiver unit). The communication unit is capable of implementing a sending function and a receiving function. When the communication unit implements the sending function, it may be referred to as a sending unit (sometimes also referred to as a sending module). When the communication unit implements the receiving function, it may be referred to as a receiving unit (sometimes also referred to as a receiving module). The sending unit and the receiving unit may be the same functional module, which is capable of implementing a sending function and a receiving function; or, the sending unit and the receiving unit may be different functional modules, and the transceiver unit is a general term for these functional modules.

[0048] For another example, the apparatus includes a processor coupled to a memory, configured to execute instructions in the memory to implement the methods described in aspects 1 through 3 above and any possible implementations. Optionally, the apparatus also includes other components, such as an antenna, an input / output module, a transceiver, a communication interface, and the like. These components may be hardware, software, or a combination of hardware and software.

[0049] In a fifth aspect, a computer-readable storage medium is provided, wherein the computer-readable storage medium is used to store a computer program or instruction, which, when executed, enables the method of any possible implementation manner in the first to third aspects to be implemented.

[0050] In a sixth aspect, a computer program product comprising instructions is provided, which, when executed on a computer, enables the method of any possible implementation manner in the first to third aspects to be implemented.

[0051] In the seventh aspect, a chip system is provided, which includes a logic circuit (or it can be understood that the chip system includes a processor, and the processor may include a logic circuit, etc.), and may also include an input and output interface. The input and output interface can be used to receive messages or to send messages. The input and output interfaces may be the same interface, that is, the same interface can implement both the sending function and the receiving function; or, the input and output interface includes an input interface and an output interface, the input interface is used to implement the receiving function, that is, for receiving messages; the output interface is used to implement the sending function, that is, for sending messages. The logic circuit can be used to perform operations other than the sending and receiving functions in the above-mentioned first to third aspects and any possible implementation thereof; the logic circuit can also be used to transmit messages to the input and output interface, or receive messages from other communication devices from the input and output interface. The chip system can be used to implement the method of any possible implementation of the above-mentioned first to third aspects. The chip system can be composed of a chip, or it can include a chip and other discrete devices.

[0052] Optionally, the chip system may further include a memory, which may be used to store instructions, and the logic circuit may call the instructions stored in the memory to implement corresponding functions.

[0053] In an eighth aspect, a communication system is provided, which may include a first communication device and at least one of a network device and a second communication device. The first communication device may be configured to perform the method of the first aspect and any possible implementation thereof. Alternatively, the communication system may include a first device and a second device, the first device being configured to perform the method of the second aspect and any possible implementation thereof, and the second device being configured to perform the method of the third aspect and any possible implementation thereof.

[0054] The technical effects brought about by the above second to eighth aspects can be found in the description of the above first aspect and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] FIG1 is a schematic diagram of the architecture of a wireless communication system provided in an embodiment of the present application;

[0056] FIG2 is a schematic diagram of a wireless signal transmission process;

[0057] FIG3 is a schematic diagram of a CA-polar encoding process;

[0058] FIG4 is a flow chart of a method for determining cyclic redundancy check bits provided in an embodiment of the present application;

[0059] FIG5 is a table showing a correspondence relationship between N, K, and L provided in an embodiment of the present application;

[0060] FIG6 is another correspondence table between N, K and L provided in an embodiment of the present application;

[0061] FIG7 is another correspondence table between N, K and L provided in an embodiment of the present application;

[0062] FIG8 is a table showing a correspondence relationship between N, K and a second CRC polynomial provided in an embodiment of the present application;

[0063] FIG9 is another correspondence table between N, K and a second CRC polynomial provided in an embodiment of the present application;

[0064] FIG10 is another correspondence table between N, K and a second CRC polynomial provided in an embodiment of the present application;

[0065] FIG11 is another correspondence table between N, K and a second CRC polynomial provided in an embodiment of the present application;

[0066] FIG12 is a first CRC polynomial with a possible highest power of 11 provided in an embodiment of the present application;

[0067] FIG13 is a first CRC polynomial with a possible highest power of 6 provided in an embodiment of the present application;

[0068] FIG14 is a flow chart of a communication method provided in an embodiment of the present application;

[0069] FIG15 is a schematic structural diagram of a communication device provided in an embodiment of the present application;

[0070] FIG16 is a schematic structural diagram of another communication device provided in an embodiment of the present application;

[0071] FIG17 is a schematic structural diagram of another communication device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0072] The embodiment of the present application provides a method and device for determining cyclic redundancy check bits. Among them, the method and the device are based on the same inventive concept. Since the principles of the method and the device for solving the problem are similar, the implementation of the device and the method can refer to each other, and the repeated parts will not be repeated. In the description of the embodiment of the present application, "and / or" describes the association relationship of the associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. At least one referred to in this application refers to one or more; multiple refers to two or more. In addition, it should be understood that in the description of this application, words such as "first" and "second" are only used to distinguish the purpose of description, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying order.

[0073] The method provided in the embodiment of the present application can be applied to a fourth generation (4G) communication system, such as a long term evolution (LTE) communication system, or to a fifth generation (5G) communication system, such as a 5G new radio (NR) communication system, or to various future communication systems, such as a sixth generation (6G) communication system. The method provided in the embodiment of the present application can also be applied to narrowband Internet of Things (NB-IoT) systems, global system for mobile communications (GSM), enhanced data rate for GSM evolution (EDGE), wideband code division multiple access (WCDMA), code division multiple access 2000 (CDMA2000), time division-synchronization code division multiple access (TD-SCDMA), or the three major application scenarios of the next generation 5G mobile communication system: enhanced mobile broadband (eMBB), ultra-reliable low-latency communications (URLLC), and enhanced machine-type communication (eMTC). The method provided in the embodiment of the present application can also be applied to satellite communication systems, wherein the satellite communication system can be integrated with the above-mentioned communication systems.

[0074] To facilitate understanding of the embodiments of the present application, the application scenarios used in the present application are described using the communication system architecture shown in Figure 1 as an example. Referring to Figure 1, the communication system includes a network device 101 and a terminal device 102. The apparatus provided in the embodiments of the present application can be applied to the network device 101 or to the terminal device 102. It will be understood that Figure 1 only illustrates one possible communication system architecture that can be applied in the embodiments of the present application. In other possible scenarios, the communication system architecture may also include other devices.

[0075] The network device 101 is a node in a radio access network (RAN), which may also be referred to as a base station or a RAN node (or device). Currently, some examples of access network devices include: gNB / NR-NB, transmission reception point (TRP), evolved Node B (eNB), radio network controller (RNC), Node B (NB), base station controller (BSC), base transceiver station (BTS), home base station (e.g., home evolved NodeB, or home Node B, HNB), base band unit (BBU), or wireless fidelity (Wifi) access point (AP), satellite equipment, or network equipment in a 5G communication system, or network equipment in a possible future communication system. The network device 101 may also be another device having network device functions. For example, the network device 101 may also be a device that functions as a network device in device-to-device (D2D) communication, Internet of Vehicles (IoV) communication, or machine communication. The network device 101 may also be a network device in a possible future communication system.

[0076] In some deployments, a gNB may include a centralized unit (CU) and a DU. The gNB may also include a radio unit (RU). The CU implements some gNB functions, while the DU implements some gNB functions. For example, the CU implements radio resource control (RRC) and packet data convergence protocol (PDCP) layer functions, while the DU implements radio link control (RLC), media access control (MAC), and physical (PHY) layer functions. Because RRC layer information ultimately becomes PHY layer information, or is converted from PHY layer information, in this architecture, higher-layer signaling, such as RRC layer signaling or PDCP layer signaling, can also be considered to be sent by the DU, or by both the DU and the RU. It is understood that a network device can be a CU node, a DU node, or a device that includes both a CU node and a DU node. Furthermore, the CU can be classified as a network device in the access network (RAN) or a network device in the core network (CN), without limitation here.

[0077] Terminal device 102, also known as user equipment (UE), mobile station (MS), or mobile terminal (MT), provides voice or data connectivity to users and may also be an IoT device. For example, terminal devices include handheld devices and vehicle-mounted devices with wireless connectivity. At present, terminal devices can be: mobile phones, tablet computers, laptops, PDAs, mobile internet devices (MIDs), wearable devices (such as smart watches, smart bracelets, pedometers, etc.), vehicle-mounted devices (such as cars, bicycles, electric vehicles, airplanes, ships, trains, high-speed railways, etc.), virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control, smart home devices (such as refrigerators, TVs, air conditioners, electric meters, etc.), intelligent robots, workshop equipment, wireless terminals in unmanned driving, wireless terminals in remote surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, or wireless terminals in smart homes, flight equipment (such as intelligent robots, hot air balloons, drones, airplanes), etc. The terminal device can also be other devices with terminal functions. For example, the terminal device can also be a device that serves as a terminal function in D2D communication. In this application, terminal devices with wireless transceiver functions and chips that can be set in the aforementioned terminal devices are collectively referred to as terminal devices.

[0078] The method provided in the embodiment of the present application is described in detail below in conjunction with the communication system shown in FIG1 .

[0079] In order to better understand the solutions provided by the embodiments of the present application, some terms, concepts or processes involved in the embodiments of the present application are first introduced below.

[0080] (1) Channel coding.

[0081] As shown in Figure 2, the channel coding section lies between source coding and modulation. It is responsible for channel coding the information bits (or bit stream) generated by the source. After modulation, the modulated symbols are sent across a noisy channel to the receiver for demodulation. After demodulation, the receiver performs channel decoding. The channel decoding section, located between demodulation and source decoding, is responsible for recovering the source information bits.

[0082] In this application, the length of information bits may be referred to as payload size.

[0083] (2)CRC encoding.

[0084] CRC encoding is a form of channel coding. During CRC encoding, information bits from the source are CRC-encoded to produce a CRC codeword. For example, if the information bit length is K, the CRC codeword consists of K information bits and R check bits (also known as a checksum or CRC code) concatenated after the K information bits. This means the CRC codeword length is K + R bits. K and R are positive integers.

[0085] For a CRC codeword with a check bit length of R, there exists a CRC polynomial gCRC with a highest power of R. This gCRC can be used to generate R check bits, so gCRC can be called the generator polynomial of this check bit. In this application, power can be replaced by exponent, and the highest power can be replaced by the highest exponent. The generator polynomial can be determined by negotiation between the sender and the receiver, or can be determined by protocol definition, preconfiguration, or predefinition, so the length of the check bit can be determined based on the polynomial.

[0086] Here's an example to illustrate the CRC checksum generation process. Assume the message polynomial is M(D), where the message polynomial is determined by the binary information bits to be sent. For example, if the value of the Xth binary information bit is 1, the coefficient of the polynomial term with a power of X-1 is 1. If the value of the Yth binary bit is 0, the coefficient of the polynomial term with a power of Y-1 is 0. In other words, the polynomial does not include terms with a power of Y, where X and Y are positive integers. To obtain the check bits, shift M(D) left by R bits, raising each term to a power of R. The polynomial is expressed as M(D)*D^R, where * represents multiplication. The remainder obtained by dividing M(D)*D^R by the generating polynomial gCRC is the check bit.

[0087] For example, assuming the parity bit generator polynomial is gCRCLmax = gCRC4 = D^4 + D+1, its binary representation is 10011, a total of 5 bits, where Lmax = 4, i.e., R = 4. Assuming the sender wants to send a data sequence of 6 binary bits, 101011, then the message polynomial is M(D) = D^5 + D^3 + D+1, where ^ represents exponential operation. Furthermore, we can obtain M(D)*D^5 = D^9 + D^7 + D^5 + D^4. Dividing the binary bits 1010110000 corresponding to M(D)*D^5 by the binary information bits corresponding to the polynomial gCRCLmax is 10011, i.e., using the modulo-2 algorithm, we obtain an R-bit remainder. In this example, the remainder's bit sequence is 0100, which is the parity bit. Therefore, the resulting CRC codeword bit stream after CRC encoding is 1010110100, where the first six bits are the original data (i.e., information bits) and the last four bits are parity bits. The sender can then process the bit stream 1010110100 and send it back. If no errors occur during data transmission, the data containing the parity bits received by the receiver will be divisible by the binary bits of the parity bit generator polynomial, 10011. If an error occurs during transmission, the data containing the parity bits received by the receiver will not be divisible by 10011, allowing the receiver to identify the transmission error.

[0088] In this application, the transmitter and receiver can be network devices or terminal devices, respectively. It is understood that in downlink communication, the network device is the transmitter and the terminal device is the receiver, while in uplink communication, the terminal device is the transmitter and the network device is the receiver. A network device can be either a transmitter or a receiver. If the transmitter is a network device, then the receiver is a terminal device, and this is downlink communication. If the transmitter is a terminal device, then the receiver is a network device, and this is uplink communication. Furthermore, this application does not exclude the possibility that both the transmitter and receiver are terminal devices, in which case D2D communication occurs between the transmitter and receiver.

[0089] (3)CA-polar encoding.

[0090] In the NR system, the coding scheme used by the transmitter is related to the bit length of the message to be transmitted. For information bits of 1 to 2 bits, simplex codes are used, mapping the information bits to the constellation point with the largest Euclidean distance. For information bits of 3 to 11 bits, LTE-Reed-Muller (LTE-RM) codes are used. This scheme uses a mask sequence to improve the code distance and combines it with fast Hadamard transform (FHT) decoding to achieve maximum likelihood (ML) performance. However, the decoding complexity under ML performance is still very high. For information bits of 12 to 19 bits, parity check-polar codes (PC-polar) are used. This scheme is simple to implement in hardware and effectively improves the code distance of short codes. However, the description of the PC check structure is not concise. For information bits greater than or equal to 20 bits, CA-polar coding is used.

[0091] CA-polar coding interleaves the CRC codewords on the basis of CRC coding, and then polar codes the interleaved CRC sequence, as shown in Figure 3. The purpose of interleaving is to disperse the CRC check bits to different positions in the message sequence, so that the interleaved CRC sequence can meet the requirements of early stopping of decoding. The interleaved sequence will be sent to the polar encoder for encoding. It will be understood that the processing steps shown in Figure 3 are merely exemplary and are not used to limit the steps that must be performed by CA-polar coding, nor are they used to limit the coding method that must be applied to the CRC check bits involved in this application. For example, after being encoded by the polar encoder, the codewords encoded by the polar encoder can also be processed by the rate matching module and the interleaver module.

[0092] (4) Rate matching.

[0093] A data block before encoding is called a transport block (TB). Because a TB has a large number of bits, the transmitter typically splits a TB into multiple code blocks (CBs), each of which undergoes independent channel coding. Because the physical resources used to transmit a code block may not match the physical time-frequency resources of the code block to be transmitted, the code block to be transmitted must undergo bit retransmission or puncturing to match the capacity of the physical time-frequency resources. This process is called rate matching. Multiple channel-coded CBs undergo rate matching, interleaving, concatenation, and other processes before being transmitted as a single physical data block (codeword) to the receiver.

[0094] Based on the description of the CRC check bit generation process described above, it can be seen that the current CRC check bit length is the same as the highest power of the check bit generator polynomial. In other words, a CRC polynomial can only support one CRC check bit length. When using different code lengths and code rates, the length of the check bits with optimal performance varies. Therefore, the transmitter and receiver cannot flexibly select check bits of appropriate length based on the same CRC polynomial. This leads to problems such as an increase in the block error rate (BLER) and / or an increase in the signal-to-noise ratio (SNR) required to achieve the required BLER, resulting in reduced communication performance. In addition, if the transmitter and receiver need to select appropriate check bits, the existing technology can only achieve this by changing the CRC polynomial, which increases system latency and reduces communication performance.

[0095] In view of this, embodiments of the present application provide a method for determining cyclic redundancy check bits to achieve flexible selection of check bit length. In this method, the check bit length corresponding to the code length information of the data to be transmitted containing the information bits and the length information of the information bits can be determined. Then, check bits of the length are generated using a CRC polynomial to achieve the determination of check bits of flexible length.

[0096] The method can be implemented by a first communication device, which can serve as a transmitter and / or receiver of information bits. Accordingly, the device that transmits information bits to the first communication device can be called a second communication device. That is, the first communication device is the transmitter and the second communication device is the receiver; or, the first communication device is the receiver and the second communication device is the transmitter. For the transmitter, this method can be used to flexibly generate check bits that are compatible with the code length and code rate, and CRC encoding can be achieved through the check bits. Correspondingly, the same check bits can be generated at the receiver in a corresponding manner, so that verification can be achieved through the check bits. Referring to the description in this application, the transmitter may include a network device or a terminal device, and the receiver may include a network device or a terminal device.

[0097] The following describes a method for determining cyclic redundancy check bits provided in an embodiment of the present application in conjunction with the accompanying drawings.

[0098] 4 , when the first communication device is used as the execution subject, a method for determining cyclic redundancy check bits provided by an embodiment of the present application may include the following operations.

[0099] S401: The first communication device obtains information bits.

[0100] Among them, information bits are the bit streams transmitted between the transmitter and the receiver.

[0101] For example, if the first communication device is a transmitter of information bits, the information bits may be source-coded information bits. In another example, if the first communication device is a receiver of information bits, the information bits may be decoded CRC codewords, which include information bits and check bits.

[0102] Optionally, the first communication device may also obtain first information and second information. The first information is code length information of the data to be transmitted including information bits. For example, the code length of the data to be transmitted including information bits is 30, 32, or 40 bits. The data to be transmitted refers to data mapped to physical time-frequency resources. For example, in CA-polar coding, the first information is mother code length information before rate matching. In coding scenarios other than CA-polar coding, the first information is code length information of the data to be transmitted after rate matching.

[0103] For the convenience of explanation below, the code length of the data to be transmitted is recorded as N bits. The first information can be used to indicate N.

[0104] The second information is information about the length of the information bits, where the length of the information bits is the length of bits that need to be transmitted and is generated by the information source at the transmitting end, and can be denoted as K. The second information can be used to indicate K.

[0105] Optionally, the first communication device may determine the code length information and the length information of the information bit based on resource configuration information corresponding to the information bit. For example, the first communication device may determine N and K based on time-frequency resource information such as the number of available resource elements (REs) in a physical resource block (PRB), the number of transmission layers, and the code rate R and modulation order Q in a modulation coding scheme (MCS) table.

[0106] Exemplarily, if the first communication device is a terminal device, the terminal device can receive (or obtain) resource configuration information from the network device, and the resource configuration information can pre-configure the transmission parameters of the information bits, wherein the transmission parameters may include code length information of the data to be transmitted containing the information bits and / or length information of the information bits.

[0107] In addition, if the first communication device is a network device, the network device may determine the first information and the second information according to the resource configuration information, and carry the first information and the second information in the resource configuration information sent to the terminal device.

[0108] S402: The first communication device determines, based on the first corresponding relationship, that the check bit length is L, where L is a natural number.

[0109] In the present application, the first corresponding relationship includes the corresponding relationship between the code length information of the data to be transmitted including the information bits, the length information of the information bits and the check bit length.

[0110] The first correspondence may include a correspondence table between the code length information of the data to be transmitted including the information bits, the length information of the information bits, and the length of the check bits. Optionally, the correspondence table may also include a first CRC polynomial. As shown in Figures 5 to 7, N represents the code length of the data to be transmitted including the information bits, K represents the length of the information bits, and L represents the length of the check bits. Optionally, for different first CRC polynomials, the correspondence between N, K, and L in the correspondence table shown in Figures 5 to 7 remains unchanged.

[0111] Optionally, Figures 5 to 7 include corresponding relationship tables between N, K and L when N=32, N=30 and N=40, respectively, wherein in Figures 5 to 7, the value range of K is 1 to 19.

[0112] Based on Figures 5 to 7, different (N, K) combinations correspond to different Ls. Therefore, after the first communication device determines the first information (or determines N) and the second information (or determines K), it can determine the L corresponding to the N indicated by the first information and the K indicated by the second information based on the correspondence table between the code length information of the data to be transmitted containing the information bits, the length information of the information bits, and the check bit length.

[0113] Optionally, as an example of determining a correspondence table, L may be determined based on a CRC polynomial (i.e., a generator polynomial of check bits) that optimizes coding performance under a combination of N and K. For example, the highest power of the CRC polynomial that optimizes coding performance is used as the L corresponding to the combination of C and K in the correspondence table. In addition, the first correspondence may also be set by manual configuration or other means, which is not specifically limited in this application.

[0114] Optionally, the first communication device may also obtain indication information of the first corresponding relationship (which may be referred to as first indication information). The indication information may be sent by a device that transmits information bits to the first communication device. For example, if the first communication device is a terminal device, the network device may send the indication information to the first communication device, and accordingly, the first communication device may receive the indication information from the network device. The first corresponding relationship may be determined by the network device or may be determined in a preconfigured or predefined manner. In addition, the first communication device obtaining the indication information of the first corresponding relationship may also be understood as the first communication device reading the indication information through the communication interface.

[0115] S403: The first communication device determines a first check bit according to a first CRC polynomial, wherein the length of the first check bit is L. The first check bit is a check bit of the information bit.

[0116] The highest power of the first CRC polynomial is Lmax, where Lmax is a positive integer and is greater than or equal to L. The first CRC polynomial may be a generator polynomial of check bits agreed upon between a transmitter and a receiver of information bits.

[0117] Alternatively, the first CRC polynomial may be determined by protocol definition, preconfiguration, or predefinition, etc. Referring to the description in this application, a parity bit (called a second parity bit) of length Lmax may be generated according to the first CRC polynomial.

[0118] Optionally, if L=0 as determined in S402 , then in S403 , the first communication device may generate a first check bit with a length of 0 according to the first CRC polynomial.

[0119] Alternatively, when L=0, the first communication device determines that it does not need to generate the first check bit, that is, the first communication device can skip S403 and not perform the CRC check. For example, the first communication device can perform subsequent processing on the information bits, such as polar encoding the information bits under CA-polar coding.

[0120] Based on the process shown in Figure 4, the first communication device can determine the corresponding check bit length as L according to the code length information of the data to be transmitted and the length information of the information bit, and further generate a first check bit of length L according to the first CRC polynomial. Therefore, the length of the check bit can be flexibly determined according to the code length and bit length.

[0121] The following describes the manner in which the first communication device generates the first check bit in S403 by way of an example.

[0122] In method 1, the first communication device determines the second parity bit according to the first CRC polynomial, and then determines the first parity bit according to the second parity bit.

[0123] In method 1, the first communication device may generate parity bits of length Lmax, i.e., second parity bits, based on the first CRC polynomial, and then determine L bits as first parity bits based on the second parity bits. The method for determining the second parity bits based on the first CRC polynomial may refer to the method for generating parity bits based on a parity bit generator polynomial described in this application, and will not be further described.

[0124] Optionally, the method for determining the L bits based on the second parity bit may be to extract L bits from the second parity bit in order from front to back. Taking the bit stream 0100 as an example, extracting 2 bits in order from front to back means extracting 01, and extracting 2 bits in order from back to front means extracting 00. In addition, the method for determining the L bits may also be to extract L bits from the second parity bit in order from back to front, or to connect the second parity bits end to end and extract L bits from a certain position in the middle in order from right to left or from back to front, or to randomly extract L bits, etc., without specific requirements.

[0125] The following describes method 1 in conjunction with the corresponding relationship table shown in FIG5 .

[0126] Assuming that the first CRC polynomial is D^11+D^10+D^9+D^5+1, the length of the second parity bit determined according to the first CRC polynomial is 11 bits. When N=32 and K={1,2}, through S402, the first communication device can query the correspondence table shown in Figure 5 and determine that L corresponding to the combination of N and K is 0. The first communication device can extract the 0-bit first parity bit from the 11-bit second parity bits generated according to the first CRC polynomial. Wherein, K={1,2} means K=1 or K=2. When N=32 and K={3}, L corresponding to the combination of N and K shown in Figure 5 is 1. The first communication device can extract the 1-bit first parity bit from the 11-bit second parity bits generated according to the first CRC polynomial, for example, selecting the first bit of the second parity bit as the first parity bit. When N = 32 and K = {4, 5, 6}, L corresponding to the combination of N and K shown in FIG5 is 2. The first communication device can extract a 2-bit first parity bit from the 11-bit second parity bits generated according to the first CRC polynomial, for example, selecting the first 2 bits of the second parity bits as the first parity bits. When N = 32 and K = {7, 8, 9, 10, 11, 12, 13}, L corresponding to the combination of N and K shown in FIG5 is 4. The first communication device can extract a 4-bit first parity bit from the 11-bit second parity bits generated according to the first CRC polynomial, for example, selecting the first 4 bits of the second parity bits as the first parity bits. When N = 32 and K = {14}, L corresponding to the combination of N and K shown in FIG5 is 5. The first communication device can extract a 5-bit first parity bit from the 11-bit second parity bits generated according to the first CRC polynomial, for example, selecting the first 5 bits of the second parity bits as the first parity bits. When N=32, K={15, 16, 17, 18, 19}, L corresponding to the combination of N and K shown in Figure 5 is 6, and the first communication device can extract 6 bits of first check bits from the 11 bits of second check bits generated according to the first CRC polynomial, such as selecting the first 6 bits of the second check bits as the first check bits.

[0127] It can be understood that the implementation method of method 1 described with reference to FIG5 as an example can also be implemented based on the corresponding relationship table shown in FIG6 or FIG7, and the implementation method will not be repeated. In addition, in the above example process, this application does not limit the timing of the first communication device determining the second check bit. For example, the first communication device can determine the second check bit according to the first CRC polynomial before determining that the length of the check bit is L through S402, and determine the first check bit according to the second check bit after determining that the length of the check bit is L through S402; for another example, the first communication device can generate the second check bit according to the first CRC after determining that the length of the check bit is L through S402, and then generate the first check bit according to the second check bit.

[0128] Mode 2: Determine the second CRC polynomial based on the first CRC polynomial, where the highest power of the second CRC is L, and then determine the first check bit based on the second CRC polynomial.

[0129] In mode 2, depending on whether the first CRC polynomial includes a term with a highest power of L, the following two optional implementation modes may be specifically included:

[0130] In mode 2-1, the first CRC polynomial includes terms with a power of L, and the terms in the second CRC polynomial include terms in the first CRC polynomial with a power not higher than L. Therefore, in mode 2-1, the second CRC polynomial can include all terms in the first CRC polynomial with a power not higher than L.

[0131] In other words, the second CRC polynomial in method 2-1 is The set of indices of each item in {L n ,L n-1 ,…,L n2 ,L n1 ,L n0}, is the first CRC polynomial The exponents of each item in the set {L m ,L m-1 ,...,L m2 ,L m1 ,L m0}, where L n =L and L n0 =0.

[0132] As shown in Figure 8, if the first CRC polynomial is: D^11+D^8+D^6+D^5+D^4+D^3+D^2+D+1, N=32 and the value range of K is 1 to 19, when N=32, K={1,2} (i.e. L=0), the second CRC polynomial is 0; when N=32, K={3} (i.e. L=1), the second polynomial is: D+1; when N=32, K={4,5,6} (i.e. L=2), the second polynomial is: D^2+D+1; when N=32 When K = {7, 8, 9, 10, 11, 12, 13} (i.e., L = 4), the second CRC polynomial is: D^4+D^3+D^2+D+1; when N = 32, K = {14} (i.e., L = 5), the second CRC polynomial is: D^5+D^4+D^3+D^2+D+1; when N = 32, K = {15, 16, 17, 18, 19} (i.e., L = 6), the second CRC polynomial is: D^6+D^5+D^4+D^3+D^2+D+1.

[0133] Furthermore, the first communication device may determine the first check bit according to the second CRC polynomial. The method for determining the first check bit according to the second CRC polynomial may refer to the method for generating the check bit according to the check bit generator polynomial introduced in this application, and will not be repeated here.

[0134] In addition, as shown in Figure 9, the corresponding relationship between the first CRC polynomial (D^11+D^10+D^9+D^5+1), N=30, and K=1, 2, ..., 19 is shown. As shown in Figure 10, the corresponding relationship between the first CRC polynomial (D^11+D^8+D^6+D^5+D^4+D^3+D^2+D+1), N=40, and K=1, 2, ..., 19 is shown.

[0135] Optionally, the first communication device may store the correspondence between the first CRC polynomial, N, K, and the second CRC polynomial shown in Figure 8 (hereinafter referred to as the second correspondence), and / or the first communication device may store the correspondence between the first CRC polynomial, L, and the second CRC polynomial (hereinafter referred to as the third correspondence). Therefore, in method 2-1, the first communication device may determine the second CRC polynomial based on the second correspondence and / or the third correspondence to achieve rapid determination of the second CRC polynomial. In addition, the first communication device may also determine the second CRC polynomial based on L and the first CRC polynomial after determining L, so there is no need to store the second correspondence and the third correspondence in advance.

[0136] Optionally, the first communication device may obtain (e.g., receive) indication information of the second correspondence and / or the third correspondence. The indication information may be sent by a device that transmits information bits to and from the first communication device. For example, if the first communication device is a terminal device, the indication information may be sent to the first communication device by a network device. The second correspondence and / or the third correspondence may be determined by the network device or may be determined in a preconfigured or predefined manner.

[0137] Optionally, the first communication device may obtain (eg, receive) first indication information, where the first indication information may be used to indicate the first corresponding relationship, and to indicate at least one of the second corresponding relationship and the third corresponding relationship.

[0138] For example, as shown in FIG8 , in mode 2-1, when the code length is N=32 and the number of message bits K is 1 or 2, L=0, the second CRC polynomial is 0, that is, the length of the first check bit is 0; when N=32, K=3, L=1, the first communication device can extract the last 2 items in the first CRC polynomial to obtain the second CRC polynomial (D+1), and generate 1 check bit as the first check bit according to the second CRC polynomial; when N=32, K={4,5,6}, L=2, the first communication device can extract the last 3 items in the first CRC polynomial to obtain the second CRC polynomial (D^2+D+1), and generate 2 check bits as the first check bit according to the second CRC polynomial; when N=32, K={7,8,9,10,11,12,13}, L=4, the first communication device can extract the last 3 items in the first CRC polynomial to obtain the second CRC polynomial (D^2+D+1), and generate 2 check bits as the first check bit according to the second CRC polynomial. The last 5 terms in the RC polynomial obtain a second CRC polynomial (D^4+D^3+D^2+D+1), and 4 check bits are generated as first check bits through the second CRC polynomial; when N=32, K=14, L=5, the first communication device can obtain the second CRC polynomial (D^5+D^4+D^3+D^2+D+1) according to the last 6 terms in the first CRC polynomial, and generate 5 check bits as first check bits according to the second CRC polynomial; when N=32, K={15,16,17,18,19}, L=6, the first communication device can obtain the second CRC polynomial (D^6+D^5+D^4+D^3+D^2+D+1) according to the last 7 terms in the first CRC polynomial, and generate 6 check bits as first check bits according to the second CRC polynomial.

[0139] In mode 2-2, the second CRC polynomial includes at least one term in the first CRC polynomial and also includes terms other than the first CRC polynomial. In other words, the second CRC polynomial is obtained by adding new terms to at least one term in the first CRC polynomial.

[0140] Exemplarily, the first CRC polynomial does not include terms with a power of L, and the terms in the second CRC polynomial are terms with a power including L and at least one term in the first CRC polynomial with a power less than L (or at least one term in the first CRC polynomial with a power less than L). Therefore, in method 2-2, in addition to obtaining the second CRC polynomial based on the terms with a power less than L in the first CRC polynomial, it is necessary to additionally supplement terms with a power of L as at least one term in the second CRC polynomial, so that the highest power of the terms in the second CRC polynomial is L.

[0141] Optionally, the second CRC polynomial may be supplemented with at least one term having a power less than L based on some or all of the terms in the first CRC polynomial. For example, the second CRC polynomial may further include terms having a power less than L and not included in the first CRC polynomial. For example, if the first CRC polynomial does not include terms having a power of (L-1), the second CRC polynomial may include terms having a power of (L-1) in addition to the terms having a power less than L in the first CRC polynomial.

[0142] As shown in Figure 11, if the first CRC polynomial is: D^6+D^3+D^2+D+1, N=32 and the value range of K is 1 to 19, when N=32, K={7,8,9,10,11,12,13} (i.e. L=4), the second CRC polynomial is: D^4+D^3+D^2+D+1, where D^4 is not an item in the first CRC polynomial; when N=32, K={14} (i.e. L= 5), the second CRC polynomial is: D^5+D^4+D^3+D^2+D+1, where D^5 and D^4 are not terms in the first CRC polynomial; when N=32, K={15,16,17,18,19} (i.e., L=6), the second CRC polynomial is: D^6+D^5+D^4+D^3+D^2+D+1, where D^5 and D^4 are not terms in the first CRC polynomial.

[0143] Furthermore, in method 2-2, the first communication device may determine the first check bit based on the second CRC polynomial. The method for determining the first check bit based on the second CRC polynomial may refer to the method for generating the check bit based on the generator polynomial of the check bit introduced in this application, and will not be repeated here.

[0144] Optionally, the first communication device may store the correspondence between the first CRC polynomial, N, K, and the second CRC polynomial shown in Figure 11 (hereinafter referred to as the fourth correspondence), and / or the first communication device may store the correspondence between the first CRC polynomial, L, and the second CRC polynomial (hereinafter referred to as the fifth correspondence). Therefore, in method 2-2, the first communication device may determine the second CRC polynomial based on the fourth correspondence and / or the fifth correspondence to achieve rapid determination of the second CRC polynomial. In addition, the first communication device may also determine the second CRC polynomial based on L and the first CRC polynomial after determining L, so there is no need to store the fourth correspondence and the fifth correspondence in advance.

[0145] It can be understood that, in the present application, the difference between the second correspondence and the fourth correspondence is that, in the second correspondence, the terms in the second CRC polynomial are all included in the first CRC polynomial, while in the fourth correspondence, the terms in the second CRC polynomial include at least one term that does not belong to the first CRC polynomial. Similarly, in the fifth correspondence, the terms in the second CRC polynomial include at least one term that does not belong to the first CRC polynomial.

[0146] Optionally, the first communication device may obtain (e.g., receive) indication information of the fourth correspondence and / or the fifth correspondence. The indication information may be sent by a device that transmits information bits to and from the first communication device. For example, if the first communication device is a terminal device, the indication information may be sent to the first communication device by a network device. The fourth correspondence and / or the fifth correspondence may be determined by the network device or may be determined in a preconfigured or predefined manner.

[0147] Optionally, the first communication device may obtain (eg, receive) first indication information, where the first indication information may be used to indicate the first correspondence and at least one of the fourth correspondence and the fifth correspondence. For example, the first communication device may receive the first indication information from the network device.

[0148] Optionally, in mode 2, the first communication device may further determine whether the second CRC polynomial is a reducible polynomial.

[0149] Among them, if a polynomial with rational coefficients of power greater than zero can be factorized into the product of two polynomials with rational coefficients of lower power but both greater than zero, then the polynomial is called a reducible polynomial.

[0150] If the second CRC polynomial obtained by the above method 2-1 or method 2-2 is a reducible polynomial, that is, the second CRC polynomial can be factorized into the product of two polynomials with rational number coefficients of lower degree but both greater than zero, then the first communication device can also determine a third CRC polynomial based on the second CRC polynomial, wherein the third CRC polynomial is not a reducible polynomial, that is, the third CRC polynomial cannot be factorized into the product of two polynomials with rational number coefficients of lower degree but both greater than zero.

[0151] Optionally, the first communications device may delete at least one term other than terms with a power of L from the terms included in the second CRC polynomial, that is, delete at least one term with a power less than L from the second CRC polynomial, to obtain an irreducible third CRC polynomial. When the CRC polynomial is a reducible polynomial, the error correction capability corresponding to the parity bits generated based on the polynomial is reduced. Therefore, the error correction capability may be improved by generating parity bits based on the third CRC polynomial.

[0152] It is understood that the above methods 1, 2-1, and 2-2 are exemplary descriptions of the methods for determining the first parity bit according to the first CRC polynomial in this application, and the above methods can also be implemented in combination. For example, for the same first CRC polynomial and N, the first parity bit can be determined using at least two different methods in methods 1, 2-1, and 2-2 for different value ranges of K; for another example, the first parity bit can be determined using different methods in methods 1, 2-1, and 2-2 for different first CRC polynomials, and so on. No further details are given.

[0153] Optionally, in this application, in addition to the polynomials in the aforementioned examples, the first CRC polynomial may also use any CRC polynomial shown in Figure 12 or Figure 13. The highest power of the polynomial shown in Figure 12 is 11, and the highest power of the polynomial shown in Figure 13 is 6.

[0154] Optionally, the first communication device in the present application may further send second indication information to the second communication device after determining that the length of the check bit is L in S402. This second indication information may be used to indicate that the check bit length is L. Therefore, the first communication device and the second communication device use the same number of check bits. Optionally, the second communication device may adopt the method used by the first communication device to determine the first check bit in S403 to determine a check bit length of L. The implementation method is not further described.

[0155] Based on the same concept, an embodiment of the present application also provides a communication method. The method can be implemented by a first device and a second device. The first device and the second device can respectively serve as any one of the transmitting end and the receiving end of the information bits to be sent. For example, the first device can serve as a transmitting end or be included in the transmitting end, the second device can serve as a receiving end or be included in the receiving end, or the first device can serve as a receiving end or be included in the receiving end, and the second device can serve as a transmitting end or be included in the transmitting end. In this method, the first device can use the method shown in Figure 4 to determine the length L of the check bit, and the first device can send a second indication information to the second device, and the second indication information can be used to indicate that the length of the check bit is L. Accordingly, the second device can know L and further determine the first check bit. Therefore, the method can determine the length of the first check bit by the transmitting end or the receiving end, and indicate the length to the other end, reducing the processing complexity of the other end.

[0156] As shown in FIG14 , a communication method provided in an embodiment of the present application may include the following steps.

[0157] S1401: The first device determines second indication information, where the second indication information is used to indicate a check bit length L.

[0158] The method for determining the check bit length L can be found in the introduction to S401 to S402 and will not be elaborated here.

[0159] For example, as described in S401, the first device can determine the code length information N of the data to be transmitted including the check bits and the length K of the information bits based on the resource configuration information corresponding to the information bits, and determine the length of the check bits to be L based on the first corresponding relationship, wherein the first corresponding relationship may include the corresponding relationship between N, K and L.

[0160] Exemplarily, the second indication information may include a check bit length indication field or information element. For example, the value of the field or information element may be set to L.

[0161] Optionally, as described above, the first device may obtain first indication information, and the first indication information may be used to indicate the first corresponding relationship. In addition, the first corresponding relationship may also be pre-configured, pre-defined, or defined by a protocol.

[0162] S1402: The first device sends second indication information to the second device.

[0163] Correspondingly, the second device may obtain the second indication information and determine that the check bit length is L according to the second device.

[0164] Optionally, the second indication information may be carried on a control channel or a data channel, and this application does not impose any specific restrictions.

[0165] S1403: The second device determines a first check bit according to the first CRC polynomial, wherein the length of the first check bit is L.

[0166] The second device determines the manner in which the first parity bit is determined based on the first CRC polynomial. For details, see S403 for the description of the manner in which the first device determines the first parity bit based on the first CRC polynomial, which will not be expanded upon here. For example, the second device may determine the first parity bit using the aforementioned manner 1 or manner 2.

[0167] It is understandable that in order to implement the functions in the above embodiments, the embodiments of the present application also provide a communication device. The communication device may include hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should readily appreciate that, in combination with the units and method steps of each example described in the embodiments disclosed in this application, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in hardware or in a manner driven by computer software depends on the specific application scenario and design constraints of the technical solution.

[0168] Figures 15 to 17 are schematic diagrams of the structure of a possible communication device provided in an embodiment of the present application. This communication device can be used to implement the functions of the first communication device in the above method embodiment, thereby also achieving the beneficial effects of the above method embodiment. In one possible implementation, the communication device can be a network device or terminal device as shown in Figure 1. For relevant details and effects, please refer to the description of the above embodiment.

[0169] As shown in FIG15 , communication device 1500 includes a processing unit 1510 and a communication unit 1520 , wherein communication unit 1520 may also be a transceiver unit or an input / output interface, etc. Communication device 1500 may be used to implement the functions of the first communication device in the method embodiments shown in FIG4 and / or FIG14 .

[0170] Optionally, when implementing the method performed by the first communication device shown in FIG4 , the communication unit 1520 may be configured to obtain information bits. The processing unit 1510 may be configured to determine, based on a first corresponding relationship, a check bit length of L, where L is a natural number, the first corresponding relationship including a correspondence between code length information of the to-be-transmitted data containing the information bits, length information of the information bits, and the check bit length; and determine a first check bit based on a first CRC polynomial, where the highest power of a term in the first CRC polynomial is Lmax, Lmax is a positive integer and Lmax is greater than or equal to L, and the first check bit length is L.

[0171] Optionally, the processing unit 1510 may be specifically configured to determine a second check bit according to the first CRC polynomial, where the length of the second check bit is the Lmax; and determine the first check bit according to the second check bit.

[0172] Optionally, the processing unit 1510 may be specifically configured to determine a second CRC polynomial based on the first CRC polynomial, the highest power of the second CRC being the L; and determine the first check bit based on the second CRC polynomial.

[0173] Optionally, the processing unit 1510 can be specifically used to delete at least one term in the second CRC polynomial except the term with the power of L to obtain a third CRC polynomial, wherein the second CRC polynomial is a reducible polynomial and the third CRC polynomial is not a reducible polynomial; and determine the first check bit based on the third CRC polynomial.

[0174] Optionally, the processing unit 1510 may also be configured to obtain first indication information, where the first indication information is configured to indicate the first corresponding relationship.

[0175] Optionally, the processing unit 1510 may also be configured to send second indication information, where the second indication information is configured to indicate that the check bit length is L.

[0176] When implementing the actions performed by the first device in the method shown in FIG14 , the processing unit 1510 may be configured to determine second indication information. The communication unit 1520 may be configured to send the second indication information. The second indication information can be found in the description of FIG14 and will not be further described here.

[0177] Optionally, the processing unit 1510 may be further configured to determine a second check bit according to the first CRC polynomial, where the length of the second check bit is Lmax; and determine the first check bit according to the second check bit.

[0178] Optionally, the processing unit 1510 may be specifically configured to determine a second CRC polynomial based on the first CRC polynomial, the highest power of the second CRC being the L; and determine the first check bit based on the second CRC polynomial.

[0179] Optionally, the processing unit 1510 can be specifically used to delete at least one term in the second CRC polynomial except the term with the power of L to obtain a third CRC polynomial, wherein the second CRC polynomial is a reducible polynomial and the third CRC polynomial is not a reducible polynomial; and determine the first check bit based on the third CRC polynomial.

[0180] Optionally, the processing unit 1510 may also be configured to obtain first indication information, where the first indication information is configured to indicate the first corresponding relationship.

[0181] When implementing the actions performed by the second device in the method shown in FIG14 , the communication unit 1520 may be configured to obtain second indication information. The processing unit 1510 may be configured to determine a second check bit based on the first CRC polynomial, where the length of the second check bit is Lmax; and determine the first check bit based on the second check bit.

[0182] Optionally, the processing unit 1510 may also be configured to determine a second CRC polynomial based on the first CRC polynomial, the highest power of the second CRC being the L; and determine the first check bit based on the second CRC polynomial.

[0183] Optionally, the processing unit 1510 can be specifically used to delete at least one term in the second CRC polynomial except the term with the power of L to obtain a third CRC polynomial, wherein the second CRC polynomial is a reducible polynomial and the third CRC polynomial is not a reducible polynomial; and determine the first check bit based on the third CRC polynomial.

[0184] The division of modules in the embodiments of the present application is illustrative and is merely a logical functional division. In actual implementation, other division methods may be used. Furthermore, the functional modules in the various embodiments of the present application may be integrated into a single processor, or may exist physically separately, or two or more modules may be integrated into a single module. The aforementioned integrated modules may be implemented in the form of hardware or software functional modules.

[0185] As shown in Figure 16, a communication device 1600 provided in an embodiment of the present application is used to implement the communication method provided in the present application. The communication device 1600 can be a communication device that applies the communication method, or a component in a communication device, or a device that can be used in conjunction with a communication device. The communication device 1600 can be a first communication device. Specifically, the communication device 1600 can be a chip system or a chip. In the embodiment of the present application, the chip system can be composed of a chip, or can include a chip and other discrete devices. The communication device 1600 includes at least one processor 1620 for implementing the communication method provided in the embodiment of the present application. The communication device 1600 can also include an output interface 1610, which can also be referred to as an input-output interface. In the embodiment of the present application, the output interface 1610 can be used to communicate with other devices via a transmission medium, and its functions may include sending and / or receiving. For example, when the communication device 1600 is a chip, it transmits to other chips or devices via the output interface 1610. The processor 1620 can be used to implement the method shown in the above method embodiment.

[0186] Exemplarily, the processor 1620 may be used to execute actions executed by the processing unit 1510 , and the output interface 1610 may be used to execute actions executed by the communication unit 1520 , which will not be described in detail.

[0187] Optionally, the communication device 1600 may further include at least one memory 1630 for storing program instructions and / or data. The memory 1630 is coupled to the processor 1620. Coupling in the embodiments of the present application is an indirect coupling or communication connection between devices, units, or modules, which may be electrical, mechanical, or other forms, and is used for information exchange between devices, units, or modules. The processor 1620 may operate in conjunction with the memory 1630. The processor 1620 may execute program instructions stored in the memory 1630. At least one of the at least one memory may be integrated with the processor.

[0188] In an embodiment of the present application, the memory 1630 may be a non-volatile memory, such as a hard disk drive (HDD) or a solid-state drive (SSD), or may be a volatile memory (volatile memory), such as a random-access memory (RAM). A memory is any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory in the embodiment of the present application may also be a circuit or any other device that can implement a storage function, for storing program instructions and / or data.

[0189] In the embodiments of the present application, the processor 1620 may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component, and may implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of the present application. A general-purpose processor may be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of the present application may be directly implemented as being executed by a hardware processor, or may be executed by a combination of hardware and software modules in the processor.

[0190] As shown in Figure 17, a communication device 1700 provided in an embodiment of the present application is used to implement the communication method provided in the present application. The communication device 1700 can be a communication device that applies the communication method shown in the embodiment of the present application, or it can be a component in a communication device, or it can be a device that can be used in combination with a communication device. The communication device 1700 can be a first communication device. Among them, the communication device 1700 can be a chip system or a chip. In the embodiment of the present application, the chip system can be composed of a chip, or it can include a chip and other discrete devices. Part or all of the communication method for applying the Huygens equivalent surface provided in the above embodiment can be implemented by hardware or by software. When implemented by hardware, the communication device 1700 may include: an input interface circuit 1701, a logic circuit 1702 and an output interface circuit 1703.

[0191] Optionally, taking the device being used to implement the function of the receiving end as an example, the input interface circuit 1701 can be used to execute the above-mentioned receiving action performed by the communication unit 1520, the output interface circuit 1703 can be used to execute the above-mentioned sending action performed by the communication unit 1520, and the logic circuit 1702 can be used to execute the above-mentioned action performed by the processing unit 1510, which will not be repeated.

[0192] Optionally, the communication device 1700 may be a chip or an integrated circuit in a specific implementation.

[0193] Part or all of the operations and functions performed by the data transmission device described in the above method embodiments of the present application can be completed using a chip or an integrated circuit.

[0194] An embodiment of the present application provides a computer-readable storage medium storing a computer program, wherein the computer program includes instructions for executing the above method embodiment.

[0195] An embodiment of the present application provides a computer program product comprising instructions, which, when executed on a computer, enables the computer to execute the above method embodiment.

[0196] Embodiments of the present application provide a communication system. Specifically, the communication system may include a first communication device for implementing the method shown in FIG. 4 and / or FIG. 14 . For details, please refer to the relevant descriptions in the above method embodiments, which will not be repeated here. The communication system may include the structure shown in FIG. 1 or FIG. 2 .

[0197] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0198] The present application is described with reference to the flow chart and / or block diagram of the method, device (system), and computer program product according to the embodiment of the present application. It should be understood that each flow process and / or box in the flow chart and / or block diagram and the combination of the flow process and / or box in the flow chart and / or block diagram can be realized by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processing machine or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device produce a device for realizing the function specified in one flow chart flow or multiple flows and / or one box or multiple boxes of the block diagram.

[0199] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a product including an instruction device that implements the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0200] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0201] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present application.

[0202] Obviously, those skilled in the art may make various changes and modifications to the embodiments of the present application without departing from the embodiments and scope of the present application. Thus, if these modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations.

Claims

1. A method for determining cyclic redundancy check bits, characterized in that: include: Get information bits; Determining, according to a first corresponding relationship, a check bit length as L, where L is a natural number, the first corresponding relationship including a correspondence between code length information of the to-be-transmitted data including the information bits, length information of the information bits, and the check bit length; A first check bit is determined according to a first cyclic redundancy check (CRC) polynomial, wherein the length of the first check bit is the check bit length L, the highest power of the terms in the first CRC polynomial is Lmax, Lmax is a positive integer and Lmax is greater than or equal to L.

2. The method according to claim 1, wherein The determining of the first check bit according to the first cyclic redundancy check (CRC) polynomial includes: Determine a second check bit according to the first CRC polynomial, where the length of the second check bit is the Lmax; The first check bit is determined according to the second check bit.

3. The method according to claim 1, wherein The determining of the first check bit according to the first cyclic redundancy check (CRC) polynomial includes: Determine a second CRC polynomial according to the first CRC polynomial, where the highest power of the second CRC is the L; The first parity bit is determined according to the second CRC polynomial.

4. The method according to claim 3, wherein The first CRC polynomial includes terms whose power is L, and the terms in the second CRC polynomial include terms in the first CRC polynomial whose power is not higher than L.

5. The method according to claim 3, wherein The first CRC polynomial does not include terms with a power of L, and the terms in the second CRC polynomial include terms with a power of L and at least one term in the first CRC polynomial with a power less than L.

6. The method according to any one of claims 3 to 5, wherein: The determining the first check bit according to the second CRC polynomial includes: Deleting at least one term other than the term with the power of L in the second CRC polynomial to obtain a third CRC polynomial, wherein the second CRC polynomial is a reducible polynomial, and the third CRC polynomial is not a reducible polynomial; The first check bit is determined according to the third CRC polynomial.

7. The method according to any one of claims 1 to 6, wherein: The method further comprises: Acquire first indication information, where the first indication information is used to indicate the first corresponding relationship.

8. The method according to any one of claims 1 to 7, wherein: The method further comprises: Second indication information is sent, where the second indication information is used to indicate that the check bit length is L.

9. A communication method, characterized in that: include: The first device determines second indication information, where the second indication information is used to indicate a check bit length L, where L is a natural number and is determined according to a first correspondence relationship, where the first correspondence relationship includes a correspondence between code length information of to-be-transmitted data including information bits, length information of the information bits, and the check bit length; The first device sends the second indication information to the second device.

10. The method according to claim 9, wherein The method further comprises: The first device determines a first check bit according to a first cyclic redundancy check (CRC) polynomial, wherein the length of the first check bit is L, the highest power of the terms in the first CRC polynomial is Lmax, Lmax is a positive integer and Lmax is greater than or equal to L.

11. The method according to claim 10, wherein The first device determines a first check bit according to a first cyclic redundancy check (CRC) polynomial, including: The first device determines a second check bit according to the first CRC polynomial, where the length of the second check bit is the Lmax; The first device determines the first check bit according to the second check bit.

12. The method according to claim 10, wherein The first device determines a first check bit according to a first cyclic redundancy check (CRC) polynomial, including: The first device determines a second CRC polynomial based on the first CRC polynomial, where the highest power of the second CRC is the L; The first device determines the first parity bits according to the second CRC polynomial.

13. The method according to claim 12, wherein: The first CRC polynomial includes terms whose power is L, and the terms in the second CRC polynomial include terms in the first CRC polynomial whose power is not higher than L.

14. The method according to claim 12, wherein The first CRC polynomial does not include terms with a power of L, and the terms in the second CRC polynomial include terms with a power of L and at least one term in the first CRC polynomial with a power less than L.

15. The method according to any one of claims 12 to 14, wherein: The first device determines the first check bit according to the second CRC polynomial, including: The first device deletes at least one term in the second CRC polynomial except the term with the power of L to obtain a third CRC polynomial, wherein the second CRC polynomial is a reducible polynomial and the third CRC polynomial is not a reducible polynomial; and determines the first check bit based on the third CRC polynomial.

16. The method according to any one of claims 9 to 15, wherein: The method further comprises: The first device obtains first indication information, where the first indication information is used to indicate the first corresponding relationship.

17. A communication method, characterized in that: include: The second device obtains the first indication information, where the second indication information is used to indicate a check bit length L, where L is a natural number; The second device determines a first check bit according to a first cyclic redundancy check (CRC) polynomial, wherein the length of the first check bit is L, the highest power of the terms in the first CRC polynomial is Lmax, Lmax is a positive integer and Lmax is greater than or equal to L.

18. The method according to claim 17, wherein The method further comprises: The second device determines a first check bit according to a first cyclic redundancy check (CRC) polynomial, wherein the length of the first check bit is L, the highest power of the terms in the first CRC polynomial is Lmax, Lmax is a positive integer and Lmax is greater than or equal to L.

19. The method according to claim 18, wherein The second device determines a first check bit according to a first cyclic redundancy check (CRC) polynomial, including: The second device determines a second check bit according to the first CRC polynomial, where the length of the second check bit is the Lmax; The first device determines the first check bit according to the second check bit.

20. The method of claim 18, wherein The second device determines a first check bit according to a first cyclic redundancy check (CRC) polynomial, including: The second device determines a second CRC polynomial based on the first CRC polynomial, where the highest power of the second CRC is the L; The second device determines the first parity bits according to the second CRC polynomial.

21. The method according to claim 20, wherein The first CRC polynomial includes terms whose power is L, and the terms in the second CRC polynomial include terms in the first CRC polynomial whose power is not higher than L.

22. The method according to claim 20, wherein The first CRC polynomial does not include terms with a power of L, and the terms in the second CRC polynomial include terms with a power of L and at least one term in the first CRC polynomial with a power less than L.

23. The method according to any one of claims 20 to 22, wherein: The second device determines the first check bit according to the second CRC polynomial, including: The second device deletes at least one term other than the term with the power of L from the second CRC polynomial to obtain a third CRC polynomial, wherein the second CRC polynomial is a reducible polynomial, and the third CRC polynomial is not a reducible polynomial; The first check bit is determined according to the third CRC polynomial.

24. A device for determining cyclic redundancy check bits, characterized in that: Including communication module and processing module: The communication module is used to obtain information bits; The processing module is used to determine the check bit length as L according to a first corresponding relationship, where L is a natural number, and the first corresponding relationship includes the correspondence between the code length information of the data to be transmitted including the information bits, the length information of the information bits, and the check bit length; and to determine the first check bit according to a first cyclic redundancy check CRC polynomial, wherein the length of the first check bit is the check bit length L, the highest power of the terms in the first CRC polynomial is Lmax, and Lmax is a positive integer and the Lmax is greater than or equal to the L.

25. The device according to claim 24, wherein The processing module is specifically used for: Determine a second check bit according to the first CRC polynomial, where the length of the second check bit is the Lmax; The first check bit is determined according to the second check bit.

26. The device according to claim 24, wherein The processing module is specifically used for: Determine a second CRC polynomial according to the first CRC polynomial, where the highest power of the second CRC is the L; The first parity bit is determined according to the second CRC polynomial.

27. The device according to claim 26, wherein The first CRC polynomial includes terms whose power is L, and the terms in the second CRC polynomial include terms in the first CRC polynomial whose power is not higher than L.

28. The device according to claim 26, wherein The first CRC polynomial does not include terms with a power of L, and the terms in the second CRC polynomial include terms with a power of L and at least one term in the first CRC polynomial with a power less than L.

29. The device according to any one of claims 26 to 28, characterized in that The processing module is specifically used for: Delete at least one term in the second CRC polynomial except the term with the power of L to obtain a third CRC polynomial, wherein the second CRC polynomial is a reducible polynomial and the third CRC polynomial is not a reducible polynomial; and determine the first check bit according to the third CRC polynomial.

30. The device according to any one of claims 24 to 29, characterized in that The communication module is also used for: First indication information is obtained from a network device, where the first indication information is used to indicate the first corresponding relationship.

31. The device according to any one of claims 24 to 30, characterized in that The communication module is also used for: Second indication information is sent to the second communication device, where the second indication information is used to indicate that the check bit length is L.

32. A first communication device, characterized in that: Including communication module and processing module: The processing module is configured to determine second indication information, where the second indication information is used to indicate a check bit length L, where L is a natural number and is determined based on a first corresponding relationship, where the first corresponding relationship includes a corresponding relationship between code length information of the to-be-transmitted data including information bits, length information of the information bits, and the check bit length; The communication module is configured to send the second indication information to the second device.

33. The device according to claim 32, wherein The processing module is further configured to: A first check bit is determined according to a first cyclic redundancy check (CRC) polynomial, wherein the length of the first check bit is L, the highest power of the terms in the first CRC polynomial is Lmax, Lmax is a positive integer and Lmax is greater than or equal to L.

34. The device according to claim 33, wherein The processing module is specifically used for: Determine a second check bit according to the first CRC polynomial, where the length of the second check bit is the Lmax; The first check bit is determined according to the second check bit.

35. The device according to claim 33, wherein The processing module is specifically used for: Determine a second CRC polynomial according to the first CRC polynomial, where the highest power of the second CRC is the L; The first parity bit is determined according to the second CRC polynomial.

36. The device according to claim 35, wherein The first CRC polynomial includes terms whose power is L, and the terms in the second CRC polynomial include terms in the first CRC polynomial whose power is not higher than L.

37. The device according to claim 35, wherein The first CRC polynomial does not include terms with a power of L, and the terms in the second CRC polynomial include terms with a power of L and at least one term in the first CRC polynomial with a power less than L.

38. The device according to any one of claims 35 to 37, characterized in that The processing module is specifically used for: Delete at least one term in the second CRC polynomial except the term with the power of L to obtain a third CRC polynomial, wherein the second CRC polynomial is a reducible polynomial and the third CRC polynomial is not a reducible polynomial; and determine the first check bit according to the third CRC polynomial.

39. The device according to any one of claims 32 to 38, characterized in that The communication module is also used for: Acquire first indication information, where the first indication information is used to indicate the first corresponding relationship.

40. A second communication device, characterized in that: Including communication module and processing module: The communication module is used to obtain the first indication information, and the second indication information is used to indicate the check bit length L; The processing module is used to determine a first check bit according to a first cyclic redundancy check (CRC) polynomial, wherein the length of the first check bit is L, the highest power of the terms in the first CRC polynomial is Lmax, and Lmax is a positive integer and is greater than or equal to L.

41. The device according to claim 40, wherein The processing module is further configured to: A first check bit is determined according to a first cyclic redundancy check (CRC) polynomial, wherein the length of the first check bit is L, the highest power of the terms in the first CRC polynomial is Lmax, Lmax is a positive integer and Lmax is greater than or equal to L.

42. The device according to claim 41, wherein The processing module is specifically used for: Determine a second check bit according to the first CRC polynomial, where the length of the second check bit is the Lmax; The first check bit is determined according to the second check bit.

43. The device according to claim 41, wherein The processing module is specifically used for: The second device determines a second CRC polynomial based on the first CRC polynomial, where the highest power of the second CRC is the L; The first device determines the first parity bits according to the second CRC polynomial.

44. The device according to claim 43, wherein The first CRC polynomial includes terms whose power is L, and the terms in the second CRC polynomial include terms in the first CRC polynomial whose power is not higher than L.

45. The device according to claim 43, wherein The first CRC polynomial does not include terms with a power of L, and the terms in the second CRC polynomial include terms with a power of L and at least one term in the first CRC polynomial with a power less than L.

46. ​​The device according to any one of claims 43 to 45, characterized in that The processing module is specifically used for: The second device deletes at least one term in the second CRC polynomial except the term with the power of L to obtain a third CRC polynomial, wherein the second CRC polynomial is a reducible polynomial and the third CRC polynomial is not a reducible polynomial; and determines the first check bit based on the third CRC polynomial.

47. A communication device, characterized in that The method comprises a processor and an interface circuit, wherein the interface circuit is used to receive signals from other communication devices outside the communication device and transmit them to the processor or send signals from the processor to other communication devices outside the communication device, and the processor is used to implement the method according to any one of claims 1 to 8, or to implement the method according to any one of claims 9 to 16, or to implement the method according to any one of claims 17 to 23 through a logic circuit or executing code instructions.

48. A communication device, characterized in that include: processor and memory; The memory is used to store one or more computer programs, which include computer-executable instructions. When the communication device is running, the processor executes the one or more computer programs stored in the memory, so that the communication device performs the method according to any one of claims 1 to 8, or the communication device performs the method according to any one of claims 9 to 16, or the communication device performs the method according to any one of claims 17 to 23.

49. A computer-readable storage medium, characterized in that The storage medium stores a computer program or instruction. When the computer program or instruction is executed by the communication device, the method according to any one of claims 1 to 8 is implemented, or the method according to any one of claims 9 to 16 is implemented, or the method according to any one of claims 17 to 23 is implemented.

50. A computer program product, characterized in that The computer program product stores computer-readable instructions. When the computer-readable instructions are executed, the method according to any one of claims 1 to 8 is executed, or the method according to any one of claims 9 to 16 is executed, or the method according to any one of claims 17 to 23 is executed.

51. A chip, characterized in that: The chip includes at least one processor, and the processor is used to execute the method according to any one of claims 1 to 8, or to execute the method according to any one of claims 9 to 16, or to execute the method according to any one of claims 17 to 23.