Semiconductor device

Abstract

Embodiments provide a semiconductor device capable of obtaining stable characteristics. According to one embodiment, a semiconductor device includes an element portion. The element portion includes: a semiconductor component including a pad portion semiconductor region and a cell semiconductor region; a gate electrode; and a gate pad portion electrically connected to the gate electrode. The gate pad portion includes a first conductive feature and a first feature between the pad portion semiconductor region and the first conductive feature. The first member includes a first region and a second region arranged in a second direction intersecting a first direction from the pad portion semiconductor region to the first conductive member. At least a portion of the first conductive feature is located between the first region and the second region. A first surface of the at least a portion of the first conductive member includes a first recess and protrusion.

Description

Technical Field

[0001] An embodiment of the present invention relates to a semiconductor device. Background Art

[0002] For example, in a semiconductor device, stable characteristics are desired.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1

[0006] Patent Document 1: Japanese Patent Application Publication No. 2022-50887 Summary of the invention

[0007] Technical problem to be solved by the invention

[0008] Embodiments provide a semiconductor device capable of obtaining stable characteristics.

[0009] Means for solving technical problems

[0010] According to an embodiment, a semiconductor device includes an element portion. The element portion includes: a semiconductor component including a pad portion semiconductor region and a unit semiconductor region; a gate electrode; and a gate pad portion electrically connected to the gate electrode. The gate pad portion includes a first conductive component and a first component between the pad portion semiconductor region and the first conductive component. The first component includes a first region and a second region arranged along a second direction intersecting a first direction from the pad portion semiconductor region to the first conductive component. At least a portion of the first conductive component is located between the first region and the second region. The first surface of the at least a portion of the first conductive component includes a first concave-convex. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 This is a schematic cross-sectional view showing a portion of the semiconductor device according to the first embodiment.

[0012] Figure 2 This is a schematic cross-sectional view showing a portion of the semiconductor device according to the first embodiment.

[0013] Figure 3 It is a schematic plan view illustrating the semiconductor device according to the first embodiment.

[0014] Figure 4 is a schematic cross-sectional view illustrating a portion of a semiconductor device according to a second embodiment.

[0015] Figure 5 is a schematic cross-sectional view illustrating a portion of a semiconductor device according to a third embodiment.

[0016] Figure 6 It is a schematic plan view illustrating a semiconductor device according to a fourth embodiment. DETAILED DESCRIPTION

[0017] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0018] The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the ratio of the size between parts, etc. are not necessarily the same as in reality. Even when the same part is shown, the sizes and ratios may be shown differently depending on the drawings.

[0019] In the present specification and each drawing, the same elements as those described above with respect to the drawings in which they appear are denoted by the same reference numerals, and detailed description thereof will be appropriately omitted.

[0020] (First Embodiment)

[0021] Figure 1 is a schematic cross-sectional view illustrating a portion of the semiconductor device according to the first embodiment.

[0022] Figure 2 is a schematic cross-sectional view illustrating a portion of the semiconductor device according to the first embodiment.

[0023] Figure 3 It is a schematic plan view illustrating the semiconductor device according to the first embodiment.

[0024] Figure 1 yes Figure 3 A1-A2 line cross-sectional view. Figure 2 This is the third B1-B2 line cross-sectional view.

[0025] like Figure 1 to Figure 3 As shown, the semiconductor device 110 of the embodiment includes an element portion 10E. The element portion 10E includes a semiconductor component 10M, a gate electrode 53, and a gate pad portion 53P.

[0026] like Figure 1 and Figure 2 As shown, the semiconductor component 10M includes a pad portion semiconductor region 18 and a unit semiconductor region 10s. The gate pad portion 53P is electrically connected to the gate electrode 53.

[0027] like Figure 1 As shown, the gate pad portion 53P includes a first conductive member 61. For example, through the connection layer 53c (see Figure 1 as well as Figure 2 ), the first conductive component 61 is electrically connected to the gate electrode 53. The connecting layer 53c may be provided at Figure 1 and Figure 2The illustrated cross-sections are different in position. The connection layer 53c may include, for example, at least one of polysilicon and metal. The first conductive member 61 functions as a pad portion conductive layer.

[0028] In this example, the gate pad portion 53P includes a first component 31. The first component 31 is provided between the pad portion semiconductor region 18 and the first conductive component 61. The first component 31 includes a first region 31a and a second region 31b. A second direction D2 from the first region 31a to the second region 31b intersects with a first direction D1 from the pad portion semiconductor region 18 to the first conductive component 61.

[0029] The first direction D1 is set as the Z-axis direction. A direction perpendicular to the Z-axis direction is set as the X-axis direction. A direction perpendicular to the Z-axis direction and the X-axis direction is set as the Y-axis direction. The second direction D2 may be, for example, the X-axis direction.

[0030] At least a portion of the first conductive component 61 is disposed between the first region 31a and the second region 31b. The first surface 61F of at least a portion of the first conductive component 61 includes a first concavoconvex 61dp. The first concavoconvex 61dp is located at the upper portion of the step S1 disposed between the first region 31a and the second region 31b. For example, the first concavoconvex 61dp reflects the step S1 based on the first region 31a and the second region 31b. For example, the first concavoconvex 61dp corresponds to the step S1 based on the first region 31a and the second region 31b. The step S1 is formed, for example, by the first region 31a and the second region 31b.

[0031] Figure 2 The unit part 10C of the element part 10E is illustrated. Figure 2 As shown, the element portion 10E further includes a drain electrode 51 and a source electrode 52. For example, a semiconductor component 10M (unit semiconductor region 10s) is provided between the drain electrode 51 and the source electrode 52. A gate electrode 53 is provided between the semiconductor component 10M and the source electrode 52. An insulating layer 45 is provided between the gate electrode 53 and the source electrode 52, and between the gate electrode 53 and the semiconductor component 10M. The source electrode 52 functions as a source pad portion 52P.

[0032] The current flowing between the drain electrode 51 and the source electrode 52 can be controlled by the potential of the gate electrode 53. The semiconductor device 110 is a transistor. An example of the cell unit 10C will be described later.

[0033] In the embodiment, in the gate pad portion 53P, the first surface 61F of the first conductive member 61 includes the first concavo-convex 61dp. As can be seen from this, various defects in wire bonding can be suppressed. It is believed that the reason is that by providing the first concavo-convex 61dp, the appropriate conditions in the wire bonding process are close to (or consistent with) the appropriate conditions in the wire bonding process in the unit portion 10C.

[0034] like Figure 2 As shown, in the unit portion 10C, due to the plurality of gate electrodes 53, a second concave-convex 52dp is formed on the second surface 52F of the source electrode 52. In the wire bonding of the second surface 52F including the second concave-convex 52dp, there is an appropriate condition (e.g., the second condition). In an embodiment, by providing the first concave-convex 61dp on the first surface 61F of the first conductive component 61, the appropriate condition (e.g., the first condition) can be consistent with (or close to) the second condition in the wire bonding of the first surface 61F. Thus, various defects (e.g., peeling or cracking, etc.) in the wire bonding process can be suppressed. Various defects can be suppressed and stable characteristics can be obtained. According to an embodiment, a semiconductor device capable of obtaining stable characteristics can be provided.

[0035] When the first condition and the second condition are identical or close to each other, high-productivity joining can be performed.

[0036] According to the embodiment, it is possible to suppress defects in the wire bonding process and obtain a high yield. According to the embodiment, it is possible to obtain high reliability.

[0037] like Figure 3 As shown, for example, the gate electrode 53 extends along a third direction D3. The third direction D3 intersects a plane including the first direction D1 and the second direction D2. The third direction D3 may be, for example, the Y-axis direction. Figure 3 As shown, the first region 31 a and the second region 31 b may extend along the third direction D3 .

[0038] When the gate electrode 53 extends along the third direction D3, the second concavo-convex 52dp of the second surface 52F of the source electrode 52 preferably extends along the third direction D3. When the first region 31a and the second region 31b extend along the third direction D3, the first concavo-convex 61dp of the first surface 61F of the first conductive component 61 extends along the third direction D3. By aligning the direction of the first concavo-convex 61dp with the direction of the second concavo-convex 52dp, the bonding conditions are more easily consistent. For example, the characteristics are more stable. For example, it is possible to further suppress defects.

[0039] In the embodiment, the direction of the first concavoconvex 61dp may intersect with the direction of the second concavoconvex 52dp. In the embodiment, the first concavoconvex 61dp may be along any direction along the XY plane. The first concavoconvex 61dp may be in a lattice shape or an island shape along two directions along the XY plane.

[0040] Can Figure 1 The first length L1 and the first distance d1 are defined as shown in FIG. Figure 2 The second length L2 and the second distance d2 are defined as shown. The first ratio of the first length L1 to the first distance d1 is preferably consistent with or close to the second ratio of the second length L2 to the second distance d2. As a result, the appropriate bonding conditions in the unit portion 10C (source pad portion 52P) and the gate pad portion 53P are consistent. Alternatively, it is easy to make these appropriate conditions close to each other.

[0041] Figure 1 The illustrated first length L1 is the length of the first region 31a along the second direction D2. The first distance d1 is the distance between the first region 31a and the second region 31b along the second direction D2. The length of the second region 31b along the second direction D2 may be the same as the first length L1.

[0042] On the other hand, Figure 2 and Figure 3 As shown, a plurality of gate electrodes 53 are provided. The plurality of gate electrodes 53 are arranged in a cross direction Dx that crosses the first direction D1. In this example, the cross direction Dx is the second direction D2. The second length L2 is the length of one of the plurality of gate electrodes 53 along the cross direction Dx. Another of the plurality of gate electrodes 53 is adjacent to the one of the plurality of gate electrodes 53. The second distance d2 is the distance between another of the plurality of gate electrodes 53 and one of the plurality of gate electrodes along the cross direction Dx.

[0043] The first ratio and the second ratio are defined based on such lengths. In the embodiment, the first ratio is preferably 0.5 times or more and 1.5 times or less of the second ratio. Thus, appropriate conditions related to bonding are easily matched or approached.

[0044] In one example, the first component 31 includes polysilicon, for example.

[0045] like Figure 1As shown, the gate pad portion 53P may further include a first insulating component 41. The first insulating component 41 includes a first insulating region 41a, a second insulating region 41b, and a third insulating region 41c. The first insulating region 41a is disposed between the pad portion semiconductor region 18 and the first region 31a in the first direction D1. The second insulating region 41b is disposed between the pad portion semiconductor region 18 and the second region 31b in the first direction D1. The third insulating region 41c is disposed between the first insulating region 41a and the second insulating region 41b in the second direction D2. In one example, the first insulating component 41 includes, for example, silicon oxide.

[0046] like Figure 1 As shown, the gate pad portion 53P may further include a second component 32. The second component 32 is disposed between the first region 31a and the first conductive component 61 in the first direction D1, between the second region 31b and the first conductive component 61 in the first direction D1, and between the third insulating region 41c and the first conductive component 61 in the first direction D1.

[0047] The second member 32 may include, for example, at least one selected from the group consisting of Ti, Mo, V, and TiW. For example, high adhesion is easily obtained.

[0048] In the semiconductor device 110, the thickness of the first insulating component 41 may be, for example, greater than 200 nm and less than 1000 nm. The thickness of the first component 31 may be, for example, greater than 250 nm and less than 450 nm. The thickness of the second component 32 may be, for example, greater than 100 nm and less than 200 nm. The thickness of the first conductive component 61 may be, for example, greater than 3500 nm and less than 5000 nm. These thicknesses are lengths along the first direction D1.

[0049] like Figure 3 As shown, the semiconductor device 110 may include a source electrode 52, a source connection lead 52W, and a gate connection lead 53W. The source connection lead 52W is electrically connected to the source electrode 52. The gate connection lead 53W is electrically connected to the gate pad portion 53P. The first thickness t53W of the gate connection lead 53W may be consistent with or close to the second thickness t52W of the source connection lead 52W. Thus, the appropriate bonding conditions of the two can be consistent or close. For example, the first thickness t53W is greater than or equal to 0.8 times and less than or equal to 1.2 times the second thickness t52W. The materials of these leads may be the same as each other.

[0050] like Figure 2As shown, the unit semiconductor region 10s may include a first semiconductor region 11 of the first conductivity type, a second semiconductor region 12 of the second conductivity type, and a third semiconductor region 13 of the first conductivity type. In this example, the unit semiconductor region 10s further includes a fourth semiconductor region 14 of the second conductivity type. In this example, the unit semiconductor region 10s further includes a fifth semiconductor region 15 of the first conductivity type.

[0051] The first conductivity type is one of the n-type and the p-type. The second conductivity type is the other of the n-type and the p-type. Hereinafter, the first conductivity type is the n-type and the second conductivity type is the p-type.

[0052] The first semiconductor region 11 includes, for example, a first partial region 11a, a second partial region 11b, and a third partial region 11c. The direction from the first partial region 11a to the second partial region 11b is along the intersecting direction Dx (for example, the second direction D2). The third partial region 11c is located between the first partial region 11a and the gate electrode 53 in the first direction D1.

[0053] The direction from the second partial region 11b to the second semiconductor region 12 is along the first direction D1. A portion of the second semiconductor region 12 is located between the third partial region 11c and the third semiconductor region 13 in the intersecting direction Dx (for example, the second direction D2). A portion of the second semiconductor region 12 is located between the second partial region 11b and the third semiconductor region 13 in the first direction D1.

[0054] The third semiconductor region 13 is provided between the third partial region 11c and the fourth semiconductor region 14 in the intersecting direction Dx. A portion of the second semiconductor region 12 is provided between the third partial region 11c and the third semiconductor region 13 in the intersecting direction Dx.

[0055] The source electrode 52 is electrically connected to the third semiconductor region 13 and the fourth semiconductor region 14 . The source electrode 52 is in contact with the third semiconductor region 13 and the fourth semiconductor region 14 .

[0056] A part of the insulating layer 45 is provided between the third partial region 11c and the gate electrode 53. A part of the insulating layer 45 functions as a gate insulating film. A part of the insulating layer 45 includes silicon oxide.

[0057] In the semiconductor device 110 , the first conductivity type impurity concentration in the third semiconductor region 13 is higher than that in the first semiconductor region 11 . The second conductivity type impurity concentration in the fourth semiconductor region 14 is higher than that in the second semiconductor region 12 .

[0058] The fifth semiconductor region 15 is provided between the drain electrode 51 and the first semiconductor region 11 . The fifth semiconductor region 15 is of the first conductivity type. The first conductivity type impurity concentration in the fifth semiconductor region 15 is higher than the first conductivity type impurity concentration in the first semiconductor region 11 .

[0059] (Second Embodiment)

[0060] Figure 4 is a schematic cross-sectional view illustrating a portion of a semiconductor device according to a second embodiment.

[0061] like Figure 4 As shown, in the semiconductor device 111 of the embodiment, the element portion 10E includes the gate pad portion 53P. The structure of the gate pad portion 53P in the semiconductor device 111 is different from the structure of the gate pad portion 53P in the first embodiment. The structure of the semiconductor device 111 other than this may be the same as the structure of the semiconductor device 110.

[0062] In the semiconductor device 111, the element portion 10E also includes a semiconductor component 10M and a gate electrode 53 (see Figure 2 ) and the gate pad portion 53P. The semiconductor component 10M includes a pad portion semiconductor region 18 and a unit semiconductor region 10s (see Figure 2 ). The gate pad portion 53P is electrically connected to the gate electrode 53 .

[0063] like Figure 4 As shown, the gate pad portion 53P includes a first conductive component 61 and a first insulating component 41. The first insulating component 41 is disposed between the pad portion semiconductor region 18 and the first conductive component 61. The first insulating component 41 includes a first insulating region 41a and a second insulating region 41b. A second direction D2 from the first insulating region 41a to the second insulating region 41b intersects with a first direction D1 from the pad portion semiconductor region 18 to the first conductive component 61. The second insulating region 41b is away from the first insulating region 41a in the second direction D2.

[0064] like Figure 4 As shown, the first surface 61F of the first conductive component 61 includes a first concave-convex 61dp. The first concave-convex 61dp reflects the step difference S1 based on the first insulating region 41a and the second insulating region 41b. For example, the first concave-convex 61dp corresponds to the step difference S1 based on the first insulating region 41a and the second insulating region 41b. The step difference S1 is formed by the first insulating region 41a and the second insulating region 41b, for example.

[0065] In the semiconductor device 111, the appropriate bonding conditions in the gate pad portion 53P are also consistent with or close to the appropriate bonding conditions in the unit portion 10C (source pad portion 52P). Defects in bonding are suppressed. Stable characteristics can be obtained. According to the embodiment, a semiconductor device capable of obtaining stable characteristics can be provided. High-productivity bonding can be implemented. High yield can be obtained. High reliability can be obtained.

[0066] In the semiconductor device 111, the gate electrode 53 also extends along a third direction D3 intersecting a plane including the first direction D1 and the second direction D2 (see Figure 3 The first insulating region 41a and the second insulating region 41b preferably extend along the third direction D3.

[0067] like Figure 4 As shown, in the semiconductor device 111, the first length L1 and the first distance d1 can also be defined. In the semiconductor device 111, the second length L2 and the second distance d2 can be defined (see Figure 2 ).like Figure 4 As shown, the first length L1 is the length of the first insulating region 41a along the second direction D2. The first distance d1 is the distance between the first insulating region 41a and the second insulating region 41b along the second direction D2.

[0068] In the semiconductor device 111, a plurality of gate electrodes 53 may be provided (see Figure 2 ). The plurality of gate electrodes 53 are arranged in the intersecting direction Dx intersecting the first direction D1. The second distance d2 is the length of one of the plurality of gate electrodes 53 along the intersecting direction Dx. Another of the plurality of gate electrodes 53 is adjacent to the one of the plurality of gate electrodes 53. The second distance d2 is the distance between another of the plurality of gate electrodes 53 and one of the plurality of gate electrodes along the intersecting direction Dx (refer to Figure 2 ).

[0069] In the semiconductor device 111 , a first ratio of the first length L1 to the first distance d1 may be greater than or equal to 0.5 times and less than or equal to 1.5 times a second ratio of the second length L2 to the second distance d2 .

[0070] like Figure 4As shown, in the semiconductor device 111, the gate pad portion 53P may further include a first component 31. The first component 31 includes a first region 31a, a second region 31b, and a third region 31c. The first region 31a is provided between the pad portion semiconductor region 18 and the first insulating region 41a. The second region 31b is provided between the pad portion semiconductor region 18 and the second insulating region 41b. The third region 31c is provided between the first region 31a and the second region 31b in the second direction D2. In the first direction D1, the first insulating component 41 is not provided between the third region 31c and the first conductive component 61.

[0071] like Figure 4 As shown, in the semiconductor device 111, the gate pad portion 53P may further include a second component 32. The second component 32 is provided between the first insulating region 41a and the first conductive component 61 in the first direction D1, between the second insulating region 41b and the first conductive component 61 in the first direction D1, and between the third region 31c and the first conductive component 61 in the first direction D1. The second component 32 may include, for example, at least one selected from the group consisting of Ti, Mo, V, and TiW. For example, high adhesion is easily obtained.

[0072] like Figure 4 As shown, in the semiconductor device 111, the gate pad portion 53P may further include a second insulating member 42. The second insulating member 42 is provided between the pad portion semiconductor region 18 and the first member 31. The second insulating member 42 includes, for example, silicon oxide.

[0073] (Third Embodiment)

[0074] Figure 5 is a schematic cross-sectional view illustrating a portion of a semiconductor device according to a third embodiment.

[0075] like Figure 5 As shown, in the semiconductor device 112 of the embodiment, the element portion 10E includes the gate pad portion 53P. The structure of the gate pad portion 53P in the semiconductor device 112 is different from the structure of the gate pad portion 53P in the first embodiment. The structure of the semiconductor device 112 other than this may be the same as the structure of the semiconductor device 110.

[0076] In the semiconductor device 112, the element portion 10E also includes a semiconductor component 10M and a gate electrode 53 (see Figure 2 ) and the gate pad portion 53P. The semiconductor component 10M includes a pad portion semiconductor region 18 and a unit semiconductor region 10s (see Figure 2 ). The gate pad portion 53P is electrically connected to the gate electrode 53 .

[0077] like Figure 5 As shown, in the semiconductor device 112, the gate pad portion 53P includes a first conductive member 61 and a first insulating member 41. The first insulating member 41 is provided between the pad portion semiconductor region 18 and the first conductive member 61.

[0078] like Figure 5 As shown, in the semiconductor device 112 , the first insulating member 41 includes a first insulating region 41a , a second insulating region 41b , and a third insulating region 41c . A second direction D2 from the first insulating region 41a to the second insulating region 41b intersects a first direction D1 from the pad semiconductor region 18 to the first conductive member 61 .

[0079] The position of the third insulating region 41c in the second direction D2 is located between the position of the first insulating region 41a in the second direction D2 and the position of the second insulating region 41b in the second direction D2. The third thickness t3 of the third insulating region 41c in the first direction D1 is thinner than the first thickness t1 of the first insulating region 41a in the first direction D1. The third thickness t3 is thinner than the second thickness t2 of the second insulating region 41b in the first direction D1.

[0080] like Figure 5 As shown, the first surface 61F of the first conductive component 61 includes a first concave-convex 61dp. The first concave-convex 61dp reflects, for example, a step difference S1 based on the first insulating region 41a, the second insulating region 41b, and the third insulating region 41c. The first concave-convex 61dp reflects, for example, a step difference S1 based on the first insulating region 41a, the second insulating region 41b, and the third insulating region 41c. The step difference S1 is formed, for example, by the first insulating region 41a, the second insulating region 41b, and the third insulating region 41c. In the semiconductor device 112, stable characteristics can also be obtained. According to an embodiment, a semiconductor device capable of obtaining stable characteristics can be provided. High-productivity bonding can be implemented. High yield can be obtained. High reliability can be obtained.

[0081] In the semiconductor device 112, the gate electrode 53 also extends along a third direction D3 intersecting a plane including the first direction D1 and the second direction D2 (see Figure 2 The first insulating region 41a and the second insulating region 41b preferably extend along the third direction D3.

[0082] like Figure 5 As shown, in the semiconductor device 112, the first length L1 and the first distance d1 can also be defined. In the semiconductor device 112, the second length L2 and the second distance d2 can be defined (see Figure 2 ).like Figure 5As shown, the first length L1 is the length of the first insulating region 41a along the second direction D2. The first distance d1 is the distance between the first insulating region 41a and the second insulating region 41b along the second direction D2.

[0083] In the semiconductor device 112, a plurality of gate electrodes 53 may be provided (see Figure 2 ). The plurality of gate electrodes 53 are arranged along the intersecting direction Dx intersecting the first direction D1. The second distance d2 is the length of one of the plurality of gate electrodes 53 along the intersecting direction Dx. Another of the plurality of gate electrodes 53 is adjacent to the one of the plurality of gate electrodes 53. The second distance d2 is the distance between another of the plurality of gate electrodes 53 and one of the plurality of gate electrodes along the intersecting direction Dx (refer to Figure 2 ).

[0084] In the semiconductor device 112 , a first ratio of the first length L1 to the first distance d1 may be greater than or equal to 0.5 times and less than or equal to 1.5 times a second ratio of the second length L2 to the second distance d2 .

[0085] like Figure 5 As shown, in the semiconductor device 112, the gate pad portion 53P may further include a first component 31. At least a portion of the first component 31 is disposed between the first insulating region 41a and the second insulating region 41b in the second direction D2. At least a portion of the first component 31 is disposed between the third insulating region 41c and the first conductive component 61 in the first direction D1. The first component 31 may include, for example, polysilicon.

[0086] like Figure 5 As shown, in the semiconductor device 112, the gate pad portion 53P may further include a second component 32. The second component 32 is provided between the first insulating region 41a and the first conductive component 61 in the first direction D1, between the second insulating region 41b and the first conductive component 61 in the first direction D1, and between the first component 31 and the first conductive component 61 in the first direction D1. The second component 32 may include, for example, at least one selected from the group consisting of Ti, Mo, V, and TiW. For example, high adhesion is easily obtained.

[0087] The semiconductor device 111 and the semiconductor device 112 may include a source electrode 52, a source connection lead 52W, and a gate connection lead 53W (see Figure 3). The source connection lead 52W is electrically connected to the source electrode 52. The gate connection lead 53W is electrically connected to the gate pad portion 53P. The first thickness t53W of the gate connection lead 53W can be consistent with or close to the second thickness t52W of the source connection lead 52W. Thus, the appropriate bonding conditions of the two can be consistent or close. For example, the first thickness t53W is greater than or equal to 0.8 times and less than or equal to 1.2 times the second thickness t52W. The materials of these leads can be the same as each other.

[0088] (Fourth Embodiment)

[0089] Figure 6 It is a schematic plan view illustrating a semiconductor device according to a fourth embodiment.

[0090] like Figure 6 As shown, in the semiconductor device 120 of the embodiment, a plurality of element portions 10E are provided. The plurality of element portions 10E apply the structure of the element portion 10E in the semiconductor device 110, the semiconductor device 111, and the semiconductor device 112. The semiconductor device 120 is, for example, a semiconductor module. When a plurality of element portions 10E are provided, the number of bonding wires (source connection lead 52W and gate connection lead 53W, etc.) is large. By making the conditions of the bonding process uniform in the plurality of bonding wires, high manufacturing efficiency can be obtained. The effect of providing the first concave-convex 61dp is further exerted.

[0091] The semiconductor region 10s) includes SiC. The semiconductor component 10M may include at least one selected from the group consisting of 4H-SiC, 6H-SiC, and 3C-SiC. The semiconductor component 10M includes a crystal.

[0092] For example, the first conductivity type impurity includes at least one selected from the group consisting of N, P, and As. For example, the second conductivity type impurity includes at least one selected from the group consisting of B, Al, and Ga.

[0093] In the embodiment, information on the length and thickness is obtained by electron microscope observation, etc. Information on the composition of the material is obtained by SIMS (Secondary Ion Mass Spectrometry) or EDX (Energy dispersive X-ray spectroscopy), etc.

[0094] The implementation method may include the following technical solutions.

[0095] (Technical Solution 1)

[0096] A semiconductor device comprises a device portion,

[0097] The component part includes:

[0098] A semiconductor component, comprising a pad portion semiconductor region and a unit semiconductor region;

[0099] a gate electrode; and

[0100] a gate pad portion electrically connected to the gate electrode,

[0101] The gate pad portion includes:

[0102] a first conductive component; and

[0103] A first component is provided between the pad semiconductor region and the first conductive component,

[0104] The first component includes a first region and a second region arranged along a second direction intersecting the first direction from the pad portion semiconductor region to the first conductive component.

[0105] At least a portion of the first conductive component is located between the first region and the second region,

[0106] The first surface of the at least a portion of the first conductive component includes first projections and depressions.

[0107] (Technical Solution 2)

[0108] The semiconductor device according to claim 1, wherein:

[0109] The gate electrode extends along a third direction intersecting a plane including the first direction and the second direction,

[0110] The first region and the second region extend along the third direction.

[0111] (Technical Solution 3)

[0112] The semiconductor device according to claim 1, wherein:

[0113] The first member includes polysilicon.

[0114] (Technical Solution 4)

[0115] A semiconductor device according to any one of technical solutions 1 to 3, wherein:

[0116] The gate pad portion further includes a first insulating member,

[0117] The first insulating component includes a first insulating region, a second insulating region and a third insulating region.

[0118] The first insulating region is disposed between the pad semiconductor region and the first region in the first direction.

[0119] The second insulating region is disposed between the pad semiconductor region and the second region in the first direction.

[0120] The third insulating region is disposed between the first insulating region and the second insulating region in the second direction.

[0121] (Technical Solution 5)

[0122] The semiconductor device according to claim 4, wherein:

[0123] The gate pad portion further includes a second component,

[0124] The second component is disposed between the first region and the first conductive component in the first direction, between the second region and the first conductive component in the first direction, and between the third insulating region and the first conductive component in the first direction.

[0125] (Technical Solution 6)

[0126] A semiconductor device according to any one of technical solutions 1 to 3, wherein:

[0127] A first ratio of the first length to the first distance is greater than or equal to 0.5 times and less than or equal to 1.5 times a second ratio of the second length to the second distance,

[0128] The first length is the length of the first region along the second direction,

[0129] The first distance is the distance between the first area and the second area along the second direction,

[0130] A plurality of gate electrodes are provided,

[0131] The plurality of gate electrodes are arranged along a crossing direction crossing the first direction,

[0132] The second distance is a length of one of the plurality of gate electrodes along the crossing direction,

[0133] Another gate electrode of the plurality of gate electrodes is adjacent to the one gate electrode of the plurality of gate electrodes,

[0134] The second distance is a distance between the other gate electrode among the plurality of gate electrodes and the one gate electrode among the plurality of gate electrodes along the crossing direction.

[0135] (Technical Solution 7)

[0136] A semiconductor device comprises a device portion,

[0137] The component part includes:

[0138] A semiconductor component, comprising a pad portion semiconductor region and a unit semiconductor region;

[0139] a gate electrode; and

[0140] a gate pad portion electrically connected to the gate electrode,

[0141] The gate pad portion includes:

[0142] a first conductive component; and

[0143] A first insulating component is provided between the pad semiconductor region and the first conductive component.

[0144] The first insulating member includes a first insulating region and a second insulating region arranged along a second direction intersecting the first direction from the pad semiconductor region to the first conductive member.

[0145] The second insulating region is away from the first insulating region in the second direction,

[0146] The first surface of the first conductive component includes first concavities and convexities.

[0147] (Technical Solution 8)

[0148] The semiconductor device according to technical solution 7, wherein:

[0149] The gate electrode extends along a third direction intersecting a plane including the first direction and the second direction,

[0150] The first insulating region and the second insulating region extend along the third direction.

[0151] (Technical Solution 9)

[0152] The semiconductor device according to claim 7 or 8, wherein:

[0153] The gate pad portion further includes a first component,

[0154] The first component includes a first area, a second area and a third area,

[0155] The first region is disposed between the pad semiconductor region and the first insulating region.

[0156] The second region is disposed between the pad semiconductor region and the second insulating region.

[0157] The third region is disposed between the first region and the second region in the second direction,

[0158] In the first direction, the first insulating member is not provided between the third region and the first conductive member.

[0159] (Technical Solution 10)

[0160] The semiconductor device according to technical solution 9, wherein:

[0161] The gate pad portion further includes a second component,

[0162] The second component is disposed between the first insulating region and the first conductive component in the first direction, between the second insulating region and the first conductive component in the first direction, and between the third region and the first conductive component in the first direction.

[0163] (Technical Solution 11)

[0164] The semiconductor device according to technical solution 9 or 10, wherein:

[0165] The gate pad portion further includes a second insulating member,

[0166] The second insulating member is provided between the pad portion semiconductor region and the first member.

[0167] (Technical Solution 12)

[0168] The semiconductor device according to technical solutions 7 to 11, wherein:

[0169] A first ratio of the first length to the first distance is greater than or equal to 0.5 times and less than or equal to 1.5 times a second ratio of the second length to the second distance,

[0170] The first length is the length of the first insulating region along the second direction,

[0171] The first distance is the distance between the first insulating region and the second insulating region along the second direction,

[0172] A plurality of gate electrodes are provided,

[0173] The plurality of gate electrodes are arranged along a crossing direction crossing the first direction,

[0174] The second distance is a length of one of the plurality of gate electrodes along the crossing direction,

[0175] Another gate electrode of the plurality of gate electrodes is adjacent to the one gate electrode of the plurality of gate electrodes,

[0176] The second distance is a distance between the other gate electrode among the plurality of gate electrodes and the one gate electrode among the plurality of gate electrodes along the crossing direction.

[0177] (Technical Solution 13)

[0178] A semiconductor device comprises a device portion,

[0179] The component part includes:

[0180] A semiconductor component, comprising a pad portion semiconductor region and a unit semiconductor region;

[0181] a gate electrode; and

[0182] a gate pad portion electrically connected to the gate electrode,

[0183] The gate pad portion includes:

[0184] a first conductive component; and

[0185] A first insulating component is provided between the pad semiconductor region and the first conductive component.

[0186] The first insulating component includes a first insulating region, a second insulating region and a third insulating region.

[0187] A second direction from the first insulating region to the second insulating region intersects a first direction from the pad semiconductor region to the first conductive component.

[0188] The position of the third insulating region in the second direction is between the position of the first insulating region in the second direction and the position of the second insulating region in the second direction.

[0189] A third thickness of the third insulating region in the first direction is thinner than a first thickness of the first insulating region in the first direction.

[0190] The third thickness is thinner than the second thickness of the second insulating region in the first direction,

[0191] The first surface of the first conductive component includes first concavities and convexities.

[0192] (Technical Solution 14)

[0193] The semiconductor device according to technical solution 13, wherein:

[0194] The gate electrode extends along a third direction intersecting a plane including the first direction and the second direction,

[0195] The first insulating region and the second insulating region extend along the third direction.

[0196] (Technical Solution 15)

[0197] A semiconductor device according to technical solution 13 or 14, wherein:

[0198] The gate pad portion further includes a first component,

[0199] At least a portion of the first component is disposed between the first insulating region and the second insulating region in the second direction,

[0200] The at least a portion of the first component is disposed between the third insulating region and the first conductive component in the first direction,

[0201] The first member includes polysilicon.

[0202] (Technical Solution 16)

[0203] The semiconductor device according to technical solution 15, wherein:

[0204] The gate pad portion further includes a second component,

[0205] The second component is disposed between the first insulating region and the first conductive component in the first direction, between the second insulating region and the first conductive component in the first direction, and between the first component and the first conductive component in the first direction.

[0206] (Technical Solution 17)

[0207] The semiconductor device according to technical solutions 13 to 16, wherein:

[0208] A first ratio of the first length to the first distance is greater than or equal to 0.5 times and less than or equal to 1.5 times a second ratio of the second length to the second distance,

[0209] The first length is the length of the first insulating region along the second direction,

[0210] The first distance is the distance between the first insulating region and the second insulating region along the second direction,

[0211] A plurality of gate electrodes are provided,

[0212] The plurality of gate electrodes are arranged along a crossing direction crossing the first direction,

[0213] The second distance is a length of one of the plurality of gate electrodes along the crossing direction,

[0214] Another gate electrode of the plurality of gate electrodes is adjacent to the one gate electrode of the plurality of gate electrodes,

[0215] The second distance is a distance between the other gate electrode among the plurality of gate electrodes and the one gate electrode among the plurality of gate electrodes along the crossing direction.

[0216] (Technical Solution 18)

[0217] The semiconductor device according to any one of technical solutions 1 to 17, further comprising:

[0218] source electrode;

[0219] A source connection lead electrically connected to the source electrode; and

[0220] a gate connection lead electrically connected to the gate pad portion,

[0221] A first thickness of the gate connection lead is greater than or equal to 0.8 times and less than or equal to 1.2 times a second thickness of the source connection lead.

[0222] (Technical Solution 19)

[0223] The semiconductor device according to claim 18, wherein a plurality of the element portions are provided.

[0224] (Technical Solution 20)

[0225] A semiconductor device according to any one of technical solutions 1 to 19, wherein:

[0226] The semiconductor component includes SiC.

[0227] According to the embodiment, a semiconductor device having improved characteristics can be provided.

[0228] The embodiments of the present invention are described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, as long as a person skilled in the art can implement the present invention in the same manner and obtain the same effect by appropriately selecting from the known range, the specific configuration of each element such as an electrode, a semiconductor component, a conductive component, and an insulating component contained in a semiconductor device is included in the scope of the present invention.

[0229] Furthermore, embodiments in which two or more elements of the specific examples are combined within a technically possible range are also included in the scope of the present invention as long as they include the gist of the present invention.

[0230] Furthermore, as embodiments of the present invention, all semiconductor devices that can be appropriately designed and modified by a person skilled in the art based on the above-described semiconductor device also belong to the scope of the present invention as long as they include the gist of the present invention.

[0231] Furthermore, within the scope of the concept of the present invention, a person skilled in the art can conceive of various changes and modifications, and these changes and modifications also belong to the scope of the present invention.

[0232] Several embodiments of the present invention have been described, but these embodiments are presented as examples and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and changes can be made without departing from the scope of the subject matter of the invention. These embodiments and their variations are included in the scope or subject matter of the invention, and are included in the invention described in the claims and the scope of their equivalents.

[0233] [Explanation of Reference Numerals]

[0234] 10C: unit portion, 10E: element portion, 10M: semiconductor component, 10s: unit semiconductor region, 11-15: first to fifth semiconductor regions, 11a-11c: first to third partial regions, 18: pad semiconductor region, 31, 32: first and second components, 31a-31c: first to third regions, 41, 42: first and second insulating components, 41a-41c: first to third insulating regions, 45: insulating layer, 51: drain electrode, 52: source electrode, 52F: second surface, 52P: source Poles pad portion, 52W: source connection lead, 52dp: second bump, 53: gate electrode, 53P: gate pad portion, 53W: gate connection lead, 53c: connection layer, 61: first conductive component, 61F: first surface, 61dp: first bump, 110~112, 120: semiconductor device, D1~D3: first to third directions, Dx: cross direction, S1: step difference, d1, d2: first and second distances, t1~t3: first to third thickness, t52W: second thickness, t53W: first thickness.

Claims

1. A semiconductor device comprising: a device portion; The component part includes: A semiconductor component, comprising a pad portion semiconductor region and a unit semiconductor region; a gate electrode; and a gate pad portion electrically connected to the gate electrode, The gate pad portion includes: a first conductive component; and A first component is provided between the pad semiconductor region and the first conductive component, The first component includes a first region and a second region arranged along a second direction intersecting the first direction from the pad portion semiconductor region to the first conductive component. At least a portion of the first conductive component is located between the first region and the second region, The first surface of the at least a portion of the first conductive component includes first projections and depressions.

2. The semiconductor device according to claim 1, wherein The gate electrode extends along a third direction intersecting a plane including the first direction and the second direction, The first region and the second region extend along the third direction.

3. The semiconductor device according to claim 1, wherein A first ratio of the first length to the first distance is greater than or equal to 0.5 times and less than or equal to 1.5 times a second ratio of the second length to the second distance, The first length is the length of the first region along the second direction, The first distance is the distance between the first area and the second area along the second direction, A plurality of gate electrodes are provided, The plurality of gate electrodes are arranged along a crossing direction crossing the first direction, The second distance is a length of one of the plurality of gate electrodes along the crossing direction, Another gate electrode of the plurality of gate electrodes is adjacent to the one gate electrode of the plurality of gate electrodes, The second distance is a distance between the other gate electrode among the plurality of gate electrodes and the one gate electrode among the plurality of gate electrodes along the crossing direction.

4. A semiconductor device comprising an element portion, The component part includes: A semiconductor component, comprising a pad portion semiconductor region and a unit semiconductor region; a gate electrode; and a gate pad portion electrically connected to the gate electrode, The gate pad portion includes: a first conductive component; and A first insulating component is provided between the pad semiconductor region and the first conductive component. The first insulating component includes a first insulating region and a second insulating region arranged along a second direction intersecting the first direction from the pad semiconductor region to the first conductive component, and the second insulating region is away from the first insulating region in the second direction. The first surface of the first conductive component includes first concavities and convexities.

5. The semiconductor device according to claim 4, wherein: The gate electrode extends along a third direction intersecting a plane including the first direction and the second direction, The first insulating region and the second insulating region extend along the third direction.

6. The semiconductor device according to claim 4, wherein: A first ratio of the first length to the first distance is greater than or equal to 0.5 times and less than or equal to 1.5 times a second ratio of the second length to the second distance, The first length is the length of the first insulating region along the second direction, The first distance is the distance between the first insulating region and the second insulating region along the second direction, A plurality of gate electrodes are provided, The plurality of gate electrodes are arranged along a crossing direction crossing the first direction, The second distance is a length of one of the plurality of gate electrodes along the crossing direction, Another gate electrode of the plurality of gate electrodes is adjacent to the one gate electrode of the plurality of gate electrodes, The second distance is a distance between the other gate electrode among the plurality of gate electrodes and the one gate electrode among the plurality of gate electrodes along the crossing direction.

7. A semiconductor device comprising an element portion, The component part includes: A semiconductor component, comprising a pad portion semiconductor region and a unit semiconductor region; a gate electrode; and a gate pad portion electrically connected to the gate electrode, The gate pad portion includes: a first conductive component; and A first insulating component is provided between the pad semiconductor region and the first conductive component. The first insulating component includes a first insulating region, a second insulating region and a third insulating region. A second direction from the first insulating region to the second insulating region intersects a first direction from the pad semiconductor region to the first conductive component. The position of the third insulating region in the second direction is between the position of the first insulating region in the second direction and the position of the second insulating region in the second direction. A third thickness of the third insulating region in the first direction is thinner than a first thickness of the first insulating region in the first direction. The third thickness is thinner than the second thickness of the second insulating region in the first direction, and the first surface of the first conductive component includes first projections and depressions.

8. The semiconductor device according to claim 7, wherein: The gate electrode extends along a third direction intersecting a plane including the first direction and the second direction, The first insulating region and the second insulating region extend along the third direction.

9. The semiconductor device according to claim 7, wherein: A first ratio of the first length to the first distance is greater than or equal to 0.5 times and less than or equal to 1.5 times a second ratio of the second length to the second distance, The first length is the length of the first insulating region along the second direction, The first distance is the distance between the first insulating region and the second insulating region along the second direction, A plurality of gate electrodes are provided, The plurality of gate electrodes are arranged along a crossing direction crossing the first direction, The second distance is a length of one of the plurality of gate electrodes along the crossing direction, Another gate electrode of the plurality of gate electrodes is adjacent to the one gate electrode of the plurality of gate electrodes, The second distance is a distance between the other gate electrode among the plurality of gate electrodes and the one gate electrode among the plurality of gate electrodes along the crossing direction.

10. The semiconductor device according to any one of claims 1 to 8, wherein: Also available: source electrode; A source connection lead electrically connected to the source electrode; and a gate connection lead electrically connected to the gate pad portion, A first thickness of the gate connection lead is greater than or equal to 0.8 times and less than or equal to 1.2 times a second thickness of the source connection lead.

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