Data storage method and system of RTL test framework of RISC-V DSP chip and medium

By optimizing the test data and classifying storage, the problem of data redundancy in the prior art is solved, and the utilization rate of storage space and the accuracy of data storage are improved.

CN120010768APending Publication Date: 2025-05-16北京中科昊芯科技有限公司
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202510062725.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-15
Publication Date
2025-05-16

AI Technical Summary

Technical Problem

The existing data storage methods lead to a large amount of duplicate or non-important data during chip testing, occupying a lot of storage space, and affecting the memory utilization rate.

Method used

By analyzing the data sets of different test items, performing optimization processing, eliminating overlapping data and compressing data, and classifying and storing it to the optimal subspace to improve data storage accuracy.

Benefits of technology

It effectively reduces data redundancy, improves the utilization rate of storage space, and ensures the accuracy and efficiency of data storage.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120010768A_ABST
    Figure CN120010768A_ABST
Patent Text Reader

Abstract

The embodiment of the invention provides a data storage method and system for an RTL test framework of an RISC-V DSP chip and a medium, and the method comprises the steps: testing a test item based on the RTL test framework to obtain test data, and carrying out the preprocessing of the test data to obtain optimized data; classifying the optimized data according to the categories of the test items to obtain a plurality of data sets; obtaining storage demand information of each data set and a residual storage space in the database, and dividing the residual storage space into a plurality of subspaces; matching with a subspace in a database based on the storage demand information to obtain a matching result; all the data sets are transmitted to the matched subspaces for storage based on the matching result; the data sets of different test items are analyzed, the data sets are optimized, and the matching result of each data set and the remaining storage space is analyzed, so that the matching result is stored in the optimal subspace, and the data storage precision is improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present application relates to the field of data storage technology, and in particular to a data storage method, system and medium for an RTL test framework of a RISC-V DSP chip. Background Art

[0002] The RTL batch automatic testing framework is used to perform batch automatic testing in the scenario of multiple projects / multiple test case sets at the RTL (Register-Transfer Level) level during VERILOG design.

[0003] A large amount of test data is generated during the chip testing process and needs to be saved. The existing data storage method is to save all the test data in a unified manner, which will cause a large amount of duplicate data or non-important data in the test data, resulting in data redundancy, occupying more storage space, and affecting the utilization of the memory. Summary of the invention

[0004] The purpose of the embodiments of the present application is to provide a data storage method, system and medium for an RTL test framework of a RISC-V DSP chip, by analyzing data sets of different test items, optimizing the data sets, analyzing the matching results of each data set with the remaining storage space, and storing them in the optimal subspace to improve data storage accuracy.

[0005] The embodiment of the present application also provides a data storage method for an RTL test framework of a RISC-V DSP chip, including:

[0006] Test the test items based on the RTL test framework to obtain test data, and pre-process the test data to obtain optimized data;

[0007] Classify the optimization data according to the categories of the test items to obtain multiple data sets;

[0008] Obtain the storage requirement information of each data set and the remaining storage space in the database, and divide the remaining storage space into multiple subspaces;

[0009] Matching the storage requirement information with the subspace in the database to obtain a matching result;

[0010] Based on the matching results, all data sets are transferred to the matching subspace for storage.

[0011] Optionally, in the data storage method of the RTL test framework of the RISC-V DSP chip described in the embodiment of the present application, the test items are tested based on the RTL test framework to obtain test data, and the test data is preprocessed to obtain optimized data, specifically including:

[0012] Obtain test data, analyze overlapping data within the same test item, and remove overlapping data within the same test item;

[0013] Eliminate the overlapping data in all test items one by one to obtain the test data after elimination;

[0014] Compressing based on the eliminated test data to obtain compressed data;

[0015] Analyze the damage information of the compressed data to determine whether the damage information satisfies the set condition information;

[0016] If it is satisfied, the optimized data is obtained; if it is not satisfied, the eliminated test data is recompressed.

[0017] Optionally, in the data storage method of the RTL test framework of the RISC-V DSP chip described in the embodiment of the present application, the optimization data is classified according to the category of the test item to obtain multiple data sets, specifically including:

[0018] Acquire test condition information of the test items, and classify the test items once based on the test condition information to obtain a plurality of first categories;

[0019] Analyze the test item data in different categories based on the first category to obtain data relationship information;

[0020] Compare the data relationship information with the set relationship information to obtain the correlation degree;

[0021] If the correlation degree is greater than or equal to the set correlation degree threshold, the category of the test item is adjusted to generate multiple second categories;

[0022] If the correlation is less than the set correlation threshold, a data set is generated.

[0023] Optionally, in the data storage method of the RTL test framework of the RISC-V DSP chip described in the embodiment of the present application, the storage requirement information of each data set and the remaining storage space in the database are obtained, and the remaining storage space is divided into multiple subspaces, specifically including:

[0024] Obtain storage requirement information for each data set, including storage space information and storage rate information;

[0025] The remaining storage space in the database is obtained, and the remaining storage space is divided into the same number of subspaces according to the number of data sets.

[0026] Optionally, in the data storage method of the RTL test framework of the RISC-V DSP chip described in the embodiment of the present application, matching is performed based on the storage requirement information with the subspace in the database to obtain a matching result, specifically including:

[0027] Obtain the storage requirement information of the data set and the storage parameter information of each subspace;

[0028] Match the storage requirement information of the data set with the storage parameter information of all subspaces to obtain the storage matching degree;

[0029] Determining whether the stored matching degree is greater than or equal to a set matching degree threshold;

[0030] If it is greater than or equal to, the data set is matched to the current subspace;

[0031] If it is less than, adjust the storage parameter information of the subspace.

[0032] Optionally, in the data storage method of the RTL test framework of the RISC-V DSP chip described in the embodiment of the present application, all data sets are transferred to the matching subspace for storage based on the matching results, specifically including:

[0033] Obtain matching results, and retrieve the data set and matching subspace based on the matching results;

[0034] Obtain the current transmission rate of the data set and the optimal transmission rate of the subspace;

[0035] Compare and calculate the current transmission rate of the data set with the optimal transmission rate of the subspace to obtain the transmission occupancy rate;

[0036] Determining whether the transmission occupancy rate is greater than or equal to a set occupancy rate threshold;

[0037] If it is greater than or equal to, the data set will be transmitted and stored according to the current transmission rate;

[0038] If it is less than, adjust the current transmission rate.

[0039] In a second aspect, an embodiment of the present application provides a data storage system for an RTL test framework of a RISC-V DSP chip, the system comprising: a memory and a processor, the memory comprising a program of a data storage method for an RTL test framework of a RISC-V DSP chip, and when the program of the data storage method for the RTL test framework of the RISC-V DSP chip is executed by the processor, the following steps are implemented:

[0040] Test the test items based on the RTL test framework to obtain test data, and pre-process the test data to obtain optimized data;

[0041] Classify the optimization data according to the categories of the test items to obtain multiple data sets;

[0042] Obtain the storage requirement information of each data set and the remaining storage space in the database, and divide the remaining storage space into multiple subspaces;

[0043] Matching the storage requirement information with the subspace in the database to obtain a matching result;

[0044] Based on the matching results, all data sets are transferred to the matching subspace for storage.

[0045] Optionally, in the data storage system of the RTL test framework of the RISC-V DSP chip described in the embodiment of the present application, the test items are tested based on the RTL test framework to obtain test data, and the test data is preprocessed to obtain optimized data, specifically including:

[0046] Obtain test data, analyze overlapping data within the same test item, and remove overlapping data within the same test item;

[0047] Eliminate the overlapping data in all test items one by one to obtain the test data after elimination;

[0048] Compressing based on the eliminated test data to obtain compressed data;

[0049] Analyze the damage information of the compressed data to determine whether the damage information satisfies the set condition information;

[0050] If it is satisfied, the optimized data is obtained; if it is not satisfied, the eliminated test data is recompressed.

[0051] Optionally, in the data storage system of the RTL test framework of the RISC-V DSP chip described in the embodiment of the present application, the optimized data is classified according to the category of the test item to obtain multiple data sets, specifically including:

[0052] Acquire test condition information of the test items, and classify the test items once based on the test condition information to obtain a plurality of first categories;

[0053] Analyze the test item data in different categories based on the first category to obtain data relationship information;

[0054] Compare the data relationship information with the set relationship information to obtain the correlation degree;

[0055] If the correlation degree is greater than or equal to the set correlation degree threshold, the category of the test item is adjusted to generate multiple second categories;

[0056] If the correlation is less than the set correlation threshold, a data set is generated.

[0057] In a third aspect, an embodiment of the present application further provides a computer-readable storage medium, wherein the computer-readable storage medium includes a data storage method program for an RTL test framework of a RISC-V DSP chip. When the data storage method program for the RTL test framework of a RISC-V DSP chip is executed by a processor, the steps of the data storage method for the RTL test framework of a RISC-V DSP chip as described in any one of the above items are implemented.

[0058] As can be seen from the above, an embodiment of the present application provides a data storage method, system and medium for an RTL test framework of a RISC-V DSP chip. The method tests the test items based on the RTL test framework to obtain test data, pre-processes the test data to obtain optimized data; classifies the optimized data according to the category of the test items to obtain multiple data sets; obtains the storage requirement information of each data set and the remaining storage space in the database, and divides the remaining storage space into multiple subspaces; matches the subspaces in the database based on the storage requirement information to obtain matching results; based on the matching results, all data sets are transferred to the matching subspaces for storage; by analyzing the data sets of different test items and optimizing the data sets, the matching results of each data set and the remaining storage space are analyzed, so as to store them in the optimal subspace, thereby improving the data storage accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0060] Figure 1 A flowchart of a data storage method for an RTL test framework of a RISC-V DSP chip provided in an embodiment of the present application;

[0061] Figure 2 A flow chart of a test data preprocessing method of a data storage method for an RTL test framework of a RISC-V DSP chip provided in an embodiment of the present application;

[0062] Figure 3 A flow chart of a data set acquisition method for a data storage method of an RTL test framework for a RISC-V DSP chip provided in an embodiment of the present application. DETAILED DESCRIPTION

[0063] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.

[0064] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of this application, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0065] Please refer to Figure 1 , Figure 1 The present invention is a flowchart of a data storage method of an RTL test framework of a RISC-V DSP chip in some embodiments of the present invention. The data storage method of the RTL test framework of the RISC-V DSP chip is used in a terminal device, and the data storage method of the RTL test framework of the RISC-V DSP chip includes the following steps:

[0066] S101, testing the test project based on the RTL test framework to obtain test data, and preprocessing the test data to obtain optimized data;

[0067] S102, classifying the optimized data according to the categories of the test items to obtain multiple data sets;

[0068] S103, obtaining storage requirement information of each data set and remaining storage space in the database, and dividing the remaining storage space into multiple subspaces;

[0069] S104, matching the storage requirement information with the subspace in the database to obtain a matching result;

[0070] S105: Based on the matching results, all data sets are transferred to the matching subspaces for storage.

[0071] It should be noted that by optimizing and classifying the test data, different data sets are stored separately in matching subspaces, thereby improving the utilization of the database.

[0072] Please refer to Figure 2 , Figure 2 It is a flow chart of a test data preprocessing method of a data storage method of an RTL test framework of a RISC-V DSP chip in some embodiments of the present application. According to an embodiment of the present invention, a test item is tested based on an RTL test framework to obtain test data, and the test data is preprocessed to obtain optimized data, specifically including:

[0073] S201, acquiring test data, analyzing overlapping data in the same test item, and removing overlapping data in the same test item;

[0074] S202, removing the overlapping data in all test items one by one to obtain test data after removal;

[0075] S203, compressing the test data after elimination to obtain compressed data;

[0076] S204, analyzing the damage information of the compressed data to determine whether the damage information satisfies the set condition information;

[0077] S205, if the conditions are met, the optimized data is obtained; if not, the eliminated test data is recompressed.

[0078] It should be noted that by removing overlapping data in the test data and compressing the test data to reduce the redundancy of the test data, the storage space occupied by the test data can also be reduced.

[0079] Please refer to Figure 3 , Figure 3 The data set acquisition method flow chart of a data storage method of an RTL test framework of a RISC-V DSP chip in some embodiments of the present application. According to an embodiment of the present invention, the optimization data is classified according to the category of the test items to obtain multiple data sets, specifically including:

[0080] S301, obtaining test condition information of a test item, and classifying the test item once based on the test condition information to obtain a plurality of first categories;

[0081] S302, analyzing the test item data in different categories based on the first category to obtain data relationship information;

[0082] S303, comparing the data relationship information with the set relationship information to obtain a correlation degree;

[0083] S304, if the correlation is greater than or equal to the set correlation threshold, adjusting the category of the test item to generate a plurality of second categories;

[0084] S305: If the correlation degree is less than the set correlation degree threshold, a data set is generated.

[0085] It should be noted that by analyzing the data relationship of the test project data, the data correlation can be accurately analyzed to ensure that the classified data set meets the requirements.

[0086] According to an embodiment of the present invention, the storage requirement information of each data set and the remaining storage space in the database are obtained, and the remaining storage space is divided into multiple subspaces, specifically including:

[0087] Obtain storage requirement information for each data set, including storage space information and storage rate information;

[0088] The remaining storage space in the database is obtained, and the remaining storage space is divided into the same number of subspaces according to the number of data sets.

[0089] It should be noted that by analyzing the number of data sets, an equal number of subspaces are established to ensure that the subspaces can accommodate the storage of all data sets.

[0090] According to an embodiment of the present invention, the matching result is obtained based on the storage requirement information and the subspace in the database, which specifically includes:

[0091] Obtain the storage requirement information of the data set and the storage parameter information of each subspace;

[0092] Match the storage requirement information of the data set with the storage parameter information of all subspaces to obtain the storage matching degree;

[0093] Determine whether the stored matching degree is greater than or equal to the set matching degree threshold;

[0094] If it is greater than or equal to, the data set is matched to the current subspace;

[0095] If it is less than, adjust the storage parameter information of the subspace.

[0096] It should be noted that by analyzing the storage parameters of the subspace, it is analyzed whether the subspace meets the storage requirements of the data set, so as to dynamically adjust the storage parameter information of the subspace.

[0097] According to an embodiment of the present invention, all data sets are transferred to the matching subspace for storage based on the matching results, specifically including:

[0098] Obtain matching results, and retrieve the data set and matching subspace based on the matching results;

[0099] Obtain the current transmission rate of the data set and the optimal transmission rate of the subspace;

[0100] Compare and calculate the current transmission rate of the data set with the optimal transmission rate of the subspace to obtain the transmission occupancy rate;

[0101] Determine whether the transmission occupancy rate is greater than or equal to a set occupancy rate threshold;

[0102] If it is greater than or equal to, the data set will be transmitted and stored according to the current transmission rate;

[0103] If it is less than, adjust the current transmission rate.

[0104] It should be noted that by dynamically adjusting the current transmission rate, it is ensured that the data set can be stored at the optimal transmission rate, thereby improving storage efficiency.

[0105] In a second aspect, an embodiment of the present application provides a data storage system for an RTL test framework of a RISC-V DSP chip, the system comprising: a memory and a processor, the memory comprising a program of a data storage method for an RTL test framework of a RISC-V DSP chip, and when the program of the data storage method for an RTL test framework of a RISC-V DSP chip is executed by the processor, the following steps are implemented:

[0106] Test the test items based on the RTL test framework to obtain test data, and pre-process the test data to obtain optimized data;

[0107] Classify the optimization data according to the categories of the test items to obtain multiple data sets;

[0108] Obtain the storage requirement information of each data set and the remaining storage space in the database, and divide the remaining storage space into multiple subspaces;

[0109] Matching the storage requirement information with the subspace in the database to obtain a matching result;

[0110] Based on the matching results, all data sets are transferred to the matching subspace for storage.

[0111] It should be noted that by optimizing and classifying the test data, different data sets are stored separately in matching subspaces, thereby improving the utilization of the database.

[0112] According to an embodiment of the present invention, a test item is tested based on an RTL test framework to obtain test data, and the test data is preprocessed to obtain optimized data, specifically including:

[0113] Obtain test data, analyze overlapping data within the same test item, and remove overlapping data within the same test item;

[0114] Eliminate the overlapping data in all test items one by one to obtain the test data after elimination;

[0115] Compressing based on the eliminated test data to obtain compressed data;

[0116] Analyze the damage information of the compressed data and determine whether the damage information meets the set condition information;

[0117] If it is satisfied, the optimized data is obtained; if it is not satisfied, the eliminated test data is recompressed.

[0118] It should be noted that by removing overlapping data in the test data and compressing the test data to reduce the redundancy of the test data, the storage space occupied by the test data can also be reduced.

[0119] According to an embodiment of the present invention, the optimization data is classified according to the categories of the test items to obtain multiple data sets, specifically including:

[0120] Acquire test condition information of the test items, and classify the test items once based on the test condition information to obtain a plurality of first categories;

[0121] Analyze the test item data in different categories based on the first category to obtain data relationship information;

[0122] Compare the data relationship information with the set relationship information to obtain the correlation degree;

[0123] If the correlation degree is greater than or equal to the set correlation degree threshold, the category of the test item is adjusted to generate multiple second categories;

[0124] If the correlation is less than the set correlation threshold, a data set is generated.

[0125] It should be noted that by analyzing the data relationship of the test project data, the data correlation can be accurately analyzed to ensure that the classified data set meets the requirements.

[0126] According to an embodiment of the present invention, the storage requirement information of each data set and the remaining storage space in the database are obtained, and the remaining storage space is divided into multiple subspaces, specifically including:

[0127] Obtain storage requirement information for each data set, including storage space information and storage rate information;

[0128] The remaining storage space in the database is obtained, and the remaining storage space is divided into the same number of subspaces according to the number of data sets.

[0129] It should be noted that by analyzing the number of data sets, an equal number of subspaces are established to ensure that the subspaces can accommodate the storage of all data sets.

[0130] According to an embodiment of the present invention, the matching result is obtained based on the storage requirement information and the subspace in the database, which specifically includes:

[0131] Obtain the storage requirement information of the data set and the storage parameter information of each subspace;

[0132] Match the storage requirement information of the data set with the storage parameter information of all subspaces to obtain the storage matching degree;

[0133] Determine whether the stored matching degree is greater than or equal to the set matching degree threshold;

[0134] If it is greater than or equal to, the data set is matched to the current subspace;

[0135] If it is less than, adjust the storage parameter information of the subspace.

[0136] It should be noted that by analyzing the storage parameters of the subspace, it is analyzed whether the subspace meets the storage requirements of the data set, so as to dynamically adjust the storage parameter information of the subspace.

[0137] According to an embodiment of the present invention, all data sets are transferred to the matching subspace for storage based on the matching results, specifically including:

[0138] Obtain matching results, and retrieve the data set and matching subspace based on the matching results;

[0139] Obtain the current transmission rate of the data set and the optimal transmission rate of the subspace;

[0140] Compare and calculate the current transmission rate of the data set with the optimal transmission rate of the subspace to obtain the transmission occupancy rate;

[0141] Determine whether the transmission occupancy rate is greater than or equal to a set occupancy rate threshold;

[0142] If it is greater than or equal to, the data set will be transmitted and stored according to the current transmission rate;

[0143] If it is less than, adjust the current transmission rate.

[0144] It should be noted that by dynamically adjusting the current transmission rate, it is ensured that the data set can be stored at the optimal transmission rate, thereby improving storage efficiency.

[0145] A third aspect of the present invention provides a computer-readable storage medium, which includes a data storage method program for an RTL test framework of a RISC-V DSP chip. When the data storage method program for the RTL test framework of a RISC-V DSP chip is executed by a processor, the steps of the data storage method for the RTL test framework of a RISC-V DSP chip as described in any of the above items are implemented.

[0146] The present invention discloses a data storage method, system and medium of an RTL test framework of a RISC-V DSP chip. The method tests test items based on the RTL test framework to obtain test data, pre-processes the test data to obtain optimized data; classifies the optimized data according to the categories of the test items to obtain multiple data sets; obtains storage requirement information of each data set and the remaining storage space in a database, and divides the remaining storage space into multiple subspaces; matches the subspaces in the database based on the storage requirement information to obtain matching results; transmits all data sets to the matching subspaces for storage based on the matching results; analyzes data sets of different test items, optimizes the data sets, and analyzes the matching results of each data set with the remaining storage space, so as to store them in the optimal subspace and improve the data storage accuracy.

[0147] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only schematic. For example, the division of units is only a logical function division. There may be other division methods in actual implementation, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of devices or units can be electrical, mechanical or other forms.

[0148] The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units; they may be located in one place or distributed on multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0149] In addition, all functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may be separately used as a unit, or two or more units may be integrated into one unit; the above-mentioned integrated units may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0150] Those skilled in the art can understand that: all or part of the steps of implementing the above method embodiments can be completed by hardware related to program instructions, the aforementioned program can be stored in a readable storage medium, and when the program is executed, it executes the steps of the above method embodiments; and the aforementioned storage medium includes: mobile storage devices, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), disks or optical disks, and other media that can store program codes.

[0151] Or, if the above-mentioned integrated unit of the present invention is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a readable storage medium. Based on this understanding, the technical solution of the embodiment of the present invention can be essentially or partly reflected in the form of a software product that contributes to the prior art. The software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the methods described in each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, ROM, RAM, magnetic disks or optical disks.

Claims

1. A data storage method for an RTL test framework of a RISC-V DSP chip, characterized in that: include: Test the test items based on the RTL test framework to obtain test data, and pre-process the test data to obtain optimized data; Classify the optimization data according to the categories of the test items to obtain multiple data sets; Obtain the storage requirement information of each data set and the remaining storage space in the database, and divide the remaining storage space into multiple subspaces; Matching the storage requirement information with the subspace in the database to obtain a matching result; Based on the matching results, all data sets are transferred to the matching subspace for storage.

2. The data storage method of the RTL test framework of the RISC-V DSP chip according to claim 1, characterized in that: Test the test items based on the RTL test framework to obtain test data, and preprocess the test data to obtain optimized data, including: Obtain test data, analyze overlapping data within the same test item, and remove overlapping data within the same test item; Eliminate the overlapping data in all test items one by one to obtain the test data after elimination; Compressing based on the eliminated test data to obtain compressed data; Analyze the damage information of the compressed data to determine whether the damage information satisfies the set condition information; If it is satisfied, the optimized data is obtained; if it is not satisfied, the eliminated test data is recompressed.

3. The data storage method of the RTL test framework of the RISC-V DSP chip according to claim 2 is characterized in that: The optimization data is classified according to the categories of the test items to obtain multiple data sets, including: Acquire test condition information of the test items, and classify the test items once based on the test condition information to obtain a plurality of first categories; Analyze the test item data in different categories based on the first category to obtain data relationship information; Compare the data relationship information with the set relationship information to obtain the correlation degree; If the correlation degree is greater than or equal to the set correlation degree threshold, the category of the test item is adjusted to generate multiple second categories; If the correlation is less than the set correlation threshold, a data set is generated.

4. The data storage method of the RTL test framework of the RISC-V DSP chip according to claim 3 is characterized in that: Obtain the storage requirement information of each data set and the remaining storage space in the database, and divide the remaining storage space into multiple subspaces, including: Obtain storage requirement information for each data set, including storage space information and storage rate information; The remaining storage space in the database is obtained, and the remaining storage space is divided into the same number of subspaces according to the number of data sets.

5. The data storage method of the RTL test framework of the RISC-V DSP chip according to claim 1, characterized in that: Based on the storage requirement information, the subspace in the database is matched to obtain the matching results, including: Obtain the storage requirement information of the data set and the storage parameter information of each subspace; Match the storage requirement information of the data set with the storage parameter information of all subspaces to obtain the storage matching degree; Determining whether the stored matching degree is greater than or equal to a set matching degree threshold; If it is greater than or equal to, the data set is matched to the current subspace; If it is less than, adjust the storage parameter information of the subspace.

6. The data storage method of the RTL test framework of the RISC-V DSP chip according to claim 5, characterized in that: Based on the matching results, all data sets are transferred to the matching subspace for storage, including: Obtain matching results, and retrieve the data set and matching subspace based on the matching results; Obtain the current transmission rate of the data set and the optimal transmission rate of the subspace; Compare and calculate the current transmission rate of the data set with the optimal transmission rate of the subspace to obtain the transmission occupancy rate; Determining whether the transmission occupancy rate is greater than or equal to a set occupancy rate threshold; If it is greater than or equal to, the data set will be transmitted and stored according to the current transmission rate; If it is less than, adjust the current transmission rate.

7. A data storage system for an RTL test framework of a RISC-V DSP chip, characterized in that: The system includes: a memory and a processor, wherein the memory includes a program of a data storage method of an RTL test framework of a RISC-V DSP chip, and when the program of the data storage method of the RTL test framework of the RISC-V DSP chip is executed by the processor, the following steps are implemented: Test the test items based on the RTL test framework to obtain test data, and pre-process the test data to obtain optimized data; Classify the optimization data according to the categories of the test items to obtain multiple data sets; Obtain the storage requirement information of each data set and the remaining storage space in the database, and divide the remaining storage space into multiple subspaces; Matching the storage requirement information with the subspace in the database to obtain a matching result; Based on the matching results, all data sets are transferred to the matching subspace for storage.

8. The data storage system of the RTL test framework of the RISC-V DSP chip according to claim 7, characterized in that: Test the test items based on the RTL test framework to obtain test data, and preprocess the test data to obtain optimized data, including: Obtain test data, analyze overlapping data within the same test item, and remove overlapping data within the same test item; Eliminate the overlapping data in all test items one by one to obtain the test data after elimination; Compressing based on the eliminated test data to obtain compressed data; Analyze the damage information of the compressed data to determine whether the damage information satisfies the set condition information; If it is satisfied, the optimized data is obtained; if it is not satisfied, the eliminated test data is recompressed.

9. The data storage system of the RTL test framework of the RISC-V DSP chip according to claim 8, characterized in that: The optimization data is classified according to the categories of the test items to obtain multiple data sets, including: Acquire test condition information of the test items, and classify the test items once based on the test condition information to obtain a plurality of first categories; Analyze the test item data in different categories based on the first category to obtain data relationship information; Compare the data relationship information with the set relationship information to obtain the correlation degree; If the correlation degree is greater than or equal to the set correlation degree threshold, the category of the test item is adjusted to generate multiple second categories; If the correlation is less than the set correlation threshold, a data set is generated.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium includes a data storage method program for the RTL test framework of a RISC-V DSP chip. When the data storage method program for the RTL test framework of a RISC-V DSP chip is executed by a processor, the steps of the data storage method for the RTL test framework of a RISC-V DSP chip as described in any one of claims 1 to 6 are implemented.