Filling and sealing process simulation method

Abstract

The invention provides a potting process simulation method. The potting process simulation method comprises the following steps: constructing a geometric model based on acquired parameters of a chip, a solder ball and a substrate; dividing the geometric model into a key simulation area and a non-key simulation area; respectively judging and classifying the key simulation area and the non-key simulation area; simplifying the geometric model based on a judgment classification result; performing mesh generation on the simplified geometric model to generate a finite element model; and performing flow field coupling analysis on the finite element model according to set initial conditions and boundary conditions. The method comprises the following steps: dividing a geometric model in a potting process into a key simulation area and a non-key simulation area, then simplifying the geometric model based on a judgment classification result, carrying out grid division on the simplified geometric model to generate a finite element model, firstly simplifying the model, then generating the finite element model based on the simplified model, and finally, carrying out simulation on the finite element model. And the calculation amount of the finite element model is simplified, so that the purpose of reducing the calculation amount is achieved.

Description

Technical Field

[0001] The invention belongs to the technical field of electronic packaging device simulation, and in particular relates to a potting process simulation method. Background Art

[0002] Flip chip packaging technology has been adopted in a wide range of applications, broadening the different packaging forms, with advantages such as small size, self-aligned installation, good heat dissipation and high input / output. In flip chip packaging, the chip is aligned with the substrate facing down, and the alloy solder balls are used as connecting conductors to connect the chip and the substrate. However, the heat generated when the flip chip is working may cause thermal stress fatigue damage or even failure due to the mismatch of thermal expansion coefficients between the substrate and the chip. For this reason, the flip chip underfill process has emerged, which reduces thermal stress by filling the packaging material between the substrate and the chip. It is reported that the underfill process can extend the connection life of the solder joint by 30 to 50 times. Due to the importance of the underfill process for flip chip packaging, scholars have conducted extensive research on this process and have made some important progress. However, due to the small and complex underfill space and the diversity of filling methods, the correct and efficient prediction of the underfill flow process is still a problem that needs further research and solution.

[0003] In the process of underfill flow, problems such as insufficient filling and voids often occur. These problems are more serious when the solder balls are unevenly distributed. The analytical method can only study one-dimensional flow and cannot make predictions for various problems that may occur in underfill. Experimental research requires specific experimental equipment, which is time-consuming, labor-intensive, and costly. Many researchers have proposed using numerical simulation to study the flow behavior of underfill fluids. The accuracy and efficiency of the simulation are important indicators for measuring the numerical analysis method of underfill. The three-dimensional underfill simulation method is relatively mature, but the calculation efficiency is low.

[0004] The inventor discovered the following problems in the prior art during the implementation of this embodiment: 1. The bottom filling process of the ball grid array package uses a two-dimensional numerical method to simulate the filling flow process. The solder joints are small and dense, which leads to a large number of finite element grids in the numerical simulation calculation, a long finite element calculation time, and even existing computers cannot calculate, and it is impossible to quickly obtain the results of the numerical simulation.

[0005] 2. Existing methods for simplifying solder joints in ball grid array packages include material homogenization and local material homogenization. Both of these simplification methods cannot meet the requirement of restoring the state of fluid movement between solder joints during the filling process as much as possible, and the solder joint structure must be retained. Summary of the invention

[0006] In view of the problems existing in the prior art, the present invention provides a method for simulating a potting process, which at least partially solves the problems existing in the prior art that the finite element calculation time is long and the numerical simulation results cannot be obtained quickly.

[0007] The present disclosure provides a method for simulating a potting process, including: Build a geometric model based on the acquired chip, solder ball and substrate parameters; Divide the geometric model into key simulation areas and non-key simulation areas; Determine and classify the key simulation areas and non-key simulation areas respectively; Simplifying the geometric model based on the judgment and classification results; Meshing the simplified geometric model to generate a finite element model; The initial conditions and boundary conditions are set to perform flow field coupling analysis on the finite element model.

[0008] Optionally, the determining and classifying the key simulation area and the non-key simulation area includes: Divide the key simulation areas into those that can be simplified and those that cannot be simplified; Divide non-critical simulation areas into those that are easy to simplify and those that are not easy to simplify.

[0009] Optionally, the arrangement features that can be found in a simplified manner in the key simulation area are subjected to sparse processing.

[0010] Optionally, the key simulation areas are divided into those that can be simplified and those that cannot be simplified, including: The key positions of the glue entry can be simplified, or the key positions of the glue entry can be simplified according to a ratio of 5:1.

[0011] Optionally, the key simulation areas are divided into those that can be simplified and those that cannot be simplified, including: The edge peripheral solder joints are classified as cannot be simplified, and the number of solder balls at the symmetrical boundary is classified as can be simplified; the number of solder balls in the main area is classified as can be simplified, and the inner edge solder joints are classified as can be simplified.

[0012] Optionally, the number of solder balls at the symmetrical boundary is simplified according to 10:1, the number of solder balls in the main area is simplified according to 25:1, and the number of solder joints at the inner edge is simplified according to 10:1. Optionally, the step of meshing the simplified geometric model to generate a finite element model includes: Define the element type and material type for the finite element model.

[0013] Optionally, the set initial conditions and boundary conditions include simplifying the physical characteristic parameters according to the CSF technology and reducing the dimensionality of the simplified physical characteristic parameters, wherein the dimensionality reduction is based on the total volume before simplification being equal to the total volume after simplification, and setting the initial conditions and boundary conditions of the physical characteristic parameters after dimensionality reduction.

[0014] Optionally, the set initial conditions and boundary conditions include: The porous medium model is called, and the area except the solder balls is defined as the porous medium area, and the porosity is set to 1.

[0015] The potting process simulation method provided by the present invention divides the geometric model of the potting process into key simulation areas and non-key simulation areas, and then simplifies the geometric model based on the classification results, meshes the simplified geometric model to generate a finite element model, first simplifies the model, and then generates a finite element model based on the simplified model, thereby simplifying the calculation amount of the finite element model and achieving the purpose of reducing the calculation amount.

[0016] This embodiment simulates the state of the fluid moving between the welding points during the restoration filling process by setting the initial conditions and boundary conditions, so as to achieve the purpose of achieving the simulation effect without using welding point structures. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and other objects, features and advantages of the present disclosure will become more apparent through a more detailed description of exemplary embodiments of the present disclosure in conjunction with the accompanying drawings, wherein like reference numerals generally represent like components throughout the exemplary embodiments of the present disclosure.

[0018] Figure 1 A flow chart of a method for simulating a potting process provided by an embodiment of the present disclosure; Figure 2 A 1 / 2 simplified two-dimensional model provided in an embodiment of the present disclosure; Figure 3 A schematic diagram of a solder joint structure provided in an embodiment of the present disclosure; Figures 4a to 4d Liquid phase cloud diagram provided for an embodiment of the present disclosure.

[0019] Among them, 1-edge peripheral solder points; 2-glue chamber; 3-key position of glue entry; 4-solder balls at the symmetrical boundary; 5-solder balls in the main area; 6-other inner edge solder points. DETAILED DESCRIPTION

[0020] The embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.

[0021] It should be clear that the following embodiments of the present disclosure are described by specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present disclosure from the contents disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all of the embodiments. The present disclosure can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present disclosure. It should be noted that the following embodiments and features in the embodiments can be combined with each other in the absence of conflict. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present disclosure.

[0022] It should be noted that various aspects of the embodiments within the scope of the appended claims are described below. It should be apparent that the aspects described herein may be embodied in a wide variety of forms, and any specific structure and / or function described herein is merely illustrative. Based on the present disclosure, it should be understood by those skilled in the art that an aspect described herein may be implemented independently of any other aspect, and two or more of these aspects may be combined in various ways. For example, any number of aspects described herein may be used to implement the device and / or practice the method. In addition, other structures and / or functionalities other than one or more of the aspects described herein may be used to implement this device and / or practice this method.

[0023] It should also be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present disclosure. The illustrations only show components related to the present disclosure rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0024] Additionally, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, it will be understood by those skilled in the art that the aspects described may be practiced without these specific details.

[0025] This embodiment is used for simulating the potting process of ball grid array packaged chips and determining the areas where insufficient filling and voids are generated.

[0026] By reducing the dimensionality of the three-dimensional model, a two-dimensional filling numerical analysis method is obtained. Compared with the three-dimensional method, the two-dimensional method has obvious efficiency advantages. Faced with a model with a large number of solder joints, if the two-dimensional modeling is performed completely according to the structural dimensions, the number of grids in the finite element calculation will be huge, which will cause the calculation time to be too long or even the existing computer cannot submit the calculation. Therefore, it is often not enough to use only dimensionality reduction processing, and the number of solder joints needs to be simplified in the two-dimensional plane. How to simplify so that the model size can be effectively reduced and the accuracy of the calculation can be minimized is a major problem currently faced. Therefore, it is necessary to use special methods to process the potting solder joints to meet the calculation efficiency and accuracy.

[0027] Numerical analysis is an important method to study the flow behavior of underfill fluids, and many researchers have proposed different numerical analysis methods. The generalized Hele-Shaw model can only reflect the viscous resistance of parallel plates to flow, but cannot reflect the viscous resistance of each solder ball to flow, and the inhomogeneity of capillary pressure and viscous resistance cannot be reflected; if permeability and average capillary pressure are used to reflect the resistance and driving force of parallel plates and solder balls to flow, the inhomogeneity of capillary pressure and viscous resistance still cannot be reflected; the two-dimensional numerical analysis basic model based on continuous surface force (CSF) technology can reflect the capillary pressure and viscous resistance caused by solder balls and their inhomogeneity, but cannot reflect the capillary pressure and viscous resistance caused by parallel plates. In short, although the above two-dimensional numerical analysis method has high computational efficiency, it cannot fully and accurately reflect the influence of chips, substrates and solder balls on capillary driving force and resistance.

[0028] CSF technology is applied to the three-dimensional numerical simulation of underfill flow. The three-dimensional numerical simulation based on CSF technology can better reflect the capillary driving pressure and viscous resistance caused by the chip, substrate and solder ball, and can also reflect its heterogeneity. CSF technology reflects the capillary force through the normal and curvature of the fluid interface, which requires the mesh to be fine enough, which leads to the problem of large calculation amount and low efficiency of three-dimensional simulation. According to the two-dimensional characteristics of the underfill flow field space and the underfill flow process, the three-dimensional numerical model of the underfill flow based on CSF technology is reduced in dimension, thereby obtaining a new two-dimensional underfill flow numerical analysis model. In three-dimensional simulation, because the chip, solder ball and substrate can be intuitively reflected in the model, fluent can automatically calculate the capillary driving force according to the geometric shape, so there is no need to consider the setting of the capillary driving force, only the related items of the viscous resistance need to be set. After the underfill model is two-dimensionalized, the underfill flow field area becomes a two-dimensional plane, not a three-dimensional space. The height gap in the entire underfill area is the same, so it can be considered to predict the flow of the entire underfill area by simulating the flow in the XOY plane.

[0029] In this embodiment, the XOY plane is a plane parallel to the substrate surface, and the Z axis is an axis perpendicular to the substrate.

[0030] For ease of understanding, Figure 1 As shown, this embodiment discloses a method for simulating a potting process, including: Step S101: constructing a geometric model based on the acquired chip, solder ball and substrate parameters; A geometric model consisting of chips, solder balls and substrates is established, and the importance of each part of the model is analyzed and classified according to whether it can be simplified.

[0031] Step S102: Divide the geometric model into a key simulation area and a non-key simulation area; Optionally, the geometric model is divided into a key simulation area and a non-key simulation area, the key simulation area is a bubble generation area in an XOY plane, and the non-key simulation area is a Z-axis area.

[0032] Step S103: determining and classifying the key simulation area and the non-key simulation area respectively; Optionally, the determining and classifying the key simulation area and the non-key simulation area includes: Divide the key simulation areas into those that can be simplified and those that cannot be simplified; Divide non-critical simulation areas into those that are easy to simplify and those that are not easy to simplify.

[0033] Optionally, the arrangement features that can be found in a simplified manner in the key simulation area are subjected to sparse processing.

[0034] For key simulation areas that can be simplified, such as welding points, find the arrangement features and perform sparse processing; for areas that cannot be simplified, such as the size and position relationship between parts.

[0035] Non-key simulation areas are easy to simplify, such as the geometric features in the Z-axis direction, and are directly ignored. Those that are difficult to simplify, such as the capillary force generated by the close gap between the substrate and the chip in the Z-axis direction, are simulated using the following method.

[0036] The source term of the liquid in the porous medium is set as the surface force term of the parallel plate viscous drag of the power-law fluid: and is an additional surface force term, reflecting the parallel plate acting on the fluid in the x and y directions. If the lower filling melt is a power-law fluid, then: , , h is the gap height between the chip and the substrate, , are the components of the velocity vector of the fluid microelement in the x and y directions respectively, the x and y directions are the x and y directions of the XOY plane, m is the coefficient of the power-law constitutive equation, and n is the exponent of the power-law constitutive equation.

[0037] The apparent force term reflecting the viscous resistance of the parallel plate to the power-law fluid and It is equivalent to the momentum loss source term generated by the porous medium to the power-law fluid. The expression of this source term is: , , The coefficients in the formula and It can be expressed as , .

[0038] like Figure 2 As shown, optionally, the key simulation areas are divided into those that can be simplified and those that cannot be simplified, including: The key position of the glue entry point cannot be simplified, the edge peripheral solder joints are classified as cannot be simplified, and the number of solder balls at the symmetrical boundary is classified as can be simplified; the number of solder balls in the main area is classified as can be simplified, and the inner edge solder joints are classified as can be simplified.

[0039] Step S104: simplifying the geometric model based on the classification result; Optionally, the geometric model is simplified based on the classification result, including: The number of solder balls at the symmetrical boundary is simplified by 10:1, the number of solder balls in the main area is simplified by 25:1, and the solder points at the inner edge are simplified by 10:1. When the key position of the glue injection is classified as being able to be simplified, the key position of the glue injection is simplified by 5:1.

[0040] Step S105: meshing the simplified geometric model to generate a finite element model; Optionally, the step of meshing the simplified geometric model to generate a finite element model includes: Define the element type and material type for the finite element model.

[0041] Step S106: Set initial conditions and boundary conditions to perform flow field coupling analysis on the finite element model.

[0042] Optionally, the set initial conditions and boundary conditions include simplifying the physical characteristic parameters according to the CSF technology and reducing the dimensionality of the simplified physical characteristic parameters, wherein the dimensionality reduction is based on the total volume before simplification being equal to the total volume after simplification, and setting the initial conditions and boundary conditions of the physical characteristic parameters after dimensionality reduction.

[0043] The physical characteristic parameters include the actual inlet, outlet, gas-liquid two-phase flow and wall adhesion values.

[0044] Optionally, the set initial conditions and boundary conditions include: The porous medium model is called, and the area except the solder balls is defined as the porous medium area, and the porosity is set to 1. The viscous resistance of the chip and substrate to glycerol is: 2D inlet pressure , the outlet pressure is 0, indicating that the outlet is connected to the atmosphere.

[0045] When running the above simulation method, after initializing the parameters, setting the calculation analysis steps, and running the simulation after the required results are obtained, the liquid phase cloud map and the animation of the liquid phase cloud map can be obtained.

[0046] like Figure 3 The shape of the solder joint shown is a spherical strip, and the volume formula of the spherical strip is: , Among them, r1 is the top circle radius, r2 is the bottom circle radius, and h is the spherical zone height.

[0047] For the solder joints of the ball grid array package, it is approximately assumed that the radius of the top circle and the bottom circle are equal, that is, r1=r2=r0. When the solder joints are simplified in this embodiment, the non-solder joint coverage area remains unchanged, and the height h of the solder joint is a constant. Therefore, the volume of the solder joint of the ball grid array package is expressed as: , The volume of the solder joint is positively correlated with the square of the top and bottom circle radii of the solder joint, that is: , When the height of the solder joint is ignored, it is only necessary to ensure that the total volume V before simplification is equal to the total volume V after simplification, and simplify several local small solder joints into one large solder joint. The specific simplification method is as follows: Figure 2 shown.

[0048] After completing the simplification work, you can proceed to the simulation settings. The parameter settings when the program is running are as follows: VOF (Modified HRIC): air is the first phase fluid and the filling melt is the second phase; Laminar flow: does not take gravity into account; Solver: Pressure-Based; Time type: Transient; Speed ​​equation: Absolute speed (Absolute); Discrete format solution: implicit; Pressure-velocity coupling: PISO; Pressure item: PRESTO; Momentum phase used: QUICK; After setting the above parameters, run the simulation program. The obtained liquid phase cloud diagram is as follows Figures 4a to 4d As shown, Figure 4a is the initial state, Figure 4b For the initial filling, Figure 4c To fill the mid-term, Figure 4d Towards the end of filling.

[0049] The electronic device disclosed in this embodiment includes a memory and a processor. The memory is used to store non-temporary computer-readable instructions. Specifically, the memory may include one or more computer program products, and the computer program product may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, a random access memory (RAM) and / or a cache memory (cache), etc. The non-volatile memory may include, for example, a read-only memory (ROM), a hard disk, a flash memory, etc.

[0050] The processor may be a central processing unit (CPU) or other forms of processing units with data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device to perform desired functions. In one embodiment of the present disclosure, the processor is used to run the computer-readable instructions stored in the memory, so that the electronic device performs all or part of the steps of the encapsulation process simulation method of each embodiment of the present disclosure.

[0051] Those skilled in the art should be able to understand that in order to solve the technical problem of how to obtain a good user experience, the present embodiment may also include well-known structures such as a communication bus and an interface, and these well-known structures should also be included in the protection scope of the present disclosure.

[0052] An electronic device may include a processing device (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) or a program loaded from a storage device into a random access memory (RAM). In the RAM, various programs and data required for the operation of the electronic device are also stored. The processing device, ROM, and RAM are connected to each other via a bus. An input / output (I / O) interface is also connected to the bus.

[0053] Typically, the following devices can be connected to the I / O interface: input devices such as sensors or visual information acquisition devices; output devices such as display screens; storage devices such as magnetic tapes and hard disks; and communication devices. The communication device can allow the electronic device to communicate with other devices (such as edge computing devices) wirelessly or by wire to exchange data.

[0054] In particular, according to an embodiment of the present disclosure, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product, which includes a computer program carried on a non-transitory computer-readable medium, and the computer program contains program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device, or installed from a ROM. When the computer program is executed by a processing device, all or part of the steps of the encapsulation process simulation method of the embodiment of the present disclosure are executed.

[0055] For detailed description of this embodiment, reference may be made to the corresponding descriptions in the aforementioned embodiments, which will not be repeated here.

[0056] The computer-readable storage medium disclosed in this embodiment stores non-transitory computer-readable instructions, and when the non-transitory computer-readable instructions are executed by a processor, all or part of the steps of the encapsulation process simulation method of each embodiment of the present disclosure are executed.

[0057] The above-mentioned computer-readable storage media include, but are not limited to: optical storage media (e.g., CD-ROM and DVD), magneto-optical storage media (e.g., MO), magnetic storage media (e.g., magnetic tape or mobile hard disk), media with built-in rewritable non-volatile memory (e.g., memory card) and media with built-in ROM (e.g., ROM box).

[0058] For detailed description of this embodiment, reference may be made to the corresponding descriptions in the aforementioned embodiments, which will not be repeated here.

[0059] The basic principles of the present disclosure are described above in conjunction with specific embodiments. However, it should be noted that the advantages, strengths, effects, etc. mentioned in the present disclosure are only examples and not limitations, and it cannot be considered that these advantages, strengths, effects, etc. are required by each embodiment of the present disclosure. In addition, the specific details disclosed above are only for the purpose of illustration and ease of understanding, and are not limitations. The above details do not limit the present disclosure to the necessity of adopting the above specific details to be implemented.

[0060] In the present disclosure, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. The block diagrams of the devices, devices, equipment, and systems involved in the present disclosure are only illustrative examples and are not intended to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagram. As will be appreciated by those skilled in the art, these devices, devices, equipment, and systems can be connected, arranged, and configured in any manner. Words such as "including", "comprising", "having", etc. are open words, referring to "including but not limited to", and can be used interchangeably with them. The words "or" and "and" used here refer to the words "and / or" and can be used interchangeably with them, unless the context clearly indicates otherwise. The words "such as" used here refer to the phrase "such as but not limited to", and can be used interchangeably with them.

[0061] Additionally, as used herein, "or" used in a list of items beginning with "at least one" indicates a separate list, so that, for example, a list of "at least one of A, B, or C" means A or B or C, or AB or AC or BC, or ABC (i.e., A and B and C). Furthermore, the word "exemplary" does not mean that the example described is preferred or better than other examples.

[0062] It should also be noted that in the system and method of the present disclosure, each component or each step can be decomposed and / or recombined. Such decomposition and / or recombination should be regarded as equivalent solutions of the present disclosure.

[0063] Various changes, substitutions, and modifications of the techniques described herein may be made without departing from the teachings defined by the appended claims. Furthermore, the scope of the claims of the present disclosure is not limited to the specific aspects of the processes, machines, manufactures, compositions of events, means, methods, and actions described above. Currently existing or later to be developed processes, machines, manufactures, compositions of events, means, methods, or actions that perform substantially the same functions or achieve substantially the same results as the corresponding aspects described herein may be utilized. Thus, the appended claims include such processes, machines, manufactures, compositions of events, means, methods, or actions within their scope.

[0064] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present disclosure. Therefore, the present disclosure is not intended to be limited to the aspects shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

[0065] The above description has been given for the purpose of illustration and description. In addition, this description is not intended to limit the embodiments of the present disclosure to the forms disclosed herein. Although multiple example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions and sub-combinations thereof.

Claims

1. A method for simulating a potting process, characterized in that: include: Build a geometric model based on the acquired chip, solder ball and substrate parameters; Divide the geometric model into key simulation areas and non-key simulation areas; Determine and classify the key simulation areas and non-key simulation areas respectively; Simplifying the geometric model based on the judgment and classification results; Meshing the simplified geometric model to generate a finite element model; The initial conditions and boundary conditions are set to perform flow field coupling analysis on the finite element model.

2. The method for simulating a potting process according to claim 1, characterized in that: The geometric model is divided into a key simulation area and a non-key simulation area, wherein the key simulation area is a bubble generation area in the XOY plane, and the non-key simulation area is a Z-axis area.

3. The method for simulating a potting process according to claim 2, characterized in that: The determination and classification of the key simulation area and the non-key simulation area includes: Divide the key simulation areas into those that can be simplified and those that cannot be simplified; Divide non-critical simulation areas into those that are easy to simplify and those that are not easy to simplify.

4. The method for simulating a potting process according to claim 3, characterized in that: The arrangement features that can be simplified in the key simulation area are thinned out.

5. The method for simulating a potting process according to claim 3, characterized in that: The key simulation areas are divided into those that can be simplified and those that cannot be simplified, including: The key positions at the glue entry are divided into those that cannot be simplified, or those that are simplified according to a ratio of 5:

1.

6. The method for simulating a potting process according to claim 5, characterized in that: The key simulation areas are divided into those that can be simplified and those that cannot be simplified, including: The edge peripheral solder joints are classified as cannot be simplified, and the number of solder balls at the symmetrical boundary is classified as can be simplified; the number of solder balls in the main area is classified as can be simplified, and the inner edge solder joints are classified as can be simplified.

7. The method for simulating a potting process according to claim 6, characterized in that: The number of solder balls at the symmetrical boundary is simplified according to 10:1, the number of solder balls in the main area is simplified according to 25:1, and the number of solder points at the inner edge is simplified according to 10:

1.

8. The method for simulating a potting process according to claim 1, characterized in that: The step of meshing the simplified geometric model to generate a finite element model comprises: Define the element type and material type for the finite element model.

9. The method for simulating a potting process according to claim 1, characterized in that: The set initial conditions and boundary conditions include simplifying the physical characteristic parameters according to the CSF technology and reducing the dimensionality of the simplified physical characteristic parameters, wherein the dimensionality reduction is based on the total volume before simplification being equal to the total volume after simplification, and setting the initial conditions and boundary conditions of the physical characteristic parameters after dimensionality reduction.

10. The method for simulating a potting process according to claim 1, characterized in that: The set initial conditions and boundary conditions include: The porous medium model is called, and the area except the solder balls is defined as the porous medium area, and the porosity is set to 1.

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