Signal protection circuit based on MOS tube

Abstract

The invention discloses a signal protection circuit based on an MOS tube, and belongs to the technical field of electronic circuits. According to the method, a power module, a main protection module and a current limiting module are included; the power supply module is used for providing positive and negative voltages of the circuit and comprises a VCC power supply and a VSS power supply; the main protection module is used for carrying out voltage protection on a signal input end and comprises an NMOS (N-channel Metal Oxide Semiconductor) tube and a PMOS (P-channel Metal Oxide Semiconductor) tube; the current limiting module is used for limiting current in the circuit and comprises a resistor R1 and a resistor R2; the power supply module is connected with the current limiting module. According to the invention, when external forward high voltage or external backward voltage is input or short-circuited through the signal output end, the voltage of the signal input end is quickly clamped, so that the effect of effectively protecting devices at the signal input end is achieved; the problem that a device at a signal input end is difficult to effectively protect based on an MOS tube in the prior art is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and in particular to a signal protection circuit based on a MOS tube. Background Art

[0002] Existing signal protection devices mainly use surge protectors, which have a fixed clamping voltage. When the signal output end is short-circuited with an external positive high voltage higher than the clamping voltage, the surge protector will generate a large current, causing the device to heat up and possibly be damaged. This protection method is equivalent to a one-time protection and cannot effectively deal with the short circuit of an external high voltage for a long time. Therefore, the existing protection devices cannot effectively play a protective role when dealing with an external DC high voltage short circuit. With the advancement of technology, MOS tubes are used for circuit protection. Although the circuit protection scheme based on MOS tubes provides protection functions to a certain extent, its protection effect is not ideal in actual applications. Therefore, a more effective protection circuit is needed to improve the stability and reliability of the circuit.

[0003] The existing signal protection circuit controls the current in the circuit below a certain threshold through a sampling amplifier circuit, a MOS tube, a comparison circuit and a latch circuit to achieve the signal protection function of the circuit.

[0004] For example, the protection circuit of the MOS tube disclosed in the invention patent with the announcement number CN112104348B includes: a sampling and amplifying circuit connected to the MOS tube, used to sample and amplify the current of the MOS tube, and output a current sampling voltage; a comparison circuit connected to the sampling and amplifying circuit, used to compare the current sampling voltage with a reference voltage, and output a control signal according to the comparison result; a latch circuit connected between the comparison circuit and the driver chip of the MOS tube, and the latch circuit is used to control the driver chip to drive the MOS tube on and off based on the control signal and the PWM signal, so as to control its current below a certain threshold.

[0005] For example, a patent application with publication number: CN118487582A discloses a short-circuit protection circuit for a MOS tube and a control method thereof, comprising: a current sampling circuit, a controller and a turn-off resistor circuit; the current sampling circuit is electrically connected to the Kelvin source and the power source of the MOS tube respectively, and is used to collect the current signal flowing between the Kelvin source and the power source, and output a sampling signal according to the current signal; the controller comprises a sampling input terminal, a gate driving terminal and at least one resistance control terminal; the turn-off resistor circuit is electrically connected to the gate driving terminal, the resistance control terminal, and the gate of the MOS tube respectively; the sampling input terminal is electrically connected to the current sampling circuit; the controller is used to control the gate driving signal output by the gate driving terminal according to the sampling signal input by the sampling input terminal, and control the resistance control signal output by the resistance control terminal according to the sampling signal; the turn-off resistor circuit is used to control the turn-off resistance value between the gate of the MOS tube and the gate driving terminal according to the resistance control signal.

[0006] However, in the process of implementing the technical solution of the invention in the embodiments of the present application, the present application found that the above technology has at least the following technical problems:

[0007] In the prior art, although the protection circuit based on MOS tube provides protection function to a certain extent, its protection effect may not be ideal in actual application, especially in dealing with DC large voltage short circuit, it cannot effectively play a protective role. There is a problem that it is difficult to effectively protect the device at the signal input end based on MOS tube. Summary of the invention

[0008] The embodiment of the present application solves the problem in the prior art that it is difficult to effectively protect the device at the signal input end based on the MOS tube by providing a signal protection circuit based on the MOS tube, thereby achieving effective protection of the device at the signal input end.

[0009] An embodiment of the present application provides a signal protection circuit based on a MOS tube, comprising: a power supply module, a main protection module and a current limiting module; the power supply module is used to provide positive and negative voltages for the circuit, and the power supply module comprises a VCC power supply and a VSS power supply; the main protection module is used to perform voltage protection on a signal input terminal, and the main protection module comprises an NMOS tube and a PMOS tube; the current limiting module is used to limit the current in the circuit, and the current limiting module comprises a resistor R1 and a resistor R2; the power supply module is connected to the current limiting module; and the main protection module is connected to the current limiting module.

[0010] Furthermore, the power supply module is connected to the current limiting module, and the specific connection method is: the VCC power supply is connected to the input end of the resistor R1; the VSS power supply is connected to the input end of the resistor R2; the main protection module is connected to the current limiting module, and the specific connection method is: the gate of the NMOS tube is connected to the output end of the resistor R1; the gate of the PMOS tube is connected to the output end of the resistor R2; the drain of the NMOS tube is connected to the source of the PMOS tube.

[0011] Furthermore, the source of the NMOS tube is used to connect to the signal input terminal; the signal input terminal is used to receive an external signal; the drain of the PMOS tube is used to connect to the signal output terminal; the signal output terminal is used to output the signal processed by the circuit.

[0012] Furthermore, the resistor R1 is used to limit the current when the NMOS tube is turned on; the resistor R2 is used to limit the current when the PMOS tube is turned on; the VCC power supply is a positive voltage, and the VCC power supply is used to provide a gate voltage for the NMOS tube when the NMOS tube is turned on; the VSS power supply is a negative voltage, and the VSS power supply is used to provide a gate voltage for the PMOS tube when the PMOS tube is turned on.

[0013] Furthermore, the NMOS tube is used to perform forward protection on the signal input terminal when the signal output terminal meets the forward high voltage condition; the forward high voltage condition indicates that an external forward high voltage input or an external forward high voltage short circuit occurs at the signal output terminal.

[0014] Furthermore, the PMOS tube is used to perform reverse protection on the signal input end when the signal output end meets the reverse high voltage condition; the reverse high voltage condition indicates that an external reverse high voltage input or an external reverse high voltage short circuit occurs at the signal output end.

[0015] Furthermore, the specific process of the forward protection is as follows: when the signal output end meets the forward high voltage condition, the external forward high voltage is input through the drain of the PMOS tube after the PMOS tube is turned on; the input external forward high voltage is output to the source of the PMOS tube after the PMOS tube is turned on, and the output external forward high voltage is input as the drain voltage of the NMOS tube; when the NMOS tube meets the NMOS tube turn-on condition, the source voltage of the NMOS tube is clamped to the gate voltage VCC; the resistor R1 limits the current passing through the gate of the NMOS tube to protect the signal input end.

[0016] Furthermore, the NMOS tube conduction condition is that the NMOS tube gate-source voltage is greater than the NMOS tube threshold voltage; the NMOS tube gate-source voltage represents the voltage difference between the gate of the NMOS tube and the source; the NMOS tube threshold voltage represents the critical voltage value for the NMOS tube to conduct.

[0017] Furthermore, the specific process of the reverse protection is: judging whether the PMOS tube meets the PMOS tube conduction condition: if the PMOS tube meets the PMOS tube conduction condition, the source voltage of the PMOS tube is clamped to the gate voltage VSS, and the resistor R2 limits the current passing through the gate of the PMOS tube to protect the signal input end; if the PMOS tube does not meet the PMOS tube conduction condition, the PMOS tube is not turned on.

[0018] Furthermore, the conduction condition of the PMOS tube is that the gate-source voltage of the PMOS tube is not greater than the threshold voltage of the PMOS tube; the gate-source voltage of the PMOS tube represents the voltage difference between the gate and the source in the PMOS tube; the threshold voltage of the PMOS tube represents the critical voltage value for the PMOS tube to be turned on.

[0019] One or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages:

[0020] 1. Through the power module, the main protection module and the current limiting module, the signal input terminal is forwardly protected when the signal output terminal meets the forward high voltage condition, and the signal input terminal is reversely protected when the signal output terminal meets the reverse high voltage condition. Therefore, when the signal output terminal is input or short-connected to the external forward high voltage or reverse high voltage, the voltage of the signal input terminal is quickly clamped, thereby effectively protecting the device at the signal input terminal, and effectively solving the problem that it is difficult to effectively protect the device at the signal input terminal based on MOS tubes in the prior art.

[0021] 2. When the signal output terminal is input or short-connected to an external positive high voltage, the NMOS tube is turned on, thereby clamping the source voltage of the NMOS tube to the gate voltage VCC, and limiting the current through the gate of the NMOS tube through the resistor R1, thereby effectively protecting the device at the signal input end when the signal output terminal is input or short-connected to an external positive high voltage.

[0022] 3. When the signal output terminal is input or shorted to an external reverse high voltage, the PMOS tube is turned on, thereby clamping the source voltage of the PMOS tube to the gate voltage VSS, and limiting the current through the gate of the PMOS tube through resistor R2, thereby quickly clamping the voltage at the signal input terminal and effectively protecting the devices at the signal input terminal.

[0023] 4. The signal protection circuit can be realized by using NMOS tube, PMOS tube, resistor R1, resistor R2, VCC power supply and VSS power supply, which has the characteristics of few circuit components, low cost and low production difficulty, thereby simplifying the implementation method of the protection mechanism, and further realizing that the circuit can respond quickly and effectively protect the signal input end device when dealing with external large voltage input or short circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 A circuit structure block diagram of a signal protection circuit based on a MOS tube provided in an embodiment of the present application;

[0025] Figure 2 A circuit diagram of a signal protection circuit based on a MOS tube provided in an embodiment of the present application. DETAILED DESCRIPTION

[0026] The embodiment of the present application solves the problem in the prior art that it is difficult to effectively protect devices at the signal input end based on MOS tubes by providing a signal protection circuit based on MOS tubes. The power module, the main protection module and the current limiting module are used to perform forward protection on the signal input end when the signal output end meets the forward high voltage condition and to perform reverse protection on the signal input end when the signal output end meets the reverse high voltage condition. Thus, when the signal output end is input or short-connected to an external forward high voltage or reverse high voltage, the voltage at the signal input end is quickly clamped, thereby achieving effective protection of the devices at the signal input end.

[0027] The technical solution in the embodiment of the present application is to solve the problem that it is difficult to effectively protect the device at the signal input end based on the MOS tube. The overall idea is as follows:

[0028] The power module is connected to the current limiting module and the main protection module is connected to the current limiting module, the source of the NMOS tube is connected to the source of the PMOS tube through the signal input end, the drain of the NMOS tube is connected to the source of the PMOS tube, the gate of the NMOS tube is connected to the output end of the resistor R1, the drain of the PMOS tube is connected to the signal output end, the gate of the PMOS tube is connected to the output end of the resistor R2, the input end of the resistor R1 is connected to the VCC power supply, and the input end of the resistor R2 is connected to the VSS power supply; when the signal output end is input or short-connected to an external forward high voltage, the NMOS tube is turned on, so that the source voltage of the NMOS tube is clamped to the gate voltage VCC, and the current passing through the gate of the NMOS tube is limited through the resistor R1 to protect the signal input end; when the signal output end is input or short-connected to an external reverse high voltage, the PMOS tube is turned on, so that the source voltage of the PMOS tube is clamped to the gate voltage VSS, and the current passing through the gate of the PMOS tube is limited through the resistor R2 to protect the signal input end, thereby achieving an effect of effectively protecting the device at the signal input end.

[0029] In order to better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0030] like Figure 1 As shown, it is a circuit structure block diagram of a signal protection circuit based on a MOS tube provided in an embodiment of the present application, including: a power supply module, a main protection module and a current limiting module; the power supply module is used to provide positive and negative voltages of the circuit, and the power supply module includes a VCC power supply and a VSS power supply; the main protection module is used to perform voltage protection on the signal input end, and the main protection module includes an NMOS tube and a PMOS tube; the current limiting module is used to limit the current in the circuit, and the current limiting module includes a resistor R1 and a resistor R2; the power supply module is connected to the current limiting module; the main protection module is connected to the current limiting module.

[0031] Among them, Figure 2 As shown, it is a circuit diagram of a signal protection circuit based on a MOS tube provided in an embodiment of the present application, wherein the power supply module is connected to the current limiting module, and the specific connection method is: the VCC power supply is connected to the input end (2) of the resistor R1; the VSS power supply is connected to the input end (2) of the resistor R2; the main protection module is connected to the current limiting module, and the specific connection method is: the gate of the NMOS tube is connected to the output end of the resistor R1; the gate of the PMOS tube is connected to the output end of the resistor R2; the drain of the NMOS tube is connected to the source of the PMOS tube.

[0032] In this embodiment, MOS (Metal Oxide Semiconductor Field Effect Transistor) tube represents a metal oxide semiconductor field effect transistor. Figure 2 In the figure, NM1 indicates that an NMOS tube (N-type Metal-Oxide-Semiconductor) is connected to the output end (1) of the resistor R1, and PM1 indicates that a PMOS tube (P-Metal-Oxide-Semiconductor) is connected to the output end (1) of the resistor R2.

[0033] The drain of the NMOS tube is connected to the source of the PMOS tube. This connection allows the current to flow from the VCC power supply through the NMOS tube to the source of the PMOS tube when the NMOS tube is turned on, and then to the ground or other circuit parts, forming a complete current loop. At the same time, it also allows the current to flow from the signal output end through the PMOS tube to the drain of the NMOS tube, and then to the signal input end when the PMOS tube is turned on.

[0034] Furthermore, the source of the NMOS tube is used to connect to the signal input terminal; the signal input terminal is used to receive an external signal; the drain of the PMOS tube is used to connect to the signal output terminal; the signal output terminal is used to output the signal processed by the circuit.

[0035] In this embodiment, the signal input terminal is used to receive an external signal. In the present invention, the signal input terminal is connected to the source of the NMOS tube as the starting input point of the signal. The function of the signal input terminal is to ensure that the external signal can enter the circuit safely and stably.

[0036] The signal output end is used to output the signal after the circuit processing. In the present invention, the signal output end is connected to the drain of the PMOS tube and is the final output point of the signal. The main function of the signal output end is to ensure that the signal after the circuit processing can be output normally and stably.

[0037] Furthermore, resistor R1 is used to limit the current when the NMOS tube is turned on; resistor R2 is used to limit the current when the PMOS tube is turned on; the VCC power supply is a positive voltage, and the VCC power supply is used to provide a gate voltage for the NMOS tube when the NMOS tube is turned on; the VSS power supply is a negative voltage, and the VSS power supply is used to provide a gate voltage for the PMOS tube when the PMOS tube is turned on.

[0038] In this embodiment, the VCC power supply is the source of the clamping voltage of the NMOS tube in the circuit, ensuring that when the signal output terminal encounters an external positive high voltage, the NMOS tube can correctly clamp the voltage of the signal input terminal to VCC. The VSS power supply is the source of the clamping voltage of the PMOS tube in the circuit, ensuring that when the signal output terminal encounters an external negative high voltage, the PMOS tube can correctly clamp the voltage of the signal input terminal to VSS.

[0039] The gate of the NMOS tube is connected to the VCC power supply through the resistor R1, so that the resistor R1 provides a stable voltage reference point for the gate of the NMOS tube, and at the same time limits the gate current of the NMOS tube to prevent the gate of the NMOS tube from being impacted by the current. When the signal output end has a forward voltage higher than the signal, the NMOS tube is turned on. The existence of the resistor R1 also ensures the slow change of the gate voltage of the NMOS tube, which helps the stable operation of the circuit.

[0040] The gate of the PMOS tube is connected to the VSS power supply through the resistor R2, so that the resistor R2 provides a stable voltage reference point for the gate of the PMOS tube and limits the gate current of the PMOS tube. When a reverse voltage appears at the signal output end, the PMOS tube is turned on. The existence of the resistor R2 also ensures that the gate voltage of the PMOS tube changes slowly, which helps the circuit to work stably.

[0041] Furthermore, the NMOS tube is used to perform forward protection on the signal input terminal when the signal output terminal meets the forward high voltage condition; the forward high voltage condition indicates that an external forward high voltage input or an external forward high voltage short circuit occurs at the signal output terminal.

[0042] In this embodiment, when an external positive high voltage input or short circuit occurs at the signal output terminal, the NMOS tube can respond quickly and conduct, clamping the voltage at the signal input terminal to the VCC power supply voltage, thereby protecting the signal input terminal. The positive high voltage protection mechanism helps to maintain the circuit operating within the normal operating voltage range and avoid circuit instability or failure caused by voltage abnormality.

[0043] Furthermore, the PMOS tube is used to provide reverse protection for the signal input terminal when the signal output terminal meets the reverse high voltage condition; the reverse high voltage condition indicates that an external reverse high voltage input or an external reverse high voltage short circuit occurs at the signal output terminal.

[0044] In this embodiment, when an external reverse high voltage input or short circuit occurs at the signal output terminal, the PMOS tube can be turned on and clamp the voltage at the signal input terminal to the VSS power supply voltage, thereby protecting the circuit from the influence of reverse high voltage.

[0045] Combining the forward protection of the NMOS tube and the reverse protection of the PMOS tube, bidirectional protection of the signal input end is achieved, thereby improving the reliability and safety of the circuit.

[0046] Furthermore, the specific process of the forward protection is as follows: when the signal output terminal meets the forward high voltage condition, the external forward high voltage is input through the drain of the PMOS tube after the PMOS tube is turned on; the input external forward high voltage is output to the source of the PMOS tube after the PMOS tube is turned on, and the output external forward high voltage is input as the drain voltage of the NMOS tube; when the NMOS tube meets the NMOS tube turn-on condition, the source voltage of the NMOS tube is clamped to the gate voltage VCC; the resistor R1 limits the current passing through the gate of the NMOS tube to protect the signal input terminal.

[0047] In this embodiment, when an external positive high voltage input occurs at the signal output end or an external positive high voltage short circuit occurs, the voltage is introduced and the PMOS tube is turned on: the external positive high voltage is first introduced into the circuit through the drain of the PMOS tube. When the voltage difference between the source of the PMOS tube and the gate of the PMOS tube reaches the conduction condition, the PMOS tube will be turned on. In this circuit, the gate of the PMOS tube is connected to the VSS power supply (negative voltage) through the resistor R2. Therefore, when the external positive high voltage is applied to the drain of the PMOS tube, the voltage difference between the source of the PMOS tube and the gate of the PMOS tube is large enough to turn on the PMOS tube. The conduction and voltage clamping of the NMOS tube: after the PMOS tube is turned on, the positive high voltage is transmitted to the drain of the NMOS tube through the source of the PMOS tube. The gate of the NMOS tube is connected to the VCC power supply (positive voltage) through the resistor R1. The conduction condition of the NMOS tube is that the voltage difference between the source of the NMOS tube and the gate of the NMOS tube reaches the conduction condition. Since the drain voltage of the NMOS tube is higher than the source voltage (because the source is connected to the low potential part of the circuit through the signal input terminal) and the gate voltage is VCC, the NMOS tube will also be turned on. When the NMOS tube is turned on, its source voltage (that is, the voltage at the signal input terminal) will be clamped to the gate voltage VCC. This is because when the NMOS tube is turned on, it is equivalent to forming a low-resistance path between the source and the drain, and the gate voltage VCC becomes a "clamping" voltage, which limits the increase of the source voltage.

[0048] Resistor R1 plays a current limiting role at this time. It limits the current through the gate of the NMOS tube, thereby preventing the device at the signal input end from being damaged due to excessive current.

[0049] Furthermore, the NMOS tube conduction condition is that the NMOS tube gate-source voltage is greater than the NMOS tube threshold voltage; the NMOS tube gate-source voltage represents the voltage difference between the gate of the NMOS tube and the source; the NMOS tube threshold voltage represents the critical voltage value for the NMOS tube to conduct.

[0050] In this embodiment, the gate-to-source voltage (Vgs) of the NMOS tube refers to the voltage difference between the gate (G) of the NMOS tube and the source (S) of the NMOS tube, which is recorded as NVgs. In the NMOS tube, the gate of the NMOS tube is a key electrode for controlling the conduction and cutoff of the channel. When a positive voltage relative to the source is applied to the gate of the NMOS tube, negative charges (electrons) will be induced in the channel under the gate of the NMOS tube. These negative charges will form a conductive channel, allowing conduction between the source of the NMOS tube and the drain of the NMOS tube.

[0051] The threshold voltage (Vth) of the NMOS tube is the critical voltage value for the NMOS tube to conduct, recorded as NVth. Only when NVgs is greater than or equal to NVth, the NMOS tube will start to conduct. The value of NVth depends on factors such as the manufacturing process, structural parameters, and working environment (such as temperature) of the tube. In practical applications, NVth is an important parameter that determines the performance of the NMOS tube, such as the switching speed and power consumption.

[0052] Therefore, the conduction condition of the NMOS tube can be expressed as: the gate-source voltage of the NMOS tube (NVgs) must be greater than the threshold voltage of the NMOS tube (NVth). When this condition is met, the NMOS tube will start to conduct, and a conductive channel will be formed between the source and drain of the NMOS tube, allowing current to pass.

[0053] Furthermore, the specific process of reverse protection is: judging whether the PMOS tube meets the PMOS tube conduction condition: if the PMOS tube meets the PMOS tube conduction condition, the source voltage of the PMOS tube is clamped to the gate voltage VSS, and the resistor R2 limits the current passing through the gate of the PMOS tube to protect the signal input end; if the PMOS tube does not meet the PMOS tube conduction condition, the PMOS tube is not turned on.

[0054] In this embodiment, when an external reverse high voltage input or an external reverse high voltage short circuit occurs at the signal output end, the conduction and voltage clamping of the PMOS tube: when an external negative voltage high voltage is applied to the drain of the PMOS tube, the PMOS tube will be turned on because the voltage difference between the source and the gate reaches the conduction condition. After the PMOS tube is turned on, its source voltage (i.e., the drain voltage of the NMOS tube) will be clamped to the gate voltage VSS. This is because after the PMOS tube is turned on, a low-resistance path is formed between the source and the drain, and the gate voltage VSS becomes a "clamping" voltage, which limits the reduction of the source voltage (actually limiting the negative increase of the drain voltage).

[0055] In this process, resistor R2 plays a role in current limiting. It limits the current through the gate of the PMOS tube, thereby preventing the device at the signal input end from being damaged due to excessive current.

[0056] Furthermore, the PMOS tube conduction condition is that the PMOS tube gate-source voltage is not greater than the PMOS tube threshold voltage; the PMOS tube gate-source voltage represents the voltage difference between the gate and the source in the PMOS tube; the PMOS tube threshold voltage represents the critical voltage value for the PMOS tube to conduct.

[0057] In this embodiment, the PMOS tube gate-source voltage (denoted as PVgs) represents the voltage difference between the PMOS tube gate (G) and the PMOS tube source (S) in the PMOS tube. In the PMOS tube, the gate voltage is used to control the hole concentration in the channel, thereby affecting the conduction state of the channel. When a negative voltage relative to the PMOS tube source is applied to the PMOS tube gate, positive charges (holes) will be induced in the channel below the PMOS tube gate, and these positive charges will form a conductive channel, so that the PMOS tube source and the PMOS tube drain can conduct electricity.

[0058] The threshold voltage of the PMOS tube (denoted as PVth) represents the critical voltage value for conduction in the PMOS tube, but it is negative. The PMOS tube will only start to conduct when the PVgs of the PMOS tube is less than or equal to (note that it is less than or equal to, which is the opposite of greater than or equal to in NMOS) the PVth of the PMOS tube. The value of the PVth of the PMOS tube depends on factors such as the manufacturing process, structural parameters and working environment (such as temperature) of the tube. In the PMOS tube, the negative value characteristic of the PVth of the PMOS tube makes it suitable for occasions where the source is connected to a high potential (such as VCC).

[0059] Therefore, the conduction condition of the PMOS tube can be expressed as: the gate-source voltage of the PMOS tube (PVgs) must be less than or equal to the threshold voltage of the PMOS tube (PVth, which is a negative value). When this condition is met, the PMOS tube will start to conduct, and a conductive channel will be formed between the source and drain of the PMOS tube, allowing current to flow from the drain of the PMOS tube to the source of the PMOS tube (note that the current direction in the PMOS is opposite to that of the NMOS).

[0060] In summary, the embodiment of the present application uses a power module, a main protection module and a current limiting module to perform forward protection on the signal input terminal when the signal output terminal meets the forward high voltage condition, and to perform reverse protection on the signal input terminal when the signal output terminal meets the reverse high voltage condition. Therefore, when the signal output terminal is input or short-connected to an external forward high voltage or reverse high voltage, the voltage at the signal input terminal is quickly clamped, thereby effectively protecting the devices at the signal input terminal, and effectively solving the problem in the prior art that it is difficult to effectively protect the devices at the signal input terminal based on MOS tubes.

[0061] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0062] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0063] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0064] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0065] Although the preferred embodiments of the present invention have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0066] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A signal protection circuit based on MOS tube, characterized in that: include: Power module, main protection module and current limiting module; The power supply module is used to provide positive and negative voltages for the circuit, and the power supply module includes a VCC power supply and a VSS power supply; The main protection module is used to perform voltage protection on the signal input terminal, and the main protection module includes an NMOS tube and a PMOS tube; The current limiting module is used to limit the current in the circuit, and the current limiting module includes a resistor R1 and a resistor R2; The power supply module is connected to the current limiting module; The main protection module is connected to the current limiting module.

2. A signal protection circuit based on a MOS tube as claimed in claim 1, characterized in that: The power module is connected to the current limiting module in the following specific connection manner: The VCC power supply is connected to the input end of the resistor R1; The VSS power supply is connected to the input end of the resistor R2; The main protection module is connected to the current limiting module, and the specific connection method is: The gate of the NMOS tube is connected to the output end of the resistor R1; The gate of the PMOS tube is connected to the output end of the resistor R2; The drain of the NMOS tube is connected to the source of the PMOS tube.

3. A signal protection circuit based on a MOS tube as claimed in claim 2, characterized in that: The source of the NMOS tube is used to connect to the signal input terminal; The signal input terminal is used to receive an external signal; The drain of the PMOS tube is used to connect to the signal output end; The signal output terminal is used to output the signal processed by the circuit.

4. A signal protection circuit based on a MOS tube as claimed in claim 3, characterized in that: The resistor R1 is used to limit the current when the NMOS tube is turned on; The resistor R2 is used to limit the current when the PMOS tube is turned on; The VCC power supply is a positive voltage, and the VCC power supply is used to provide a gate voltage for the NMOS tube when the NMOS tube is turned on; The VSS power supply is a negative voltage, and the VSS power supply is used to provide a gate voltage for the PMOS tube when the PMOS tube is turned on.

5. A signal protection circuit based on a MOS tube as claimed in claim 4, characterized in that: The NMOS tube is used to perform forward protection on the signal input terminal when the signal output terminal meets the forward high voltage condition; The forward high voltage condition indicates that an external forward high voltage input occurs at the signal output terminal or an external forward high voltage short circuit occurs.

6. A signal protection circuit based on a MOS tube as claimed in claim 5, characterized in that: The PMOS tube is used to provide reverse protection to the signal input terminal when the signal output terminal meets the reverse high voltage condition; The reverse high voltage condition indicates that an external reverse high voltage input occurs at the signal output terminal or an external reverse high voltage short circuit occurs.

7. A signal protection circuit based on a MOS tube as claimed in claim 5, characterized in that: The specific process of the forward protection is: When the signal output terminal meets the forward high voltage condition, the external forward high voltage is input through the drain of the PMOS tube after the PMOS tube is turned on; The input external positive high voltage is output to the source of the PMOS tube after the PMOS tube is turned on, and the output external positive high voltage is used as the drain voltage input of the NMOS tube; When the NMOS tube meets the NMOS tube conduction condition, the source voltage of the NMOS tube is clamped to the gate voltage VCC; The resistor R1 limits the current passing through the gate of the NMOS tube to protect the signal input terminal.

8. A signal protection circuit based on a MOS tube as claimed in claim 7, characterized in that: The NMOS tube conduction condition is that the gate-source voltage of the NMOS tube is greater than the threshold voltage of the NMOS tube; The NMOS tube gate-source voltage represents the voltage difference between the gate of the NMOS tube and the source; The NMOS tube threshold voltage represents the critical voltage value at which the NMOS tube is turned on.

9. A signal protection circuit based on a MOS tube as claimed in claim 6, characterized in that: The specific process of the reverse protection is: Determine whether the PMOS tube meets the PMOS tube conduction conditions: If the PMOS tube meets the PMOS tube conduction condition, the source voltage of the PMOS tube is clamped to the gate voltage VSS, and the resistor R2 limits the current passing through the gate of the PMOS tube to protect the signal input terminal; If the PMOS tube does not meet the PMOS tube conduction condition, the PMOS tube will not conduct.

10. A signal protection circuit based on a MOS tube as claimed in claim 9, characterized in that: The PMOS tube conduction condition is that the gate-source voltage of the PMOS tube is not greater than the threshold voltage of the PMOS tube; The PMOS tube gate-source voltage represents the voltage difference between the gate and the source in the PMOS tube; The PMOS tube threshold voltage represents the critical voltage value at which the PMOS tube is turned on.

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