Filter and preparation method thereof

Abstract

The invention discloses a filter and a preparation method thereof. The filter comprises a substrate, at least one resonator and at least one capacitor, wherein the at least one resonator and the at least one capacitor are located on one side of the substrate; the capacitor comprises an electrode substrate layer and a protective layer. The protective layer is positioned on one side, deviating from the substrate, of the electrode substrate layer; the electrode substrate layer comprises a first electrode substrate and a second electrode substrate, the first electrode substrate and the second electrode substrate are arranged on the same layer, and the first surface of the first electrode substrate and the first surface of the second electrode substrate are parallel to the direction where the substrate is located; wherein the capacitor and the resonator are sequentially arranged along the direction of the substrate. The filter provided by the invention not only can avoid the defects of insufficient coverage of the dielectric layer and easy leakage of the electrode caused by the inclination angle, but also can reflect sound wave energy in multiple directions, and improves the performance of the resonator.

Description

Technical Field

[0001] The present invention relates to the technical field of resonators, and in particular to a filter and a preparation method thereof. Background Art

[0002] RF filters and resonators are key components in modern wireless communication devices, and their performance directly affects the quality of signal transmission and system efficiency. Integrating capacitor structures in filters can improve and adjust various aspects of filter and resonator performance. Taking bandpass filters as an example, multiple performance indicators of filters can be effectively improved by connecting capacitor structures in series or in parallel in the circuit topology.

[0003] Although Metal-Insulator-Metal (MIM) capacitor technology has been widely used and developed rapidly, the existing technology still faces the following technical bottlenecks:

[0004] 1. Insufficient protection of the dielectric layer: During the processing of capacitors based on micro-electromechanical systems, the dielectric layer is exposed to corrosive gases and liquids and is easily damaged, resulting in a decrease in capacitor performance or even failure. This problem seriously affects the stability and reliability of MIM capacitors.

[0005] 2. Inefficient use of layout space: The MIM capacitor structure in the prior art usually only has a single function of storing charge, but occupies the layout space of the device without bringing any added value. Summary of the invention

[0006] The present invention provides a filter and a preparation method thereof, wherein a first electrode substrate and a second electrode substrate in a capacitor structure of the filter are arranged in the same layer, and the first surfaces of the first electrode substrate and the second electrode substrate are parallel to the direction of the substrate, so that the input and output ports are on the same surface, and the steps caused by the electrodes in different layers are reduced, which not only increases the coverage integrity of the protective layer, improves the protection capability of the dielectric layer, and significantly improves the reliability of the capacitor structure, but also the capacitor structure has an acoustic reflection function, which can reflect transverse and longitudinal acoustic waves of specific wavelengths, and improves the performance of the filter.

[0007] According to a first aspect of the present invention, there is provided a filter, comprising: a substrate, and at least one resonator and at least one capacitor located on one side of the substrate;

[0008] The capacitor comprises: an electrode substrate layer and a protective layer;

[0009] The protective layer is located on a side of the electrode substrate layer away from the substrate;

[0010] The electrode substrate layer includes a first electrode substrate and a second electrode substrate, the first electrode substrate and the second electrode substrate are arranged in the same layer, and the first surfaces of the first electrode substrate and the second electrode substrate are parallel to the direction of the substrate; wherein the capacitor and the resonator are arranged in sequence along the direction of the substrate.

[0011] Optionally, it also includes a piezoelectric layer and a seed layer;

[0012] The seed layer is located on a side of the substrate close to the electrode base layer, and the piezoelectric layer is located on a side of the seed layer away from the substrate.

[0013] Optionally, the capacitor further comprises a third electrode substrate, a fourth electrode substrate, a dielectric layer and a passivation layer;

[0014] The dielectric layer is located on the side of the piezoelectric layer away from the substrate; the first electrode substrate and the second electrode substrate are located on the side of the dielectric layer away from the piezoelectric layer; the passivation layer is located on the side of the third electrode substrate and the fourth electrode substrate away from the dielectric layer; wherein the third electrode substrate is located on the side of the first electrode substrate away from the dielectric layer, and the fourth electrode substrate is located on the side of the second electrode substrate away from the dielectric layer; the third electrode substrate and the fourth electrode substrate are arranged on the same layer.

[0015] Optionally, the upper electrode layer includes a first opening, a second opening, a first protective layer and a second protective layer;

[0016] The first opening is located at the connection between the capacitor and the resonator;

[0017] The second opening is located at a side away from the connection;

[0018] The first protective layer is located on a side of the first opening away from the piezoelectric layer;

[0019] The second protection layer is located on a side of the second opening away from the piezoelectric layer.

[0020] Optionally, the capacitor further includes a dielectric layer and a groove;

[0021] The groove is located on the side of the substrate close to the seed layer; the dielectric layer is filled in the groove, and the first surface of the dielectric layer is flush with the first surface of the substrate; the first electrode substrate and the second electrode substrate are located on the side of the dielectric layer away from the substrate.

[0022] Optionally, the capacitor further comprises a first lead-out hole, a second lead-out hole, a thickening layer and an upper electrode layer;

[0023] The first lead-out hole is located at the connection between the capacitor and the resonator;

[0024] The second lead-out hole is located at a side away from the connection point;

[0025] The thickened layer is respectively located on a side of the first lead-out hole away from the substrate and a side of the second lead-out hole away from the substrate;

[0026] The upper electrode layer is located on a side of the thickened layer close to the piezoelectric layer.

[0027] According to a second aspect of the present invention, there is provided a method for preparing a filter, for preparing any filter described in the first aspect of the present invention;

[0028] The preparation method comprises:

[0029] providing a substrate;

[0030] At least one resonator and at least one capacitor are prepared on one side of the substrate; the capacitor also includes an electrode substrate layer and a protective layer, and the protective layer is located on the side of the electrode substrate layer away from the substrate; the electrode substrate layer includes a first electrode substrate and a second electrode substrate, the first electrode substrate and the second electrode substrate are arranged in the same layer, and the first surfaces of the first electrode substrate and the second electrode substrate are parallel to the direction of the substrate; wherein the capacitor and the resonator are arranged in sequence along the direction of the substrate.

[0031] Optionally, after providing the substrate, the method further comprises:

[0032] Preparing a first groove on the substrate and filling the first groove with a first sacrificial layer;

[0033] A seed layer is prepared on a side of the first groove facing away from the substrate.

[0034] Optionally, preparing at least one resonator and at least one capacitor on one side of the substrate comprises:

[0035] A whole piezoelectric layer is prepared on the side of the seed layer facing away from the substrate,

[0036] A whole second sacrificial layer is prepared on the side of the piezoelectric layer away from the substrate, and the second sacrificial layer is patterned to form a first dielectric layer, a second dielectric layer and a third dielectric layer, wherein the first dielectric layer is located in an overlapping region between the piezoelectric layer and the capacitor;

[0037] A whole thickening layer is prepared on the side of the second sacrificial layer away from the piezoelectric layer, and the thickening layer is patterned to form a first electrode substrate, a second electrode substrate, a first thickening layer and a second thickening layer; the first electrode substrate and the second electrode substrate are located in an overlapping area between the first thickening layer and the capacitor;

[0038] A whole upper electrode layer is prepared on the side of the thickened layer away from the second sacrificial layer, and the upper electrode layer is patterned to form a third electrode substrate and a fourth electrode substrate, wherein the third electrode substrate is located on the side of the first electrode substrate away from the first dielectric layer, and the fourth electrode substrate is located on the side of the second electrode substrate away from the first dielectric layer.

[0039] Preparing a passivation layer on a side of the upper electrode layer away from the thickened layer, and patterning the passivation layer to form a first opening and a second opening;

[0040] The first opening is located at the connection between the capacitor and the resonator;

[0041] The second opening is located at a side away from the connection;

[0042] preparing a first protective layer and a second protective layer on the first opening and the second opening respectively;

[0043] The first groove and the first sacrificial layer are released to prepare at least one resonator and at least one capacitor.

[0044] Optionally, preparing at least one resonator and at least one capacitor on one side of the substrate comprises:

[0045] preparing a second groove on the substrate, and filling a dielectric layer in the second groove so that a first surface of the dielectric layer is flush with a first surface of the substrate;

[0046] The lower electrode layer of the resonator, the first electrode substrate of the capacitor and the second electrode substrate of the capacitor are prepared on the side of the seed layer away from the substrate, and the lower electrode layer, the first electrode substrate and the second electrode substrate are arranged in the same layer; the first edge of the lower electrode layer is located in the first groove,

[0047] Preparing a whole piezoelectric layer on the side of the lower electrode layer away from the seed layer, and patterning the piezoelectric layer to form a first lead-out hole, a second lead-out hole, and a third lead-out hole;

[0048] Preparing a second sacrificial layer on the overlapping area of ​​the piezoelectric layer and the resonator, and patterning the second sacrificial layer;

[0049] Preparing a thickening layer on the first lead-out hole, the second lead-out hole and the third lead-out hole, and preparing a thickening layer on a side of the second sacrificial layer away from the piezoelectric layer;

[0050] Preparing an upper electrode layer on a side of the thickened layer away from the second sacrificial layer, and patterning the upper electrode layer;

[0051] preparing and patterning a passivation layer on the overlapping area of ​​the piezoelectric layer and the capacitor,

[0052] preparing a protective layer on the first lead-out hole, the second lead-out hole and the third lead-out hole,

[0053] The first groove and the first sacrificial layer are released to prepare at least one resonator and at least one capacitor.

[0054] The present invention discloses a filter and a preparation method thereof, wherein the filter comprises: a substrate and at least one resonator and at least one capacitor located on one side of the substrate; the capacitor comprises: an electrode substrate layer and a protective layer; the protective layer is located on the side of the electrode substrate layer away from the substrate; the electrode substrate layer comprises a first electrode substrate and a second electrode substrate, the first electrode substrate and the second electrode substrate are arranged in the same layer, and the first surfaces of the first electrode substrate and the second electrode substrate are parallel to the direction where the substrate is located; wherein the capacitor and the resonator are arranged in sequence along the direction where the substrate is located. The present invention provides a filter and a preparation method thereof, wherein the first electrode substrate and the second electrode substrate in the capacitor structure of the filter are arranged in the same layer, and the first surfaces of the first electrode substrate and the second electrode substrate are parallel to the direction where the substrate is located, so that the input and output ports are on one surface, the steps caused by the electrodes in different layers are reduced, not only the coverage integrity of the protective layer is increased, the protection capability of the dielectric layer is improved, and the reliability of the capacitor structure is significantly improved, but also the capacitor structure has an acoustic reflection function, which can reflect transverse and longitudinal sound waves of a specific wavelength, thereby improving the performance of the filter.

[0055] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0057] Figure 1 This is a comparison chart of fixed-mount capacitors and MIM capacitors;

[0058] Figure 2 It is a schematic diagram of a capacitor structure in the prior art;

[0059] Figure 3 is a schematic diagram of a capacitor structure provided by an embodiment of the present invention;

[0060] Figure 4 is a schematic diagram of the structure of a filter provided by an embodiment of the present invention;

[0061] Figure 5 is a schematic diagram of the structure of another filter provided by an embodiment of the present invention;

[0062] Figure 6 is a schematic diagram of the structure of another filter provided by an embodiment of the present invention;

[0063] Figure 7 is a schematic diagram of the structure of another filter provided by an embodiment of the present invention;

[0064] Figure 8 is a top view schematic diagram of the connection between a capacitor and a resonator in a filter provided by an embodiment of the present invention;

[0065] Fig. 9 is a schematic diagram of the structure of another filter provided by an embodiment of the present invention;

[0066] Fig.10 is a schematic diagram of the structure of another filter provided by an embodiment of the present invention;

[0067] Fig.11 is a top view schematic diagram of the connection between a capacitor and a resonator in another filter provided by an embodiment of the present invention;

[0068] Fig.12 is a flow chart of a method for preparing a filter provided by an embodiment of the present invention;

[0069] Fig.13 is a flow chart of preparing a filter provided by an embodiment of the present invention;

[0070] Fig.14 is a flow chart of another method for preparing a filter provided by an embodiment of the present invention;

[0071] Fig.15 is a flow chart of preparing another filter provided by an embodiment of the present invention;

[0072] Fig.16 is a flow chart of another method for preparing a filter provided by an embodiment of the present invention;

[0073] Fig.17 is a flow chart of preparing another filter provided by an embodiment of the present invention;

[0074] Fig.18 is a flow chart of another method for preparing a filter provided by an embodiment of the present invention;

[0075] Fig.19 is a flow chart of preparing another filter provided by an embodiment of the present invention;

[0076] Fig. 20 This is a technical effect diagram of a capacitor and a resonator connected in series according to an embodiment of the present invention;

[0077] Fig.21 This is a technical effect diagram of a capacitor and a resonator connected in parallel provided by an embodiment of the present invention;

[0078] Fig. 22 It is a schematic diagram of the connection between the series branch and the parallel branch of the filter provided by the embodiment of the present invention and the thin film bulk acoustic wave resonator. DETAILED DESCRIPTION

[0079] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0080] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0081] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0082] RF filters and resonators are key components in modern wireless communication devices, and their performance directly affects the quality of signal transmission and system efficiency. Integrating capacitor structures in filters can improve and adjust various aspects of filter and resonator performance. Taking bandpass filters as an example, by connecting capacitor structures in series or in parallel in the circuit topology, multiple performance indicators of the filter can be effectively improved, mainly in the following aspects:

[0083] 1. Adjustment of center frequency

[0084] Series Capacitor: Increasing the value of the series capacitor can lower the center frequency of the bandpass filter, while decreasing the series capacitor can increase the center frequency.

[0085] Parallel capacitance: The size of the parallel capacitance determines the resonant frequency of the resonant circuit. Increasing the parallel capacitance will lower the center frequency, while decreasing it will increase the frequency.

[0086] By properly designing the capacitance value, the operating frequency band of the filter can be precisely adjusted.

[0087] 2. Bandwidth control

[0088] The combination of series and parallel capacitors has a significant effect on the bandwidth of the filter:

[0089] Reducing the parallel capacitance will increase the bandwidth of the filter, making it suitable for applications that require broadband signal transmission.

[0090] Increasing parallel capacitance will reduce the bandwidth, which is suitable for the selectivity requirements of narrowband signals.

[0091] By optimizing the configuration of series-parallel capacitors, the bandwidth of the filter can be adjusted to suit different application scenarios.

[0092] 3. Reduction of passband insertion loss

[0093] The proper series capacitance value can improve the performance of the matching network, thereby reducing insertion loss within the passband and making signal transmission more efficient.

[0094] The parallel capacitors help to reduce unnecessary power loss and improve the transmission efficiency of the passband.

[0095] 4. Improvement of stopband suppression performance

[0096] By adding appropriate parallel capacitors on both sides of the stopband of the bandpass filter, the resonance point of the filter can be increased, thereby enhancing the ability to suppress stopband signals.

[0097] The stopband slope becomes steeper, allowing the filter to better separate passband and stopband signals.

[0098] 5. Optimizing the quality factor of the circuit

[0099] The series-shunt capacitors affect the quality factor of the filter and thus the frequency selectivity:

[0100] High quality factor: By reducing parasitic effects and optimizing capacitor configuration, the filter's selectivity and the sharpness of the resonance point can be improved.

[0101] Low quality factor: suitable for wide frequency band applications, achieving wider bandwidth by increasing the distribution of capacitance.

[0102] 6. Improvement of noise performance

[0103] The parallel capacitor can suppress unnecessary high-frequency noise and reduce the impact of noise on the performance of the bandpass filter.

[0104] Optimizing the capacitor topology can improve the overall signal quality and enhance the signal-to-noise ratio of the system.

[0105] 7. Improved circuit stability and reliability

[0106] Reasonable design of series-parallel capacitors can reduce parasitic effects (such as parasitic inductance and resistance) and improve the stability of the filter.

[0107] For high frequency applications, by optimizing the capacitor topology, the filter performance is more reliable under temperature and load changes.

[0108] There are two main types of conventional filter capacitors: Integrated Passive Device (IPD) capacitors and MIM capacitors. Figure 1 This is a comparison chart of solid-mount capacitors and MIM capacitors. The comparison of the two capacitors is summarized as follows Figure 1 As shown, IPD capacitors have more parasitics and are relatively large in size in high-frequency applications, so MIM capacitor structures are often used in the RF and microwave fields.

[0109] Figure 2 It is a schematic diagram of the capacitor structure in the prior art, refer to Figure 2 , the capacitor structure includes a lower electrode 1, a dielectric layer 2, a protective layer 3 and an upper electrode 4. However, there are two defects in this capacitor structure. The first is area A. Due to the inclination angle at the end of the lower electrode 1 (generally the inclination angle is 10 to 30 degrees for the subsequent deposition of the dielectric layer 2 film), the dielectric layer 2 has a climbing process in area A. Since the dielectric layer 2 is generally thin (tens of nanometers), it is difficult to ensure good coverage in area A, and it is easy for the upper electrode 4 to short-circuit with the lower electrode 1. Secondly, a protective layer 3 is generally covered in area B to prevent the dielectric layer 2 from being corroded by corrosive gases or liquids in the process, causing damage to the device structure.

[0110] Figure 3is a schematic diagram of a capacitor structure provided by an embodiment of the present invention, with reference to Figure 3 The capacitor structure provided by the embodiment of the present invention is as follows Figure 3 As shown, a lateral capacitor is set up, the dielectric layer 2' is located below the port 1 electrode 1' and the port 2 electrode 4', and the port 1 electrode 1' and the port 2 electrode 4' are covered with a protective layer 3'. Since there is no slope climbing, there is no problem of electrode short circuit. Secondly, the protective layer 3' can be deposited thicker and basically does not affect the capacitance characteristics.

[0111] Figure 4 is a schematic diagram of a filter structure provided by an embodiment of the present invention, referring to Figure 4 A filter comprises: a substrate 101 and at least one resonator 200 and at least one capacitor 100 located on one side of the substrate 101; the capacitor 100 comprises: an electrode substrate layer 102 and a protective layer 103; the protective layer 103 is located on the side of the electrode substrate layer 102 away from the substrate 101; the electrode substrate layer 102 comprises a first electrode substrate 1021 and a second electrode substrate 1022, the first electrode substrate 1021 and the second electrode substrate 1022 are arranged in the same layer, and the first surfaces of the first electrode substrate 1021 and the second electrode substrate 1022 are parallel to the direction of the substrate 101; wherein the capacitor 100 and the resonator 200 are arranged in sequence along the direction of the substrate 101.

[0112] Specifically, the filter provided by the embodiment of the present invention includes a substrate 101, at least one resonator 200 located on one side of the substrate 101, and at least one capacitor 100. It can be understood that the embodiment of the present invention can improve the performance of the filter by connecting the capacitor 100 in series or in parallel with the resonator 200. The capacitor 100 includes an electrode substrate layer 102 and a protective layer 103. The protective layer 103 is located on the side of the electrode substrate layer 102 away from the substrate 101. The electrode substrate layer 102 includes a first electrode substrate 1021 (port one electrode) and a second electrode substrate 1022 (port two electrode). The first electrode substrate 1021 and the second electrode substrate 1022 are arranged in the same layer, and the first surfaces (for example, the upper surfaces) of the first electrode substrate 1021 and the second electrode substrate 1022 are parallel to the direction of the substrate 101, such as Figure 1 As shown, the capacitor 100 and the resonator 200 are sequentially arranged along the direction of the substrate 101 , and the capacitor 100 may be on the left side of the resonator 200 . The capacitor 100 and the resonator 200 are manufactured in the same process.

[0113] The filter provided by the embodiment of the present invention arranges the first electrode substrate and the second electrode substrate in the capacitor on the same layer, and the first surfaces of the first electrode substrate and the second electrode substrate are parallel to the direction of the substrate, so that the input and output ports are on the same surface, reducing the steps caused by the electrodes in different layers, not only increasing the coverage integrity of the protective layer, improving the protection ability of the dielectric layer, and significantly improving the reliability of the capacitor structure, but also the capacitor structure also has an acoustic reflection function, which can reflect transverse and longitudinal sound waves of specific wavelengths, thereby improving the performance of the filter.

[0114] Figure 5 is a schematic diagram of the structure of another filter provided by an embodiment of the present invention, referring to Figure 5 , optionally, further comprising a piezoelectric layer 105 and a seed layer 104;

[0115] The seed layer 104 is located on a side of the substrate 101 close to the electrode substrate layer 102 , and the piezoelectric layer 105 is located on a side of the seed layer 104 away from the substrate 101 .

[0116] Specifically, the filter provided by the embodiment of the present invention also includes a piezoelectric layer 105 and a seed layer 104, the seed layer 104 is located on the side of the substrate 101 close to the electrode substrate layer 102, and the piezoelectric layer 105 is located on the side of the seed layer 104 away from the substrate 101, and the piezoelectric layer 105 uses the inverse piezoelectric effect to convert electrical signals into acoustic signals and form resonance in the filter; the function of the seed layer 104 is to ensure that subsequent films, especially piezoelectric films, have good crystal orientation; wherein the material of the piezoelectric layer 105 can be aluminum nitride AlN, lithium niobate LiNbO3, lithium tantalate LiTaO3, lead zirconate titanate PZT, zinc oxide ZnO, scandium-doped aluminum nitride ScAlN, quartz crystal Quatz, lead magnesium niobate (PMN), lead fluoride (PbTiO3), etc. and their combinations; the material of the seed layer 104 can be aluminum nitride AIN, titanium nitride TiN, etc., and the embodiment of the present invention does not limit the materials of the piezoelectric layer and the seed layer.

[0117] Figure 6 is a schematic diagram of the structure of another filter provided by an embodiment of the present invention, referring to Figure 6 Optionally, the capacitor 100 further includes a third electrode substrate 1023 , a fourth electrode substrate 1024 , a dielectric layer 106 and a passivation layer 107 ;

[0118] The dielectric layer 106 is located on the side of the piezoelectric layer 105 away from the substrate 101; the first electrode substrate 1021 and the second electrode substrate 1022 are located on the side of the dielectric layer 106 away from the piezoelectric layer 105; the passivation layer 107 is located on the side of the third electrode substrate 1023 and the fourth electrode substrate 1024 away from the dielectric layer 106; wherein the third electrode substrate 1023 is located on the side of the first electrode substrate 1021 away from the dielectric layer 106, and the fourth electrode substrate 1024 is located on the side of the second electrode substrate 1022 away from the dielectric layer 106; the third electrode substrate 1023 and the fourth electrode substrate 1024 are arranged on the same layer.

[0119] Specifically, the capacitor 100 further includes a third electrode substrate 1023, a fourth electrode substrate 1024, a dielectric layer 106 and a passivation layer 107. The dielectric layer 106 is located on the side of the piezoelectric layer 105 away from the substrate 101. The dielectric layer 106 can prevent the direct flow of current, thereby achieving efficient transmission of signals. The first electrode substrate 1021 and the second electrode substrate 1022 are located on the side of the dielectric layer 106 away from the piezoelectric layer 105; and the first electrode substrate 1021 and the second electrode substrate 1022 are arranged in the same layer, and the passivation layer 107 is located on the side of the third electrode substrate 1023 and the fourth electrode substrate 1024 away from the dielectric layer 106; the fourth electrode substrate 1024 is located on the side of the second electrode substrate 1022 away from the dielectric layer 106; the third electrode substrate 1023 and the fourth electrode substrate 1024 are arranged in the same layer, and it can be understood that the third electrode substrate 1023 is located on the first electrode substrate 102 1, the fourth electrode substrate 1024 is on the second electrode substrate 1022, and the third electrode substrate 1023 and the fourth electrode substrate 1024 are arranged in the same layer. By stacking the third electrode substrate 1023 and the fourth electrode substrate 1024 on the first electrode substrate 1021 and the second electrode substrate 1022, respectively, the conductivity of the entire capacitor 100 can be increased, the performance of the electrode can be improved, and the resistivity can be reduced. Among them, the materials of the first electrode substrate 1021, the second electrode substrate 1022, the third electrode substrate 1023 and the fourth electrode substrate 1024 can be one of the metals selected from the group consisting of molybdenum (Mo), aluminum (Al), copper (Cu), tungsten (W), tantalum (Ta), platinum (Pt), ruthenium (Ru), rhodium (Rh), iridium (Ir), chromium (Cr), titanium (Ti), gold (Au), osmium (Os), rhenium (Re), palladium (Pd) and the like, and a combination thereof.

[0120] Figure 7 is a schematic diagram of the structure of another filter provided by an embodiment of the present invention, referring to Figure 7The passivation layer 107 includes a first opening 1071, a second opening 1072, a first protective layer 1073 and a second protective layer 1074; the first opening 1071 is located at the connection between the capacitor 100 and the resonator 200; the second opening 1072 is located on the side away from the connection; the first protective layer 1073 is located on the side of the first opening away from the piezoelectric layer 105; the second protective layer 1074 is located on the side of the second opening 1072 away from the piezoelectric layer 105.

[0121] Specifically, the passivation layer 107 includes a first opening 1071, a second opening 1072, a first protective layer 1073 and a second protective layer 1074. The first opening 1071 is located at the connection between the capacitor 100 and the resonator 200, and the second opening 1072 is located on the side away from the connection. The first opening 1071 and the second opening 1071 can improve the electrical performance of the capacitor, reduce parasitic capacitance and increase the signal transmission speed. The first protective layer 1073 is deposited above the first opening 1071, and the second protective layer 1074 is deposited above the second opening 1072. The first protective layer 1073 and the second protective layer 1074 are used to protect the first opening 1071 and the second opening 1072 from corrosion, so as to avoid failure of the capacitor 100 due to poor material bonding.

[0122] Figure 8 is a top view schematic diagram of a connection between a capacitor and a resonator in a filter provided by an embodiment of the present invention, with reference to Figure 8 The filter provided by the embodiment of the present invention includes a capacitor 100 and a resonator 200, the capacitor 100 is connected in series with the resonator 200, the first electrode substrate is a sound reflection structure, and is arranged at intervals along the first direction X, the width of the first electrode substrate is d4, and the spacing between the first electrode substrate and the second electrode substrate is d5. The width d4 and the spacing d5 can be adjusted according to the wavelength of the laterally leaked sound wave energy (black lines in the figure), and different sizes can realize the reflection of specific lateral sound waves (red lines in the figure) to improve the performance of the filter.

[0123] Fig. 9 is a schematic diagram of the structure of another filter provided by an embodiment of the present invention, referring to Fig. 9 The capacitor 100 further includes a dielectric layer 106 and a groove 108; the groove 108 is located on the side of the substrate 101 close to the seed layer 104; the dielectric layer 106 is filled in the groove 108, and the first surface of the dielectric layer 106 is flush with the first surface of the substrate 101; the first electrode substrate 1021 and the second electrode substrate 1022 are located on the side of the dielectric layer 106 away from the substrate 101.

[0124] Specifically, an embodiment of the present invention further provides a filter, wherein the capacitor 100 includes a dielectric layer 106 and a groove 108; the material of the dielectric layer 106 may include SiO2, silicate glass PSG, Si3N4, etc., and the embodiment of the present invention does not limit the material of the dielectric layer 106. The groove 108 is located on the side of the substrate 101 close to the seed layer 104, and the dielectric layer 106 is filled in the groove 108 so that the upper surface of the dielectric layer 106 is flush with the upper surface of the substrate 101, and the first electrode substrate 1021 and the second electrode substrate 1022 are located on the side of the dielectric layer 106 away from the substrate 101.

[0125] Continue to refer Figure 8 The piezoelectric layer 105 is located on the side of the first electrode substrate 1021 and the second electrode substrate 1022 away from the dielectric layer 106, so that the piezoelectric layer 105 becomes a natural protective layer located above the dielectric layer 106, further protecting the first electrode substrate 1021 and the second electrode substrate 1022 from corrosion.

[0126] The filter provided by the embodiment of the present invention can further reduce the risk of corrosion of the dielectric layer caused by poor step coverage in the prior art by setting a dielectric layer and a groove and filling the groove with the dielectric layer so that the upper surface of the dielectric layer is flush with the upper surface of the substrate.

[0127] Fig.10 is a schematic diagram of the structure of another filter provided by an embodiment of the present invention, referring to Fig.10 Optionally, the capacitor 100 further includes a first lead-out hole 109, a second lead-out hole 110, a thickening layer 111 and an upper electrode layer 112;

[0128] The first lead-out hole 109 is located at the connection between the capacitor 100 and the resonator 200;

[0129] The second lead-out hole 110 is located at a side away from the connection;

[0130] The thickened layer 111 is respectively located on the side of the first lead-out hole 109 facing away from the substrate 101 and the side of the second lead-out hole 110 facing away from the substrate 101;

[0131] The upper electrode layer 112 is located on a side of the thickened layer 111 close to the piezoelectric layer 105 .

[0132] Specifically, the capacitor 100 further includes a first lead-out hole 109, a second lead-out hole 110, a thickening layer 111 and an upper electrode layer 112. The first lead-out hole 109 is located at the connection between the capacitor 100 and the resonator 200; the second lead-out hole 110 is located on the side away from the connection. The first lead-out hole 109 is a lower electrode lead-out hole of the second port of the capacitor 100 and is shared with the upper electrode of the resonator 200. The second lead-out hole 110 is a lower electrode lead-out hole of the port of the capacitor 100. The thickening layer 111 is located on the side of the first lead-out hole 109 away from the substrate 101 and the side of the second lead-out hole 110 away from the substrate 101. side; the thickening layer 111 is a material with a large acoustic impedance, such as a metal material, so as to reduce the electrode resistivity; the upper electrode layer 112 is located on the side of the thickening layer 111 close to the piezoelectric layer 105, wherein the material of the upper electrode layer 112 can be one of the metals such as molybdenum (Mo), aluminum (Al), copper (Cu), tungsten (W), tantalum (Ta), platinum (Pt), ruthenium (Ru), rhodium (Rh), iridium (Ir), chromium (Cr), titanium (Ti), gold (Au), osmium (Os), rhenium (Re), palladium (Pd) and a combination thereof. The embodiment of the present invention does not limit the materials of the thickening layer 111 and the upper electrode layer 112.

[0133] Fig.11 is a top view schematic diagram of another filter provided by an embodiment of the present invention, referring to Fig.11 The filter provided by the embodiment of the present invention includes a capacitor 100 and a resonator 200, the capacitor 100 and the resonator 200 are connected in series, the first electrode substrate is an acoustic reflection structure, and is arranged at intervals along the first direction X, the width of the first electrode substrate is d4, and the spacing between the first electrode substrate and the second electrode substrate is d5, the width d4 and the spacing d5 can be adjusted according to the wavelength of the acoustic wave energy leaked laterally (the black line in the figure), and different sizes can realize the reflection of specific transverse acoustic waves (the red line in the figure). On the basis of the above, not only the acoustic wave energy leaked along the first direction X can be reflected, but also the acoustic reflection structure C is arranged in the second direction Y, and the acoustic wave energy leaked in the second direction Y is realized by adjusting the first diameter d6 or the second diameter d7 of the acoustic reflection structure C. The filter provided by the embodiment of the present invention can realize the acoustic wave energy leaked laterally (X direction) and longitudinally (Y direction).

[0134] Fig.12 is a flow chart of a method for preparing a filter provided by an embodiment of the present invention, Fig.13 is a flow chart of preparing a filter provided by an embodiment of the present invention, with reference to Fig.12 and Fig.13 According to the same inventive concept, an embodiment of the present invention provides a method for preparing a filter, which is used to prepare the filter in any of the above-mentioned inventive embodiments;

[0135] The preparation method comprises:

[0136] S1. Provide a substrate 101.

[0137] Specifically, the material of the substrate 101 can be sapphire (Al2O3), silicon carbide (SiC), silicon (Si), etc. The embodiment of the present invention does not limit the specific material of the substrate, and those skilled in the art can set it as needed.

[0138] S2. Prepare at least one resonator 200 and at least one capacitor 100 on one side of the substrate 101; the capacitor 100 also includes an electrode substrate layer 102 and a protective layer 103, the protective layer 103 is located on the side of the electrode substrate layer 102 away from the substrate 101; the electrode substrate layer 102 includes a first electrode substrate 1021 and a second electrode substrate 1022, the first electrode substrate 1021 and the second electrode substrate 1022 are arranged in the same layer, and the first surfaces of the first electrode substrate 1021 and the second electrode substrate 1022 are parallel to the direction of the substrate 101; wherein the capacitor 100 and the resonator 200 are arranged in sequence along the direction of the substrate 101.

[0139] Specifically, at least one resonator 200 and at least one capacitor 100 are prepared on one side of a substrate 101, the capacitor 100 further comprising an electrode substrate layer 102 and a protective layer 103, a first electrode substrate 1021 and a second electrode substrate 1022 are prepared on the substrate 101 of the capacitor 100, the first electrode substrate 1021 and the second electrode substrate 1022 are arranged in the same layer, and the upper surfaces of the first electrode substrate 1021 and the second electrode substrate 1022 are parallel to the direction of the substrate 101, wherein the capacitor 100 and the resonator 200 are sequentially arranged along the direction of the substrate 101, as shown in FIG. Fig.13 As shown, the capacitor 100 is on the left and the resonator 200 is on the right; or the resonator 200 is on the left and the capacitor 100 is on the right.

[0140] The filter provided by the embodiment of the present invention arranges the first electrode substrate and the second electrode substrate in the capacitor on the same layer, and the first surfaces of the first electrode substrate and the second electrode substrate are parallel to the direction of the substrate, so that the input and output ports are on the same surface, reducing the steps caused by the electrodes in different layers, not only increasing the coverage integrity of the protective layer, improving the protection ability of the dielectric layer, and significantly improving the reliability of the capacitor structure, but also the capacitor structure also has an acoustic reflection function, which can reflect transverse and longitudinal sound waves of specific wavelengths, thereby improving the performance of the filter.

[0141] Fig.14 is a flow chart of another method for preparing a filter provided by an embodiment of the present invention, Fig.15 is a flow chart of preparing another filter provided by an embodiment of the present invention, with reference to Fig.14 and Fig.15 ,

[0142] Optionally, after providing the substrate, the method further comprises:

[0143] S3 , preparing a first groove C on the substrate 101 , and filling the first groove C with a first sacrificial layer D.

[0144] Specifically, a first groove C is prepared on the substrate 101 and filled with a first sacrificial layer D. The preparation process includes thin film deposition, etching process, chemical mechanical polishing, etc. The material of the first sacrificial layer D can include SiO2, silicate glass PSG, Si3N4, etc.

[0145] S4 , preparing a seed layer 104 on a side of the first groove C facing away from the substrate 101 .

[0146] Specifically, a seed layer 104 is deposited on the substrate 101 . The seed layer 104 is used to ensure that subsequent thin films, especially piezoelectric thin films, have good crystal orientation.

[0147] Fig.16 is a flow chart of another method for preparing a filter provided by an embodiment of the present invention, Fig.17 is a flow chart of preparing another filter provided by an embodiment of the present invention, with reference to Fig.16 and Fig.17 Optionally, preparing at least one resonator and at least one capacitor on one side of the substrate comprises:

[0148] S5 . Prepare a whole piezoelectric layer 105 on the side of the seed layer 104 facing away from the substrate 101 .

[0149] Specifically, before preparing the entire piezoelectric layer 105 on the side of the seed layer 104 facing away from the substrate 101, the lower electrode layer 201 of the resonator 200 is deposited and patterned on the surface of the seed layer 104, such as Fig.17 As shown in a1, the edge 2011 of the lower electrode layer 201 of the resonator 200 is located inside the first groove C, the distance is d1, and the material of the lower electrode layer 201 can be one of the metals such as molybdenum (Mo), aluminum (Al), copper (Cu), tungsten (W), tantalum (Ta), platinum (Pt), ruthenium (Ru), rhodium (Rh), iridium (Ir), chromium (Cr), titanium (Ti), gold (Au), osmium (Os), rhenium (Re), palladium (Pd) and their combinations. The embodiment of the present invention does not limit the material of the lower electrode layer.

[0150] A whole piezoelectric layer 105 is deposited on the basis of the lower electrode layer 201, such as Fig.17As shown in a2, the material of the piezoelectric layer 105 can be aluminum nitride AlN, lithium niobate LiNbO3, lithium tantalate LiTaO3, lead zirconate titanate PZT, zinc oxide ZnO, scandium-doped aluminum nitride ScAlN, quartz crystal Quatz, lead magnesium niobate (PMN), lead fluoride (PbTiO3), etc. and their combinations.

[0151] S6. Prepare a whole second sacrificial layer on the side of the piezoelectric layer 105 facing away from the substrate 101, and pattern the second sacrificial layer to form a first dielectric layer 1061, a second dielectric layer 1062 and a third dielectric layer 1063. The first dielectric layer 1061 is located in the overlapping area of ​​the piezoelectric layer 105 and the capacitor 100.

[0152] Specifically, a whole second sacrificial layer is prepared on the side of the piezoelectric layer 105 facing away from the substrate 101, and the second sacrificial layer is patterned to form a first dielectric layer 1061, a second dielectric layer 1062 (located under the air bridge) and a third dielectric layer 1063 (located under the air wing). The first dielectric layer 1061 is located in the overlapping area of ​​the piezoelectric layer 105 and the capacitor 100. The structural width of the second dielectric layer 1062 is d2, and d2>d1. Its left edge needs to cross the edge of the lower electrode, and the right edge needs to cross the first groove C. The distance d3 between the third dielectric layer 1063 and the edge of the first groove C is greater than or equal to 0.

[0153] The lead-out hole 202 of the lower electrode layer 201 is etched, and the process of etching the lead-out hole 202 can be adjusted with other processes. Fig.17 As shown in a4.

[0154] S7. Prepare a whole thickening layer on the side of the second sacrificial layer away from the piezoelectric layer 105, and pattern the thickening layer to form a first electrode substrate 1021, a second electrode substrate 1022, a first thickening layer 2031 and a second thickening layer 2032; the first electrode substrate 1021 and the second electrode substrate 1022 are located in the overlapping area of ​​the first thickening layer 2031 and the capacitor 100.

[0155] Specifically, a whole thickening layer is prepared on the side of the second sacrificial layer away from the piezoelectric layer 105, and the thickening layer is patterned to form a first electrode substrate 1021, a second electrode substrate 1022, a first thickening layer 2031 (thickening structure above the air bridge) and a second thickening layer 2032 (thickening structure above the air wing). A third thickening layer 2033 is also prepared above the lead-out hole 202. The thickening layer material is generally a material with a large acoustic impedance, such as a metal material. The thickening layer will also cover the required position, which is beneficial to reducing the electrode resistivity. The width of the first electrode substrate 1021 is d4, and the distance between the first electrode substrate 1021 and the second electrode substrate 1022 is d5. By adjusting these two parameters, the capacitance value of the capacitor can be adjusted and lateral sound wave reflection of a specific frequency can be achieved. Fig.17 As shown in a5.

[0156] S8. Prepare a whole upper electrode layer on the side of the thickened layer away from the second sacrificial layer, and pattern the upper electrode layer to form a third electrode substrate 1023 and a fourth electrode substrate 1024. The third electrode substrate 1023 is located on the side of the first electrode substrate 1021 away from the first dielectric layer 1061, and the fourth electrode substrate 1024 is located on the side of the second electrode substrate 1022 away from the first dielectric layer 1061.

[0157] Specifically, an upper electrode layer is deposited on the thickened layer and patterned to form a third electrode substrate 1023, a fourth electrode substrate 1024, an upper electrode layer 2041 above the air bridge, an upper electrode layer 2042 above the air wing, and an upper electrode layer 2043 above the lead-out hole 202, wherein the material of the electrode layer can be one of metals selected from the group consisting of molybdenum (Mo), aluminum (Al), copper (Cu), tungsten (W), tantalum (Ta), platinum (Pt), ruthenium (Ru), rhodium (Rh), iridium (Ir), chromium (Cr), titanium (Ti), gold (Au), osmium (Os), rhenium (Re), palladium (Pd), and combinations thereof. Fig.17 As shown in a6.

[0158] S9. Prepare a passivation layer on the side of the upper electrode layer away from the thickening layer, and pattern the passivation layer to form a first opening 1071 and a second opening 1072; the first opening 1071 is located at the connection between the capacitor and the resonator; the second opening 1072 is located on the side away from the connection.

[0159] The release holes 205 are etched.

[0160] Specifically, a passivation layer is deposited and patterned on the upper electrode layer to form a first opening 1071, a second opening 1072, a recessed layer 1075, a passivation layer 107 for a capacitor structure, and a protective layer 206 for the active region of the resonator to prevent the upper electrode of the resonator from being oxidized and to prevent the first electrode substrate 1021, the second electrode substrate 1022 and other structures below from being corroded. The role of the recessed layer 1075 is to suppress the parasitic on the left side of the series resonance frequency of the FBAR (film bulk acoustic resonator) with Type II dispersion type. Fig.17 As shown in a7.

[0161] S10 , preparing a first protective layer 1073 and a second protective layer 1074 on the first opening 1071 and the second opening 1072 , respectively.

[0162] Specifically, a protective layer is deposited and patterned on the passivation layer 107 to form a first protective layer 1073, a second protective layer 1074, and a third protective layer 1076. The first protective layer 1073 is a common protective layer for the capacitor and the resonator, the second protective layer 1074 is a protective layer for the capacitor port 1, and the third protective layer 1076 is a protective layer for the resonator. Fig.17 As shown in a8.

[0163] Etch the release hole 207. Fig.17 As shown in a9.

[0164] S11 , releasing the first groove C and the first sacrificial layer to prepare at least one resonator 200 and at least one capacitor 100 .

[0165] Specifically, the first groove C and the first sacrificial layer are released to prepare at least one resonator 200 and capacitor 100, wherein the second dielectric layer 1062 and the third dielectric layer 1063 can be selectively released or retained. Fig.17 As shown in a10.

[0166] At this point, the filter provided by the embodiment of the present invention is prepared. Fig.17 As shown in a10.

[0167] Fig.18 is a flow chart of another method for preparing a filter provided by an embodiment of the present invention, Fig.19 is a flow chart of preparing another filter provided by an embodiment of the present invention, with reference to Fig.18 and Fig.19 Optionally, in another embodiment of the filter preparation method provided by the present invention, preparing at least one resonator and at least one capacitor on one side of the substrate includes:

[0168] S100 , preparing a second groove 108 on the substrate 101 , and filling the second groove 108 with a dielectric layer 106 so that a first surface of the dielectric layer 106 is flush with a first surface of the substrate 101 .

[0169] Specifically, a second groove 108 is prepared on the substrate 101 as a groove of the capacitor, and the first groove D is used as a groove of the resonator. The dielectric layer 106 is filled in the second groove 108 to make the upper surface of the dielectric layer 106 flush with the upper surface of the substrate 101, thereby reducing the steps caused by the introduction of the dielectric layer (the dielectric layer is located in the cavity, and the upper surface of the dielectric layer is flush with the upper surface of the base), and further reducing the risk of corrosion of the dielectric layer due to poor step coverage. The material of the dielectric layer 106 can be SiO2, and the preparation process includes thin film deposition, etching process, chemical mechanical polishing, etc.

[0170] The substrate 101 material may include sapphire (Al2O3), silicon carbide (SiC), silicon (Si), etc., and the dielectric layer 106 material may include SiO2, silicate glass PSG, Si3N4, etc. Fig.19 As shown in b1.

[0171] S200, prepare the lower electrode layer 201 of the resonator, the first electrode substrate 1021 of the capacitor and the second electrode substrate 1022 of the capacitor on the side of the seed layer 104 facing away from the substrate 101, and the lower electrode layer 201, the first electrode substrate 1021 and the second electrode substrate 1022 are arranged in the same layer; the first edge of the lower electrode layer 201 is located in the first groove C.

[0172] Specifically, a seed layer 104 is prepared on a substrate 101, and a lower electrode layer 201 of a resonator is prepared on a side of the seed layer 104 facing away from the substrate 101, a first electrode substrate 1021 and a second electrode substrate 1022 of a capacitor are prepared, the lower electrode layer 201, the first electrode substrate 1021 and the second electrode substrate 1022 are arranged in the same layer, a first edge 2011 of the lower electrode layer 201 is located in a first groove C, a distance between the first edge 2011 and the first groove C is d1, d1>0, a material of the seed layer 104 can be aluminum nitride AIN, titanium nitride TiN, etc., the lower electrode layer 201, the first electrode substrate 1021 and the second electrode substrate 1022 are arranged in the same layer, The material of the first electrode substrate 1022 can be one of metals such as molybdenum (Mo), aluminum (Al), copper (Cu), tungsten (W), tantalum (Ta), platinum (Pt), ruthenium (Ru), rhodium (Rh), iridium (Ir), chromium (Cr), titanium (Ti), gold (Au), osmium (Os), rhenium (Re), palladium (Pd) and a combination thereof. The width of the first electrode substrate 1021 is d4, and the distance between the first electrode substrate 1021 and the second electrode substrate 1022 is d5. By adjusting these two parameters, the capacitance value of the capacitor can be adjusted and lateral sound wave reflection of a specific frequency can be achieved. The embodiment of the present invention does not limit the material.

[0173] S300 , preparing a whole piezoelectric layer 105 on the side of the lower electrode layer 201 away from the seed layer 104 , and patterning the piezoelectric layer 105 to form a first lead-out hole 109 , a second lead-out hole 110 and a third lead-out hole 202 .

[0174] Specifically, a whole piezoelectric layer 105 is prepared on the lower electrode layer 201, and the piezoelectric layer 105 is patterned to form a first lead-out hole 109, a second lead-out hole 110 and a third lead-out hole 202, wherein the third lead-out hole 202 is a lead-out hole of the resonator.

[0175] The material of the piezoelectric layer 105 can be aluminum nitride AlN, lithium niobate LiNbO3, lithium tantalate LiTaO3, lead zirconate titanate PZT, zinc oxide ZnO, scandium-doped aluminum nitride ScAlN, quartz crystal Quatz, lead magnesium niobate (PMN), lead fluoride (PbTiO3), etc. and combinations thereof.

[0176] The second lead-out hole 110 is the lower electrode lead-out hole of capacitor port one, the first lead-out hole 109 is the lower electrode lead-out hole of capacitor port two (shared with the upper electrode of the resonator), and the third lead-out hole 202 is the lead-out hole of the lower electrode of the resonator.

[0177] S400 , preparing a second sacrificial layer on the overlapping region between the piezoelectric layer 105 and the resonator, and patterning the second sacrificial layer.

[0178] Specifically, a second sacrificial layer is prepared on the overlapping area of ​​the piezoelectric layer 105 and the resonator, and the second sacrificial layer is patterned to generate a sacrificial layer E1 of the air bridge and a sacrificial layer E2 of the air wing, wherein the structural width of the sacrificial layer E1 of the air bridge is d2, d2>d1, its left edge needs to cross the left edge of the lower electrode layer 201, and the right edge needs to cross the edge of the second groove D, and the distance between the right edge of the sacrificial layer E2 of the air wing and the edge of the second groove D is d3, d3>0.

[0179] S500 , preparing a thickening layer on the first lead-out hole 109 , the second lead-out hole 110 and the third lead-out hole 202 , and preparing a thickening layer on the side of the second sacrificial layer away from the piezoelectric layer 105 .

[0180] Specifically, a thickening layer is prepared above the first lead-out hole 109 to form a fourth thickening layer 2034, a thickening layer is prepared above the second lead-out hole 110 to form a fifth thickening layer 2035, a thickening layer is prepared on the side of the second sacrificial layer away from the piezoelectric layer 105 and the thickening layer is patterned to form a first thickening layer 2031, a second thickening layer 2032 and a third thickening layer 2033.

[0181] The thickening layer material is generally a material with a large acoustic impedance, which can be a metal material. The thickening layer will also cover the required position, which is conducive to reducing the electrode resistivity.

[0182] The fourth thickening layer 2034 is the lead-out thickening layer for the second electrode of the capacitor port, which is shared with the electrode on the resonator. The fifth thickening layer 2035 is the lead-out thickening layer for the first electrode of the capacitor port. The first thickening layer 2031 is the thickening structure above the air bridge. The second thickening layer 2032 is the thickening structure above the air wing. The third thickening layer 2023 is the thickening layer in the lead-out hole of the resonator.

[0183] S600 , preparing an upper electrode layer 112 on a side of the thickened layer away from the second sacrificial layer, and patterning the upper electrode layer 112 .

[0184] Specifically, an upper electrode layer 112 is prepared on the side of the thickened layer away from the second sacrificial layer, and the upper electrode layer 112 is patterned to form an upper electrode 1121 of capacitor port one, an upper electrode 1122 of capacitor port two, an upper electrode 1123 of the resonator effective area, and a resonator lead-out hole 1124.

[0185] The electrode layer material may be one of metals such as molybdenum (Mo), aluminum (Al), copper (Cu), tungsten (W), tantalum (Ta), platinum (Pt), ruthenium (Ru), rhodium (Rh), iridium (Ir), chromium (Cr), titanium (Ti), gold (Au), osmium (Os), rhenium (Re), palladium (Pd), and combinations thereof. The embodiment of the present invention does not limit the material of the electrode layer.

[0186] S700 , preparing and patterning a passivation layer 107 on the overlapping region of the piezoelectric layer and the capacitor.

[0187] Specifically, a passivation layer 107 is prepared and patterned on the overlapping area of ​​the piezoelectric layer and the capacitor to form a first passivation layer 1077. The first passivation layer 1077 is a dielectric protection layer of the capacitor to prevent the underlying dielectric from being corroded by corrosive gases and liquids. Since the dielectric layer is located in the cavity below, the role of the protective layer is mainly to protect the piezoelectric layer in the future, and it can be optional not to cover it if it is not necessary. The second passivation layer 1078 (protective layer of the active area of ​​the resonator); to prevent the upper electrode from being oxidized, the recessed layer 1075 structure, which surrounds the inner edge of the thickened layer, is to suppress the parasitic on the left side of the series resonance frequency of the Type II dispersion type FBAR (thin film bulk acoustic resonator). The opening of the etched release hole 208. The material of the passivation layer can be SiO2, Si3N4, AlN, Al2O3 and polymer materials, etc.

[0188] S800 , preparing a protection layer on the first lead-out hole, the second lead-out hole, and the third lead-out hole.

[0189] A first protection layer 1073 , a second protection layer 1074 , and a third protection layer 1079 are formed on the first lead-out hole, the second lead-out hole, and the third lead-out hole.

[0190] The first protection layer 1073 is a common protection layer for the second capacitor port and the second resonator port, the second protection layer 1074 is a protection layer for the first capacitor port, and the third protection layer 1075 is a protection layer for the first resonator port.

[0191] S900 , releasing the first groove and the first sacrificial layer to form at least one resonator and at least one capacitor.

[0192] Specifically, the lead-out hole 208, the first groove D and the first sacrificial layer are released to prepare at least one resonator and at least one capacitor. Optionally, the sacrificial layer E1 under the air bridge can be selectively released or retained, and the sacrificial layer E2 under the air wing can be selectively released or retained.

[0193] The filter provided by the embodiment of the present invention has the following beneficial effects:

[0194] 1. The steps caused by the introduction of the dielectric layer are reduced (the dielectric layer is located in the cavity, and the upper surface of the dielectric layer is flush with the upper surface of the substrate), further reducing the risk of corrosion of the dielectric layer due to poor step coverage.

[0195] 2. The piezoelectric layer becomes a natural protective layer located above the dielectric layer. At this time, the protective layer above the piezoelectric layer is dispensable.

[0196] The technical effects of the capacitor and resonator connected in series provided by this patent are as follows:

[0197] Fig. 20 is a technical effect diagram of the capacitor and the resonator connected in series according to an embodiment of the present invention, such as Fig. 20 As shown in the figure, when FBAR is connected in series with a capacitor, the impedance curve tested shows that, on the one hand, after the capacitor is connected in series, the series resonant frequency fs2 of FABR moves toward the high frequency direction, and the Kt value of the resonator decreases from 5.9% to 2.3%. On the other hand, the impedance curve moves upward as a whole, and the overall capacitance brought by the capacitor is reduced, which is conducive to adjusting the capacitance value and meeting the 50 ohm impedance matching condition in the RF circuit.

[0198] The technical effects of the capacitor and resonator connected in parallel provided by this patent are as follows:

[0199] Fig.21 is a technical effect diagram of a capacitor and a resonator connected in parallel provided by an embodiment of the present invention, refer to Fig.21 Through the impedance curve tested, we can see that, on the one hand, after the capacitor is connected in parallel, the joint resonant frequency fp2 of FABR moves to the low frequency direction, and the Kt value of the resonator decreases from 5.9% to 3.7%. On the other hand, the impedance curve moves down as a whole, and the capacitance of the resonator increases, which is conducive to adjusting the capacitance value and meeting the 50 ohm impedance matching condition in the RF circuit.

[0200] Furthermore, based on the basic principle of connecting capacitors and resonators in series or in parallel, it can be used flexibly in the topology of the filter.

[0201] Fig. 22 Schematic diagram of the connection between the series branch and the parallel branch of the filter provided by the embodiment of the present invention and the thin film bulk acoustic wave resonator, with reference to Fig. 22, a schematic diagram of the connection of capacitor structures C1-C4 with FBAR in the series branch and parallel branch of a ladder type filter. Among them, S1-S4 represent FABR in the series branch; P1-P4 represent FABR in the parallel branch.

[0202] It should be emphasized that this patent is not limited to the circuit topology of the lattice structure filter, but also includes ladder type, ladder-lattice type, etc. No matter what the topology of the filter is, as long as the features protected by this patent are used, they are within the scope of protection of this patent.

[0203] Similarly, by introducing the capacitor described in this patent, the passband bandwidth, passband insertion loss, out-of-band suppression, return loss and other performances of the filter can be optimized and adjusted. The corresponding physical principle is to change the performance of the resonator as described above, so this patent will not elaborate on the effect of changing the performance of the filter.

[0204] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A filter, characterized in that: include: a substrate and at least one resonator and at least one capacitor located on one side of the substrate; The capacitor comprises: an electrode substrate layer and a protective layer; The protective layer is located on a side of the electrode substrate layer away from the substrate; The electrode substrate layer includes a first electrode substrate and a second electrode substrate, the first electrode substrate and the second electrode substrate are arranged in the same layer, and the first surfaces of the first electrode substrate and the second electrode substrate are parallel to the direction of the substrate; wherein the capacitor and the resonator are arranged in sequence along the direction of the substrate.

2. The filter according to claim 1, characterized in that Also included is a piezoelectric layer and a seed layer; The seed layer is located on a side of the substrate close to the electrode base layer, and the piezoelectric layer is located on a side of the seed layer away from the substrate.

3. The filter according to claim 2, characterized in that The capacitor further comprises a third electrode substrate, a fourth electrode substrate, a dielectric layer and a passivation layer; The dielectric layer is located on a side of the piezoelectric layer away from the substrate; The first electrode substrate and the second electrode substrate are located on a side of the dielectric layer away from the piezoelectric layer; The passivation layer is located on the side of the third electrode substrate and the fourth electrode substrate away from the dielectric layer; wherein the third electrode substrate is located on the side of the first electrode substrate away from the dielectric layer, and the fourth electrode substrate is located on the side of the second electrode substrate away from the dielectric layer; The third electrode substrate and the fourth electrode substrate are arranged in the same layer.

4. The filter according to claim 3, characterized in that The passivation layer includes a first opening, a second opening, a first protective layer, and a second protective layer; The first opening is located at the connection between the capacitor and the resonator; The second opening is located at a side away from the connection; The first protective layer is located on a side of the first opening away from the piezoelectric layer; The second protection layer is located on a side of the second opening away from the piezoelectric layer.

5. The filter according to claim 2, characterized in that The capacitor also includes a dielectric layer and a groove; The groove is located on a side of the substrate close to the seed layer; the dielectric layer is filled in the groove, and the first surface of the dielectric layer is flush with the first surface of the substrate; The first electrode substrate and the second electrode substrate are located on a side of the dielectric layer away from the substrate.

6. The filter according to claim 5, characterized in that The capacitor further comprises a first lead-out hole, a second lead-out hole, a thickening layer and an upper electrode layer; The first lead-out hole is located at the connection between the capacitor and the resonator; The second lead-out hole is located at a side away from the connection point; The thickened layer is respectively located on a side of the first lead-out hole away from the substrate and a side of the second lead-out hole away from the substrate; The upper electrode layer is located on a side of the thickened layer close to the piezoelectric layer.

7. A method for preparing a filter, characterized in that: Used to prepare the filter according to any one of claims 1 to 6; The preparation method comprises: providing a substrate; At least one resonator and at least one capacitor are prepared on one side of the substrate; the capacitor also includes an electrode substrate layer and a protective layer, and the protective layer is located on the side of the electrode substrate layer away from the substrate; the electrode substrate layer includes a first electrode substrate and a second electrode substrate, the first electrode substrate and the second electrode substrate are arranged in the same layer, and the first surfaces of the first electrode substrate and the second electrode substrate are parallel to the direction of the substrate; wherein the capacitor and the resonator are arranged in sequence along the direction of the substrate.

8. The preparation method according to claim 7, characterized in that: After providing the substrate, the method further comprises: Preparing a first groove on the substrate and filling the first groove with a first sacrificial layer; A seed layer is prepared on a side of the first groove facing away from the substrate.

9. The preparation method according to claim 8, characterized in that: Fabricating at least one resonator and at least one capacitor on one side of the substrate comprises: A whole piezoelectric layer is prepared on the side of the seed layer facing away from the substrate, A whole second sacrificial layer is prepared on the side of the piezoelectric layer away from the substrate, and the second sacrificial layer is patterned to form a first dielectric layer, a second dielectric layer and a third dielectric layer, wherein the first dielectric layer is located in an overlapping region between the piezoelectric layer and the capacitor; A whole thickening layer is prepared on the side of the second sacrificial layer away from the piezoelectric layer, and the thickening layer is patterned to form a first electrode substrate, a second electrode substrate, a first thickening layer and a second thickening layer; the first electrode substrate and the second electrode substrate are located in an overlapping area between the first thickening layer and the capacitor; A whole upper electrode layer is prepared on the side of the thickened layer away from the second sacrificial layer, and the upper electrode layer is patterned to form a third electrode substrate and a fourth electrode substrate, wherein the third electrode substrate is located on the side of the first electrode substrate away from the first dielectric layer, and the fourth electrode substrate is located on the side of the second electrode substrate away from the first dielectric layer. A passivation layer is prepared on the side of the upper electrode layer away from the thickened layer, and the passivation layer is patterned to form a first opening and a second opening; the first opening is located at the connection between the capacitor and the resonator; and the second opening is located on the side away from the connection; preparing a first protective layer and a second protective layer on the first opening and the second opening respectively; The first groove and the first sacrificial layer are released to prepare at least one resonator and at least one capacitor.

10. The preparation method according to claim 8, characterized in that: Fabricating at least one resonator and at least one capacitor on one side of the substrate comprises: preparing a second groove on the substrate, and filling a dielectric layer in the second groove so that a first surface of the dielectric layer is flush with a first surface of the substrate; The lower electrode layer of the resonator, the first electrode substrate of the capacitor and the second electrode substrate of the capacitor are prepared on the side of the seed layer away from the substrate, and the lower electrode layer, the first electrode substrate and the second electrode substrate are arranged in the same layer; the first edge of the lower electrode layer is located in the first groove, Preparing a whole piezoelectric layer on the side of the lower electrode layer away from the seed layer, and patterning the piezoelectric layer to form a first lead-out hole, a second lead-out hole, and a third lead-out hole; Preparing a second sacrificial layer on the overlapping area of ​​the piezoelectric layer and the resonator, and patterning the second sacrificial layer; Preparing a thickening layer on the first lead-out hole, the second lead-out hole and the third lead-out hole, and preparing a thickening layer on a side of the second sacrificial layer away from the piezoelectric layer; Preparing an upper electrode layer on a side of the thickened layer away from the second sacrificial layer, and patterning the upper electrode layer; preparing and patterning a passivation layer on the overlapping area of ​​the piezoelectric layer and the capacitor, preparing a protective layer on the first lead-out hole, the second lead-out hole and the third lead-out hole, The first groove and the first sacrificial layer are released to prepare at least one resonator and at least one capacitor.

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