Anti-backflow circuit, silicon wafer and semiconductor device

Abstract

The invention discloses an anti-backflow circuit, a silicon wafer and a semiconductor device. The anti-backflow circuit comprises an input unit, an output unit, a transformer T1, a starting control unit, an isolator, a phase inverter, a first control part and a second control part, the input unit is connected with the primary side of the transformer T1, the control end of the input unit and the input end of the isolator respectively receive PWM signals, and the output end of the isolator is respectively connected with the input end of the phase inverter and the control end of the first control part; the output unit is connected with the secondary side of the transformer T1, the control end of the starting control unit and the control end of the second control part are respectively connected with circuit power supply voltage, and the source end of the power-off control unit is connected with the control end of the output unit; the drain end of the first control part is connected with the control end of the second control part, and the output end of the phase inverter is connected with the drain end of the output unit and the drain end of the second control part; according to the anti-backflow circuit disclosed by the invention, the backflow current can be controlled within a reasonable range, and the working stability of the circuit is ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit design, and in particular to an anti-backflow circuit, a silicon chip and a semiconductor device. Background Art

[0002] With the continuous advancement of technology, the power supply demand of the control circuit shows a trend of gradually decreasing voltage and gradually increasing current; in order to improve the overall efficiency of the circuit, synchronous rectification technology is widely used; however, in the transient operation process of the circuit, synchronous rectification technology may cause the emergence of backflow current. If this backflow current is not effectively controlled and managed, when facing a large capacitive load, the power supply may generate huge peak electrical stress during the process of rapid restart or shutdown; this electrical stress will not only cause the burning and failure of the device, but may also have a serious impact on the stability and reliability of the entire system.

[0003] The problem of backflow current is traditionally solved by diode rectification; however, this method limits the efficiency of the circuit and is only applicable to high voltage and low current application scenarios.

[0004] In low voltage and high current applications, the use of synchronous rectification technology becomes particularly important, but it also brings the challenge of backflow current. Currently, the conventional methods to solve this problem include:

[0005] 1. Use ideal diodes in series. Although this method can effectively control the backflow current, its disadvantage is that it occupies a large area and is costly, which may become a limiting factor in space- and cost-sensitive applications.

[0006] 2. Use digital control technology. Although this method can achieve precise control of backflow current, it will increase the complexity of circuit design and may be detrimental to the development of localization and independent and controllable industries.

[0007] 3. Use magnetic saturation technology to detect current. Although this method can detect current in some cases, its detection accuracy is usually not ideal, especially in wide temperature range and high-precision applications, its performance often cannot meet the use requirements.

[0008] It can be seen that the existing technology still needs to be improved and enhanced. Summary of the invention

[0009] In view of the above-mentioned deficiencies of the prior art, an object of the present invention is to provide an anti-backflow circuit, which can control the backflow current within a reasonable range and ensure the stability and reliability of the semiconductor device during operation.

[0010] In order to achieve the above object, the present invention adopts the following technical solutions:

[0011] A backflow prevention circuit comprises an input unit, an output unit, a transformer T1, a startup control unit, a power-off control unit, an isolator and an inverter, wherein the power-off control unit comprises a first control unit and a second control unit; the input unit is connected to the primary side of the transformer T1, the control end of the input unit and the input end of the isolator are respectively used to receive a PWM signal, and the output end of the isolator is respectively connected to the input end of the inverter and the control end of the first control unit; the output unit is connected to the secondary side of the transformer T1, the control end of the startup control unit and the control end of the second control unit are respectively used to connect a circuit power supply voltage, and the source end of the power-off control unit is connected to the control end of the output unit; the drain end of the first control unit is connected to the control end of the second control unit, and the output end of the inverter is respectively connected to the drain end of the output unit and the drain end of the second control unit.

[0012] In the anti-backflow circuit, the input unit includes a first inductor L1, an input capacitor Cin and a first field effect transistor Q1, one end of the first inductor L1 and the source of the first field effect transistor Q1 are respectively used to connect to an external power supply device, the other end of the first inductor L1 and one end of the input capacitor Cin are respectively connected to one end of the primary side of the transformer T1, the drain of the first field effect transistor Q1 is connected to the other end of the primary side of the transformer T1; the gate of the first field effect transistor Q1 is used to receive a PWM signal.

[0013] In the anti-backflow circuit, the output unit includes a second field effect transistor Q2 and an output capacitor Cout, the drain of the second field effect transistor Q2 is connected to the other end of the secondary side of the transformer T1, and the gate of the second field effect transistor Q2 is connected to the source end of the startup control unit; one end of the output capacitor Cout is connected to one end of the secondary side of the transformer T1, and the output capacitor Cout is used to connect the load; the other end of the output capacitor Cout and the source of the second field effect transistor Q2 are grounded respectively.

[0014] In the anti-backflow circuit, the startup control unit includes a first charging group and a third field effect transistor Q3, the input end of the first charging group is used to connect the circuit supply voltage, and the output end of the first charging group is respectively connected to the gate of the third field effect transistor Q3 and the control end of the second control unit; the source of the third field effect transistor Q3 is connected to the gate of the second field effect transistor Q2, and the drain of the third field effect transistor Q3 is connected to the output end of the inverter.

[0015] In the anti-backflow circuit, the first charging group includes a first resistor R1 and a first capacitor C1, one end of the first resistor R1 is used to connect the circuit supply voltage, the other end of the first resistor R1 is respectively connected to one end of the first capacitor C1 and the gate of the third field effect transistor Q3, and the other end of the first capacitor C1 is grounded.

[0016] In the anti-backflow circuit, the first control unit includes a filter group, a clamp group, a second charging group and a fifth field effect transistor Q5, the input end of the filter group is connected to the output end of the isolator, the output end of the filter group is connected to the positive end of the clamp group and the input end of the second charging group, the negative end of the clamp group is used to connect to a low-voltage power supply device, the output end of the second charging group is connected to the gate of the fifth field effect transistor Q5, the drain of the fifth field effect transistor Q5 is connected to the control end of the second control unit, and the source of the fifth field effect transistor Q5 is grounded.

[0017] In the anti-backflow circuit, the second control unit includes a second resistor R2 and a fourth field effect transistor Q4, one end of the second resistor R2 is connected to the output end of the first charging group, the other end of the second resistor R2 is connected to the gate of the fourth field effect transistor Q4, the drain of the fourth field effect transistor Q4 is connected to the output end of the inverter, and the source of the fourth field effect transistor Q4 is grounded.

[0018] In the anti-backflow circuit, the filtering group includes a second capacitor C2, the clamping group includes a first diode D1, and the second charging group includes a second diode D2, a fourth resistor R4, a third capacitor C3 and a third resistor R3; one end of the second capacitor C2 is connected to the output end of the isolator, and the other end of the second capacitor C2 is respectively connected to the positive electrode of the first diode D1, the positive electrode of the second diode D2 and one end of the fourth resistor R4, and the cathode of the first diode D1 is used to connect to a low-voltage power supply device; the cathode of the second diode D2 is respectively connected to one end of the third capacitor C3, one end of the third resistor R3 and the gate of the fifth field effect transistor Q5, and the other end of the fourth resistor R4, the other end of the third capacitor C3 and the other end of the third resistor R3 are respectively grounded.

[0019] The present invention also provides a silicon chip accordingly, on which any of the above-mentioned anti-backflow circuits is arranged.

[0020] The present invention also provides a semiconductor device accordingly, wherein the semiconductor device uses any of the anti-backflow circuits described above to achieve operation control.

[0021] Beneficial effects:

[0022] The present invention provides an anti-backflow circuit. By setting a startup control unit, it can be ensured that an output unit starts to work normally only after the circuit is working normally, thereby avoiding the backflow current problem that may occur during the startup of the circuit, that is, blocking the current backflow channel during frequent and rapid startups; by setting a shutdown control unit, the energy backflow channel between the output unit and the capacitive load can be cut off when the power is off, effectively curbing the generation of the backflow current, that is, limiting the backflow current within a controllable range, thereby ensuring the stability and reliability of the semiconductor device during operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A circuit block diagram of the anti-backflow circuit provided by the present invention;

[0024] Figure 2 A circuit schematic diagram of the anti-backflow circuit provided by the present invention;

[0025] Figure 3 This is a diagram illustrating the principle of backflow current generation.

[0026] Explanation of the main component symbols: 1-input unit, 2-output unit, 3-start control unit, 31-first charging group, 4-power-off control unit, 41-first control unit, 42-second control unit, 5-isolator, 6-inverter. DETAILED DESCRIPTION

[0027] The present invention provides a backflow prevention circuit, a silicon chip and a semiconductor device. To make the purpose, technical solution and effect of the present invention clearer and more specific, the present invention is further described in detail below with reference to the accompanying drawings and examples.

[0028] In the description of the present invention, it should be understood that the terms "installation", "connection" and the like should be understood in a broad sense, and a person skilled in the art can understand the specific meanings of the above terms in the present invention according to specific circumstances.

[0029] Figure 3 For a diagram of the principle of backflow current generation, please refer to Figure 3 In the figure, iL is the backflow current. During the normal zero-state startup process, due to the soft-start mechanism, Q1 and Q2 will not suffer from abnormal electrical stress; under light load conditions, once the output voltage is normally established, the circuit will quickly restart even if the power is turned off and the output voltage has not dropped; thanks to the soft start, Q1 will not experience abnormal electrical stress, and the drive signals of Q1 and Q2 are inverted, making Q2 turn on with almost 100% duty cycle. Therefore, Q2 is turned on for a long time, and the energy on the output capacitor is fed back through the secondary winding of the transformer and Q2, resulting in a large backflow current.

[0030] In the power-off state, the input voltage drops below the undervoltage point, the controller stops working, no drive signal is output, and the Q1 tube is normally closed, avoiding the generation of abnormal electrical stress; the drive signal of the Q2 tube is the inverted output of the primary PWM controller signal. Due to the existence of the secondary power supply voltage, the secondary drive signal remains at a high level, causing the Q2 tube to continue to be turned on for a long time, and the energy on the output capacitor is recharged through the secondary winding of the transformer and the Q2 tube, resulting in a large recharge current.

[0031] Under heavy load conditions, the energy on the output capacitor is quickly consumed by the load, so the recharge current is small; however, under light load and capacitive load conditions, the energy stored in the output capacitor is large. At this time, the Q2 tube remains on for a period of time, and the energy on the capacitor is recharged into the circuit and quickly released through the current channel formed by the transformer secondary and the synchronous MOS tube, forming a significant recharge current.

[0032] The backflow current value is related to the output voltage, output capacitance, transformer secondary inductance and backflow time. When designing the power supply, the input voltage, output voltage, output power, ripple and transformer secondary inductance are all determined. Therefore, the control of the backflow current is converted into the control of the backflow time.

[0033] See also Figure 1 and Figure 2 The present invention provides an anti-backflow circuit, comprising an input unit 1, an output unit 2, a transformer T1, a start-up control unit 3, a power-off control unit 4, an isolator 5 and an inverter 6, wherein the power-off control unit 4 comprises a first control unit 41 and a second control unit 42; the input unit 1 is connected to the primary side of the transformer T1, the control end of the input unit 1 and the input end of the isolator 5 are respectively used to receive a PWM signal, and the output end of the isolator 5 is respectively connected to the input end of the inverter 6 and the control end of the first control unit 41; the output unit 2 is connected to the secondary side of the transformer T1, the control end of the start-up control unit 3 and the control end of the second control unit 42 are respectively used to connect a circuit power supply voltage, and the source end of the power-off control unit 4 is connected to the control end of the output unit 2; the drain end of the first control unit 41 is connected to the control end of the second control unit 42, and the output end of the inverter 6 is respectively connected to the drain end of the output unit 2 and the drain end of the second control unit 42.

[0034] The present application discloses an anti-backflow circuit. By setting a startup control unit 3, it can be ensured that the output unit 2 starts to work normally only after the circuit is running normally, thereby avoiding the backflow current problem that may occur during the circuit startup process, that is, blocking the current backflow channel during frequent and rapid startups; by setting a shutdown control unit, the energy backflow channel between the output unit 2 and the capacitive load can be cut off when the power is off, effectively curbing the generation of backflow current, that is, limiting the backflow current within a controllable range, thereby ensuring the stability and reliability of the semiconductor device during operation.

[0035] For further information, see Figure 2 The input unit 1 includes a first inductor L1, an input capacitor Cin and a first field effect transistor Q1, one end of the first inductor L1 and the source of the first field effect transistor Q1 are respectively used to connect to an external power supply device, the other end of the first inductor L1 and one end of the input capacitor Cin are respectively connected to one end of the primary side of the transformer T1, the drain of the first field effect transistor Q1 is connected to the other end of the primary side of the transformer T1; the gate of the first field effect transistor Q1 is used to receive a PWM signal.

[0036] In this embodiment, the external power supply device may be a mains power supply, that is, a 220V AC voltage.

[0037] For further information, see Figure 2 The output unit 2 includes a second field effect transistor Q2 and an output capacitor Cout, the drain of the second field effect transistor Q2 is connected to the other end of the secondary side of the transformer T1, and the gate of the second field effect transistor Q2 is connected to the source end of the startup control unit 3; one end of the output capacitor Cout is connected to one end of the secondary side of the transformer T1, and the output capacitor Cout is used to connect the load; the other end of the output capacitor Cout and the source of the second field effect transistor Q2 are grounded respectively.

[0038] For further information, see Figure 1 and Figure 2 The startup control unit includes a first charging group 31 and a third field effect transistor Q3, the input end of the first charging group 31 is used to connect the circuit power supply voltage, and the output end of the first charging group 31 is respectively connected to the gate of the third field effect transistor Q3 and the control end of the second control unit 42; the source of the third field effect transistor Q3 is connected to the gate of the second field effect transistor Q2, and the drain of the third field effect transistor Q3 is connected to the output end of the inverter 6.

[0039] For further information, see Figure 2The first charging group 31 includes a first resistor R1 and a first capacitor C1, one end of the first resistor R1 is used to connect the circuit power supply voltage, the other end of the first resistor R1 is respectively connected to one end of the first capacitor C1 and the gate of the third field effect transistor Q3, and the other end of the first capacitor C1 is grounded.

[0040] In this embodiment, the first resistor R1, the first capacitor C1 and the third field effect transistor Q3 jointly complete the startup control function; when the power supply is started, the secondary supply voltage VCC gradually rises, and the first capacitor C1 is charged through the first resistor R1. When the charging voltage UC1 of the first capacitor C1 is lower than the turn-on threshold voltage VTH of the third field effect transistor Q3, the third field effect transistor Q3 remains in the off state, and the second field effect transistor Q2 is also in the off state due to the lack of a driving signal. At this time, the body diode of the second field effect transistor Q2 can only be used for freewheeling, thereby blocking the current reverse flow path that may occur during repeated rapid restarts.

[0041] For further information, see Figure 1 and Figure 2 The first control unit 41 includes a filter group, a clamp group, a second charging group and a fifth field effect transistor Q5. The input end of the filter group is connected to the output end of the isolator 5, the output end of the filter group is connected to the positive end of the clamp group and the input end of the second charging group, the negative end of the clamp group is used to connect to a low-voltage power supply device, the output end of the second charging group is connected to the gate of the fifth field effect transistor Q5, the drain of the fifth field effect transistor Q5 is connected to the control end of the second control unit 42, and the source of the fifth field effect transistor Q5 is grounded.

[0042] For further information, see Figure 2 The second control unit 42 includes a second resistor R2 and a fourth field effect transistor Q4, one end of the second resistor R2 is connected to the output end of the first charging group 31, the other end of the second resistor R2 is connected to the gate of the fourth field effect transistor Q4, the drain of the fourth field effect transistor Q4 is connected to the output end of the inverter 6, and the source of the fourth field effect transistor Q4 is grounded.

[0043] For further information, see Figure 2, the filtering group includes a second capacitor C2, the clamping group includes a first diode D1, and the second charging group includes a second diode D2, a fourth resistor R4, a third capacitor C3 and a third resistor R3; one end of the second capacitor C2 is connected to the output end of the isolator 5, and the other end of the second capacitor C2 is respectively connected to the positive electrode of the first diode D1, the positive electrode of the second diode D2 and one end of the fourth resistor R4, and the cathode of the first diode D1 is used to connect a low-voltage power supply device; the cathode of the second diode D2 is respectively connected to one end of the third capacitor C3, one end of the third resistor R3 and the gate of the fifth field effect transistor Q5, and the other end of the fourth resistor R4, the other end of the third capacitor C3 and the other end of the third resistor R3 are respectively grounded.

[0044] In this embodiment, the low-voltage power supply device is used to provide a 5V DC voltage, and the low-voltage power supply device can be a step-down circuit in a power supply used by semiconductor devices; the third resistor R3 and the fourth resistor R4 jointly form a discharge channel in the power-off control circuit of this embodiment. When the circuit needs to discharge, the third resistor R3 and the fourth resistor R4 provide a path so that the capacitor or other energy storage element can quickly release energy, thereby ensuring the stability and safety of the circuit; the clamping function of the first diode D1 is to play a voltage limiting role in the circuit. When the voltage in the circuit exceeds the breakdown voltage of the first diode D1, the first diode D1 will be turned on and clamp the voltage near its breakdown voltage, thereby protecting other components in the circuit from damage by excessive voltage; that is, the first diode D1 ensures that the PWM control signal can be stably transmitted after being processed by the isolator 5 by clamping the voltage, while preventing the excessive voltage from damaging the subsequent circuit.

[0045] In this embodiment, the second resistor R2, the second capacitor C2, the fourth resistor R4, the first diode D1, the second diode D2, the third resistor R3, the third capacitor C3, the fourth field effect transistor Q4 and the fifth field effect transistor Q5 together constitute a power-off control circuit; when the circuit is in normal operation, the VCC voltage has been established, and the UC1 capacitor has been fully charged; after the PWM control signal is processed by the isolator 5, it continues to be transmitted through the second capacitor C2, the first diode D1 functions to clamp the voltage, and the fourth resistor R4 provides a discharge path; the second diode D2 and the third capacitor C3 work together to rectify the signal transmitted by the second capacitor C2, thereby obtaining a stable voltage Uq; the third resistor R3 also provides a discharge path; by selecting the parameters of the third resistor R3 and the third capacitor C3, it can be obtained An oscillating voltage higher than the turn-on threshold of the fifth field effect transistor Q5 will turn on the fifth field effect transistor Q5, thereby turning off the fourth field effect transistor Q4; in this case, the secondary synchronous drive signal can normally drive the second field effect transistor Q2; when the circuit is turned off, the controller no longer outputs the PWM control signal, and the second diode D2 and the third capacitor C3 therefore no longer have energy supply, resulting in rapid discharge of Uq; when the Uq voltage drops below the turn-off threshold of the fifth field effect transistor Q5, the fifth field effect transistor Q5 is immediately turned off, and since the secondary power supply voltage VCC still exists, the fourth field effect transistor Q4 can be driven through the second resistor R2, thereby lowering the secondary synchronous drive signal to achieve the turn-off of the second field effect transistor Q2; therefore, when the circuit is turned off, the energy backflow path of the output capacitor and the capacitive load is effectively cut off, thereby successfully suppressing the generation of backflow current.

[0046] The present invention also provides a silicon chip accordingly, on which any of the above-mentioned anti-backflow circuits is arranged.

[0047] The present invention also provides a semiconductor device accordingly, wherein the semiconductor device uses any of the anti-backflow circuits described above to achieve operation control.

[0048] It is understandable that those skilled in the art can make equivalent substitutions or changes based on the technical solution and inventive concept of the present invention, and all these changes or substitutions should fall within the protection scope of the present invention.

Claims

1. A backflow prevention circuit, characterized in that: It includes an input unit, an output unit, a transformer T1, a startup control unit, a power-off control unit, an isolator and an inverter, wherein the power-off control unit includes a first control unit and a second control unit; the input unit is connected to the primary side of the transformer T1, the control end of the input unit and the input end of the isolator are respectively used to receive a PWM signal, and the output end of the isolator is respectively connected to the input end of the inverter and the control end of the first control unit; the output unit is connected to the secondary side of the transformer T1, the control end of the startup control unit and the control end of the second control unit are respectively used to connect a circuit power supply voltage, and the source end of the power-off control unit is connected to the control end of the output unit; the drain end of the first control unit is connected to the control end of the second control unit, and the output end of the inverter is respectively connected to the drain end of the output unit and the drain end of the second control unit.

2. The anti-backflow circuit according to claim 1, characterized in that: The input unit includes a first inductor L1, an input capacitor Cin and a first field effect transistor Q1, one end of the first inductor L1 and the source of the first field effect transistor Q1 are respectively used to connect to an external power supply device, the other end of the first inductor L1 and one end of the input capacitor Cin are respectively connected to one end of the primary side of the transformer T1, the drain of the first field effect transistor Q1 is connected to the other end of the primary side of the transformer T1; the gate of the first field effect transistor Q1 is used to receive a PWM signal.

3. The anti-backflow circuit according to claim 1, characterized in that: The output unit includes a second field effect transistor Q2 and an output capacitor Cout, the drain of the second field effect transistor Q2 is connected to the other end of the secondary side of the transformer T1, and the gate of the second field effect transistor Q2 is connected to the source end of the startup control unit; one end of the output capacitor Cout is connected to one end of the secondary side of the transformer T1, and the output capacitor Cout is used to connect a load; the other end of the output capacitor Cout and the source of the second field effect transistor Q2 are grounded respectively.

4. The anti-backflow circuit according to claim 3, characterized in that: The startup control unit includes a first charging group and a third field effect transistor Q3, the input end of the first charging group is used to connect the circuit power supply voltage, and the output end of the first charging group is respectively connected to the gate of the third field effect transistor Q3 and the control end of the second control unit; the source of the third field effect transistor Q3 is connected to the gate of the second field effect transistor Q2, and the drain of the third field effect transistor Q3 is connected to the output end of the inverter.

5. The anti-backflow circuit according to claim 4, characterized in that: The first charging group includes a first resistor R1 and a first capacitor C1, one end of the first resistor R1 is used to connect the circuit power supply voltage, the other end of the first resistor R1 is respectively connected to one end of the first capacitor C1 and the gate of the third field effect transistor Q3, and the other end of the first capacitor C1 is grounded.

6. The anti-backflow circuit according to claim 5, characterized in that: The first control unit includes a filter group, a clamp group, a second charging group and a fifth field effect transistor Q5. The input end of the filter group is connected to the output end of the isolator, the output end of the filter group is connected to the positive end of the clamp group and the input end of the second charging group, the negative end of the clamp group is used to connect to a low-voltage power supply device, the output end of the second charging group is connected to the gate of the fifth field effect transistor Q5, the drain of the fifth field effect transistor Q5 is connected to the control end of the second control unit, and the source of the fifth field effect transistor Q5 is grounded.

7. The anti-backflow circuit according to claim 6, characterized in that: The second control unit includes a second resistor R2 and a fourth field effect transistor Q4, one end of the second resistor R2 is connected to the output end of the first charging group, the other end of the second resistor R2 is connected to the gate of the fourth field effect transistor Q4, the drain of the fourth field effect transistor Q4 is connected to the output end of the inverter, and the source of the fourth field effect transistor Q4 is grounded.

8. The anti-backflow circuit according to claim 6, characterized in that: The filtering group includes a second capacitor C2, the clamping group includes a first diode D1, and the second charging group includes a second diode D2, a fourth resistor R4, a third capacitor C3 and a third resistor R3; one end of the second capacitor C2 is connected to the output end of the isolator, the other end of the second capacitor C2 is respectively connected to the positive electrode of the first diode D1, the positive electrode of the second diode D2 and one end of the fourth resistor R4, and the cathode of the first diode D1 is used to connect to a low-voltage power supply device; the cathode of the second diode D2 is respectively connected to one end of the third capacitor C3, one end of the third resistor R3 and the gate of the fifth field effect transistor Q5, and the other end of the fourth resistor R4, the other end of the third capacitor C3 and the other end of the third resistor R3 are respectively grounded.

9. A silicon wafer, characterized in that: The silicon chip is provided with an anti-backflow circuit as described in any one of claims 1 to 8.

10. A semiconductor device, characterized in that: The semiconductor device uses the anti-backflow circuit as described in any one of claims 1 to 8 to achieve operation control.

Images