A double mesa structure heterojunction infrared detector and a preparation method thereof

Abstract

The application discloses a double mesa structure heterojunction infrared detector and a preparation method thereof. The infrared detector comprises a substrate, an epitaxial layer, a passivation layer and a metal electrode. The epitaxial layer comprises a buffer layer, a first ohmic contact layer, a collector layer, a base layer, an emitter layer, a second ohmic contact layer and a protective layer. The first ohmic contact layer is provided with a first step, so that the first ohmic contact layer and the collector layer on the inner side of the first step form a column structure. The collector layer is provided with a second step, so that the collector layer, the base layer, the emitter layer, the second ohmic contact layer and the protective layer on the inner side of the second step form a micro column structure. Through the design of the double mesa structure, the transverse movement of photo-generated carriers is effectively inhibited. Meanwhile, the micro column structure and the column structure can limit the electric field in the central region, can reduce the electric field intensity of the mesa peripheral region, can inhibit the edge breakdown, can reduce the surface leakage current caused by impurities and defects, and can reduce the dark current.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor application technology, and particularly relates to a dual-mesa heterojunction infrared detector and its fabrication method. Background Technology

[0002] With the rapid development of technology, the application of infrared detectors in military and civilian fields is constantly expanding, covering multiple fields from strategic early warning and night vision to meteorological monitoring and medical diagnosis. As the requirements for infrared detection increase, the technological development of the next generation of infrared detectors is gradually moving towards the following directions: high pixel count, high sensitivity, large array size, high thermal resolution, multi-band detection, support for high operating temperatures, small size, light weight, and ease of maintenance.

[0003] Currently, most infrared detectors employ a mesa structure, which uses etching to remove semiconductor material outside the working area to achieve electrical isolation between devices. However, after etching, the continuity of the semiconductor crystal is broken, leading to surface states and inversion layers on the device sidewalls. This creates conductive channels on the sidewall surfaces, resulting in surface leakage current. Although various methods have been employed to passivate the detector surface using dielectric materials such as SiO2, polyimide, and photoresist, the effects remain limited. Therefore, the structure and fabrication process of infrared detectors still require further improvement. Summary of the Invention

[0004] Purpose of the invention: In order to solve the problems existing in the prior art, the present invention provides a heterojunction infrared detector with a dual mesa structure and its fabrication method. The design of the dual mesa structure effectively suppresses the sidewall leakage current of the mesa structure detector, thereby achieving high responsivity, high photoelectric gain, high detectivity and low dark current.

[0005] Summary of the Invention: To achieve the above objectives, the present invention provides a dual-mesa heterojunction infrared detector, comprising:

[0006] Substrate;

[0007] An epitaxial layer is disposed on the substrate. The epitaxial layer includes a buffer layer, a first ohmic contact layer, a current collector layer, a base layer, an emitter layer, a second ohmic contact layer, and a protective layer. A first step is provided on the first ohmic contact layer, such that the first ohmic contact layer and the current collector layer inside the first step form a pillar structure. A second step is provided on the current collector layer, such that the current collector layer, the base layer, the emitter layer, the second ohmic contact layer, and the protective layer inside the second step form a micropillar structure.

[0008] A passivation layer covers the surface of the epitaxial layer, and the passivation layer has a first electrode window located on the first ohmic contact layer and a second electrode window located on the protective layer;

[0009] The metal electrode includes a first electrode and a second electrode, which are respectively disposed within a first electrode window and a second electrode window.

[0010] Specifically, the substrate is an N-type GaSb substrate with a doping concentration ≥10. 17 cm -3 The buffer layer is an N-type doped GaSb layer with a doping concentration ≥ 10⁻⁶. 17 cm -3 The thickness of the buffer layer is 300–1000 nm.

[0011] Specifically, the current collector layer adopts an N-type doped InGaAsSb structure with a doping concentration of ≥10. 15 cm -3 The thickness is 200–600 nm; the base layer is an unintentionally doped GaSb layer with an undoped carrier concentration of 10. 14 ~10 16 cm -3 The thickness is 40–80 nm; the emitter layer adopts an N-type doped InAs / AlSb superlattice structure with a doping concentration ≥10. 17 cm -3 The thickness is 200–600 nm.

[0012] Specifically, the first ohmic contact layer adopts an N-type doped InGaAsSb structure with a doping concentration ≥10. 18 cm -3 The thickness is 250–800 nm; the second ohmic contact layer adopts an N-type doped InAs / AlSb superlattice structure with a doping concentration ≥10. 18 cm -3 The thickness is 250–800 nm; the protective layer is an N-type doped InAs layer with a doping concentration ≥10. 18 cm -3 The thickness is 20-50 nm.

[0013] Optionally, the material of the current collector layer includes one of short-wave infrared material, mid-wave infrared material, long-wave infrared material, or very long-wave infrared material.

[0014] Furthermore, the present invention also provides a method for fabricating the above-mentioned dual-mesa heterojunction infrared detector, comprising the following steps:

[0015] An epitaxial layer is fabricated on a substrate, the epitaxial layer comprising a buffer layer, a first ohmic contact layer, a current collector layer, a base layer, an emitter layer, a second ohmic contact layer, and a protective layer;

[0016] Etching is performed on the outer edge of the epitaxial structure, thereby forming a first step on the first ohmic contact layer and a first step on the current collector layer;

[0017] A passivation layer is deposited on the surface of the etched epitaxial layer, and a first electrode window and a second electrode window are formed by etching on the passivation layer.

[0018] The first electrode and the second electrode are fabricated in the first electrode window and the second electrode window, respectively.

[0019] Specifically, the epitaxial layer is prepared using molecular beam epitaxy.

[0020] Specifically, the first and second steps are formed using inductively coupled plasma etching or wet etching.

[0021] Specifically, the etching depth of the first step extends up to half the thickness of the first ohmic contact layer, and the etching depth of the second step extends up to half the thickness of the current collector layer.

[0022] Specifically, the passivation layer covers the top and sidewalls of the micropillar structure, the top and sidewalls of the frustum structure, and the first ohmic contact layer.

[0023] Beneficial effects:

[0024] This invention effectively suppresses the lateral movement of photogenerated carriers through the design of a double mesa structure. At the same time, the micropillar structure can confine the electric field to the central region, which can reduce the electric field intensity in the surrounding area of ​​the mesa, suppress edge breakdown, reduce surface leakage current caused by impurities and defects, and reduce dark current.

[0025] This invention employs a large-scale collector and a micropillar-structured emitter. The micropillar structure represents low capacitance, which reduces the required turn-on current of the device. The capture of a small number of holes causes a significant change in potential and generates amplified electron injection. Furthermore, when photogenerated holes generated by the large-scale collector move into the small-volume micropillar structure, they generate a higher charge density, thus giving the device high sensitivity. The larger collector area allows for a more uniform and rational electric field distribution within the detector, which is beneficial for photogenerated carriers to drift and be collected more efficiently under the influence of the electric field. This reduces the probability of recombination during carrier migration, thereby improving collection efficiency and enhancing the detector's sensitivity and responsivity. Moreover, the larger collector can cover a wider area, resulting in a higher probability of collecting photogenerated carriers generated within a larger area of ​​the active layer. For cases where the photogenerated carrier generation locations are relatively dispersed, this effectively increases the collection ratio, further enhancing the detector's ability to collect optical signals.

[0026] Furthermore, the passivation layer deposited on the sidewalls of the micropillar structure, above the stage structure, and on the sidewalls can neutralize the dangling bonds on the sidewalls, reduce the surface state density, thereby suppressing the sidewall leakage current of the infrared detector and improving the differential impedance of the infrared detector, thus achieving high responsivity, high detectivity, and low dark current. Attached Figure Description

[0027] Figure 1 This is a cross-sectional schematic diagram of the infrared detector in an embodiment of the present invention;

[0028] Figure 2 This is a flowchart illustrating the method for fabricating an infrared detector in an embodiment of the present invention, wherein (a) to (f) are schematic diagrams of the structures of the first to fifth devices and the infrared detector, respectively;

[0029] Figure 3 A three-dimensional structural schematic diagram of the third device in an embodiment of the present invention;

[0030] Figure 4 A three-dimensional structural schematic diagram of the focal plane detector chip in an embodiment of the present invention;

[0031] The figure includes: 1-substrate, 2-buffer layer, 3-first ohmic contact layer, 4-current collector layer, 5-base layer, 6-emitter layer, 7-second ohmic contact layer, 8-protective layer, 9-passivation layer, 10-first electrode, 11-second electrode. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of the present invention, but not all embodiments.

[0033] Reference Figure 1 This embodiment provides a dual-mesa heterojunction infrared detector, comprising:

[0034] Substrate 1;

[0035] An epitaxial layer is disposed on the substrate 1. The epitaxial layer includes a buffer layer 2, a first ohmic contact layer 3, a current collector layer 4, a base layer 5, an emitter layer 6, a second ohmic contact layer 7, and a protective layer 8. The first ohmic contact layer 3 has a first step, such that the first ohmic contact layer 3 and the current collector layer 4 inside the first step form a pillar structure. The current collector layer 4 has a second step, such that the current collector layer 4, the base layer 5, the emitter layer 6, the second ohmic contact layer 7, and the protective layer 8 inside the second step form a micropillar structure.

[0036] A passivation layer 9 covers the surface of the epitaxial layer, and the passivation layer 9 has a first electrode window located on the first ohmic contact layer 3 and a second electrode window located on the protective layer 8;

[0037] The metal electrode includes a first electrode 10 and a second electrode 11, which are respectively disposed within a first electrode window and a second electrode window.

[0038] Specifically, under the bias voltage (the potential of collector layer 4 is higher than that of emitter layer 6), the emitter junction is forward biased, and the collector junction is reverse biased. The forward bias voltage applied to the emitter junction lowers the potential barrier, allowing a large number of electrons to be injected from the emitter layer into the base layer, while the resulting holes drift towards the emitter layer. After entering the base layer, electrons recombine and drift towards the collector layer. When the thickness of the base layer is less than the electron diffusion length, a large number of electrons, except for a small number that recombine, will cross to the boundary between the base layer and the collector layer. Due to the reverse bias of the collector junction, the potential barrier of the collector junction increases under the influence of the reverse bias voltage. Electrons near the boundary are migrated to the collector layer under the influence of the electric field and output to the external circuit. Based on the above analysis, changes in the transistor's input current affect changes in the output current, and the output current is much greater than the input current; this is the principle of electrical amplification.

[0039] Infrared light enters from the top of the second step and is absorbed by the collector layer, generating electron-hole pairs. Under the action of an applied bias voltage, electrons are collected by the collector layer, serving as the original photocurrent of the phototransistor; holes diffuse into the substrate and accumulate in substrate traps. This lowers the potential barrier height between the substrate and the emitter layer, which in turn enhances electron injection into the emitter layer and electron migration into the substrate, thereby improving the injection efficiency of the emitter junction. Electrons in the photogenerated charge carriers move towards the first ohmic contact layer and are output through the first electrode, while holes in the photogenerated charge carriers move towards the second ohmic contact layer and are output through the second electrode. The movement of photogenerated charge carriers forms a current, and the detection and gain of infrared light are achieved by detecting the output current of the infrared light detector.

[0040] This invention utilizes a large-scale collector and a micropillar structure for the emitter. The micropillar structure represents low capacitance, which reduces the required turn-on current of the device. The capture of a small number of holes causes a large change in potential and generates amplified electron injection. Furthermore, when photogenerated holes generated by the large-scale collector move into the small-volume micropillar structure, a higher charge density is generated, thus giving the device high sensitivity. At the same time, the internal amplification mechanism based on negative feedback stable injection reduces the noise level, and the large absorption region ensures high photon capture efficiency.

[0041] A larger collector area can optimize the electric field distribution of heterojunction detectors, promote efficient collection of photogenerated carriers, reduce the recombination probability of carriers, and improve collection efficiency, sensitivity, and responsivity. It can also increase the collection ratio when photogenerated carriers are dispersed, enhancing the optical signal collection capability. At the same time, a larger collector can reduce the impact of edge effects, which can lead to problems such as uneven electric field distribution and increased carrier recombination. Increasing the collector area allows the effective working area of ​​the detector to be more concentrated in the interior, reducing the adverse effects of edge regions on overall performance and improving the consistency and stability of detector performance.

[0042] Here, we take a short-wave infrared detector on a GaSb substrate as an example. The structure of the infrared detector is as follows:

[0043] (1) Substrate 1 is an N-type GaSb substrate with a doping concentration ≥10. 17 cm -3 ;

[0044] (2) Buffer layer 2 is a GaSb layer with N-type doping using Te, wherein the doping concentration of Te is ≥10. 17 cm -3 The thickness is 300-1000 nm, which is used to prevent substrate 1 defects from growing in the infrared detector;

[0045] (3) The first ohmic contact layer 3 is an InGaAsSb structure with N-type doping using Si, wherein the Si doping concentration is ≥10 18 cm -3 With a thickness of 250–600 nm, it is used to contact the first electrode 10 (metal lower electrode) to form an ohmic contact;

[0046] (4) Collector layer 4 is an InGaAsSb structure with N-type doping using Si, wherein the Si doping concentration is ≥10 15 cm -3 With a thickness of 200–600 nm, it is used to absorb incident infrared light and generate photogenerated carriers;

[0047] (5) The base layer 5 is an unintentionally doped GaSb layer with an undoped carrier concentration of 10. 14 ~10 16 cm -3 The thickness is 40–80 nm;

[0048] (6) The emitter layer 6 is an InAs / AlSb superlattice structure with N-type Si doping, wherein the Si doping concentration is ≥10 17 cm -3 The thickness is 200–600 nm;

[0049] (7) The second ohmic contact layer 7 is an InAs / AlSb superlattice structure with N-type doping of Si, wherein the Si doping concentration is ≥10 18 cm -3 The thickness is 250–800 nm;

[0050] (8) Protective layer 8 is an InAs layer with N-type doping using Si, wherein the Si doping concentration is ≥10 18 cm -3 The thickness is 20-50 nm, which is used to form an ohmic contact with the second electrode 11 (metal upper electrode) and at the same time prevent the material of the infrared detector from being oxidized by contact with air;

[0051] (9) The passivation layer 9 is made of SiO2 material with a thickness of 100nm~3μm;

[0052] (10) The structure of the first electrode 10 and the second electrode 11 both include a Ti layer, a Pt layer formed on the Ti layer and an Au layer formed on the Pt layer, wherein the thickness of the Ti layer and the Pt layer is 50 nm and the thickness of the Au layer is 300 nm.

[0053] Specifically, both the first electrode 10 and the second electrode 11 are annular. The Ti layer can form a good ohmic contact, Pt can prevent Au from diffusing into the Ti layer and the infrared detection material, and the Au layer can maintain good stability and bonding in the package.

[0054] Reference Figure 2 This embodiment also provides a method for fabricating the above-mentioned dual-mesa heterojunction infrared detector, which specifically includes the following steps:

[0055] S1. An epitaxial layer is prepared on a substrate 1, the epitaxial layer including a buffer layer 2, a first ohmic contact layer 3, a current collector layer 4, a base layer 5, an emitter layer 6, a second ohmic contact layer 7, and a protective layer 8, to obtain a first device;

[0056] S2. Etch the surface of the first device away from the substrate 1 to form an initial step on the second ohmic contact layer 7 to obtain the second device;

[0057] S3. Etching continues on the surface of the second device away from the substrate 1 to form a second step on the current collector layer 4. At this time, under synchronous etching, the initial step on the first ohmic contact layer 3 forms the first step, thus obtaining... Figure 3 The third device shown;

[0058] S4. Deposit a passivation layer 9 on the surface of the third device away from the substrate 1 to obtain the fourth device;

[0059] S5. Etch the surface of the fourth device away from the substrate 1 to form the first electrode window and the second electrode window on the passivation layer 9 to obtain the fifth device;

[0060] S6. A first electrode 10 and a second electrode 11 are prepared on the surface of the fifth device away from the substrate 1 to obtain an infrared detector, wherein the first electrode 10 and the second electrode 11 are located in the first electrode window and the second electrode window, respectively.

[0061] Specifically, the epitaxial layer can be prepared using molecular beam epitaxy.

[0062] Specifically, step S2 includes: first, using a mask to protect the surface portion outside the etching area, then using inductively coupled plasma or wet etching to etch the protective layer 8 and the second ohmic contact layer 7, with the etching depth being the difference between the etching depths of the first step and the second step, and after the etching is completed, removing the mask from the device surface.

[0063] Specifically, step S3 includes: first, using a mask to protect the central micropillar region, and then using inductively coupled plasma to etch the protective layer 8, the second ohmic contact layer 7, the emitter layer 6, the base layer 5, the current collector layer 4, and the first ohmic contact layer 3. Since the etching is performed simultaneously, when the etching depth reaches half the thickness of the current collector layer 4, the etching depth of the initial step will reach half the thickness of the first ohmic contact layer 3, thereby simultaneously forming the first step on the first ohmic contact layer 3 and the second step on the current collector layer 4.

[0064] Specifically, in step S4, the passivation layer 9 is deposited on the top and sidewalls of the micropillar structure, the top and sidewalls of the frustum structure, and the first ohmic contact layer 3. The passivation layer 9 (dielectric thin film) is prepared by methods including plasma-enhanced chemical vapor deposition, vacuum evaporation, magnetron sputtering, etc.

[0065] Specifically, in step S5, the method for removing part of the passivation layer 9 (dielectric thin film) can be reactive ion etching or buffer oxide etchant.

[0066] Specifically, in step S6, a first electrode 10 is fabricated on the first electrode window using negative photoresist lithography, electron beam evaporation of Ti / Pt / Au, and a lift-off process, and a second electrode 11 is fabricated on the second electrode window.

[0067] Furthermore, before each etching step, a mesa mask is deposited on the surface of the device away from substrate 1, and the mesa mask on the device surface is removed after etching. Specifically, the mesa mask material can be SiO2, Si... x N y Materials such as these can have a thickness of 500–2000 nm.

[0068] Using the above-described fabrication method, a short-wave infrared detector with an InAs / GaSb superlattice heterojunction on a GaSb substrate can be obtained. Furthermore, this invention can be extended to GaAs-based and InP-based infrared detectors, where the epitaxial layer can utilize appropriate infrared detection materials. It can also be extended to mid-wave, long-wave, or very long-wave infrared detectors by changing the current collector material. When this invention is applied to a focal plane array detector chip, the dual-mesa structure is not limited to a single micropillar structure; other structures such as... Figure 4 The dual micropillar structure shown is designed to improve detection accuracy.

[0069] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A heterojunction infrared detector with a dual-mesa structure, characterized in that, include: Substrate; An epitaxial layer is disposed on the substrate. The epitaxial layer includes a buffer layer, a first ohmic contact layer, a current collector layer, a base layer, an emitter layer, a second ohmic contact layer, and a protective layer. A first step is provided on the first ohmic contact layer, such that the first ohmic contact layer inside the first step and the current collector layer above the first step form a pillar structure. A second step is provided on the current collector layer, such that the current collector layer inside the second step and the base layer, emitter layer, second ohmic contact layer, and protective layer above the second step form a micropillar. A passivation layer covers the surface of the epitaxial layer, and the passivation layer has a first electrode window located on the first ohmic contact layer and a second electrode window located on the protective layer; The metal electrode includes a first electrode and a second electrode, which are respectively disposed within a first electrode window and a second electrode window.

2. The dual-mesa heterojunction infrared detector according to claim 1, characterized in that, The substrate is an N-type GaSb substrate with a doping concentration ≥10¹⁷ cm⁻³; the buffer layer is an N-type doped GaSb layer with a doping concentration ≥10¹⁷ cm⁻³, wherein the thickness of the buffer layer is 300~1000 nm.

3. The dual-mesa heterojunction infrared detector according to claim 2, characterized in that, The current collector layer adopts an N-type doped InGaAsSb structure with a doping concentration of ≥10¹⁵ cm⁻³ and a thickness of 200~600 nm; the base layer is an unintentionally doped GaSb layer with an undoped current carrier concentration of 10¹⁴~10¹⁶ cm⁻³ and a thickness of 40~80 nm; the emitter layer adopts an N-type doped InAs / AlSb superlattice structure with a doping concentration of ≥10¹⁷ cm⁻³ and a thickness of 200~600 nm.

4. The dual-mesa heterojunction infrared detector according to claim 3, characterized in that, The first ohmic contact layer adopts an N-type doped InGaAsSb structure with a doping concentration ≥10¹⁸ cm⁻³ and a thickness of 250~800 nm; the second ohmic contact layer adopts an N-type doped InAs / AlSb superlattice structure with a doping concentration ≥10¹⁸ cm⁻³ and a thickness of 250~800 nm; the protective layer is an N-type doped InAs layer with a doping concentration ≥10¹⁸ cm⁻³ and a thickness of 20~50 nm.

5. The dual-mesa heterojunction infrared detector according to claim 1, characterized in that, The material of the current collector layer includes one of short-wave infrared material, mid-wave infrared material, long-wave infrared material, or very long-wave infrared material.

6. A method for fabricating a heterojunction infrared detector based on the double-mesa structure described in any one of claims 1 to 5, characterized in that, Includes the following steps: An epitaxial layer is fabricated on a substrate, the epitaxial layer comprising a buffer layer, a first ohmic contact layer, a current collector layer, a base layer, an emitter layer, a second ohmic contact layer, and a protective layer; Etching is performed on the epitaxial structure to form a first step on the first ohmic contact layer and a second step on the current collector layer; A passivation layer is deposited on the surface of the etched epitaxial layer, and a first electrode window and a second electrode window are formed by etching on the passivation layer. The first electrode and the second electrode are fabricated in the first electrode window and the second electrode window, respectively.

7. The preparation method according to claim 6, characterized in that, The epitaxial layer was prepared using molecular beam epitaxy.

8. The preparation method according to claim 6, characterized in that, The first and second steps are formed using inductively coupled plasma etching or wet etching.

9. The preparation method according to claim 6, characterized in that, The etching depth of the first step extends to half the thickness of the first ohmic contact layer, and the etching depth of the second step extends to half the thickness of the current collector layer.

10. The preparation method according to claim 6, characterized in that, The passivation layer covers the top and sidewalls of the micropillar structure, the top and sidewalls of the frustum structure, and the first ohmic contact layer.

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