Display device

Abstract

The display device includes a substrate including a first region, a second region spaced apart from the first region, and a bendable region connecting the first region to the second region; a support substrate disposed under the substrate and supporting the substrate; a display portion disposed in the first area of the substrate; a first circuit board connected to the second region of the substrate and including a flexible film; a second circuit board connected to the first circuit board; and a rigid reinforcement portion connecting the second region of the substrate to the second circuit board and covering the first circuit board.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Korean Patent Application No. 10-2023-0160304 filed in the Korean Intellectual Property Office on November 20, 2023, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] One or more embodiments relate to devices, and more particularly, to display devices. Background Art

[0004] Mobile electronic devices are widely used. In addition to small electronic devices such as mobile phones, mobile electronic devices also include tablet personal computers (PCs) that have been widely used in recent years.

[0005] Such mobile electronic devices include display devices that provide various functions such as providing visual information (such as images or videos) to users. As components that drive display devices have been miniaturized, the proportion of display devices in electronic devices has been gradually increasing. Structures that can be bent from a flat state to a bent state are also being developed. Summary of the invention

[0006] One or more embodiments include a display device including a reinforcing portion that reinforces a first circuit board and provides a space in which a fixing portion having a vacuum suction cup may be fixed.

[0007] According to one or more embodiments, a display device includes: a substrate including a first area, a second area spaced apart from the first area, and a bendable area connecting the first area to the second area; a supporting substrate disposed below the substrate and supporting the substrate; a display portion disposed in the first area of ​​the substrate; a first circuit board connected to the second area of ​​the substrate and including a flexible film; a second circuit board connected to the first circuit board; and a rigid reinforcing portion connecting the second area of ​​the substrate to the second circuit board and covering the first circuit board and having rigidity.

[0008] In an embodiment, the reinforcement portion is spaced apart from the first circuit board.

[0009] In an embodiment, the display device further includes a display driver disposed between the first circuit board and the reinforcement portion and connected to the first circuit board.

[0010] In an embodiment, the cross-sectional shape of the reinforcement portion has shape.

[0011] In an embodiment, one surface of the reinforcement portion comprises a flat surface.

[0012] In an embodiment, one side of the reinforcing portion is fixed to the second region of the substrate, and another side of the reinforcing portion is fixed to the second circuit board.

[0013] In an embodiment, the reinforcing portion includes at least one of stainless steel (SUS), polyethylene terephthalate (PET), graphite, and copper (CU) materials.

[0014] In an embodiment, the display device further includes a bending protection layer disposed in the bendable region of the substrate.

[0015] In an embodiment, the support substrate includes a first support substrate supporting a first region of the substrate, a second support substrate supporting a second region of the substrate, and an opening overlapping the bendable region of the substrate.

[0016] In an embodiment, the display device further includes a protection member disposed between the first support substrate and the second support substrate when the bendable region of the substrate is in a bent state.

[0017] According to one or more embodiments, a display device includes: a display panel; a first circuit board connected to the display panel and including a flexible film; a second circuit board connected to the first circuit board; and a rigid reinforcing portion reinforcing the first circuit board. The display panel includes: a substrate including a first area, a second area spaced apart from the first area and connected to the first circuit board, and a bendable area connecting the first area to the second area; a supporting substrate disposed under the substrate and supporting the substrate; and a display portion disposed in the first area of ​​the substrate.

[0018] In an embodiment, the reinforcement portion is spaced apart from the first circuit board.

[0019] In an embodiment, the display device further includes a display driver disposed between the first circuit board and the reinforcement portion and connected to the first circuit board.

[0020] In an embodiment, the cross-sectional shape of the reinforcement portion has shape.

[0021] In an embodiment, one surface of the reinforcement portion comprises a flat surface.

[0022] In an embodiment, one side of the reinforcing portion is fixed to the second region of the substrate, and another side of the reinforcing portion is fixed to the second circuit board.

[0023] In an embodiment, the reinforcing portion includes at least one of stainless steel (SUS), polyethylene terephthalate (PET), graphite, and copper (CU) materials.

[0024] In an embodiment, the display device further includes a bending protection layer disposed in the bendable region of the substrate.

[0025] In an embodiment, the support substrate includes a first support substrate supporting a first region of the substrate, a second support substrate supporting a second region of the substrate, and an opening overlapping the bendable region of the substrate.

[0026] In an embodiment, the display device further includes a protection member disposed between the first support substrate and the second support substrate when the bendable region of the substrate is in a bent state.

[0027] According to one or more embodiments, a display device includes: a substrate including a first region, a second region spaced apart from the first region, and a bendable region connecting the first region to the second region; a first circuit board connected to the second region of the substrate and including a flexible film; a second circuit board connected to the first circuit board; and a rigid reinforcing portion connecting the second region of the substrate to the second circuit board and covering the first circuit board. One side of the reinforcing portion is fixed to the second region of the substrate, and the other side of the reinforcing portion is fixed to the second circuit board.

[0028] In an embodiment, the display device further includes: a supporting substrate disposed under the substrate and supporting the substrate; a bending protection layer disposed in a bendable region of the substrate; and a display portion disposed in a first region of the substrate. The supporting substrate includes a first supporting substrate supporting the first region of the substrate, a second supporting substrate supporting the second region of the substrate, and an opening overlapping the bendable region of the substrate.

[0029] Other aspects, features, and advantages of the present disclosure will become better understood from the accompanying drawings, appended claims, and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 is a schematic perspective view of a display device according to an embodiment.

[0031] Figure 2 According to the implementation method Figure 1 0 is a cross-sectional view of a portion of a display panel of a display device shown in .

[0032] Figures 3 to 5 According to the implementation method Figure 2 The circuit diagram of the display panel is shown in .

[0033] Figure 6 is a schematic cross-sectional view of a display device according to an embodiment.

[0034] Figure 7 is a schematic plan view of a display device according to an embodiment.

[0035] Figure 8is a schematic cross-sectional view of a display device according to an embodiment.

[0036] Fig. 9 is a schematic cross-sectional view of a fixing portion according to an embodiment. DETAILED DESCRIPTION

[0037] Reference will now be made in detail to embodiments, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout. In this regard, the embodiments may have different forms and should not be construed as being limited to the descriptions set forth herein.

[0038] Hereinafter, the embodiments will be described in detail with reference to the accompanying drawings. When describing the embodiments with reference to the accompanying drawings, the same or corresponding elements may be denoted by the same reference numerals, and redundant descriptions thereof may be omitted.

[0039] It will also be understood that when a layer, region or element is referred to as being “on” another layer, region or element, it can be directly on the other layer, region or element, but intervening layers, regions or elements may also be present therebetween.

[0040] The X-axis, Y-axis, and Z-axis are not limited to the three axes of the rectangular coordinate system and can be interpreted in a broader sense. For example, the X-axis, Y-axis, and Z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other.

[0041] When a certain embodiment can be implemented differently, a specific process order can be performed differently from the described order. For example, two processes described in succession can be performed substantially simultaneously, or in the reverse order of the described order.

[0042] Figure 1 is a schematic perspective view of a display device DP according to an embodiment.

[0043] refer to Figure 1 In an embodiment, the display device DP includes a display area DA and a peripheral area PA outside the display area DA. The display device DP provides an image by an array of a plurality of pixels PX arranged two-dimensionally in rows and columns in the display area DA. Each of the pixels PX has an emission area in which a light-emitting element driven by a pixel circuit emits light. For example, an image is provided by the light emitted by the light-emitting element through the pixel PX. Because the area where the image is provided is determined by the arrangement of the light-emitting elements, the display area DA is defined by the light-emitting elements. In addition to the light-emitting elements and the pixel circuits driving the light-emitting elements, various signal lines and power lines electrically connected to the pixel circuits are arranged in the display area DA.

[0044] The peripheral area PA is an area in which an image is not provided, and may completely or partially surround the display area DA. Various lines and driving circuits that supply electrical signals or power to the display area DA are arranged in the peripheral area PA.

[0045] When viewed from a direction perpendicular to the top surface of the display device DP, the display device DP has an approximately rectangular shape. Figure 1 As shown in , the display device DP as a whole has a rectangular planar shape having short sides extending in a first direction (such as an X-axis direction) and long sides extending in a second direction (such as a Y-axis direction). Figure 1 As shown in , the angle where the short side in the first direction (X-axis direction) and the long side in the second direction (Y-axis direction) intersect may have a right angle shape, or may have a rounded shape having a predetermined curvature. The planar shape of the display device DP is not limited to a rectangular shape, and may have various other shapes such as a polygonal shape (such as a triangular shape), a circular shape, an elliptical shape, or an irregular shape.

[0046] Hereinafter, in an embodiment, the display device DP includes an organic light emitting diode (OLED) as a light emitting element, but the embodiments of the present disclosure are not necessarily limited thereto. For example, in some embodiments, the display device DP includes an inorganic light emitting diode or a quantum dot light emitting diode as a light emitting element.

[0047] The display device DP can be used as a display screen for portable electronic devices such as mobile phones, smart phones, tablet personal computers (PCs), mobile communication terminals, electronic notepads, e-books, portable multimedia players (PMPs), navigation systems, and ultra-mobile PCs (UMPCs). In addition, the display device DP can be used as a display screen for various products such as televisions, laptop computers, monitors, billboards, and Internet of Things (IoT) devices. The display device DP according to an embodiment can also be used for wearable devices such as smart watches, watch phones, glasses-type displays, and head-mounted displays (HMDs). The display device DP according to an embodiment can also be used for a dashboard of a car, a central information display (CID) on a central instrument panel or dashboard of a car, an interior mirror display that replaces a side mirror of a car, and a display screen on the rear side of the front seat to serve as an entertainment device for rear seat passengers of a car. For ease of explanation, an embodiment of the display device DP for a smart phone is described.

[0048] Figure 2 According to the implementation method Figure 1 4 is a cross-sectional view of a display panel 1 of a display device DP shown in FIG.

[0049] refer to Figure 1 and Figure 2In an embodiment, the display panel 1 includes a support substrate 10 a , a substrate 10 b , a display portion ELS, and an encapsulation layer 60 .

[0050] The support substrate 10a includes an insulating material such as glass and / or quartz. The support substrate 10a may include parts separated from each other. For example, the support substrate 10a may be separated into two or three sections.

[0051] The substrate 10b is disposed on the support substrate 10a and includes an insulating material such as a polymer resin. For example, the substrate 10b is a flexible substrate that is bendable, foldable or rollable. When the substrate 10b includes an insulating material such as a polymer resin, the substrate 10b has a structure in which a layer including an organic material and a layer including an inorganic material are alternately stacked. For example, the substrate 10b includes an organic layer including at least one of polyimide, polyethylene naphthalate, polyethylene terephthalate, polyarylate, polycarbonate, polyetherimide and polyether sulfone, and an inorganic material layer including at least one of silicon oxide, silicon oxynitride, silicon nitride and amorphous silicon.

[0052] The display part ELS is disposed on the substrate 10b and includes a buffer layer 11, a pixel circuit PC, an insulating layer IIL, a pixel defining layer 19, a pixel electrode 21, an emission layer 22b, an organic functional layer 22e, an opposing electrode 23 and an upper layer 50.

[0053] The buffer layer 11 is disposed on the substrate 10b. The buffer layer 11 reduces or prevents foreign matter, moisture, or ambient air from penetrating from below the substrate 10b, and provides a flat surface on the substrate 10b. The buffer layer 11 may include an inorganic material, an organic material, or an organic / inorganic composite material such as an oxide or a nitride, and may have a single-layer structure or a multi-layer structure including an inorganic material and an organic material. A barrier layer to prevent ambient air from penetrating may be further included between the substrate 10b and the buffer layer 11. In some embodiments, the buffer layer 11 includes silicon oxide (SiO 2 ) or silicon nitride (SiN x ). The buffer layer 11 includes a first buffer layer 11a and a second buffer layer 11b which are sequentially stacked in this stated order.

[0054] The pixel circuit PC and the insulating layer IIL are disposed on the buffer layer 11. The pixel circuit PC includes a thin film transistor TFT and a storage capacitor Cst. In addition, the insulating layer IIL includes a first gate insulating layer 12, a second gate insulating layer 13, an interlayer insulating layer 15 and a planarization layer 17.

[0055] A thin film transistor TFT connected to the organic light emitting element and configured to drive the organic light emitting element is disposed on the buffer layer 11. The thin film transistor TFT includes a first semiconductor layer A1, a first gate electrode G1, a first source electrode S1, and a first drain electrode D1.

[0056] The first semiconductor layer A1 is disposed on the buffer layer 11 and may include polycrystalline silicon. In another embodiment, the first semiconductor layer A1 includes amorphous silicon. In another embodiment, the first semiconductor layer A1 includes an oxide of at least one of indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). The first semiconductor layer A1 includes a channel region and a source region and a drain region doped with impurities.

[0057] The first gate insulating layer 12 is disposed on the buffer layer 11 and covers the first semiconductor layer A1. The first gate insulating layer 12 includes an inorganic insulating material such as silicon oxide (SiO 2 ), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ) or zinc oxide (ZnO x ). Zinc oxide (ZnO x ) may be ZnO and / or ZnO 2 The first gate insulating layer 12 may have a single layer or include a plurality of layers including one or more of the above-mentioned inorganic insulating materials.

[0058] The first gate electrode G1 is disposed on the first gate insulating layer 12 and overlaps the first semiconductor layer A1. The first gate electrode G1 includes at least one of molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may have a single layer or include a plurality of layers. For example, the first gate electrode G1 is a single Mo layer.

[0059] The second gate insulating layer 13 is disposed on the first gate insulating layer 12 and covers the first gate electrode G1. The second gate insulating layer 13 includes an inorganic insulating material such as silicon oxide (SiO 2 ), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O5 ), hafnium oxide (HfO 2 ) and zinc oxide (ZnO x ) at least one of. Zinc oxide (ZnO x ) may be ZnO and / or ZnO 2 The second gate insulating layer 13 may have a single layer or include a plurality of layers including one or more of the above-mentioned inorganic insulating materials.

[0060] The first upper electrode CE2 of the storage capacitor Cst is disposed on the second gate insulating layer 13 .

[0061] In the display area DA, the first upper electrode CE2 overlaps the first gate electrode G1 therebelow. The first gate electrode G1 and the first upper electrode CE2 overlapping each other with the second gate insulating layer 13 therebetween constitute a storage capacitor Cst. The first gate electrode G1 is a first lower electrode CE1 of the storage capacitor Cst.

[0062] The first upper electrode CE2 includes at least one of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) and copper (Cu), and may have a single layer or include multiple layers containing one or more of the above materials.

[0063] The interlayer insulating layer 15 is disposed on the second gate insulating layer 13 and covers the first upper electrode CE2. The interlayer insulating layer 15 includes silicon oxide (SiO 2 ), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ) and zinc oxide (ZnO x ) at least one of the above inorganic insulating materials. The interlayer insulating layer 15 may have a single layer or include a plurality of layers including one or more of the above inorganic insulating materials. Zinc oxide (ZnO x ) may be ZnO and / or ZnO 2 .

[0064] The first source electrode S1 and the first drain electrode D1 are disposed on the interlayer insulating layer 15. The first source electrode S1 and the first drain electrode D1, each including a conductive material including at least one of molybdenum (Mo), aluminum (Al), copper (Cu), and titanium (Ti), etc., may each have a single layer or include a plurality of layers including one or more of the above conductive materials. For example, the first source electrode S1 and the first drain electrode D1 each have a multilayer structure of Ti / Al / Ti.

[0065] The planarization layer 17 is disposed on the interlayer insulating layer 15 and covers the first source electrode S1 and the first drain electrode D1. The planarization layer 17 has a flat upper surface so that the pixel electrode 21 disposed thereon is flat.

[0066] The planarization layer 17 may include an organic material or an inorganic material, and may have a single layer or a multilayer structure. In an embodiment, the planarization layer 17 includes at least one of a general polymer such as benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethylmethacrylate (PMMA) or polystyrene (PS), a polymer derivative containing a phenol group, an acrylic polymer, an imide-based polymer, an aryl ether-based polymer, an amide-based polymer, a fluorine-based polymer, a p-xylene-based polymer, and a vinyl alcohol-based polymer. In an embodiment, the planarization layer 17 includes an inorganic insulating material such as silicon oxide (SiO 2 ), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ) and zinc oxide (ZnO x ) at least one of. Zinc oxide (ZnO x ) may be ZnO and / or ZnO 2 When the planarization layer 17 is formed, a layer is formed, and then chemical mechanical polishing is performed on the upper surface of the layer to provide a flat upper surface.

[0067] The planarization layer 17 has a through hole exposing one of the first source electrode S1 and the first drain electrode D1 of the thin film transistor TFT, and the pixel electrode 21 contacts one of the first source electrode S1 and the first drain electrode D1 through the through hole and is electrically connected to the thin film transistor TFT.

[0068] The pixel electrode 21 includes a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O3 ), indium gallium oxide (IGO) and aluminum zinc oxide (AZO). The pixel electrode 21 may include a reflective layer, and the reflective layer includes at least one of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr) and any compound thereof. For example, the pixel electrode 21 has a layer including ITO, IZO, ZnO and In above / below the reflective layer. 2 O 3 For example, the pixel electrode 21 has a stacked structure of ITO / Ag / ITO.

[0069] The pixel defining layer 19 is disposed on the planarization layer 17 and covers the edge of the pixel electrode 21 on the planarization layer 17, and includes a first opening OP1 exposing a central portion of the pixel electrode 21. The size and shape of the emission area of ​​the organic light emitting element are defined by the first opening OP1.

[0070] The pixel defining layer 19 prevents arcing etc. from occurring on the edge of the pixel electrode 21 by increasing the distance between the edge of the pixel electrode 21 and the opposite electrode 23. The pixel defining layer 19 includes an organic insulating material such as at least one of polyimide, polyamide, acrylic resin, BCB, HMDSO and phenol resin, and may be formed by spin coating.

[0071] The emission layer 22b corresponding to the pixel electrode 21 is disposed in the first opening OP1 of the pixel defining layer 19. The emission layer 22b includes a high molecular weight material or a low molecular weight material and emits one of red light, green light, blue light, and white light.

[0072] The organic functional layer 22e is disposed above and / or below the emission layer 22b. The organic functional layer 22e includes a first functional layer 22a and / or a second functional layer 22c. One of the first functional layer 22a and the second functional layer 22c may be omitted.

[0073] The first functional layer 22a is disposed below the emission layer 22b. The first functional layer 22a may be a single layer or include a plurality of layers including organic materials. In an embodiment, the first functional layer 22a is a hole transport layer (HTL) having a single-layer structure. In an embodiment, the first functional layer 22a includes a hole injection layer (HIL) and the HTL. In an embodiment, the first functional layer 22a is formed integrally and corresponds to the organic light emitting element in the display area DA.

[0074] The second functional layer 22c is disposed on the emission layer 22b. The second functional layer 22c may be a single layer or include a plurality of layers including organic materials. The second functional layer 22c may include an electron transport layer (ETL) and / or an electron injection layer (EIL). The second functional layer 22c is integrally formed and corresponds to the organic light emitting element in the display area DA.

[0075] The relative electrode 23 is disposed on the second functional layer 22c. The relative electrode 23 includes a conductive material having a low work function. For example, the relative electrode 23 includes a (semi) transparent layer including at least one of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca) and alloys thereof. In an embodiment, the relative electrode 23 also includes a (semi) transparent layer including ITO, IZO, ZnO and In 2 O 3 The counter electrode 23 is integrally formed and corresponds to the organic light emitting element in the display area DA.

[0076] The layers from the pixel electrode 21 to the counter electrode 23 formed in the display area DA constitute an organic light emitting element. In an embodiment, the organic light emitting element is an organic light emitting diode OLED.

[0077] The upper layer 50 includes an organic material and is disposed on the opposite electrode 23. The upper layer 50 protects the opposite electrode 23 and increases the light extraction efficiency. The upper layer 50 includes an organic material having a refractive index higher than that of the opposite electrode 23. In an embodiment, the upper layer 50 includes stacked layers having refractive indices different from each other. For example, the upper layer 50 includes a high refractive index layer, a low refractive index layer, and a high refractive index layer stacked in sequence. For example, the refractive index of the high refractive index layer is 1.7 or greater, and the refractive index of the low refractive index layer is 1.3 or less.

[0078] The upper layer 50 also includes LiF. In an embodiment, the upper layer 50 also includes silicon oxide (SiO 2 ) or silicon nitride (SiN x ) of an inorganic insulating material. In an embodiment, the upper layer 50 is omitted when necessary. However, for convenience of explanation, an embodiment in which the upper layer 50 is disposed on the opposite electrode 23 is described in detail.

[0079] The display panel 1 includes an encapsulation member shielding the upper layer 50. For example, the encapsulation member includes an encapsulation layer 60 shielding the upper layer 50.

[0080] The encapsulation layer 60 is in direct contact with the upper layer 50. The encapsulation layer 60 covers a portion of the display area DA and the peripheral area PA and prevents the penetration of external moisture and / or oxygen. The encapsulation layer 60 includes at least one organic encapsulation layer and at least one inorganic encapsulation layer. For ease of explanation, an embodiment in which the encapsulation layer 60 includes a first inorganic encapsulation layer 61, an organic encapsulation layer 62, and a second inorganic encapsulation layer 63 sequentially stacked on the upper layer 50 is described in detail.

[0081] For example, the first inorganic encapsulation layer 61 covers the upper layer 50 and includes at least one of silicon oxide, silicon nitride and silicon oxynitride. Because the first inorganic encapsulation layer 61 conforms to the structure below it, the upper surface of the first inorganic encapsulation layer 61 may not be flat. The organic encapsulation layer 62 covers the first inorganic encapsulation layer 61. Unlike the first inorganic encapsulation layer 61, the upper surface of the organic encapsulation layer 62 is substantially flat. For example, the organic encapsulation layer 62 has a substantially flat upper surface in the display area DA. The organic encapsulation layer 62 includes at least one of polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyimide, polysulfonate, polyoxymethylene, polyarylate and HMDSO. The second inorganic encapsulation layer 63 covers the organic encapsulation layer 62 and includes at least one of silicon oxide, silicon nitride and silicon oxynitride.

[0082] Figures 3 to 5 According to the implementation method Figure 2 A circuit diagram of the display panel 1 is shown in FIG.

[0083] refer to Figures 3 to 5 In an embodiment, the pixel circuit PC is connected to the light emitting element to control the emission of light from the pixel PX. For example, the light emitting element includes Figure 2 The pixel circuit PC includes a driving thin film transistor T1, a switching thin film transistor T2 and a storage capacitor Cst. The switching thin film transistor T2 is connected to the scan line SL and the data line DL, and transmits the data signal Dm received through the data line DL to the driving thin film transistor T1 in response to the scan signal Sn received through the scan line SL.

[0084] The storage capacitor Cst is connected to the switching thin film transistor T2 and the driving voltage line PL, and stores a voltage corresponding to a difference between a voltage received from the switching thin film transistor T2 and a driving voltage ELVDD received through the driving voltage line PL.

[0085] The driving thin film transistor T1 is connected to the driving voltage line PL and the storage capacitor Cst, and controls the driving current flowing from the driving voltage line PL to the light emitting element according to the voltage value stored in the storage capacitor Cst. The light emitting element emits light with brightness according to the driving current.

[0086] although Figure 3 It is shown that the pixel circuit PC includes two thin film transistors and one storage capacitor, but the present disclosure is not limited thereto.

[0087] refer to Figure 4 In an embodiment, the pixel circuit PC includes a driving thin film transistor T1, a switching thin film transistor T2, a compensation thin film transistor T3, a first initialization thin film transistor T4, an operation control thin film transistor T5, an emission control thin film transistor T6, a second initialization thin film transistor T7 and a storage capacitor Cst.

[0088] although Figure 4 An embodiment in which signal lines SL, SL-1, SL+1, EL, and DL, an initialization voltage line VL, and a drive voltage line PL are provided for each pixel circuit PC is shown, but the embodiments of the present disclosure are not necessarily limited thereto. In another embodiment, at least one of the initialization voltage line VL and / or the signal lines SL, SL-1, SL+1, EL, and DL is shared by adjacent pixel circuits.

[0089] The drain electrode of the driving thin film transistor T1 is electrically connected to the light emitting element via the emission control thin film transistor T6. The driving thin film transistor T1 receives the data signal Dm according to the switching operation of the switching thin film transistor T2, and provides a driving current to the light emitting element.

[0090] The gate electrode of the switching thin film transistor T2 is connected to the scan line SL, and the source electrode of the switching thin film transistor T2 is connected to the data line DL. The drain electrode of the switching thin film transistor T2 is connected to the source electrode of the driving thin film transistor T1 and is connected to the driving voltage line PL via the operation control thin film transistor T5.

[0091] The switching thin film transistor T2 is turned on in response to the scan signal Sn received through the scan line SL, and performs a switching operation of transmitting the data signal Dm from the data line DL to the source electrode of the driving thin film transistor T1 .

[0092] The gate electrode of the compensation thin film transistor T3 is connected to the scan line SL. The source electrode of the compensation thin film transistor T3 is connected to the drain electrode of the driving thin film transistor T1, and is connected to the pixel electrode 21 of the light emitting element via the emission control thin film transistor T6. The drain electrode of the compensation thin film transistor T3 is connected to one electrode of the storage capacitor Cst, the source electrode of the first initialization thin film transistor T4, and the gate electrode of the driving thin film transistor T1. The compensation thin film transistor T3 is turned on in response to the scan signal Sn received through the scan line SL, and connects the gate electrode of the driving thin film transistor T1 to the drain electrode of the driving thin film transistor T1. Therefore, the driving thin film transistor T1 can be diode-connected.

[0093] The gate electrode of the first initialization thin film transistor T4 is connected to the previous scan line SL-1. The drain electrode of the first initialization thin film transistor T4 is connected to the initialization voltage line VL. The source electrode of the first initialization thin film transistor T4 is connected to one electrode of the storage capacitor Cst, the drain electrode of the compensation thin film transistor T3, and the gate electrode of the driving thin film transistor T1. The first initialization thin film transistor T4 is turned on in response to the previous scan signal Sn-1 received through the previous scan line SL-1, and performs an initialization operation of transmitting the initialization voltage Vint to the driving thin film transistor T1 to initialize the voltage of the driving gate of the driving thin film transistor T1.

[0094] The gate electrode of the operation control thin film transistor T5 is connected to the emission control line EL. The source electrode of the operation control thin film transistor T5 is connected to the driving voltage line PL. The drain electrode of the operation control thin film transistor T5 is connected to the source electrode of the driving thin film transistor T1 and the drain electrode of the switching thin film transistor T2.

[0095] The gate electrode of the emission control thin film transistor T6 is connected to the emission control line EL. The source electrode of the emission control thin film transistor T6 is connected to the drain electrode of the driving thin film transistor T1 and the source electrode of the compensation thin film transistor T3. The drain electrode of the emission control thin film transistor T6 is electrically connected to the pixel electrode 21 of the light emitting element. The operation control thin film transistor T5 and the emission control thin film transistor T6 are simultaneously turned on in response to the emission control signal En received through the emission control line EL, and the driving voltage ELVDD is transmitted to the light emitting element, so that the driving current flows to the light emitting element.

[0096] The gate electrode of the second initialization thin film transistor T7 is connected to the next scan line SL+1. The source electrode of the second initialization thin film transistor T7 is connected to the pixel electrode 21 of the light emitting element. The drain electrode of the second initialization thin film transistor T7 is connected to the initialization voltage line VL. The second initialization thin film transistor T7 is turned on in response to the next scan signal Sn+1 received through the next scan line SL+1, and initializes the pixel electrode 21 of the light emitting element.

[0097] although Figure 4 The first initialization thin film transistor T4 and the second initialization thin film transistor T7 are shown to be connected to the previous scan line SL-1 and the next scan line SL+1, respectively, but the embodiments of the present disclosure are not necessarily limited thereto. In another embodiment, both the first initialization thin film transistor T4 and the second initialization thin film transistor T7 are connected to the previous scan line SL-1 and are driven in response to the previous scan signal Sn-1.

[0098] The other electrode of the storage capacitor Cst is connected to the driving voltage line PL. One electrode of the storage capacitor Cst is connected to the gate electrode of the driving thin film transistor T1, the drain electrode of the compensation thin film transistor T3, and the source electrode of the first initialization thin film transistor T4.

[0099] The opposite electrode 23 (such as a cathode) of the light emitting element receives the common voltage ELVSS. The light emitting element emits light by receiving the driving current from the driving thin film transistor T1.

[0100] refer to Figure 5 , in an embodiment, the pixel circuit PC includes a first transistor T1 to a fifth transistor T5 and a first capacitor C1 and a second capacitor C2. The first transistor T1 is a driving transistor in which the amount of source-drain current is determined according to the gate-source voltage, and the second transistor T2 to the fifth transistor T5 are each a switching transistor that can be turned on or off according to the gate-source voltage (such as a gate voltage). The first transistor T1 to the fifth transistor T5 are each implemented as a thin film transistor. Depending on the type (p-type or n-type) and / or operating conditions of each transistor, the first terminal of each of the first transistor T1 to the fifth transistor T5 is a source or a drain, and its second terminal is different from the first terminal. For example, when the first terminal is a source, the second terminal is a drain.

[0101] The driving voltage line PL transmits the driving voltage ELVDD to the first transistor T1. The initialization voltage line VL transmits the initialization voltage Vint to the organic light emitting diode OLED. The reference voltage line VRL transmits the reference voltage VREF to the gate of the first transistor T1.

[0102] Each of the first transistor T1 to the fifth transistor T5 includes an oxide semiconductor. Because the oxide semiconductor has high carrier mobility and low leakage current, the voltage drop is not large even when the driving time is long. For example, low-frequency driving is possible for oxide semiconductors because the color change of the image according to the voltage drop is not large even during low-frequency driving. Because each of the first transistor T1 to the fifth transistor T5 includes an oxide semiconductor, a display device that prevents leakage current and reduces power consumption can be realized. In addition, by using an oxide semiconductor transistor, it is not necessary to perform a crystallization process using excimer laser annealing (ELA) to form a low-temperature polycrystalline silicon (LTPS) semiconductor transistor. Therefore, the manufacturing cost of the display panel is reduced, and a large-area display device can be realized.

[0103] Because the oxide semiconductor is sensitive to light, the amount of current, etc. may change due to external light. Therefore, external light is absorbed or reflected by arranging a metal layer under the oxide semiconductor. The metal layer under the oxide semiconductor of each of the first transistor T1 to the fifth transistor T5 is used as a lower gate such as a gate electrode. For example, each of the first transistor T1 to the fifth transistor T5 is a double-gate transistor having two gates (a first gate and a second gate). The first gate and the second gate are arranged on different layers and face each other. For example, each of the first transistor T1 to the fifth transistor T5 is an N-channel oxide semiconductor transistor, and the first gate and the second gate of each of the first transistor T1 to the fifth transistor T5 face each other, and the oxide semiconductor is between the first gate and the second gate.

[0104] The first transistor T1 includes a first gate connected to the first node N1, a second gate connected to the third node N3, a first terminal connected to the second node N2, and a second terminal connected to the third node N3. The second gate of the first transistor T1 is connected to the second terminal of the first transistor T1 and is controlled by a voltage applied to the second terminal of the first transistor T1, and increases the output saturation characteristic of the first transistor T1. The first terminal of the first transistor T1 is connected to the driving voltage line PL via the fifth transistor T5, and the second terminal of the first transistor T1 is connected to the pixel electrode 21 of the organic light emitting diode OLED. The first transistor T1 used as a driving transistor receives the data signal Dm according to the switching operation of the second transistor T2, and controls the amount of driving current flowing to the organic light emitting diode OLED.

[0105] The second transistor T2 used as a data write transistor includes a first gate and a second gate connected to the first scan line GWL, a first terminal connected to the data line DL, and a second terminal connected to the first node N1 or the gate of the first transistor T1. The second transistor T2 is turned on in response to the first scan signal GW received through the first scan line GWL, and electrically connects the data line DL to the first node N1, so that the data signal Dm received through the data line DL is transmitted to the first node N1.

[0106] The third transistor T3 used as the first initialization transistor includes a first gate and a second gate connected to the third scan line GRL, a first terminal connected to the reference voltage line VRL, and a second terminal connected to the first node N1 or the gate of the first transistor T1. The third transistor T3 is turned on in response to the third scan signal GR received through the third scan line GRL, and transmits the reference voltage VREF received through the reference voltage line VRL to the first node N1.

[0107] The fourth transistor T4 serving as the second initialization transistor includes a first gate and a second gate connected to the second scan line GIL, a first terminal connected to the third node N3 or the second terminal of the first transistor T1, and a second terminal connected to the initialization voltage line VL. The fourth transistor T4 is turned on in response to the second scan signal GI received through the second scan line GIL, and transmits the initialization voltage Vint received through the initialization voltage line VL to the third node N3.

[0108] The fifth transistor T5 used as an emission control transistor includes a first gate and a second gate connected to the emission control line EL, a first terminal connected to the driving voltage line PL, and a second terminal connected to the second node N2 or the first terminal of the first transistor T1. The fifth transistor T5 is turned on or off in response to an emission control signal En received through the emission control line EL.

[0109] The first capacitor C1 is connected between the first node N1 and the third node N3. The first terminal of the first capacitor C1 is connected to the first gate of the first transistor T1, and the second terminal of the first capacitor C1 is connected to the second gate and the second terminal of the first transistor T1, the first terminal of the fourth transistor T4, and the pixel electrode 21 of the organic light emitting diode OLED. The first capacitor C1, which functions as a storage capacitor, stores a voltage corresponding to the data signal Dm and a threshold voltage of the first transistor T1.

[0110] The second capacitor C2 is connected between the third node N3 and the driving voltage line PL. The first terminal of the second capacitor C2 is connected to the driving voltage line PL, and the second terminal of the second capacitor C2 is connected to the second gate and the second terminal of the first transistor T1, the second terminal of the first capacitor C1, the first terminal of the fourth transistor T4, and the pixel electrode 21 of the organic light emitting diode OLED. The capacitance of the first capacitor C1 is greater than the capacitance of the second capacitor C2.

[0111] The organic light emitting diode OLED includes a pixel electrode 21 (anode) and an opposite electrode 23 (cathode) facing the pixel electrode 21, and the opposite electrode 23 receives a common voltage ELVSS.

[0112] The pixel circuit PC is not necessarily limited to the reference Figures 3 to 5 The number and circuit design of thin film transistors and storage capacitors are described, and the number and circuit design of thin film transistors and storage capacitors may be variously modified in other embodiments.

[0113] Figure 6 is a schematic cross-sectional view of a display device DP according to an embodiment, and Figure 7 is a schematic plan view of a display device DP according to an embodiment.

[0114] Specifically, Figure 6 A state before the bendable area BA of the substrate 10b is bent is shown.

[0115] exist Figure 6 and Figure 7 In, with Figure 2 The same reference numerals as those in the drawings denote the same components, and their redundant descriptions may be omitted.

[0116] refer to Figure 6 and Figure 7 In an embodiment, the display device DP includes a display panel 1, an optical functional layer POL, a cover member CV, a first circuit board 41, a second circuit board 51, a reinforcing portion ST, a display driver 52, a protective member 80, and a fixing portion FP. The fixing portion FP will be referred to below. Fig. 9 describe.

[0117] The display panel 1 includes a substrate 10 b , a support substrate 10 a , a display portion ELS, an encapsulation layer 60 , a touch electrode layer TS, and a bending protection layer BPL.

[0118] The substrate 10b includes a first region 1A, a second region 2A and a bendable region BA. The first region 1A and the second region 2A are spaced apart from each other. The bendable region BA connects the first region 1A to the second region 2A. For example, the first region 1A, the bendable region BA and the second region 2A are arranged sequentially in a second direction (such as a Y-axis direction). The bendable region BA is bendable. In an embodiment, the first region 1A, the second region 2A and the bendable region BA of the substrate 10b are all bendable. In an embodiment, only the bendable region BA of the substrate 10b is partially bendable. For example, the bending axis extends in a first direction (such as an X-axis direction) intersecting with a second direction (such as a Y-axis direction).

[0119] The support substrate 10a is disposed below the substrate 10b and supports the substrate 10b. The support substrate 10a includes a first support substrate 10a-1, a second support substrate 10a-2, and an opening 10a-3. The first support substrate 10a-1 is disposed below the first area 1A and supports the first area 1A of the substrate 10b. The second support substrate 10a-2 is disposed below the second area 2A and supports the second area 2A of the substrate 10b. The opening 10a-3 overlaps with the bendable area BA of the substrate 10b. Due to the opening 10a-3 of the support substrate 10a, the display device DP can be easily bent in the bendable area BA without being damaged.

[0120] The display part ELS is disposed on the substrate 10b. For example, the display part ELS is disposed in the first area 1A of the substrate 10b. The encapsulation layer 60 is disposed on the display part ELS. The encapsulation layer 60 is disposed on the substrate 10b and shields the display part ELS. The touch electrode layer TS includes an electrode pattern. The touch electrode layer TS may be disposed on the encapsulation layer 60 in the form of a panel, or may be an electrode pattern stacked on the encapsulation layer 60. The touch electrode layer TS obtains coordinate information according to an external input such as a touch event.

[0121] The bending protection layer BPL is disposed on the substrate 10b and includes a flexible material. For example, the bending protection layer BPL is disposed in the bendable area BA of the substrate 10b. The bending protection layer BPL can be bent as the substrate 10b is bent in the bendable area BA. When the substrate 10b is bent, the bending protection layer BPL prevents the substrate 10b from being damaged. The bending protection layer BPL includes a polymer resin such as polyethylene terephthalate (PET) or polyimide (PI).

[0122] The optical function layer POL is disposed on the touch electrode layer TS. The optical function layer POL reduces the reflectivity of external incident light from the display device DP, and / or improves the color purity of light emitted from the display device DP. In an embodiment, the optical function layer POL includes a retarder and a polarizer. The retarder may be a thin film type retarder or a liquid crystal coating type retarder, and may include a λ / 2 retarder and / or a λ / 4 retarder. The polarizer may be a film type polarizer or a liquid crystal coating type polarizer. The film type retarder or polarizer includes a stretched synthetic resin film, and the liquid crystal coating type retarder or polarizer includes liquid crystals arranged in an array. Each of the retarder and the polarizer may also include a protective film.

[0123] The cover member CV is provided on the optical function layer POL. The cover member CV is, for example, an ultra-thin glass Or colorless polyimide (CPI). The cover member CV protects the display panel 1 .

[0124] The first circuit board 41 is connected to the second region 2A of the substrate 10b and includes a flexible film. The first circuit board 41 overlaps the second region 2A of the substrate 10b and includes a flexible material. In an embodiment, the first circuit board 41 is bonded to the top surface of the substrate 10b by using an anisotropic conductive film. In an embodiment, the first circuit board 41 is bonded to the top surface of the substrate 10b by an adhesive. The top surface of the substrate 10b faces a direction away from the supporting substrate 10a.

[0125] The second circuit board 51 is connected to the first circuit board 41. The second circuit board 51 may be an easily bendable flexible printed circuit board (FPCB), a rigid printed circuit board (PCB) that is rigid and thus substantially inflexible, or a composite PCB including both a rigid PCB and an FPCB.

[0126] The first circuit board 41 overlaps with the second circuit board 51. In an embodiment, the second circuit board 51 is bonded to the top surface of the first circuit board 41 by using an anisotropic conductive film. In an embodiment, the second circuit board 51 is bonded to the top surface of the first circuit board 41 by an adhesive. However, embodiments of the present disclosure are not necessarily limited thereto. In an embodiment, the second circuit board 51 is bonded to the bottom surface of the first circuit board 41. The top surface of the first circuit board 41 includes a surface facing in a direction away from the support substrate 10a, and the bottom surface of the first circuit board 41 includes a surface facing in a direction toward the support substrate 10a.

[0127] In addition, the touch sensor driver may be bonded to the first circuit board 41 or the second circuit board 51. The touch sensor driver is implemented as an integrated circuit (IC). The touch sensor driver is electrically connected to a touch electrode layer to be described below.

[0128] The power supply is additionally provided on the first circuit board 41 or the second circuit board 51. The power supply provides a driving voltage for driving pixels, a scan driver, and / or a display driver 52 to be described below. The power supply may be provided integrally with the display driver 52. For example, the power supply and the display driver 52 are implemented as a single IC.

[0129] In addition, one of the first circuit board 41 and the second circuit board 51 is electrically connected to the main circuit board. The main circuit board includes a main processor including a central processing unit (CPU), a graphics processing unit (GPU), a memory, a communication chip, a digital signal processor (DSP), an image signal processor (ISP), and various types of interfaces. For example, the main processor includes an application processor (AP). For example, the first circuit board 41 is electrically connected to the second circuit board 51, and the second circuit board 51 is electrically connected to the main circuit board, and therefore, the first circuit board 41 is electrically connected to the main circuit board.

[0130] The reinforcing portion ST connects the second region 2A of the substrate 10b to the second circuit board 51 and covers the first circuit board 41. The reinforcing portion ST overlaps the first circuit board 41. The reinforcing portion ST is rigid. For example, the reinforcing portion ST includes at least one of stainless steel (SUS), PET, graphite, and copper (CU) materials.

[0131] One side of the reinforcing portion ST is fixed to the second region 2A of the substrate 10b, and the other side of the reinforcing portion ST is fixed to the second circuit board 51. In an embodiment, the reinforcing portion ST is bonded to the top surface of the second region 2A of the substrate 10b by using an anisotropic conductive film. In an embodiment, the reinforcing portion ST is bonded to the top surface of the second region 2A of the substrate 10b by an adhesive. Furthermore, in an embodiment, the reinforcing portion ST is bonded to the top surface of the second circuit board 51 by using an anisotropic conductive film. In an embodiment, the reinforcing portion ST is bonded to the top surface of the second circuit board 51 by an adhesive. The top surface of the second region 2A of the substrate 10b includes a surface facing in a direction away from the supporting substrate 10a, and the top surface of the second circuit board 51 includes a surface facing in a direction away from the first circuit board 41.

[0132] The reinforcing portion ST is spaced apart from the first circuit board 41. For example, the cross-sectional shape of the reinforcing portion ST has shape, and each end of the reinforcing portion ST is respectively connected to the second region 2A of the substrate 10b and the second circuit board 51. Therefore, the reinforcing portion ST protects the first circuit board 41 from external impacts, etc., and ensures space for various components provided on the first circuit board 41.

[0133] The display driver 52 receives the control signal and the power supply voltage, and generates and outputs a signal and a voltage that drives the display panel 1. For example, the display driver 52 is implemented as an IC. For example, the display driver 52 is provided on the first circuit board 41. For example, the display driver 52 is located between the first circuit board 41 and the reinforcing portion ST and is connected to the first circuit board 41. However, the embodiment is not necessarily limited thereto, and in the embodiment, two display drivers 52 are provided on the top surface and the bottom surface of the first circuit board 41, respectively.

[0134] The protective member 80 is disposed below the support substrate 10a. For example, the protective member 80 is bonded to the bottom surface of the first support substrate 10a-1. The protective member 80 absorbs external impacts and reduces damage to the display panel 1. The protective member 80 may have a single-layer structure or a multi-layer structure. In an embodiment, the protective member 80 includes a copper material. In an embodiment, the protective member 80 includes at least one of polydimethylsiloxane (PDMS), thermoplastic polyurethane (TPU) and PET, or includes an elastic material such as a sponge foamed and molded by rubber, a urethane-based material or an acryl-based material.

[0135] Figure 8 is a schematic cross-sectional view of a display device DP according to an embodiment.

[0136] For example, Figure 8A state of the display device DP is shown after the bendable area BA of the substrate 10b is bent.

[0137] exist Figure 8 In, with Figure 6 and Figure 7 The same reference numerals as those in the drawings denote the same components, and their redundant descriptions may be omitted.

[0138] refer to Figure 8 In an embodiment, when the bendable area BA of the substrate 10b is in a bent state, the protection member 80 is located between the first support substrate 10a-1 and the second support substrate 10a-2. When the substrate 10b is bent, the bending protection layer BPL is also bent, and the second support substrate 10a-2 is fixed to the protection member 80. For example, both the first support substrate 10a-1 and the second support substrate 10a-2 are bonded to the protection member 80. In addition, when the bendable area BA of the substrate 10b is in a bent state, the first circuit board 41 is fixed to the protection member 80.

[0139] Fig. 9 is a schematic cross-sectional view of a fixing portion FP according to an embodiment.

[0140] refer to Figures 6 to 9 In an embodiment, the fixing portion FP is fixed to the reinforcing portion ST in a process of bending the substrate 10b. The fixing portion FP includes an adsorption portion FP1 and a frame portion FP2. The adsorption portion FP1 includes a vacuum suction cup and adsorbs the reinforcing portion ST. For example, the adsorption portion FP1 and the reinforcing portion ST are selectively fixed. A plurality of adsorption portions FP1 may be provided. The adsorption portion FP1 is fixed to the frame portion FP2. The frame portion FP2 supports the adsorption portion FP1. Therefore, the adsorption portions FP1 do not move relative to each other.

[0141] The fixing portion FP is fixed to one surface of the reinforcing portion ST. For example, one surface of the reinforcing portion ST includes a flat surface. For example, the surface of the reinforcing portion ST facing the direction away from the first circuit board 41 includes a flat surface. For example, the top surface of the reinforcing portion ST includes a flat surface, and the fixing portion FP is fixed to the top surface of the reinforcing portion ST. Therefore, the fixing portion FP is stably fixed to the reinforcing portion ST. Thereafter, by moving the fixing portion FP, the substrate 10b can be bent. When the bending of the substrate 10b is completed, the fixing portion FP is removed from the reinforcing portion ST.

[0142] Due to the arrangement of the reinforcing portion ST, a space for fixing the fixing portion FP can be ensured. Therefore, the substrate 10b can be stably bent, and the accuracy of the position where the substrate 10b is bent is improved.

[0143] According to one or more embodiments, a substrate may be stably bent, and the accuracy of a position at which the substrate is bent is improved.

[0144] The effects of the present disclosure are not limited to those described above, and other effects not mentioned herein will be clearly understood by those of ordinary skill in the art from the description of the claims.

[0145] It should be understood that the embodiments described herein should be considered only in a descriptive sense and not for limiting purposes. The description of features within each embodiment should generally be considered to be applicable to other similar features in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those of ordinary skill in the art that various changes in form and detail may be made therein without departing from the spirit and scope defined by the appended claims.

Claims

1. A display device, comprising: a substrate comprising a first region, a second region spaced apart from the first region, and a bendable region connecting the first region to the second region; a supporting substrate, disposed below the substrate and supporting the substrate; A display portion, disposed in the first region of the substrate; a first circuit board connected to the second region of the substrate and comprising a flexible film; a second circuit board connected to the first circuit board; as well as A rigid reinforcing portion connects the second region of the substrate to the second circuit board and covers the first circuit board.

2. The display device according to claim 1, wherein: The reinforcement portion is spaced apart from the first circuit board.

3. The display device according to claim 1, further comprising: A display driver is provided between the first circuit board and the reinforcing portion and is connected to the first circuit board.

4. The display device according to claim 1, wherein: The cross-sectional shape of the reinforcement portion has shape.

5. The display device according to claim 1, wherein: One surface of the reinforcement portion includes a flat surface.

6. The display device according to claim 1, wherein: One side of the reinforcing portion is fixed to the second region of the substrate, and The other side of the reinforcing portion is fixed to the second circuit board.

7. The display device according to claim 1, wherein: The reinforcement portion includes at least one of stainless steel, polyethylene terephthalate, graphite, and copper materials. 8 . The display device according to claim 1 , further comprising a bending protection layer disposed in the bendable region of the substrate.

9. The display device according to claim 1, wherein: The supporting substrate comprises: a first supporting substrate supporting the first region of the substrate; a second supporting substrate supporting the second region of the substrate; and An opening overlaps the bendable region of the substrate. 10 . The display device of claim 9 , further comprising a protection member disposed between the first support substrate and the second support substrate when the bendable region of the substrate is in a bent state.

11. A display device, comprising: Display panel; a first circuit board connected to the display panel and including a flexible film; a second circuit board connected to the first circuit board; as well as a rigid reinforcing portion, reinforcing the first circuit board, Wherein, the display panel comprises: a substrate including a first region, a second region spaced apart from the first region and connected to the first circuit board, and a bendable region connecting the first region to the second region; a support substrate disposed below the substrate and supporting the substrate; and A display portion is disposed in the first region of the substrate.

12. The display device according to claim 11, wherein: The reinforcement portion is spaced apart from the first circuit board.

13. The display device according to claim 11, further comprising: A display driver is provided between the first circuit board and the reinforcing portion and is connected to the first circuit board.

14. The display device according to claim 11, wherein: The cross-sectional shape of the reinforcement portion has shape.

15. The display device according to claim 11, wherein: One surface of the reinforcement portion includes a flat surface.

16. The display device according to claim 11, wherein: One side of the reinforcing portion is fixed to the second region of the substrate, and The other side of the reinforcing portion is fixed to the second circuit board.

17. The display device according to claim 11, wherein: The reinforcement portion includes at least one of stainless steel, polyethylene terephthalate, graphite, and copper materials.

18. The display device according to claim 11, further comprising: A bending protection layer is disposed in the bendable region of the substrate.

19. The display device according to claim 11, wherein: The supporting substrate comprises: a first supporting substrate supporting the first region of the substrate; a second supporting substrate supporting the second region of the substrate; and An opening overlaps the bendable region of the substrate. 20 . The display device of claim 19 , further comprising a protection member disposed between the first support substrate and the second support substrate when the bendable region of the substrate is in a bent state.

21. A display device, comprising: a substrate comprising a first region, a second region spaced apart from the first region, and a bendable region connecting the first region to the second region; a first circuit board connected to the second region of the substrate and comprising a flexible film; a second circuit board connected to the first circuit board; as well as a rigid reinforcing portion connecting the second area of ​​the substrate to the second circuit board and covering the first circuit board, wherein one side of the reinforcing portion is fixed to the second region of the substrate, and The other side of the reinforcing portion is fixed to the second circuit board.

22. The display device according to claim 21, further comprising: a supporting substrate, disposed below the substrate and supporting the substrate; a bending protection layer, disposed in the bendable region of the substrate; as well as A display portion is provided in the first region of the substrate, Wherein, the supporting substrate comprises: a first supporting substrate supporting the first region of the substrate; a second supporting substrate supporting the second region of the substrate; and An opening overlaps the bendable region of the substrate.

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