Layout correction method, storage medium and storage terminal

Abstract

A layout correction method, a storage medium and a storage terminal.The layout correction method comprises the steps that an initial layout is provided, the initial layout comprises a plurality of to-be-distributed graphs, and the extension direction of the to-be-distributed graphs is parallel to a first direction; according to a graph distribution rule, the to-be-distributed graphs are divided into first graphs and second graphs, and the first graphs and the second graphs are located in different layouts respectively; according to the first graph and the second graph, acquiring conflict graphs in each layout; segmenting the conflict graph to obtain a plurality of segmentation units distributed along a first direction; a conflict area and a non-conflict area are obtained, the conflict area is an area which does not meet the graph distribution rule in the conflict graph, and the segmentation units in the conflict area are redistributed, so that the conflict area and the non-conflict area are located in different layouts. According to the method, the graph distribution result is more accurate, and the yield is effectively improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a layout correction method, a storage medium and a storage terminal. Background Art

[0002] In advanced technology nodes, the fin cutting layer is used to cut dummy fins to achieve the final design. Generally speaking, the fin cutting layer is generated by the factory according to its own process and must be photolithography process friendly.

[0003] In smaller and smaller nodes, the generation and patterning of the fin cut layer becomes more difficult. Summary of the invention

[0004] The technical problem solved by the present invention is to provide a layout correction method, a storage medium and a storage terminal to better generate a mask layer suitable for fin cutting.

[0005] To solve the above technical problems, the technical solution of the present invention provides a layout correction method, including: providing an initial layout, the initial layout including a number of graphics to be allocated, and the extension directions of the number of graphics to be allocated are parallel to a first direction; according to a graphic allocation rule, the number of graphics to be allocated are divided into a first graphic and a second graphic, and the first graphic and the second graphic are respectively located in different layouts; according to the first graphic and the second graphic, a conflicting graphic in each layout is obtained; the conflicting graphic is segmented to obtain a number of segmentation units distributed along the first direction; a conflicting area and a non-conflicting area are obtained, the conflicting area is an area in the conflicting graphic that does not meet the graphic allocation rule, and the segmentation units in the conflicting area are reallocated so that the conflicting area and the non-conflicting area are located in different layouts.

[0006] Optionally, the graphic allocation rules include: a first rule, a second rule and a third rule; the first rule includes: when the width of the graphic to be allocated in the second direction is less than or equal to a preset value, the graphic to be allocated needs to be allocated to a specific layout, and no subsequent reallocation is performed, and the second direction is perpendicular to the first direction; the second rule includes: when the spacing between two adjacent graphics to be allocated in the second direction is less than or equal to a preset value, the adjacent graphics to be allocated need to be allocated to different layouts; the third rule includes: the width of the graphic to be allocated in the second direction is within a preset range.

[0007] Optionally, the first graphic is located in a first layout, and the second graphic is located in a second layout; based on the first graphic and the second graphic, obtaining conflicting graphics in each layout, including: according to a graphic allocation rule, checking the first graphic located in the first layout to obtain a conflicting graphic, wherein the conflicting graphic is the first graphic in the first layout that does not satisfy the graphic allocation rule; according to the graphic allocation rule, checking the second graphic located in the second layout to obtain a conflicting graphic, wherein the conflicting graphic is the second graphic in the second layout that does not satisfy the graphic allocation rule.

[0008] Optionally, when the conflicting graph does not satisfy the third rule, before the conflicting graph is segmented, the method further includes: splitting the conflicting graph along the second direction to obtain two independent sub-graphs; allocating the two sub-graphs to different layouts; after allocating the two sub-graphs to different layouts, reacquiring the conflicting graph based on the first graph, the second graph and the sub-graphs.

[0009] Optionally, after the conflicting segmentation units are reallocated, the method further includes: continuing to obtain conflicting graphics; segmenting the conflicting graphics to obtain a number of segmentation units distributed along a first direction; obtaining conflicting areas and non-conflicting areas, and reallocating the segmentation units in the conflicting areas so that the conflicting areas and the non-conflicting areas are located in different layouts, until the first graphics and the second graphics in each layout satisfy the graphics allocation rule.

[0010] Optionally, segmenting the conflicting graph includes: segmenting the conflicting graph to obtain a plurality of segmenting units distributed along a first direction, wherein a size of the segmenting unit in the first direction is a preset minimum size.

[0011] Optionally, the method further includes: extending the conflicting area and the non-conflicting area along the first direction so that the conflicting area and the non-conflicting area have a partial overlapping area at the junction.

[0012] Optionally, the length by which the conflicting area and the non-conflicting area are extended along the first direction is half of a preset minimum size.

[0013] Correspondingly, the technical solution of the present invention also provides a storage medium on which computer instructions are stored, and the steps of the above method are executed when the computer instructions are executed.

[0014] Correspondingly, the technical solution of the present invention also provides a storage terminal, including a memory and a processor, wherein the memory stores computer instructions that can be executed on the processor, and the processor executes the steps of the above method when executing the computer instructions.

[0015] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0016] The layout correction method of the present invention divides the conflicting graphics to obtain a number of dividing units, and only reallocates the dividing units in the conflicting area, so that the conflicting area and the non-conflicting area are located in different layouts. This method of only reallocating the local area of ​​the conflicting graphics makes the graphics splitting more free, can be applied to the allocation of various graphics, and can effectively reduce the weak areas caused by the graphics splitting, so that the graphics allocation results are more accurate, and the yield is effectively improved.

[0017] Further, the conflict graph is segmented to obtain a plurality of segmentation units distributed along a first direction, wherein the size of the segmentation unit in the first direction is a preset minimum size. The size of the conflict graph in the first direction is an integer multiple of the preset minimum size, and the conflict graph is segmented with the preset minimum size, so as to facilitate the segmentation operation so as to divide the conflict graph into a plurality of segmentation units.

[0018] Furthermore, the conflicting area and the non-conflicting area are extended along the first direction so that the conflicting area and the non-conflicting area have a partial overlapping area at the junction. This ensures that when the conflicting area and the non-conflicting area split into different layouts subsequently form a mask layer to act on the area of ​​the original conflicting pattern, there will be no process problems caused by the splitting of the entire pattern, such as incomplete etching and residues. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 and Figure 2 is a schematic diagram of a semiconductor structure in one embodiment;

[0020] Figures 3 to 5 is a schematic diagram of layout correction in one embodiment;

[0021] Figure 6 is a schematic flow chart of a layout correction method in an embodiment of the present invention;

[0022] Figures 7 to 12 It is a schematic diagram of layout correction in an embodiment of the present invention. DETAILED DESCRIPTION

[0023] As described in the background art, the generation and patterning of the fin cutting layer becomes more difficult. Now, an analysis and description will be given in conjunction with a specific embodiment.

[0024] Figure 1 and Figure 2 is a schematic diagram of a semiconductor structure in one embodiment.

[0025] Please refer to Figure 1 , providing a substrate, the substrate including an active area 100; forming a plurality of fin structures 101 located on the substrate, the fin structures 101 being parallel to a first direction X, and the fin structures 101 located outside the active area 100 being dummy fin structures.

[0026] Please refer to Figure 2 , forming a first mask layer on the substrate, the first mask layer is used to remove the pseudo fin structure adjacent to the edge of the active area 100 parallel to the first direction X; forming a second mask layer on the substrate, the second mask layer is used to remove the remaining pseudo fin structure other than the pseudo fin structure removed by the first mask layer.

[0027] As the technology nodes become smaller and smaller, the first mask layer removes the pseudo fin structure adjacent to the edge of the active area 100 parallel to the first direction X. The first mask layer has higher dimensional accuracy and smaller size. Therefore, two different mask plates are required to form the first mask layer and the second mask layer. The first mask plate has a first pattern 102 for forming the first mask layer, and the second mask plate has a second pattern 103 for forming the second mask layer.

[0028] Usually, the first graphic and the second graphic are designed on a design layout first, and then the first graphic and the second graphic are assigned to different mask layouts according to the graphic assignment rules. The graphics in different mask layouts also need to meet the graphic assignment rules. However, as the complexity of the graphics increases and the size of the graphics becomes smaller, the graphics assigned to different mask layouts cannot fully meet the graphic assignment rules. For the specific process, please refer to Figures 3 to 5 .

[0029] Figures 3 to 5 It is a schematic diagram of a layout correction process in one embodiment.

[0030] Please refer to Figure 3 , providing an initial layout, the initial layout comprising a number of graphics to be allocated, the extension directions of the number of graphics to be allocated being parallel to the first direction X; according to a graphic allocation rule, the number of graphics to be allocated are divided into a first graphic and a second graphic, the first graphic and the second graphic are respectively located in different layouts.

[0031] Figure 3 Schematically shows a number of active areas 200 corresponding to the initial layout on the substrate, each active area 200 has a different width in the second direction Y, and the second direction Y is perpendicular to the first direction X. The pattern to be allocated is adjacent to the edges of the active areas 200 in the second direction Y.

[0032] Figure 3The first graphics schematically provided in the figure include: graphics 201, graphics 203, graphics 205, graphics 207, graphics 209, graphics 212, graphics 213 and graphics 215; the second graphics schematically provided include: graphics 202, graphics 204, graphics 206, graphics 208, graphics 210, graphics 211 and graphics 214. The first graphics and the second graphics are located in different layouts, the first graphics are located in the first layout, the second graphics are located in the second layout, and the first layout and the second layout are used to form different mask plates.

[0033] Please continue to refer to Figure 3 , the graphic allocation rules include: a first rule, a second rule and a third rule.

[0034] The first rule includes: when the width of the to-be-allocated pattern in the second direction Y is less than or equal to a preset value, the to-be-allocated pattern needs to be allocated to a specific layout, and no subsequent reallocation is performed. Figure 3 In the figure, the width of the pattern 202 and the pattern 214 in the second direction Y is small, which is smaller than the width of the remaining second patterns and the first pattern. Therefore, in the pattern allocation process, the pattern 202 and the pattern 214 need to be fixed in the second layout so that a mask with higher dimensional accuracy can be made later to expose the patterns of the pattern 202 and the pattern 214 on the photoresist to form a mask layer. After the pattern 202 and the pattern 214 are fixed in the second layout, they are not affected by the subsequent pattern allocation rules.

[0035] The second rule includes: when the distance between two adjacent to-be-allocated patterns in the second direction Y is less than or equal to a preset value, the adjacent to-be-allocated patterns need to be allocated to different layouts. Figure 3 There are several graphic pairs in the figure: graphic 202 and graphic 203, graphic 204 and graphic 205, graphic 205 and graphic 206, graphic 206 and graphic 207, graphic 208 and graphic 209, graphic 210 and graphic 212, graphic 214 and graphic 213. The spacing between the active areas 200 in the second direction Y between these graphic pairs is small, and the spacing is less than or equal to the preset value. Therefore, these graphic pairs need to be allocated to different first layouts and second layouts.

[0036] The third rule includes: the width of the pattern to be allocated in the second direction Y is within a preset range. That is, the pattern whose width exceeds the preset range is not allowed to appear in the layout. Figure 3There are several pairs of graphics: graphics 201 and graphics 202, graphics 203 and graphics 204, graphics 207 and graphics 208, graphics 211 and graphics 213, graphics 214 and graphics 215. The total width of these adjacent graphics in the second direction Y exceeds the preset range, so they need to be designed as two graphics allocated to different first and second layouts.

[0037] However, since the graphic 207 is relatively complex, the area A of the graphic 207 makes the graphic 207 in the first layout fail to meet the third rule in the graphic allocation rule, and the graphic 207 needs to be reallocated.

[0038] The process of reallocating the graphic 207 is as follows.

[0039] Please refer to Figure 4 , splitting the graphic 207 into connected graphics 216 and graphics 217, and assigning the graphics 216 and graphics 217 to different first and second layouts. As shown in the figure, the graphic 216 is assigned to the first layout, and the graphic 217 is assigned to the second layout.

[0040] However, graphic 217, graphic 206 and graphic 210 are all located in the second layout, and graphic 217, graphic 206 and graphic 210 violate the second rule in the graphic allocation rule. Graphic 217, graphic 206, graphic 217 and graphic 210 need to be allocated to different layouts.

[0041] Please refer to Figure 5 , graphics 206 and graphics 210 are allocated to a first layout different from graphics 217, and accordingly graphics 205, graphics 204, graphics 203, and graphics 212 all need to be reallocated. After reallocation, graphics 205, graphics 203, and graphics 212 are located in the second layout, and graphic 204 is located in the first layout.

[0042] However, since the graphic 202 is constrained by the first rule and is fixed in the second layout, the graphic 203 and the graphic 202 cannot satisfy the second rule in the graphic allocation rule.

[0043] Therefore, when the entire conflicting pattern is reallocated, there will always be some situations where the patterns on each layout cannot fully meet the pattern allocation rules, which affects the mask formed subsequently and further affects the removal accuracy of the dummy fin structure in the semiconductor structure.

[0044] In order to solve the above problems, the technical solution of the present invention provides a layout correction method, a storage medium and a storage terminal, which divides the conflicting graphics, obtains a number of dividing units, and only reallocates the dividing units of the conflicting area, so that the conflicting area and the non-conflicting area are located in different layouts. This method of only reallocating the local area of ​​the conflicting graphics makes the graphics splitting more free, can be applied to the allocation of various graphics, and can effectively reduce the weak areas caused by the graphics splitting, so that the graphics allocation results are more accurate, and the yield is effectively improved.

[0045] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0046] Figure 6 It is a flow chart of the layout correction method in an embodiment of the present invention.

[0047] Please refer to Figure 6 , the layout correction method comprises:

[0048] Step S10: providing an initial layout, wherein the initial layout includes a plurality of to-be-allocated patterns, and the extension directions of the plurality of to-be-allocated patterns are parallel to the first direction;

[0049] Step S20: dividing a plurality of graphics to be allocated into a first graphic and a second graphic according to a graphic allocation rule, wherein the first graphic and the second graphic are located in different layouts respectively;

[0050] Step S30: acquiring conflicting graphics in each layout according to the first graphic and the second graphic;

[0051] Step S40: Segment the conflict graph to obtain a number of segmentation units distributed along the first direction;

[0052] Step S50: obtaining a conflicting area and a non-conflicting area, wherein the conflicting area is an area in the conflicting graph that does not satisfy the graph allocation rule, and reallocating the segmentation units in the conflicting area so that the conflicting area and the non-conflicting area are located in different layouts.

[0053] The layout correction method divides the conflicting graphics to obtain a number of dividing units, and only reallocates the dividing units of the conflicting area, so that the conflicting area and the non-conflicting area are located in different layouts. This method of only reallocating the local area of ​​the conflicting graphics makes the graphics splitting more free, can be applied to the allocation of various graphics, and can effectively reduce the weak areas caused by the graphics splitting, so that the graphics allocation result is more accurate, and the yield is effectively improved.

[0054] Next, combine Figures 7 to 12 Each step is analyzed and explained. Figures 7 to 12 It is a schematic diagram of layout correction in an embodiment of the present invention.

[0055] Please combine Figure 7 Continue to refer Figure 6 , execute step S10: provide an initial layout, the initial layout includes a plurality of graphics to be allocated, and the extension direction of the plurality of graphics to be allocated is parallel to the first direction X; execute step S20: according to the graphic allocation rule, divide the plurality of graphics to be allocated into a first graphic and a second graphic, and the first graphic and the second graphic are respectively located in different layouts.

[0056] In this embodiment, the first graphic is located in a first layout, and the second graphic is located in a second layout. The first layout and the second layout are used to form different mask plates.

[0057] According to the graphic design rules, the size of the graphic in the first direction X needs to meet an integer multiple of a preset minimum size, and the size of the graphic in the second direction Y needs to meet an integer multiple of a preset minimum size. The preset minimum sizes in the first direction X and the second direction Y are different.

[0058] Specifically, in connection with the semiconductor structure, the minimum dimension preset in the first direction X is the contacted polysilicon gate pitch (contacted poly pitch, CPP for short), that is, the period of a gate, and the gate period is: the sum of the size of the gate in the first direction X and the spacing between adjacent gates; the minimum dimension preset in the second direction Y is the fin pitch (FP for short), the fin is parallel to the first direction X, and the fin pitch is: the sum of the size of the fin in the second direction Y and the spacing between adjacent fins.

[0059] The extension directions of the plurality of graphics to be allocated are parallel to the first direction X, and the sizes of the plurality of graphics to be allocated in the first direction X are integer multiples of the minimum size preset in the first direction X; the sizes of the plurality of graphics to be allocated in the second direction Y are integer multiples of the minimum size preset in the second direction Y.

[0060] Figure 7 Schematically shows a number of active areas 300 corresponding to the initial layout on the substrate, each active area 300 has a different width in the second direction Y, and the second direction Y is perpendicular to the first direction X. The pattern to be allocated is adjacent to the edges of the active areas 300 in the second direction Y.

[0061] In this embodiment, the graphic allocation rule includes: a first rule, a second rule and a third rule.

[0062] The first rule includes: when the width of the to-be-allocated graphic in the second direction Y is less than or equal to a preset value, the to-be-allocated graphic needs to be allocated to a specific layout and no subsequent reallocation is performed; the second rule includes: when the spacing between two adjacent to-be-allocated graphics in the second direction Y is less than or equal to a preset value, the adjacent to-be-allocated graphics need to be allocated to different layouts. The third rule includes: the width of the to-be-allocated graphic in the second direction Y is within a preset range, that is, graphics with a width exceeding the preset range are not allowed to appear in the layout. For a detailed description of the first rule, the second rule, and the third rule, please refer to Figure 3 The above is not repeated here.

[0063] Figure 7 The first graphic schematically given in the figure includes: graphic 301, graphic 303, graphic 305, graphic 307, graphic 309, graphic 312, graphic 313 and graphic 315; the second graphic schematically given includes: graphic 302, graphic 304, graphic 306, graphic 308, graphic 310, graphic 311 and graphic 314.

[0064] Please combine Figure 7 Continue to refer Figure 6 , execute step S30: obtain conflicting graphics in each layout according to the first graphic and the second graphic.

[0065] According to the first graphic and the second graphic, conflicting graphics in each layout are obtained, including: according to the graphic allocation rule, the first graphic located in the first layout is checked to obtain the conflicting graphic, wherein the conflicting graphic is the first graphic in the first layout that does not satisfy the graphic allocation rule; according to the graphic allocation rule, the second graphic located in the second layout is checked to obtain the conflicting graphic, wherein the conflicting graphic is the second graphic in the second layout that does not satisfy the graphic allocation rule.

[0066] In this embodiment, the graphic 307 in the first layout is a conflicting graphic, and the graphic 307 does not meet the third rule of the graphic allocation rule, that is, the width of the graphic 307 exceeds the preset range.

[0067] Please refer to Figure 8 When the conflicting graph does not satisfy the third rule, the conflicting graph is split along the second direction Y to obtain two independent sub-graphs. The two sub-graphs shown in the figure are: graph 316 and graph 317.

[0068] Please continue to refer to Figure 8 , assigning the two sub-graphs to different layouts. Figure 8 As shown in FIG. 3 , graphic 316 is allocated to the first layout, and graphic 317 is allocated to the second layout.

[0069] Please continue to refer to Figure 8,After assigning the two sub-graphs to different layouts, the conflicting graph is reacquired based on the first graph, the second graph and the sub-graph.

[0070] After assigning graphic 316 to the first layout and graphic 317 to the second layout, the conflicting graphics are retrieved. It can be seen that graphics 306, graphics 310 and graphics 317 are all located in the second layout. Graphics 317 and graphics 306 violate the second rule in the graphic allocation rules, and graphics 317 and graphics 310 violate the second rule in the graphic allocation rules. The conflicting graphics are graphics 306 and graphics 310.

[0071] Please continue to combine Figure 8 refer to Figure 6 , executing step S40: segmenting the conflict graph to obtain a plurality of segmentation units 320 distributed along the first direction X.

[0072] Slicing the conflicting graph includes: slicing the conflicting graph to obtain a plurality of slicing units 320 distributed along a first direction X, wherein the size of the slicing unit 320 in the first direction X is a preset minimum size.

[0073] In this embodiment, the size of the dividing unit 320 in the first direction X is the period size of a gate.

[0074] The size of the conflicting graph in the first direction X is an integral multiple of a preset minimum size, and the conflicting graph is segmented according to the preset minimum size, so as to facilitate the segmentation operation so as to divide the conflicting graph into a plurality of segmentation units 320 .

[0075] Figure 8 As shown in FIG. 3 , both the graph 306 and the graph 310 are divided into a plurality of division units 320 distributed along the first direction X. As shown in FIG.

[0076] Please combine Fig. 9 refer to Figure 6 , execute step S50: obtain the conflict area and the non-conflict area, the conflict area is the area in the conflict graph that does not meet the graph allocation rule, and reallocate the segmentation units in the conflict area so that the conflict area and the non-conflict area are located in different layouts.

[0077] Figure 8 In the figure, both the figure 306 and the figure 310 are conflicting areas, the figure 317 and the figure 306 violate the second rule in the figure allocation rule, and the figure 317 and the figure 310 violate the second rule in the figure allocation rule, so Fig. 9 Both the middle graphic 306 and the graphic 310 are reallocated to the first layout.

[0078] After the conflicting segmentation units are reallocated, the layout correction method further includes: continuing to obtain conflicting graphics; segmenting the conflicting graphics to obtain a number of segmentation units distributed along the first direction; obtaining conflicting areas and non-conflicting areas, and reallocating the segmentation units in the conflicting areas so that the conflicting areas and the non-conflicting areas are located in different layouts, until the first graphics and the second graphics in each layout meet the graphics allocation rule. Please refer to the process for details. Figures 10 to 12 .

[0079] Please refer to Fig.10 After graphics 306 and graphics 310 are reallocated to the first layout, the conflicting graphics are obtained as follows: graphics 305 and graphics 312, where graphics 305 and graphics 312 are located in the first layout, graphics 305 and graphics 306 do not satisfy the second rule in the graphics allocation rules, and graphics 310 and graphics 312 do not satisfy the second rule in the graphics allocation rules.

[0080] Please continue to refer to Fig.10 , segment the graph 305 and the graph 312 to obtain a plurality of segmentation units 320 distributed along the first direction X; and obtain a conflicting area and a non-conflicting area, wherein the conflicting area is an area in the conflicting graph that does not satisfy the graph allocation rule.

[0081] Graphics 312 are all conflicting areas, and graphics 310 and graphics 312 do not satisfy the second rule in the graphic allocation rule; graphic 305 includes conflicting area 321 and non-conflicting area 322, and conflicting area 321 and graphic 306 do not satisfy the second rule in the graphic allocation rule.

[0082] Please continue to refer to Fig.10 , the segmentation units in the conflict area are redistributed so that the conflict area and the non-conflict area are located in different layouts.

[0083] Graphics 312 are all conflicting areas, and all graphics 312 are allocated to the second layout; conflicting areas 321 of graphics 305 are allocated to the second layout, and non-conflicting areas 322 are still retained in the first layout.

[0084] Please continue to refer to Fig.10 , continue to obtain the conflicting graph: graph 304, graph 304 is located in the second layout, and the conflicting area 321 allocated to the second layout does not meet the second rule in the graph allocation rule; divide the graph 304 to obtain a plurality of dividing units 320 distributed along the first direction X.

[0085] Please refer to Fig.11, obtain the conflicting area 324 and the non-conflicting area 323, wherein the conflicting area 324 and the conflicting area 321 do not satisfy the second rule in the graphic allocation rule; allocate the conflicting area 324 to the first layout, and the non-conflicting area 323 is still retained in the first layout.

[0086] At this point, the graphics in the first layout and the second layout after reallocation all meet the graphic allocation rule.

[0087] In this embodiment, the layout correction method further includes: extending the conflicting area and the non-conflicting area along the first direction so that the conflicting area and the non-conflicting area have a partial overlapping area at the junction.

[0088] When the conflicting areas and non-conflicting areas split into different layouts subsequently form a mask layer to act on the area of ​​the original conflicting graphics, there will be no process problems caused by the splitting of the entire graphics, such as unclean etching and residues.

[0089] Please refer to Fig.12 Taking the conflicting area 324 and the non-conflicting area 323 as an example, the conflicting area 324 and the non-conflicting area 323 are extended along the first direction X, so that the conflicting area 324 and the non-conflicting area 323 have a partial overlapping area at the junction.

[0090] In this embodiment, the length of extending the conflict area and the non-conflict area along the first direction X is: half of the preset minimum size. As shown in the figure, the length of extending the conflict area 324 along the first direction X is d1, and the length of extending the non-conflict area 323 along the first direction X is d2. d1 and d2 are half of the preset minimum size, and the sum of d1 and d2 is the preset minimum size.

[0091] In this embodiment, the preset minimum size is a period size of one gate in the first direction X. The conflict region 324 and the non-conflict region 323 are extended along the first direction X by half the length of the preset minimum size, which is simple to operate, and the overlapping area of ​​the conflict region 324 and the non-conflict region 323 is the sum of d1 and d2, and the overlapping area is large, which can ensure that the end of the semiconductor structure corresponding to the conflict region 324 and the non-conflict region 323 is cleanly etched.

[0092] In this embodiment, the modified layout is used to form a mask to remove the dummy fin structure in the semiconductor structure, so as to improve the mask precision and improve the removal precision of the dummy fin structure. In other embodiments, the modified layout is also applicable to other semiconductor structures that need to improve precision.

[0093] Accordingly, an embodiment of the present invention further provides a storage medium on which computer instructions are stored, and the computer instructions are executed when they are executed. Figure 6 The steps of the method.

[0094] Accordingly, an embodiment of the present invention further provides a storage terminal, including a memory and a processor, wherein the memory stores computer instructions that can be executed on the processor, and the processor executes the computer instructions when executing the computer instructions. Figure 6 The steps of the method.

[0095] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A layout correction method, It is characterized in that include: Providing an initial layout, wherein the initial layout includes a plurality of graphics to be allocated, and the extension direction of the plurality of graphics to be allocated is parallel to the first direction; According to the graphic allocation rule, a plurality of graphics to be allocated are divided into a first graphic and a second graphic, wherein the first graphic and the second graphic are located in different layouts respectively; According to the first graphic and the second graphic, obtaining conflicting graphics in each layout; Segment the conflict graph to obtain a plurality of segmentation units distributed along a first direction; A conflicting area and a non-conflicting area are obtained, wherein the conflicting area is an area in the conflicting graph that does not satisfy the graph allocation rule, and the segmentation units in the conflicting area are reallocated so that the conflicting area and the non-conflicting area are located in different layouts.

2. The layout correction method according to claim 1, It is characterized in that The graphic allocation rules include: a first rule, a second rule and a third rule; the first rule includes: when the width of the graphic to be allocated in the second direction is less than or equal to a preset value, the graphic to be allocated needs to be allocated to a specific layout, and no subsequent reallocation is performed, and the second direction is perpendicular to the first direction; the second rule includes: when the spacing between two adjacent graphics to be allocated in the second direction is less than or equal to a preset value, the adjacent graphics to be allocated need to be allocated to different layouts; the third rule includes: the width of the graphic to be allocated in the second direction is within a preset range.

3. The layout correction method according to claim 2, It is characterized in that The first graphic is located in a first layout, and the second graphic is located in a second layout; according to the first graphic and the second graphic, conflict graphics in each layout are obtained, including: according to the graphic allocation rule, the first graphic located in the first layout is checked to obtain a conflict graphic, and the conflict graphic is the first graphic in the first layout that does not satisfy the graphic allocation rule; according to the graphic allocation rule, the second graphic located in the second layout is checked to obtain a conflict graphic, and the conflict graphic is the second graphic in the second layout that does not satisfy the graphic allocation rule.

4. The layout correction method according to claim 3, It is characterized in that When the conflicting graph does not satisfy the third rule, before the conflicting graph is segmented, the method further includes: splitting the conflicting graph along the second direction to obtain two independent sub-graphs; allocating the two sub-graphs to different layouts; and after allocating the two sub-graphs to different layouts, reacquiring the conflicting graph according to the first graph, the second graph and the sub-graphs.

5. The layout correction method according to claim 1, It is characterized in that After the conflicting segmentation units are reallocated, the method further includes: continuing to obtain conflicting graphics; segmenting the conflicting graphics to obtain a plurality of segmentation units distributed along a first direction; obtaining conflicting areas and non-conflicting areas, and reallocating the segmentation units in the conflicting areas so that the conflicting areas and the non-conflicting areas are located in different layouts, until the first graphics and the second graphics in each layout satisfy the graphics allocation rule.

6. The layout correction method according to claim 1, It is characterized in that Slicing the conflicting graph includes: slicing the conflicting graph to obtain a plurality of slicing units distributed along a first direction, wherein the size of the slicing unit in the first direction is a preset minimum size.

7. The layout correction method according to claim 1, It is characterized in that Also includes: The conflicting area and the non-conflicting area are extended along the first direction so that the conflicting area and the non-conflicting area have a partial overlapping area at the joint.

8. The layout correction method according to claim 7, It is characterized in that The length by which the conflicting area and the non-conflicting area are extended along the first direction is half of the preset minimum size.

9. A storage medium having computer instructions stored thereon, It is characterized in that When the computer instructions are executed, the steps of the method according to any one of claims 1 to 8 are executed.

10. A storage terminal comprising a memory and a processor, wherein the memory stores computer instructions that can be executed on the processor. It is characterized in that When the processor runs the computer instructions, the steps of the method according to any one of claims 1 to 8 are performed.

Images