Low ic power consumption LCD pixel driving circuit

Abstract

The application discloses a low-IC power consumption LCD pixel driving circuit, which comprises a first transistor, a pre-storage capacitor, a second transistor, a holding capacitor, a third transistor and a pixel capacitor, a first source-drain electrode of the first transistor is coupled to a data signal line, a gate electrode is coupled to a control signal line, and a second source-drain electrode is coupled to a first source-drain electrode of the second transistor and one end of the pre-storage capacitor; a second source-drain electrode of the second transistor is coupled to a first source-drain electrode of the third transistor, one end of the holding capacitor and one end of the pixel capacitor, and a gate electrode is coupled to a transfer signal line; a second source-drain electrode of the third transistor is coupled to a common electrode line, and a gate electrode is coupled to a reset signal line; one end of the pre-storage capacitor and the pixel capacitor away from the transistor is coupled to the common electrode line; and one end of the holding capacitor away from the second transistor is coupled to a coupling signal line.

Description

Technical Field

[0001] This invention relates to the field of pixel driving technology, and more specifically to a low IC power consumption LCD pixel driving circuit. Background Technology

[0002] In field-sequential or color-sequential display technologies, the backlight can only be turned on after all the liquid crystals in the screen have deflected to a stable state to avoid screen chaos. Therefore, how to speed up the liquid crystal driving time and increase the backlight turn-on time is an urgent problem to be solved in this field.

[0003] In traditional field-sequential display technology, the pixel driving circuit of an LCD first charges the electrodes of each row of pixels sequentially within a frame, then waits for all liquid crystals to deflect to a stable position, and finally turns on the backlight. If the backlight is turned on immediately after the last row of pixels has finished charging, the liquid crystals corresponding to the later-charged pixels have not yet stabilized, leading to differences in brightness and color between the upper and lower pixels, resulting in image distortion. Therefore, the time allotted for backlight activation within a frame in the pixel driving circuit is very short, making it difficult to achieve high brightness and high-frequency display. This also places higher demands on backlight brightness specifications and lifespan, increasing product costs.

[0004] In summary, traditional pixel driving circuits have the problem of not being able to balance light output quality and light output brightness. Summary of the Invention

[0005] In view of this, the present invention provides a low IC power consumption LCD pixel driving circuit, which solves the problem of traditional pixel driving circuits being unable to balance light output quality and light output brightness by improving the circuit structure.

[0006] To solve the above problems, the technical solution of the present invention is to adopt a low IC power consumption LCD pixel driving circuit, including: a first transistor, a pre-storage capacitor, a second transistor, a holding capacitor, a third transistor, and a pixel capacitor. The first source and drain of the first transistor are coupled to a data signal line, and its gate is coupled to a control signal line. The second source and drain of the first transistor are coupled to the first source and drain of the second transistor and one end of the pre-storage capacitor. The second source and drain of the second transistor are coupled to the first source and drain of the third transistor, one end of the holding capacitor, and one end of the pixel capacitor, and its gate is coupled to a transfer signal line. The second source and drain of the third transistor are coupled to a common electrode line, and its gate is coupled to a reset signal line. The ends of the pre-storage capacitor and the pixel capacitor away from the transistor are coupled to the common electrode line. The end of the holding capacitor away from the second transistor is coupled to a coupling signal line.

[0007] Optionally, during the backlight-on time of the current frame, the first transistor is controlled to turn on based on the control signal. The first transistor outputs a pre-charge voltage based on the data signal and stores it in the pre-storage capacitor. After all pixels have completed voltage pre-storage, the third transistor is controlled to turn on based on the reset signal to reset the pixel capacitor. The second transistor is controlled to turn on based on the transfer signal to form the voltage required for the liquid crystal to flip the target angle on the pixel capacitor.

[0008] Optionally, the coupling signal is configured such that: when the data signal of the current frame is positive, the coupling signal of the current frame is negative and jumps to positive when entering the next frame; when the data signal of the current frame is negative, the coupling signal of the current frame is positive and jumps to negative when entering the next frame, thereby completing the coupling of the voltage of the pixel capacitor.

[0009] Optionally, when the liquid crystal flip mode is configured to row flip, the coupling signal is configured such that the potential of the coupling signal of each row pixel is the same, and the potential of the coupling signal of its adjacent row pixel is opposite.

[0010] Optionally, when the liquid crystal flip mode is column flip, the coupling signal is configured such that the potential of the coupling signal of each column pixel is the same, and the potential of the coupling signal of its adjacent column pixel is opposite.

[0011] Optionally, the potential magnitude of the coupling signal is configured to be positively correlated with the ratio of pixel capacitance + holding capacitance / pre-storage capacitance.

[0012] Optionally, the pixel driving circuit can also be configured such that, when the liquid crystal flip mode is column flip, the pre-storage capacitor of the Nth column, the end of the pixel capacitor away from the transistor, and the second source-drain of the third transistor are coupled to the first common electrode line, and the holding capacitor is coupled to the second common electrode line; the pre-storage capacitor of the N+1th column, the end of the pixel capacitor away from the transistor, and the second source-drain of the third transistor are coupled to the second common electrode line, and the holding capacitor is coupled to the second common electrode line and the first common electrode line; wherein, N is a positive integer.

[0013] Optionally, when the data signal in the Nth column of the current frame is positive, the first common voltage of the current frame is configured as a positive potential and the second common voltage is a negative potential, and in the next frame, the first common voltage jumps to a negative potential and the second common voltage jumps to a positive potential; when the data signal in the Nth column of the current frame is negative, the first common voltage of the current frame is configured as a negative potential and the second common voltage is a positive potential, and in the next frame, the first common voltage jumps to a positive potential and the second common voltage jumps to a negative potential. The primary improvement of this invention is the provision of a low-power LCD pixel driving circuit. By setting a pre-storage capacitor, a pre-charge voltage is stored during the backlight emission time of the current frame. This allows all pixels to synchronously read the pre-charge voltage in the next frame, significantly reducing the pixel voltage write time and relatively increasing the backlight emission time. This, in turn, increases the output brightness while maintaining light quality, solving the problem of traditional pixel driving circuits being unable to simultaneously achieve both light quality and brightness. Furthermore, by setting a holding capacitor and a coupling signal line, this invention can increase the pixel capacitor potential by changing the potential at the other end of the capacitor to couple the pixel capacitor. Therefore, the data potential required for liquid crystal flipping is reduced, further improving brightness or reducing source IC power consumption and cost. Attached Figure Description

[0014] Figure 1 This is a simplified circuit diagram of the LCD pixel driving circuit of Embodiment 1 of the present invention; Figure 2 This is a timing diagram of the LCD pixel driving circuit according to Embodiment 1 of the present invention; Figure 3 This is a simplified circuit diagram of the LCD pixel driving circuit of Embodiment 2 of the present invention; Figure 4 This is a timing diagram of the LCD pixel driving circuit according to Embodiment 2 of the present invention. Implementation

[0015] To enable those skilled in the art to better understand the technical solutions of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0016] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0017] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0018] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0020] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.

[0021] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0022] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship. Example

[0023] Specifically, such as Figure 1As shown, a low-IC power consumption LCD pixel driving circuit includes: a first transistor M1, a pre-storage capacitor Cs1, a second transistor M2, a holding capacitor Cs2, a third transistor M3, and a pixel capacitor Clc. The first source and drain of the first transistor M1 are coupled to the data signal line Data, and its gate is coupled to the control signal line Scan. The second source and drain of the first transistor M1 are coupled to the first source and drain of the second transistor M2 and one end of the pre-storage capacitor Cs1. The second source and drain of the second transistor M2 are coupled to the first source and drain of the third transistor M3, one end of the holding capacitor Cs2, and one end of the pixel capacitor Clc. Its gate is coupled to the transfer signal line Tran. The second source and drain of the third transistor M3 are coupled to the common electrode line Com, and its gate is coupled to the reset signal line Reset. The ends of the pre-storage capacitor Cs1 and the pixel capacitor Clc away from the transistors are coupled to the common electrode line Com. The end of the holding capacitor Cs2 away from the second transistor M2 is coupled to the coupling signal line Vcouple. In any type of TFT, apart from the gate, one of the other two electrodes is the source and the other is the drain. In this invention, they are described according to their spatial position as the first source / drain and the second source / drain for distinction.

[0024] Specifically, to facilitate understanding of the operating timing of the pixel driving circuit, as follows: Figure 2 As shown, during the backlight-on time of the current frame, the first transistor M1 is turned on based on the control signal. The first transistor M1 outputs a pre-charge voltage based on the data signal and stores it in the pre-storage capacitor Cs1. After all pixels have completed voltage pre-storage, the third transistor M3 is turned on based on the reset signal to reset the pixel capacitor Clc. The second transistor M2 is turned on based on the transfer signal to form the voltage required for the liquid crystal flipping target angle on the pixel capacitor Clc.

[0025] Furthermore, the coupling signal is configured such that: when the data signal of the current frame is positive, the coupling signal of the current frame is negative and changes to positive when entering the next frame; when the data signal of the current frame is negative, the coupling signal of the current frame is positive and changes to negative when entering the next frame, thereby completing the coupling of the voltage of the pixel capacitor.

[0026] It should be noted here that "positive potential" is defined as an initial (normal) potential that is higher than the common voltage; "negative potential" is defined as an initial (normal) potential that is lower than the common voltage.

[0027] Furthermore, when the liquid crystal flip mode is configured to row flip, the coupling signal is configured such that the potential of the coupling signal of each row of pixels is the same, and the potential of the coupling signal of its adjacent row of pixels is opposite.

[0028] Furthermore, when the liquid crystal flip mode is column flip, the coupling signal is configured such that the potential of the coupling signal of each column of pixels is the same, and the potential of the coupling signal of its adjacent column of pixels is opposite. The magnitude of the coupling signal potential is configured to be positively correlated with the ratio of pixel capacitor Clc+ to holding capacitor Cs2 / pre-storage capacitor Cs1.

[0029] This invention utilizes the coupling effect of the coupling signal on the holding capacitor and the pixel capacitor to raise or lower the pixel voltage according to the polarity of the data signal, thereby compensating for the voltage drop caused by charge transfer and reducing the power consumption requirements of the driver IC. Example

[0030] Specifically, such as Figure 3 As shown, the pixel driving circuit can also be configured such that, when the liquid crystal flip mode is column flip, the pre-storage capacitor Cs1 of the Nth column, the end of the pixel capacitor Clc away from the transistor, and the second source-drain of the third transistor M3 are coupled to the first common electrode line Com_even, and the holding capacitor Cs2 is coupled to the second common electrode line Com_odd; the pre-storage capacitor Cs1 of the N+1th column, the end of the pixel capacitor Clc away from the transistor, and the second source-drain of the third transistor M3 are coupled to the second common electrode line Com_odd, and the holding capacitor Cs2 is coupled to the second common electrode line and the first common electrode line Com_even; where N is a positive integer.

[0031] The pixel driving circuit claimed in this embodiment reduces one signal line compared to the pixel driving circuit in Embodiment 1. This effectively increases the aperture ratio, and through the differentiated positive and negative polarity reset voltage and coupling voltage of adjacent columns, it effectively enhances the compensation effect for the voltage drop caused by charge sharing.

[0032] Furthermore, such as Figure 4In the driving timing shown, when the data signal in the Nth column of the current frame is positive, the first common voltage of the current frame is configured as positive and the second common voltage as negative. In the next frame, the first common voltage jumps to negative and the second common voltage jumps to positive. Conversely, when the data signal in the Nth column of the current frame is negative, the first common voltage is configured as negative and the second common voltage as positive. In the next frame, the first common voltage jumps to positive and the second common voltage jumps to negative. To facilitate understanding of the specific principle of voltage coupling, an example is given: Assuming the data signal of a pixel in a certain row of the Nth column in the current frame is +4V, the voltage of the pre-storage capacitor Cs1 of that pixel under charge sharing may be +3.5V (this value is for illustrative purposes only). Then, when M2 is turned on in the next frame, the charge of the pre-storage capacitor Cs1 is shared to the pixel electrode. If the first and second common voltages do not change, the voltage on the pixel capacitor may be 3V. When the second common voltage jumps upward by 1V (assuming the holding capacitor Cs2 = pixel capacitor Clc), the potential of the pixel electrode will jump upward by 0.5V. At this time, the voltage on the pixel capacitor is coupled to 3.5V. When the first common voltage jumps downward by 1V, the potential of the pixel electrode will jump downward by 0.5V. At this time, the voltage on the pixel capacitor is coupled to 4V, which meets the voltage required to drive the liquid crystal to the target deflection angle.

[0033] Furthermore, when the data signal in the (N+1)th column of the current frame is negative, the first common voltage of the current frame is configured as positive and the second common voltage as negative. In the next frame, the first common voltage jumps to a negative potential and the second common voltage jumps to a positive potential. Conversely, when the data signal in the (N+1)th column of the current frame is positive, the first common voltage of the current frame is configured as negative and the second common voltage as positive. In the next frame, the first common voltage jumps to a positive potential and the second common voltage jumps to a negative potential. The coupling principle of the pixels in the (N+1)th column is the same as that of the pixels in the Nth column, and therefore will not be described again here.

[0034] Meanwhile, it should be noted that the coupling method involved in this application is not only applicable to the driving logic that performs polarity reversal in each frame. In the driving logic that performs polarity reversal in every M (M≥2 and is a positive integer) frames, coupling can be completed simply by switching the common voltage back to the potential of the last frame before polarity reversal at the end of each frame. At this time, although the voltage retention rate of the pixel capacitor will be lost, the time of each frame is very short under the field sequence driving logic, and the impact on light output efficiency and imaging effect is extremely low.

[0035] This invention sets up a pre-storage capacitor, which stores the pre-charge voltage during the backlight emission time of the current frame. This allows all pixels to synchronously read the pre-charge voltage in the next frame, greatly reducing the pixel voltage writing time and relatively increasing the backlight emission time. This increases the light output brightness while ensuring the light output quality, solving the problem that traditional pixel driving circuits cannot balance light output quality and light output brightness.

[0036] The inventors discovered in simulations that the measured pixel voltages were all lower than the pre-charge voltage. They further found the reason: the pre-storage capacitor provides the voltage required by the second transistor M2, enabling M2 to output the voltage needed for the next frame to the pixel capacitor. This is done through charge sharing. Therefore, after reading, the pixel capacitor potential is lower than the pre-storage capacitor potential before reading, causing the potential required for complete liquid crystal deflection to exceed the voltage output range of the data signal. Therefore, this invention, by setting a holding capacitor and coupling signal line, couples the pixel capacitor by changing the potential at the other end of the capacitor, thus increasing the pixel capacitor potential. This reduces the data potential required for liquid crystal flipping, further improving brightness or reducing source IC power consumption and cost. The above describes the low-IC power consumption LCD pixel driving circuit provided by the embodiments of the present invention. The various embodiments are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section. It should be noted that those skilled in the art can make several improvements and modifications to the present invention without departing from the principle of the invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

[0037] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in connection with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can implement the described functions using different methods for each specific application, but such implementation should not be considered beyond the scope of the invention. The steps of the methods or algorithms described in connection with the embodiments disclosed herein can be implemented directly in hardware, software modules executed by a processor, or a combination of both. Software modules can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disks, removable disks, CD-ROMs, or any other form of storage medium known in the art.

Claims

1. A low-power LCD pixel driving circuit, comprising: The first transistor (M1), the pre-storage capacitor (Cs1), the second transistor (M2), the holding capacitor (Cs2), the third transistor (M3), and the pixel capacitor (Clc) are characterized in that... The first source and drain of the first transistor (M1) are coupled to the data signal line (Data), and the gate is coupled to the control signal line (Scan). The second source and drain are coupled to the first source and drain of the second transistor (M2) and one end of the pre-storage capacitor (Cs1). The second source and drain of the second transistor (M2) are coupled to the first source and drain of the third transistor (M3), one end of the holding capacitor (Cs2) and one end of the pixel capacitor (Clc), and the gate is coupled to the transfer signal line (Tran). The gate of the third transistor (M3) is coupled to the reset signal line (Reset). The pre-storage capacitor (Cs1) and the pixel capacitor (Clc) in the Nth column are coupled to the first common electrode line (Com_even) at the end furthest from the transistor and to the second source-drain of the third transistor (M3), while the other end of the holding capacitor (Cs2) is coupled to the second common electrode line (Com_odd). The pre-storage capacitor (Cs1) and the pixel capacitor (Clc) in column N+1 are coupled to the second common electrode line (Com_odd) at the end furthest from the transistor and to the second source-drain of the third transistor (M3), while the other end of the holding capacitor (Cs2) is coupled to the first common electrode line (Com_even). In this context, the pixel driving circuit described above operates in the column flip mode of the liquid crystal, where N is a positive integer.

2. The LCD pixel driving circuit according to claim 1, characterized in that, During the backlight-on time of the current frame, the first transistor (M1) is turned on based on the control signal. The first transistor (M1) outputs a pre-charge voltage based on the data signal and stores it in the pre-storage capacitor (Cs1) until all pixels have completed voltage pre-storage. The third transistor (M3) is turned on based on the reset signal, thereby resetting the pixel capacitor (Clc). The second transistor (M2) is turned on based on the transfer signal, and the voltage required for the liquid crystal to flip to the target angle is formed on the pixel capacitor (Clc).

3. The LCD pixel driving circuit according to claim 2, characterized in that, When the data signal in the Nth column of the current frame is positive, the first common voltage of the current frame is configured as a positive potential and the second common voltage is a negative potential, and in the next frame, the first common voltage jumps to a negative potential and the second common voltage jumps to a positive potential; when the data signal in the Nth column of the current frame is negative, the first common voltage of the current frame is configured as a negative potential and the second common voltage is a positive potential, and in the next frame, the first common voltage jumps to a positive potential and the second common voltage jumps to a negative potential.

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