Amplifier circuit

Abstract

An amplifier circuit includes a preposition unit, an amplification unit, a frequency compensation unit, and a first slew rate optimization unit. The first slew rate optimization unit includes a first current source circuit and a second current source circuit. When the input of the amplifier circuit jumps, the first current source or the second current source charges or discharges the output end of the amplifier circuit. After the input jump is finished, the first current source and the second current source are automatically turned off. On the premise of keeping low power consumption, the voltage conversion rate of the amplifier circuit is optimized.

Description

Technical Field

[0001] The present application relates to the field of power electronics technology, and in particular to an amplifier circuit. Background Art

[0002] The display panel in the liquid crystal display device is composed of a plurality of pixels arranged in a matrix. The operation of each pixel is controlled by a thin film transistor, so the thin film transistors are also arranged in a matrix. The thin film transistors in the same row are connected to each other through gate lines, and the thin film transistors in the same column are connected to each other through data lines. Both the gate lines and the data lines are controlled by the display driver chip (DDI).

[0003] In order to make the display panel smooth and avoid freezing or blurring, the display panel needs to be charged or discharged in a shorter time, that is, the signal switching rate of the gate line and the data line needs to be accelerated. Increasing the voltage conversion rate of the buffer (generally implemented by an amplifier) ​​used in the DDI helps to improve the charging and discharging of the display panel. The voltage conversion rate of the buffer refers to how fast the output signal of the buffer follows the change of the input signal.

[0004] In order to increase the voltage conversion rate of the buffer, the current of the buffer, especially the current of the output stage of the buffer, can be increased. The increase of the current of the buffer means the increase of the power consumption of the buffer. However, with the rapid growth of the demand for low-power, high-resolution display panels, for portable electronic devices (such as mobile phones, tablets, etc.) using batteries, the increase of the power of the buffer is not desirable. Summary of the invention

[0005] The present application provides an amplifier circuit, which uses a charging current source or a discharging current source to charge or discharge the output end of the amplifier circuit when the input of the amplifier circuit jumps, and automatically shuts off the charging current source and the discharging current source after the input jump ends, thereby optimizing the voltage conversion rate of the amplifier circuit while maintaining low power consumption, meeting the application requirements of low-power, high-resolution display panels.

[0006] According to an embodiment of the present invention, an amplifier circuit is provided, comprising: a preamplifier unit having a positive differential input terminal and a negative differential input terminal for receiving a positive differential input signal and a negative differential input signal respectively, and outputting a first conversion signal and a second conversion signal based on the positive differential input signal and the negative differential input signal; and an amplifier unit receiving the first conversion signal and the second conversion signal, and outputting an output signal of the amplifier circuit at an output terminal based on the first conversion signal and the second conversion signal; a frequency compensation unit having a first frequency compensation capacitor and a second frequency compensation capacitor, wherein the first frequency compensation capacitor has a first terminal coupled to a first current shunt point of the preamplifier unit, and has a second terminal coupled to the output terminal of the amplifier unit, The second frequency compensation capacitor has a first end coupled to the second current shunt point of the pre-unit, and a second end coupled between the output ends of the amplifying unit; and a first conversion rate optimization unit, including a first current source circuit and a second current source circuit, the first current source circuit has a first end coupled to the first power supply end, a second end coupled to the first end of the first frequency compensation capacitor, and a control end receiving the positive differential input signal or a follow-up signal of the positive differential input signal, the second current source circuit has a first end coupled to the second power supply end, a second end coupled to the first end of the second frequency compensation capacitor, and a control end receiving the positive differential input signal or a follow-up signal of the positive differential input signal.

[0007] In one embodiment, the first current source includes a first coupling capacitor having a first end and a second end, the first end being coupled to the first tail current end of the preamplifier unit; a first current tube having a first end coupled to the first power supply end, a second end coupled to the first end of the first frequency compensation capacitor, and a control end coupled to the second end of the first coupling capacitor; and a pull-up circuit having a first end coupled to the first power supply end, and a second end coupled to the control end of the first current tube. The second current source includes: a second coupling capacitor having a first end and a second end, the first end being coupled to the second tail current end of the preamplifier unit; a second current tube having a first end coupled to the second power supply end, a second end coupled to the first end of the second frequency compensation capacitor, and a control end coupled to the second end of the second coupling capacitor; and a pull-down circuit having a first end coupled to the second power supply end, and a second end coupled to the control end of the second current tube.

[0008] In one embodiment, the first current source includes: a first coupling capacitor having a first end and a second end, the first end being coupled to the positive differential input end of the preamplifier unit; a first current tube having a first end coupled to the first power supply end, a second end coupled to the first end of the first frequency compensation capacitor, and a control end coupled to the second end of the first coupling capacitor; and a pull-up circuit having a first end coupled to the first power supply end, and a second end coupled to the control end of the first current tube. The second current source includes: a second coupling capacitor having a first end and a second end, the first end being coupled to the positive differential input end of the preamplifier unit; a second current tube having a first end coupled to the second power supply end, a second end coupled to the first end of the second frequency compensation capacitor, and a control end coupled to the second end of the second coupling capacitor; and a pull-down circuit having a first end coupled to the second power supply end, and a second end coupled to the control end of the second current tube. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The above and other objects, features and advantages of the present application will become more apparent through the following description of the embodiments of the present application with reference to the accompanying drawings:

[0010] Figure 1 is a schematic diagram of a circuit structure of an amplifier circuit 100 according to an embodiment of the present application;

[0011] Figure 2 is a schematic diagram of a circuit structure of an amplifier circuit 200 according to an embodiment of the present application;

[0012] Figure 3 is a schematic diagram of a circuit structure of an amplifier circuit 300 according to an embodiment of the present application;

[0013] Figure 4 is a circuit structure diagram of an amplifier circuit 400 according to an embodiment of the present application;

[0014] Figure 5 is a circuit structure diagram of an amplifier circuit 500 according to an embodiment of the present application;

[0015] Figure 6 is a schematic diagram of a circuit structure of an amplifier circuit 600 according to an embodiment of the present application;

[0016] Figure 7 is a circuit structure diagram of an amplifier circuit 700 according to an embodiment of the present application;

[0017] Figure 8 is a schematic diagram of a circuit structure of an amplifier circuit 800 according to an embodiment of the present application;

[0018] Fig. 9 is a circuit structure diagram of an amplifier circuit 900 according to an embodiment of the present application;

[0019] Fig.10 is a schematic diagram of a circuit structure of an amplifier circuit 1000 according to an embodiment of the present application;

[0020] Fig.11 is a circuit structure diagram of an amplifier circuit 1100 according to an embodiment of the present application;

[0021] Fig.12 A schematic diagram comparing the voltage conversion rate of the output voltage of an amplifier circuit in the prior art and the voltage conversion rate of the output voltage of the amplifier circuit 900 according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0022] The specific embodiments of the present invention will be described in detail below. It should be noted that the embodiments described herein are only for illustration and are not intended to limit the present invention. In the following description, a large number of specific details are set forth in order to provide a thorough understanding of the present invention. However, it is obvious to those of ordinary skill in the art that these specific details do not have to be used to implement the present invention. In other examples, in order to avoid confusing the present invention, known circuits, materials or methods are not specifically described.

[0023] The terms "first", "second", etc. in the following description are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, a feature defined as "first", "second", etc. may explicitly or implicitly include one or more of the features. In the description of this application, unless otherwise specified, "plurality" means two or more.

[0024] In addition, in the present application, directional terms such as "upper" and "lower" may be defined including but not limited to the orientation relative to the schematic placement of the components in the drawings. It should be understood that these directional terms may be relative concepts, which are used for relative description and clarification, and may change accordingly according to the change in the orientation of the components in the drawings.

[0025] In this application, unless otherwise clearly specified and limited, the term "connection" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection or an indirect connection through an intermediate medium. In addition, the term "coupling" can be a way of achieving electrical connection for signal transmission. "Coupling" can be a direct electrical connection or an indirect electrical connection through an intermediate medium.

[0026] To simplify the symbols and facilitate the description, in the following text, the names of the connection nodes or ports of the circuit use the same symbols as the voltages or signals on the corresponding nodes or ports. For example, if the symbols of the input terminals are "IN+" and "IN-", the input signals are also represented by "IN+" or "IN-". Similarly, if the symbol of the output port is "OUT", the voltage of the output port is also represented by "OUT".

[0027] Figure 1 FIG. 1 is a schematic diagram of a circuit structure of an amplifier circuit 100 according to an embodiment of the present application.

[0028] like Figure 1 As shown, the amplifier circuit 100 includes a pre-unit 110 , an amplifying unit 120 , a frequency compensation unit 130 and a first slew rate optimizing unit 140 .

[0029] The pre-unit 110 includes a first input module 111 , a second input module 112 , a first current mirror module 113 , and a second current mirror module 114 .

[0030] The first input module 111 is coupled to the positive differential input terminal IN+ and the negative differential input terminal IN- to receive the positive differential input signal IN+ and the negative differential input signal IN-. The second input module 112 is also coupled to the positive differential input terminal IN+ and the negative differential input terminal IN- to receive the positive differential input signal IN+ and the negative differential input signal IN-. The first input module 111 and the second input module 112 are respectively provided with a first tail current terminal Pt and a second tail current terminal Nt. In addition, the first input module 111 also has a first group of differential current output terminals N1 and N2 coupled to the second current mirror module 114, and the second input module 112 also has a second group of differential current output terminals N3 and N4 coupled to the first current mirror module 113. When the positive and negative differential input signals IN+ and IN- received by the first input module 111 change, the current provided by the first group of differential current output terminals N1 and N2 changes accordingly, thereby adjusting the output of the second current mirror module 114. Likewise, when the positive and negative differential input signals IN+ and IN− received by the second input module 112 change, the currents provided by the second group of differential current output terminals N3 and N4 change accordingly, thereby adjusting the output of the first current mirror module 113 .

[0031] The first current mirror module 113 is coupled to the second group of differential current output terminals N3 and N4. The second current mirror module 114 is coupled to the first group of differential current output terminals N1 and N2. Based on the currents of the first group of differential current output terminals N1 and N2 and the second group of differential current output terminals N3 and N4, the first current mirror module 113 and the second current mirror module 114 output a first conversion voltage PD and a second conversion voltage ND, respectively. Figure 1In the embodiment, the first current mirror module 113 includes a first current reference module 115 and a first current follower module 116, and the second current mirror module 114 includes a second current reference module 117 and a second current follower module 118. The first current reference module 115 and the second current reference module 117 are coupled via a first transmission gate TG1, and the first current follower module 116 and the second current follower module 118 are coupled via a second transmission gate TG2.

[0032] The amplifying unit 120 receives the first converted voltage PD and the second converted voltage ND outputted by the pre-unit, and generates an output voltage OUT at an output terminal OUT.

[0033] The frequency compensation unit 130 includes a first frequency compensation capacitor Co1 and a second frequency compensation capacitor Co2. A first end of the first frequency compensation capacitor Co1 is coupled to one of the second differential current output terminals N3 and N4 (also referred to as a first current shunt point), and a second end is coupled to the output terminal OUT of the amplifier circuit 100. A first end of the second frequency compensation capacitor Co2 is coupled to one of the first differential current output terminals N1 and N2 (also referred to as a second current shunt point), and a second end is coupled to the output terminal OUT. The first frequency compensation capacitor Co1 and the second frequency compensation capacitor Co2 are used to optimize the frequency characteristics of the output voltage OUT and improve the voltage conversion rate of the output voltage OUT.

[0034] The first conversion rate optimization unit 140 includes a first current source circuit 141 and a second current source circuit 142. The first current source circuit 141 has a first terminal coupled to the first power supply terminal VDD, a second terminal coupled to the first terminal of the first frequency compensation capacitor Co1, and a control terminal coupled to the first tail current terminal Pt. The second current source circuit 142 has a first terminal coupled to the second power supply terminal VSS, a second terminal coupled to the first terminal of the second frequency compensation capacitor Co2, and a control terminal coupled to the second tail current terminal Nt.

[0035] exist Figure 1 In the embodiment, when the positive and negative differential input signals received by the positive and negative differential input terminals IN+ and IN- change, the voltages of the first tail current terminal Pt and the second tail current terminal Nt will also change accordingly, thereby controlling the current I1 output by the first current source circuit 141 and the current I2 output by the second current source circuit 142, so that the current I1 charges the first frequency compensation capacitor Co1, or discharges the current I2 to the second frequency compensation capacitor Co2, thereby accelerating the change of the output voltage OUT and achieving the purpose of optimizing the conversion rate of the output voltage OUT.

[0036] exist Figure 1In the embodiment of the present application, when the negative differential input terminal IN- is connected to the output terminal OUT, the amplifier circuit 100 can be used as a buffer, and the voltage of the output terminal OUT changes with the change of the positive differential input terminal IN+. In the application of the display panel, the amplifier circuit of the embodiment of the present application is used as a buffer to connect the output terminal OUT with the negative differential input terminal IN-, and the voltage of the output terminal OUT follows the positive differential input terminal IN+. When the voltage of the positive differential input terminal IN+ jumps, the voltage of the output terminal OUT also jumps accordingly. However, it should be understood that the amplifier circuit of the embodiment of the present application can also be used as an amplifier for other applications.

[0037] Figure 2 FIG. 2 is a schematic diagram of a circuit structure of an amplifier circuit 200 according to an embodiment of the present application.

[0038] like Figure 2 As shown, the amplifier circuit 200 includes a preamplifier unit 110, an amplifier unit 120, a frequency compensation unit 130, and a first conversion rate optimization unit 140. The amplifier circuit 200 and Figure 1 The structure and function of the amplifier circuit 100 shown in the embodiment are similar, except that, in the amplifier circuit 200, the control end of the first current source circuit 141 and the control end of the second current source circuit 142 are both coupled to the positive differential input end IN+, and the current 11 of the first current source circuit 141 and the current 12 of the second current source circuit 142 are controlled by the positive differential input signal IN+.

[0039] exist Figure 1 In the embodiment, the signal of the first tail current terminal Pt and the signal of the second tail current terminal Nt change with the change of the positive differential input signal IN+, and are therefore also referred to as the follower signal of the positive differential input signal. It should be understood that in the embodiment of the present application, when the positive differential input signal IN+ jumps, the rate at which the signal of the output terminal OUT follows the jump of the positive differential input signal IN+ is an important characteristic of the amplifier circuit. The first current source circuit 141 and the second current source circuit 142 can increase the conversion rate of the signal of the output terminal OUT, thereby improving the performance of the amplifier circuit. The current of the first current source circuit 141 and the second current source circuit 142 can be directly controlled by the positive differential input signal IN+, or can be controlled by the follower signal of the positive differential input signal IN+, such as the signal of the first tail current terminal Pt and the second tail current terminal Nt.

[0040] Figure 3 FIG. 4 is a schematic diagram of a circuit structure of an amplifier circuit 300 according to an embodiment of the present application.

[0041] like Figure 3 As shown, the amplifier circuit 300 includes a pre-unit 310 , an amplifying unit 320 , a frequency compensation unit 330 and a first slew rate optimizing unit 340 .

[0042] The amplifier circuit 300 includes a plurality of transistors. In an embodiment of the present invention, the plurality of transistors include P-type MOSFETs (metal oxide semiconductor field effect transistors) and N-type MOSFETs. It should be understood that in other embodiments, the plurality of transistors may include other types of controllable switches, such as bipolar transistors.

[0043] The pre-unit 310 includes a first input module 311 , a second input module 312 , a first current mirror module 313 and a second current mirror module 314 .

[0044] The first input module 311 includes transistors M1, M2 and M3. The second input module 312 includes transistors M4, M5 and M6. The first end of the first transistor M1 is coupled to the first power supply terminal VDD, and the control end receives the reference signal Vp1. The first ends of the second transistor M2 and the third transistor M3 are coupled to the second end of the first transistor M1, the control ends receive the negative differential input signal IN- and the positive differential input signal IN+ respectively, and the second ends are coupled to the first group of differential current output terminals N1 and N2 respectively. The first end of the fourth transistor M4 is coupled to the second power supply terminal VSS, and the control end receives the reference signal Vn1. The first ends of the fifth transistor M5 and the sixth transistor M6 are coupled to the second end of the fourth transistor M4, the control ends receive the negative differential input signal IN- and the positive differential input signal IN+ respectively, and the second ends are coupled to the second group of differential current output terminals N4 and N3 respectively. Figure 3 In an embodiment, the transistors M1-M3 include P-type transistors, and the transistors M4-M6 include N-type transistors. The voltage of the first power supply terminal VDD is higher than the voltage of the second power supply terminal VSS.

[0045] The first current mirror module 313 includes a first current reference module 315 and a first current follower module 316. The first current reference module 315 includes a seventh transistor M7 and a ninth transistor M9. The first current follower module 316 includes an eighth transistor M8 and a tenth transistor M10. The first end of the seventh transistor M7 is coupled to the first power supply terminal VDD, and the second end is coupled to the first end of the ninth transistor M9. The second end of the ninth transistor M9 is coupled to one end of the first transmission gate TG1. The first end of the eighth transistor M8 is coupled to the first power supply terminal VDD, and the second end is coupled to the first end of the tenth transistor M10. The second end of the tenth transistor M10 is coupled to one end of the second transmission gate TG2. The control ends of the seventh transistor M7 and the eighth transistor M8 are coupled together, and are commonly coupled to the second end of the ninth transistor M9. The control ends of the ninth transistor M9 and the tenth transistor M10 are coupled together, and commonly receive the reference signal Vp2.

[0046] The second current mirror module 314 includes a second current reference module 317 and a second current follower module 318. The second current reference module 317 includes an eleventh transistor M11 and a thirteenth transistor M13. The second current follower module 318 includes a twelfth transistor M12 and a fourteenth transistor M14. The first end of the thirteenth transistor M13 is coupled to the second power supply terminal VSS, and the second end is coupled to the first end of the eleventh transistor M11. The second end of the eleventh transistor M11 is coupled to the other end of the first transmission gate TG1. The first end of the fourteenth transistor M14 is coupled to the second power supply terminal VSS, and the second end is coupled to the first end of the twelfth transistor M12. The second end of the twelfth transistor M12 is coupled to the other end of the second transmission gate TG2. The control ends of the thirteenth transistor M13 and the fourteenth transistor M14 are coupled together and are commonly coupled to the second end of the eleventh transistor M11. The control ends of the eleventh transistor M11 and the twelfth transistor M12 are coupled together and commonly receive the reference signal Vn2.

[0047] The first transmission gate TG1 is coupled between the ninth transistor M9 and the eleventh transistor M11, and is turned on and off based on the reference signals Vp3 and Vn3. The second transmission gate TG2 is coupled between the tenth transistor M10 and the twelfth transistor M12, and is turned on and off based on the reference signals Vp3 and Vn3. When the second transmission gate TG2 is turned on, the first conversion voltage terminal PD and the second conversion voltage terminal ND are coupled together, and the voltage difference between the two is determined by the on-resistance of the second transmission gate TG2 and the current flowing through the second transmission gate TG2.

[0048] exist Figure 3 In the embodiment, the reference signals Vp1, Vn1, Vp2, Vn2, Vp3 and Vn3 are generally provided by a reference circuit (not shown in the figure) and have a constant value to maintain the operation of the amplifier circuit. The setting of the values ​​of the reference signals Vp1, Vn1, Vp2, Vn2, Vp3 and Vn3 is well known to those skilled in the art and will not be elaborated here.

[0049] The first transistor M1 can be regarded as a current source, and the fourth transistor M4 can be regarded as a current sink. The current provided by the first transistor M1 flows through the second transistor M2 and the third transistor M3, and flows into the thirteenth transistor M13 and the fourteenth transistor M14 in the second current mirror circuit 314 through the first group of differential current output terminals N1 and N2 respectively. The current in the seventh transistor M7 and the eighth transistor M8 flows through the second transistor M5 and the sixth transistor M6 through the second group of differential current output terminals N4 and N3 respectively, and finally flows into the fourth transistor M4.

[0050] The first current mirror module 313 and the second input module 312 work together to generate a first conversion voltage PD. The second current mirror module 314 and the first input module 311 work together to generate a second conversion voltage ND.

[0051] In the first current mirror module 313, the control terminals (gates) of the seventh transistor M7 and the eighth transistor M8 are connected together, and the first terminal (source) is also commonly connected to the first power supply terminal VDD, which means that the source-gate voltage VSG of the seventh transistor M7 and the eighth transistor M8 is the same. When the width-to-length ratio of the seventh transistor M7 and the eighth transistor M8 is the same, and the voltage of the second terminal (drain) of the two is also approximately the same, the current of the two is approximately the same. The current of the seventh transistor M7 flows through the fifth transistor M5 and the ninth transistor M9. The current of the eighth transistor M8 flows through the sixth transistor M6 and the tenth transistor M10. That is to say, the sum of the currents of the fifth transistor M5 and the ninth transistor M9 is approximately the same as the sum of the currents of the sixth transistor M6 and the tenth transistor M10. The size (width-to-length ratio) of the fifth transistor M5 and the sixth transistor M6 is generally the same. When the voltages of the positive and negative differential input signals IN+ and IN- are the same, the gate-source voltages VGS of the fifth transistor M5 and the sixth transistor M6 are the same, so that the currents flowing through the fifth transistor M5 and the sixth transistor M6 are the same, that is, the currents flowing through the second group of differential current output terminals N3 and N4 are the same. When there is a voltage difference between the positive and negative differential input signals IN+ and IN-, there is a difference in the currents flowing through the fifth transistor M5 and the sixth transistor M6, that is, the currents flowing through the second group of differential current output terminals N3 and N4 are different, so that the currents flowing through the seventh transistor M7 and the currents flowing through the eighth transistor M8 are different.

[0052] In one embodiment, the voltage of the positive differential input signal IN+ is higher than the voltage of the negative differential input signal IN-, and the current flowing through the sixth transistor M6 is greater than the current flowing through the fifth transistor M5, that is, the current flowing from the differential current output terminal N3 into the sixth transistor M6 is greater than the current flowing from the differential current output terminal N4 into the fifth transistor M5. Since the current flowing from the differential current output terminal N4 into the fifth transistor M5 is relatively small, the current flowing through the seventh transistor M7 decreases, so that the voltage of the differential current output terminal N4 and the other end N5 of the ninth transistor M9 rises. Accordingly, the voltage of the differential current output terminal N3 decreases, and the first conversion voltage PD decreases accordingly.

[0053] The working principles of the first input module 311 and the second current mirror module 314 are similar to the working principles of the second input module 312 and the first current mirror module 313 , and will not be elaborated here.

[0054] The first conversion voltage PD and the second conversion voltage ND vary with the changes of the positive and negative differential input voltages IN+ and IN-.

[0055] exist Figure 3 In the embodiment, the transistors M7 - M10 in the first current mirror module 313 are P-type transistors, and the transistors M11 - M14 in the second current mirror module 314 are N-type transistors.

[0056] The amplification unit 320 includes a fifteenth transistor M15 and a sixteenth transistor M16. The first end of the fifteenth transistor M15 is coupled to the first power supply terminal VDD, the second end is coupled to the output terminal OUT, and the control end receives the first conversion voltage PD. The first end of the sixteenth transistor M16 is coupled to the second power supply terminal VSS, the second end is coupled to the output terminal OUT, and the control end receives the second conversion voltage ND. The output terminal OUT provides an output voltage. When the first conversion voltage PD increases, the output voltage OUT decreases, and vice versa. When the second conversion voltage ND increases, the output voltage OUT decreases, and vice versa.

[0057] exist Figure 3 In the embodiment, the fifteenth transistor M15 is a P-type transistor, and the sixteenth transistor M16 is an N-type transistor.

[0058] The frequency compensation unit 330 includes a first frequency compensation capacitor Co1 and a second frequency compensation capacitor Co2. The first end of the first frequency compensation capacitor Co1 is coupled to the differential current output terminal N3 (also referred to as the first current shunt point), and the second end is coupled to the output terminal OUT. The first end of the second frequency compensation capacitor Co2 is coupled to the differential current output terminal N2 (also referred to as the second current shunt point), and the second end is coupled to the output terminal OUT.

[0059] The first slew rate optimization unit 340 includes a first current source circuit 341 and a second current source circuit 342 .

[0060] exist Figure 3In the embodiment, the first current source circuit 341 includes a first coupling capacitor Cb1, a first current tube M18 and a pull-up circuit 343. The first end of the first coupling capacitor Cb1 is coupled to the first tail current terminal Pt, and the second end is coupled to the control end of the first current tube M18. The first end of the first current tube M18 is coupled to the first power supply terminal VDD, and the second end is coupled to the first end of the first frequency compensation capacitor Co1. The pull-up circuit 343 includes a pull-up tube, that is, the seventeenth transistor M17. The seventeenth transistor M17 has a first end coupled to the first power supply terminal VDD, a second end coupled to the control end of the first current tube M18, and a control end receiving a reference signal Vp4. In one embodiment, when the positive differential input signal IN+ jumps, for example, from a high level to a low level, the voltage of the first tail current terminal Pt decreases accordingly, and the first coupling capacitor Cb1 couples the voltage change of the first tail current terminal Pt to the first current tube M18, turns on the first current tube M18, and allows the first power supply terminal VDD to charge the frequency compensation capacitor Co1 through the first current tube M18, thereby accelerating the reduction of the voltage of the output terminal OUT and improving the conversion rate of the voltage of the output terminal OUT. Before the positive differential input signal IN+ jumps, the reference signal Vp4 turns off the seventeenth transistor M17, so that the voltage of the control terminal of the first current tube M18 can be coupled to the voltage of the first tail current terminal Pt through the first coupling capacitor Cb1. When the jump of the positive differential input signal IN+ ends, the reference signal Vp4 turns on the seventeenth transistor M17, pulls the voltage of the control terminal of the first current tube M18 up to the voltage of the first power supply terminal VDD, thereby turning off the first current tube M18. The reference signal Vp4 is generated by a logic circuit in an additional control circuit, and its timing is related to the timing of the positive differential input signal IN+. In one embodiment, the reference signal Vp4 has a pulse to turn on the seventeenth transistor M17, and the pulse corresponds to the falling edge of the positive differential input signal IN+, and the pulse width is slightly greater than or equal to the falling edge width of the positive differential input signal IN+.

[0061] exist Figure 3In the embodiment, the second current source circuit 342 includes a second coupling capacitor Cb2, a second current tube M20 and a pull-down circuit 344. The first end of the second coupling capacitor Cb2 is coupled to the second tail current terminal Nt. The first end of the second current tube M20 is coupled to the second power supply terminal VSS, the second end is coupled to the first end of the second frequency compensation capacitor Co2, and the control end is coupled to the second end of the second coupling capacitor Cb2. The pull-down circuit 344 includes a first pull-down tube, that is, a nineteenth transistor M19. The nineteenth transistor M19 has a first end coupled to the second power supply terminal VSS, a second end coupled to the control end of the second current tube M20, and a control end receiving a reference signal Vn4. In one embodiment, when the positive differential input signal IN+ jumps, for example, from a low level to a high level, the voltage of the second tail current terminal Nt increases accordingly, and the second coupling capacitor Cb2 couples the voltage change of the second tail current terminal Nt to the second current tube M20, turns on the second current tube M20, and causes the second power supply terminal VSS to discharge the frequency compensation capacitor Co2 through the second current tube M20, thereby accelerating the increase of the voltage of the output terminal OUT and improving the conversion rate of the voltage of the output terminal OUT. The reference signal Vn4 turns off the nineteenth transistor M19 before the positive differential input signal IN+ jumps, so that the voltage of the control terminal of the second current tube M20 can be coupled to the voltage of the second tail current terminal Nt through the second coupling capacitor Cb2. When the jump of the positive differential input signal IN+ ends, the reference signal Vn4 turns on the nineteenth transistor M19, pulls the voltage of the control terminal of the second current tube M20 down to the voltage of the second power supply terminal VSS, thereby turning off the second current tube M20. The reference signal Vn4 is generated by a logic circuit in an additional control circuit, and its timing is related to the timing of the positive differential input signal IN+. In one embodiment, the reference signal Vn4 has a pulse to turn on the nineteenth transistor M19, and the pulse corresponds to the rising and falling edge of the positive differential input signal IN+, and the pulse width is slightly greater than or equal to the falling edge width of the positive differential input signal IN+.

[0062] exist Figure 3 In the embodiment, the first tail current terminal Pt is the source terminal of the two input transistors of the first input module 311, that is, the source terminal of the second transistor M2 and the source terminal of the third transistor M3. Similarly, the second tail current terminal Nt is the source terminal of the two input terminals of the second input module 312, that is, the source terminal of the fifth transistor M5 and the sixth transistor M6.

[0063] exist Figure 3In the embodiment, the pull-up circuit 343 and the pull-down circuit 344 respectively control the first current tube M18 and the second current tube M20 to operate when the positive differential signal IN+ jumps, thereby controlling the first current source circuit 341 and the second current source circuit 342 to operate only when it is necessary to increase the conversion rate of the voltage at the output terminal OUT. While increasing the conversion rate of the voltage at the output terminal OUT, the power of the first current source circuit 341 and the second current source circuit 342 is reduced to a lower level.

[0064] In some embodiments, the reference signal Vp4 and the reference signal Vn4 may also be reference signals with constant values, forming current branches at the control end of the first current tube M18 and the control end of the second current tube M20, respectively, so as to promptly shut down the first current tube M18 and the second current tube M20 after the differential input signal IN+ jumps.

[0065] Figure 4 4 is a schematic diagram of a circuit structure of an amplifier circuit 400 according to an embodiment of the present application. The amplifier circuit 400 includes a preamplifier unit 310, an amplifier unit 320, a frequency compensation unit 330 and a first conversion rate optimization unit 440. Figure 3 Compared with the embodiment, the first conversion rate optimization unit 440 includes a first current source circuit 441 and a second current source circuit 442. The control end of the first current source circuit 441, that is, the first end of the first coupling capacitor Cb1, is coupled to the positive differential input terminal IN+. Similarly, the control end of the second current source circuit 442, that is, the first end of the second coupling capacitor Cb2, is also coupled to the positive differential input terminal IN+. The operation of the first current source circuit 441 and the second current source circuit 442 is determined according to the signal of the positive differential input terminal IN+.

[0066] The working principle of the amplifier circuit 400 is similar to that of the amplifier circuit 300 , and will not be discussed in detail here for the sake of brevity.

[0067] Figure 5 2 is a schematic diagram of a circuit structure of an amplifier circuit 500 according to an embodiment of the present application. The amplifier circuit 500 includes a preamplifier unit 310, an amplifier unit 320, a frequency compensation unit 330 and a first conversion rate optimization unit 540. Figure 3 Compared with the embodiment, the first conversion rate optimization unit 540 includes a first current source circuit 541 and a second current source circuit 542. The first current source circuit 541 includes a first coupling capacitor Cb1, a pull-up circuit 543 and a first current tube M18. Figure 5In the embodiment, the pull-up circuit 543 includes a first resistor R1. After the voltage jump of the first tail current terminal Pt ends, the first resistor R1 pulls up the voltage of the control end of the first current tube M18 and turns off the first current tube M18 to reduce the power consumption of the first current source circuit 541. The second current source circuit 542 includes a second coupling capacitor Cb2, a pull-down circuit 544, and a second current tube M20. The pull-down circuit 544 includes a second resistor R2. After the voltage jump of the second tail current terminal Nt ends, the second resistor R2 pulls down the voltage of the control end of the second current tube M20 and turns off the second current tube M20 to reduce the power consumption of the second current source circuit 542.

[0068] The working principle of the amplifier circuit 500 is similar to that of the amplifier circuit 300 , and for the sake of brevity, it will not be discussed in detail here.

[0069] Figure 6 6 is a schematic diagram of a circuit structure of an amplifier circuit 600 according to an embodiment of the present application. The amplifier circuit 600 includes a preamplifier unit 310, an amplifier unit 320, a frequency compensation unit 330 and a first conversion rate optimization unit 640. Figure 5 Compared with the embodiment, the first conversion rate optimization unit 640 includes a first current source circuit 641 and a second current source circuit 642. The control end of the first current source circuit 641, that is, the first end of the first coupling capacitor Cb1, is coupled to the positive differential input terminal IN+. Similarly, the control end of the second current source circuit 642, that is, the first end of the second coupling capacitor Cb2, is also coupled to the positive differential input terminal IN+. The operation of the first current source circuit 641 and the second current source circuit 642 is determined according to the signal of the positive differential input terminal IN+.

[0070] The working principle of the amplifier circuit 600 is similar to that of the amplifier circuit 300 , and for the sake of brevity, it will not be discussed in detail here.

[0071] Figure 7 is a schematic diagram of a circuit structure of an amplifier circuit 700 according to an embodiment of the present application. The amplifier circuit 700 includes a preamplifier unit 310, an amplifier unit 320, a frequency compensation unit 330 and a first conversion rate optimization unit 740. Figure 3 Compared with the embodiment, the first conversion rate optimization unit 740 includes a first current source circuit 741 and a second current source circuit 742. The first current source circuit 741 includes a first coupling capacitor Cb1, a pull-up circuit 743 and a first current tube M18. Figure 7In the embodiment, the pull-up circuit 743 includes a seventeenth transistor M17 with a diode connection structure. The function of the seventeenth transistor M17 is similar to that of a resistor. After the voltage jump of the first tail current terminal Pt ends, the voltage of the control terminal of the first current tube M18 is pulled up, and the first current tube M18 is turned off to reduce the power consumption of the first current source circuit 741. The second current source circuit 742 includes a second coupling capacitor Cb2, a pull-down circuit 744, and a second current tube M20. The pull-down circuit 744 includes a nineteenth transistor M19 with a diode connection structure. After the voltage jump of the second tail current terminal Nt ends, the nineteenth transistor M19 pulls down the voltage of the control terminal of the second current tube M20, and turns off the second current tube M20 to reduce the power consumption of the second current source circuit 742.

[0072] The working principle of the amplifier circuit 700 is similar to that of the amplifier circuit 300 , and for the sake of brevity, it will not be discussed in detail here.

[0073] Figure 8 8 is a schematic diagram of a circuit structure of an amplifier circuit 800 according to an embodiment of the present application. The amplifier circuit 800 includes a preamplifier unit 310, an amplifier unit 320, a frequency compensation unit 330 and a first conversion rate optimization unit 840. Figure 7 Compared with the embodiment, the first conversion rate optimization unit 840 includes a first current source circuit 841 and a second current source circuit 842. The control end of the first current source circuit 841, that is, the first end of the first coupling capacitor Cbl is coupled to the positive differential input terminal IN+. Similarly, the control end of the second current source circuit 842, that is, the first end of the second coupling capacitor Cb2 is also coupled to the positive differential input terminal IN+. The operation of the first current source circuit 841 and the second current source circuit 842 is determined according to the signal of the positive differential input terminal IN+.

[0074] The working principle of the amplifier circuit 800 is similar to that of the amplifier circuit 300 , and for the sake of brevity, it will not be discussed in detail here.

[0075] Fig. 9 is a schematic diagram of a circuit structure of an amplifier circuit 900 according to an embodiment of the present application. The amplifier circuit 900 includes a preamplifier unit 310, an amplifier unit 320, a frequency compensation unit 330 and a first conversion rate optimization unit 940. Figure 3 Compared with the embodiment, the first conversion rate optimization unit 940 includes a first current source circuit 941 and a second current source circuit 942 .

[0076] The first current source circuit 941 includes a first coupling capacitor Cb1, a pull-up circuit 943 and a first current tube M18. Fig. 9In an embodiment, the pull-up circuit 943 includes a seventeenth transistor M17 (first pull-up tube) and a twenty-first transistor M21 (second pull-up tube) coupled in series between the first power supply terminal VDD and the control terminal of the first current tube M18. The control terminals of the seventeenth transistor M17 and the twenty-first transistor M21 receive reference signals Vp4 and Vp5, respectively. In an embodiment, the reference signal Vp4 turns off the seventeenth transistor M17 before the positive differential input signal IN+ jumps, so that the voltage of the control terminal of the first current tube M18 can be coupled to the voltage of the first tail current terminal Pt through the first coupling capacitor Cb1. When the jump of the positive differential input signal IN+ ends, the reference signal Vp4 turns on the seventeenth transistor M17, pulls the voltage of the control terminal of the first current tube M18 up to the voltage of the first power supply terminal VDD, thereby turning off the first current tube M18. The reference signal Vp4 is generated by a logic circuit in an additional control circuit, and its timing is related to the timing of the positive differential input signal IN+. The reference signal Vp5 has a constant voltage value, controlling the twenty-first transistor M21 to remain turned on, thereby accelerating the change of the voltage at the control end of the first current tube M18 and quickly turning on and off the first current tube M18 to reduce the power consumption of the first current source circuit 941.

[0077] The second current source circuit 942 includes a second coupling capacitor Cb2, a pull-down circuit 944, and a second current tube M20. Fig. 9 In an embodiment, the pull-down circuit 944 includes a nineteenth transistor M19 (a first pull-down tube) and a twenty-second transistor M22 (a second pull-down tube) coupled in series between the second power supply terminal VSS and the control terminal of the second current tube M20. The control terminals of the nineteenth transistor M19 and the second second transistor M22 receive reference signals Vn4 and Vn5, respectively. In an embodiment, the reference signal Vn4 turns off the nineteenth transistor M19 before the positive differential input signal IN+ jumps, so that the voltage of the control terminal of the second current tube M20 can be coupled to the voltage of the second tail current terminal Nt through the second coupling capacitor Cb2. When the jump of the positive differential input signal IN+ ends, the reference signal Vn4 turns on the nineteenth transistor M19, pulls the voltage of the control terminal of the second current tube M20 down to the voltage of the second power supply terminal VSS, thereby turning off the second current tube M20. The reference signal Vn4 is generated by a logic circuit in an additional control circuit, and its timing is related to the timing of the positive differential input signal IN+. The reference signal Vn5 has a constant voltage value, controlling the twenty-first transistor M21 to remain turned on, thereby accelerating the change of the voltage at the control end of the second current tube M20 and quickly turning on and off the second current tube M20 to reduce the power consumption of the second current source circuit 942 .

[0078] The working principle of the amplifier circuit 900 is similar to that of the amplifier circuit 300 , and for the sake of brevity, it will not be discussed in detail here.

[0079] Fig.10 1 is a schematic diagram of a circuit structure of an amplifier circuit 1000 according to an embodiment of the present application. The amplifier circuit 1000 includes a preamplifier unit 310, an amplifier unit 320, a frequency compensation unit 330 and a first conversion rate optimization unit 1040. Fig. 9 Compared with the embodiment, the first conversion rate optimization unit 1040 includes a first current source circuit 1041 and a second current source circuit 1042. The control end of the first current source circuit 1041, that is, the first end of the first coupling capacitor Cb1, is coupled to the positive differential input terminal IN+. Similarly, the control end of the second current source circuit 1042, that is, the first end of the second coupling capacitor Cb2, is also coupled to the positive differential input terminal IN+. The operation of the first current source circuit 1041 and the second current source circuit 1042 is determined according to the signal of the positive differential input terminal IN+.

[0080] The working principle of the amplifier circuit 1000 is similar to that of the amplifier circuit 300 , and for the sake of brevity, it will not be discussed in detail here.

[0081] Fig.11 1 is a schematic diagram of a circuit structure of an amplifier circuit 1100 according to an embodiment of the present application.

[0082] like Fig.11 As shown, the amplifier circuit 1100 includes a pre-unit 110, an amplifying unit 120, a frequency compensation unit 130, a first conversion rate optimization unit 140 and a second conversion rate optimization unit 150. Figure 1 The amplifier circuit 100 of the embodiment, the amplifier circuit 1100 further includes a second slew rate optimization unit 150 .

[0083] The second conversion rate optimization unit 150 includes a first switch S1 and a second switch S2. The first switch S1 and the second switch S2 include any controllable switches. The first end of the first switch S1 is coupled to the first conversion voltage terminal PD, and the second end is coupled to the output terminal OUT. The first end of the second switch S2 is coupled to the second conversion voltage terminal ND, and the second end is coupled to the output terminal OUT. The control ends of the first switch S1 and the second switch S2 are connected together and receive the positive differential input signal IN+ together. The first switch S1 and the second switch S2 are turned on and off based on the voltage difference between the positive differential input signal IN+ and the output voltage OUT. When the voltage of the positive differential input signal IN+ jumps, resulting in the voltage difference between the positive differential input signal IN+ and the output voltage OUT being greater than the conduction threshold of the first switch S1 and the second switch S2, the first switch S1 and the second switch S2 are turned on, and the first conversion voltage terminal PD and the second conversion voltage terminal ND are short-circuited, thereby accelerating the conversion rate of the voltage of the output terminal OUT.

[0084] The second conversion rate optimization unit 150 can also be configured at Figure 2-Figure 10 The amplifier circuits 200 to 1000 are shown.

[0085] Fig.12 A schematic diagram comparing the voltage conversion rate of the output voltage of an amplifier circuit in the prior art and the voltage conversion rate of the output voltage of the amplifier circuit 900 according to an embodiment of the present application is shown.

[0086] exist Fig.12 In FIG. 9 , the thin black line represents the positive differential input signal IN+, the thick black line represents the waveform of the output voltage OUT of the amplifier circuit 900, marked as OUT1, and the dotted line represents the waveform of the output voltage of the amplifier circuit of the prior art, marked as OUT2. Fig.12 It can be clearly seen that when the positive differential input signal IN+ jumps positively and negatively, compared with the amplifier circuit in the prior art, the slope of the waveform OUT1 of the output voltage OUT of the amplifier circuit 900 with the first conversion rate optimization unit 940 is higher, that is, it has a better conversion rate.

[0087] The amplifier circuit of the embodiment of the present application can be used as a buffer of the source driving circuit in the liquid crystal display device. The source driving circuit includes the following parts: a latch circuit for storing data, and a level shifter for adjusting the data voltage (for example, processing the data output from the latch circuit). The source driving circuit converts the level-shifted data from a digital value to an analog signal, and transmits the analog signal to the data line using the buffer.

[0088] It should be understood that in the present application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0089] The above is only a preferred embodiment of the present application and does not constitute any formal limitation to the present application. Although the present application has been disclosed as above with a preferred embodiment, it is not intended to limit the present application. Any technician familiar with the art can make many possible changes and modifications to the technical solution of the present application using the methods and technical contents disclosed above without departing from the scope of the technical solution of the present application, or modify it into an equivalent embodiment of equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application still fall within the scope of protection of the technical solution of the present application.

Claims

1. An amplifier circuit, comprising: A front unit has a positive differential input terminal and a negative differential input terminal for receiving a positive differential input signal and a negative differential input signal respectively, and outputs a first conversion signal and a second conversion signal based on the positive differential input signal and the negative differential input signal; as well as an amplifying unit, receiving the first conversion signal and the second conversion signal, and outputting an output signal of the amplifier circuit at an output end based on the first conversion signal and the second conversion signal; A frequency compensation unit, comprising a first frequency compensation capacitor and a second frequency compensation capacitor, wherein the first frequency compensation capacitor has a first end coupled to the first current shunt point of the pre-unit and a second end coupled to the output end of the amplifying unit, and the second frequency compensation capacitor has a first end coupled to the second current shunt point of the pre-unit and a second end coupled between the output ends of the amplifying unit; as well as The first conversion rate optimization unit includes a first current source circuit and a second current source circuit, the first current source circuit having a first end coupled to the first power supply end, a second end coupled to the first end of the first frequency compensation capacitor, and a control end receiving the positive differential input signal or a follower signal of the positive differential input signal, and the second current source circuit having a first end coupled to the second power supply end, a second end coupled to the first end of the second frequency compensation capacitor, and a control end receiving the positive differential input signal or a follower signal of the positive differential input signal.

2. The amplifier circuit of claim 1, wherein: The first current source comprises: A first coupling capacitor having a first end and a second end, wherein the first end is coupled to a first tail current end of the preamplifier unit; a first current tube having a first end coupled to the first power supply end, a second end coupled to the first end of the first frequency compensation capacitor, and a control end coupled to the second end of the first coupling capacitor; and A pull-up circuit, having a first end coupled to the first power supply end, and a second end coupled to the control end of the first current tube; The second current source comprises: A second coupling capacitor having a first end and a second end, wherein the first end is coupled to the second tail current end of the preamplifier unit; a second current tube having a first end coupled to the second power supply end, a second end coupled to the first end of the second frequency compensation capacitor, and a control end coupled to the second end of the second coupling capacitor; and The pull-down circuit has a first end coupled to the second power supply end and a second end coupled to the control end of the second current tube.

3. The amplifier circuit of claim 1, wherein: The first current source comprises: A first coupling capacitor having a first end and a second end, wherein the first end is coupled to the positive differential input end of the preamplifier unit; a first current tube having a first end coupled to the first power supply end, a second end coupled to the first end of the first frequency compensation capacitor, and a control end coupled to the second end of the first coupling capacitor; and A pull-up circuit, having a first end coupled to the first power supply end, and a second end coupled to the control end of the first current tube; The second current source comprises: A second coupling capacitor having a first end and a second end, wherein the first end is coupled to the positive differential input end of the preamplifier unit; a second current tube having a first end coupled to the second power supply end, a second end coupled to the first end of the second frequency compensation capacitor, and a control end coupled to the second end of the second coupling capacitor; and The pull-down circuit has a first end coupled to the second power supply end and a second end coupled to the control end of the second current tube.

4. The amplifier circuit according to any one of claims 2 or 3, wherein: The pull-up circuit comprises: The pull-up tube has a first end coupled to the first power supply end, a second end coupled to the control end of the first current tube, and a control end receiving a reference signal.

5. The amplifier circuit as claimed in claim 4, wherein the reference signal is a constant value.

6. The amplifier circuit as claimed in claim 4, wherein the reference signal is related to the positive differential input signal, jumps before the positive differential input signal jumps from high to low, turns on the pull-up tube, and turns off the pull-up tube after the positive differential input signal jumps from high to low.

7. The amplifier circuit according to any one of claims 2 or 3, wherein: The pull-up circuit comprises: The pull-up tube has a first end coupled to the first power supply end, a second end coupled to the control end of the first current tube, and a control end coupled to the control end of the first current tube.

8. The amplifier circuit according to any one of claims 2 or 3, wherein: The pull-up circuit comprises: A first pull-up tube and a second pull-up tube are coupled in series between the first power supply terminal and the control terminal of the first current tube, the control terminal of the first pull-up tube receives a first reference signal, and the control terminal of the second pull-up tube receives a second reference signal; The first reference signal is related to the positive differential input signal, and switches on the first pull-up tube before the positive differential input signal switches from high to low. The first pull-up tube is turned off after the positive differential input signal switches from high to low. The second reference signal is a constant value.

9. The amplifier circuit according to any one of claims 2 or 3, wherein: The pull-up circuit comprises: The resistor has a first end and a second end, wherein the first end of the resistor is coupled to the first power supply end, and the second end of the resistor is coupled to the control end of the first current tube.

10. The amplifier circuit according to any one of claims 2 or 3, wherein: The pull-down circuit comprises: The pull-down tube has a first end coupled to the first power supply end, a second end coupled to the control end of the first current tube, and a control end receiving a reference signal.

11. The amplifier circuit as claimed in claim 10, wherein the reference signal is a constant value.

12. The amplifier circuit as claimed in claim 10, wherein the reference signal is related to the positive differential input signal, jumps before the positive differential input signal jumps from low to high, turns on the pull-down tube, and turns off the pull-down tube after the positive differential input signal jumps from low to high.

13. The amplifier circuit according to any one of claims 2 or 3, wherein: The pull-down circuit comprises: The pull-down tube has a first end coupled to the second power supply end, a second end coupled to the control end of the second current tube, and a control end coupled to the control end of the second current tube.

14. The amplifier circuit according to any one of claims 2 or 3, wherein: The pull-down circuit comprises: a first pull-down tube and a second pull-down tube coupled in series between a second power supply terminal and a control terminal of the second current tube, wherein the control terminal of the first pull-down tube receives a first reference signal, and the control terminal of the second pull-down tube receives a second reference signal; The first reference signal is related to the positive differential input signal, and jumps before the positive differential input signal jumps from low to high, turning on the first pull-down tube, and turns off the first pull-down tube after the positive differential input signal jumps from low to high. The second reference signal is a constant value.

15. The amplifier circuit according to any one of claims 2 or 3, wherein: The pull-down circuit comprises: The resistor has a first end and a second end, wherein the first end of the resistor is coupled to the second power supply end, and the second end of the resistor is coupled to the control end of the second current tube.

16. The amplifier circuit according to any one of claims 2 or 3, further comprising a second slew rate optimization unit, wherein the second slew rate optimization unit comprises: A first switch, having a first end for receiving a first conversion signal, a second end coupled to the output end of the amplifying unit, and a control end coupled to the positive differential input end; as well as The second switch has a first end for receiving the second conversion signal, a second end coupled to the output end of the amplifying unit, and a control end coupled to the positive differential input end.

17. The amplifier circuit of claim 1, wherein: The front unit comprises: A first input module has a positive differential input terminal and a negative differential input terminal for receiving a positive differential input signal and a negative differential input signal respectively, and has a first group of differential current output terminals; A second input module, having the positive differential input terminal and the negative differential input terminal for receiving the positive differential input signal and the negative differential input signal respectively, and having a second group of differential current output terminals; A first current mirror module is coupled to the second set of differential current output terminals and provides a first conversion voltage based on currents of the second set of differential current output terminals; and The second current mirror module is coupled to the first set of differential current output terminals and provides a first conversion voltage based on the current of the first set of differential current output terminals.

18. The amplifier circuit of claim 17, wherein: The first input module includes a first transistor, a second transistor and a third transistor, the first transistor having a first end coupled to the first power supply end and a second end coupled to the first tail current end, the second transistor having a first end coupled to the first tail current end and a second end coupled to one end of the first group of differential current output ends, the third transistor having a first end coupled to the first tail current end and a second end coupled to the other end of the first group of differential current output ends, and control ends of the second transistor and the third transistor receiving a negative differential input signal and a positive differential input signal respectively; as well as The second input module includes a fourth transistor, a fifth transistor and a sixth transistor, the fourth transistor having a first end coupled to the second power supply end and a second end coupled to the second tail current end, the fifth transistor having a first end coupled to the second tail current end and a second end coupled to one end of the second group of differential current output ends, the sixth transistor having a first end coupled to the second tail current end and a second end coupled to the other end of the second group of differential current output ends, and control ends of the fifth transistor and the sixth transistor receiving a negative differential input signal and a positive differential input signal respectively; The follower signal of the positive differential input signal represents the voltage of the first tail current terminal or the voltage of the second tail current terminal.

19. The amplifier circuit of claim 17, wherein: The first current mirror module includes a first current reference module and a first current follower module; and The second current mirror module includes a second current reference module and a second current follower module; in: The first current reference module and the first current follower module are coupled via a first transmission gate; and The second current reference module and the second current follower module are coupled via a second transmission gate.

20. The amplifier circuit of claim 1, wherein: The amplification unit comprises: A fifteenth transistor has a first terminal coupled to the first power terminal, a second terminal coupled to the output terminal of the amplifier circuit, and a control terminal receiving the first conversion voltage; and The sixteenth transistor has a first end coupled to the second power supply end, a second end coupled to the output end of the amplifier circuit, and a control end receiving a second conversion voltage.

Images