Multilayer electronic component and board having the same mounted thereon

Abstract

The present disclosure provides a multilayer electronic component and a board on which the multilayer electronic component is mounted, the multilayer electronic component including a body having an octagonal prism shape, the body including a dielectric layer and an internal electrode. The internal electrodes include a first internal electrode in contact with the first edge surface and the third edge surface, and a second internal electrode in contact with the second edge surface and the fourth edge surface. The external electrodes include first and third external electrodes disposed on the first and third edge surfaces, respectively, to be in contact with the first internal electrode, and second and fourth external electrodes disposed on the second and fourth edge surfaces, respectively, to be in contact with the second internal electrode.

Description

[0001] This application claims the benefit of priority from Korean Patent Application No. 10-2023-0162659 filed on November 21, 2023 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] The present disclosure relates to a multi-layer electronic component and a board on which the multi-layer electronic component is mounted. Background Art

[0003] Multilayer ceramic capacitors (MLCC, a type of multilayer electronic component) are chip capacitors that are mounted on printed circuit boards of various types of electronic products such as imaging devices including liquid crystal displays (LCDs) and plasma display panels (PDPs), computers, smart phones, and mobile phones, and are used for charging or discharging.

[0004] Multilayer ceramic capacitors are used as components of various electronic devices because they have a small size, ensure high capacitance, and are easy to mount. With the miniaturization and high output power of various electronic devices such as computers and mobile devices, the demand for miniaturization and high capacitance of multilayer ceramic capacitors is also increasing.

[0005] MLCCs have also been widely used for decoupling to remove noise from electrical signals due to low equivalent series inductance (ESL) and excellent high-frequency characteristics.

[0006] To address noise in high-speed integrated circuits (ICs), pad side capacitors (LSCs) may be applied to portions adjacent to the ICs. It is known that LSCs require low thickness and high-frequency characteristics. To reduce ESL, it is important to minimize the amount of magnetic flux linkage per unit current in the high-frequency region. Such issues have been addressed in various ways, such as controlling the formation and structure in a manner that minimizes current paths or current loops, or setting the inner and outer electrodes in a manner that cancels out magnetic fields.

[0007] Typically, an LSC may be disposed on the lower portion of an IC board and may therefore need to have low thickness and low ESL characteristics. In this case, the LSC may be mounted at a location where solder balls on the lower portion of the board are removed. Low inductance ceramic capacitors (LICCs) have been mainly used. However, there is an increasing demand for capacitors having a square form factor. Summary of the invention

[0008] An aspect of the present disclosure is to provide a multilayer electronic component having improved high frequency properties (low ESL) by reducing a current path of the multilayer electronic component.

[0009] Another aspect of the present disclosure is to improve equivalent series resistance (ESR) and equivalent series inductance (ESL) by minimizing a bottleneck portion of an inner electrode in a region where the inner electrode and the outer electrode contact each other.

[0010] Another aspect of the present disclosure is to improve the reliability of a multilayer electronic component by uniformly coating internal electrodes to reduce errors in a manufacturing process.

[0011] However, aspects of the present disclosure are not limited to those set forth herein and will be more readily understood in the course of describing specific example embodiments of the present disclosure.

[0012] According to one aspect of the present disclosure, a multilayer electronic component is provided, comprising a body and an external electrode arranged on the body, the body comprising a dielectric layer and an internal electrode arranged alternately with the dielectric layer in a first direction, the body having a first surface and a second surface opposite to each other in the first direction, a third surface and a fourth surface opposite to each other in a second direction intersecting the first direction, and a fifth surface and a sixth surface opposite to each other in a third direction intersecting the first direction and the second direction, the body having a first edge surface connected to the first surface, the second surface, the third surface and the fifth surface, a second edge surface connected to the first surface, the second surface, the fourth surface and the fifth surface, a third edge surface connected to the first surface, the second surface, the fourth surface and the sixth surface and opposite to the first edge surface, and a fourth edge surface connected to the first surface, the second surface, the third surface and the sixth surface and opposite to the second edge surface. The internal electrode may include a first internal electrode in contact with the first edge surface and the third edge surface and a second internal electrode in contact with the second edge surface and the fourth edge surface. The external electrode may include a first external electrode and a third external electrode, respectively disposed on the first edge surface and the third edge surface to contact the first internal electrode, and a second external electrode and a fourth external electrode, respectively disposed on the second edge surface and the fourth edge surface to contact the second internal electrode.

[0013] According to another aspect of the present disclosure, there is provided a board having a multilayer electronic component mounted thereon, the board comprising: a printed circuit board; a multilayer electronic component disposed on the printed circuit board; and a solder ball disposed on the printed circuit board, the solder ball surrounding the multilayer electronic component. The multilayer electronic component may include a body and an external electrode disposed on the body, the body including a dielectric layer and an internal electrode alternately disposed with the dielectric layer in a first direction, the body having a first surface and a second surface opposite to each other in the first direction, a third surface and a fourth surface opposite to each other in a second direction intersecting the first direction, and a fifth surface and a sixth surface opposite to each other in a third direction intersecting the first direction and the second direction, the body having a first edge surface connected to the first surface, the second surface, the third surface, and the fifth surface, a second edge surface connected to the first surface, the second surface, the fourth surface, and the fifth surface, a third edge surface connected to the first surface, the second surface, the fourth surface, and the sixth surface and opposite to the first edge surface, and a fourth edge surface connected to the first surface, the second surface, the third surface, and the sixth surface and opposite to the second edge surface. The inner electrode may include a first inner electrode in contact with the first edge surface and the third edge surface, and a second inner electrode in contact with the second edge surface and the fourth edge surface. The outer electrode may include a first outer electrode and a third outer electrode, respectively disposed on the first edge surface and the third edge surface to contact the first inner electrode, and a second outer electrode and a fourth outer electrode, respectively disposed on the second edge surface and the fourth edge surface to contact the second inner electrode.

[0014] By reducing the current path of the multilayer electronic component, the multilayer electronic component can have improved high frequency characteristics (low ESL).

[0015] By minimizing a bottleneck portion of the inner electrode in a region where the inner electrode and the outer electrode contact each other, ESR and ESL may be improved.

[0016] By uniformly coating the internal electrodes to reduce errors in the manufacturing process, the multilayer electronic component may have improved reliability.

[0017] However, aspects of the present disclosure are not limited to those set forth herein and will be more readily understood in the course of describing specific example embodiments of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The above and other aspects, features and advantages of the present disclosure will be more clearly understood through the following detailed description in conjunction with the accompanying drawings, in which: Figure 1is a schematic perspective view of a multilayer electronic assembly according to an example embodiment of the present disclosure; Figure 2 is a schematic exploded perspective view of the laminated structure of the main body; Figure 3A is a schematic cross-sectional view including a first inner electrode, and Figure 3B is a schematic cross-sectional view including a second inner electrode; Figure 4 is a schematic plan view of a cross-sectional view of a stack including a first internal electrode and a second internal electrode; Figure 5A is a schematic diagram including a cross-sectional view of a first inner electrode, Figure 5B is a schematic diagram including a cross-sectional view of a second inner electrode; and Figure 6 is a schematic plan view of a board having multi-layer electronic components mounted thereon according to an example embodiment of the present disclosure. DETAILED DESCRIPTION

[0019] Hereinafter, example embodiments of the present disclosure are described with reference to the accompanying drawings. However, the present disclosure may be illustrated in many different forms and should not be construed as being limited to the specific example embodiments set forth herein. In addition, example embodiments of the present disclosure may be provided to more fully describe the present disclosure to those skilled in the art. Therefore, for the sake of clarity of description, the shapes and sizes of the elements in the accompanying drawings may be exaggerated, and the elements represented by the same reference numerals in the accompanying drawings may be the same elements.

[0020] In order to clearly illustrate the present disclosure, parts irrelevant to the description are omitted, and the size and thickness are exaggerated to clearly indicate the layers and regions, and similar parts having the same function in the same scope are indicated by similar reference numerals throughout the specification. Throughout the specification, unless otherwise specifically stated, when an element is referred to as "comprising" or "including", it means that it may also include other elements, rather than excluding other elements.

[0021] In the drawings, a first direction may be defined as a stacking direction or a thickness direction, a second direction may be defined as a length direction, and a third direction may be defined as a width direction.

[0022] Multilayer electronic components Figure 1 is a schematic perspective view of a multilayer electronic assembly according to an example embodiment of the present disclosure.

[0023] Figure 2 It is a schematic exploded perspective view of the stacked structure of the main body.

[0024] Figure 3A is a schematic cross-sectional view including a first inner electrode, Figure 3Bis a schematic cross-sectional view including a second inner electrode.

[0025] Figure 4 is a schematic plan view of a stacked cross-sectional view including a first internal electrode and a second internal electrode.

[0026] Figure 5A is a schematic diagram including a cross-sectional view of a first inner electrode, and Figure 5B is a schematic diagram including a cross-sectional view of a second inner electrode.

[0027] Figure 6 is a schematic plan view of a board having multi-layer electronic components mounted thereon according to an example embodiment of the present disclosure.

[0028] In the following, reference will be made to Figures 1 to 6 A multilayer electronic component and a board on which the multilayer electronic component is mounted according to an exemplary embodiment of the present disclosure are described in detail. A multilayer ceramic capacitor is described as an example of a multilayer electronic component. However, the present disclosure can be applied to various electronic products using a dielectric composition, such as an inductor, a piezoelectric element, a varistor, a thermistor, and the like.

[0029] A multilayer electronic component 100 according to an exemplary embodiment of the present disclosure may include a body 110 and external electrodes 131, 132, 133, and 134 disposed on the body 110, the body 110 including a dielectric layer 111 and internal electrodes 121 and 122 alternately disposed with the dielectric layer 111 in a first direction, the body 110 having a first surface 1 and a second surface 2 opposite to each other in the first direction, a third surface 3 and a fourth surface 4 opposite to each other in a second direction perpendicular to the first direction, and a fifth surface 5 and a fourth surface 6 opposite to each other in a third direction perpendicular to the first direction and the second direction. Six surfaces 6, the main body 110 has a first edge surface C1 connected to the first surface 1, the second surface 2, the third surface 3 and the fifth surface 5, a second edge surface C2 connected to the first surface 1, the second surface 2, the fourth surface 4 and the fifth surface 5, a third edge surface C3 connected to the first surface 1, the second surface 2, the fourth surface 4 and the sixth surface 6, and a fourth edge surface C4 connected to the first surface 1, the second surface 2, the third surface 3 and the sixth surface 6, the third edge surface C3 is opposite to the first edge surface C1, and the fourth edge surface C4 is opposite to the second edge surface C2. The inner electrodes 121 and 122 may include a first inner electrode 121 in contact with the first edge surface C1 and the third edge surface C3 and a second inner electrode 122 in contact with the second edge surface C2 and the fourth edge surface C4, and the outer electrodes 131, 132, 133, and 134 may include a first outer electrode 131 and a third outer electrode 133 disposed on the first edge surface C1 and the third edge surface C3, respectively, and a second outer electrode 132 and a fourth outer electrode 134 disposed on the second edge surface C2 and the fourth edge surface C4, respectively, the first outer electrode 131 and the third outer electrode 133 being in contact with the first inner electrode 121, and the second outer electrode 132 and the fourth outer electrode 134 being in contact with the second inner electrode 122. Each of the first to fourth outer electrodes may cover a portion of the first surface and a portion of the second surface.

[0030] In the body 110 , dielectric layers 111 and internal electrodes 121 and 122 may be alternately stacked.

[0031] More specifically, the body 110 may include a capacitance forming part disposed in the body 110 , the capacitance forming part including a first internal electrode 121 and a second internal electrode 122 stacked in a first direction with the dielectric layer 111 interposed therebetween to form capacitance.

[0032] The specific shape of the body 110 is not particularly limited. However, as shown in the figure, the body 110 may have an octagonal prism shape or a shape similar thereto. During the sintering process, the ceramic particles included in the body 110 may shrink so that the body 110 may not have an octagonal prism shape with perfect straight lines, but may have a substantially octagonal prism shape.

[0033] The body 110 may have a first surface 1 and a second surface 2 opposite to each other in a first direction, a third surface 3 and a fourth surface 4 connected to the first surface 1 and the second surface 2, and a fifth surface 5 and a sixth surface 6 connected to the first surface 1 and the second surface 2, the third surface 3 and the fourth surface 4 opposite to each other in a second direction perpendicular to the first direction, the fifth surface 5 and the sixth surface 6 not connected to the third surface 3 and the fourth surface 4, and the fifth surface 5 and the sixth surface 6 opposite to each other in a third direction perpendicular to the first direction and the second direction. The body 110 may have a first edge surface C1 connected to the first surface 1, the second surface 2, the third surface 3, and the fifth surface 5, a second edge surface C2 connected to the first surface 1, the second surface 2, the fourth surface 4, and the fifth surface 5, a third edge surface C3 connected to the first surface 1, the second surface 2, the fourth surface 4, and the sixth surface 6, and a fourth edge surface C4 connected to the first surface 1, the second surface 2, the third surface 3, and the sixth surface 6, the third edge surface C3 opposite to the first edge surface C1, and the fourth edge surface C4 opposite to the second edge surface C2.

[0034] That is, the first edge surface C1, the second edge surface C2, the third edge surface C3, and the fourth edge surface C4 may be spaced apart from each other.

[0035] In the present disclosure, "surface" may refer to all surfaces including the first surface 1, the second surface 2, the third surface 3, the fourth surface 4, the fifth surface 5, and the sixth surface 6, and the first edge surface C1, the second edge surface C2, the third edge surface C3, and the fourth edge surface C4. If necessary, the first surface 1, the second surface 2, the third surface 3, the fourth surface 4, the fifth surface 5, and the sixth surface 6, and the first edge surface C1, the second edge surface C2, the third edge surface C3, and the fourth edge surface C4 may be described separately, but those skilled in the art will understand appropriately.

[0036] In addition, with respect to the cross-section of the body 110 in the second and third directions, the first, second, third, and fourth edge surfaces C1, C2, C3, and C4 may be substantially non-parallel to the second and third directions.

[0037] In the present disclosure, “substantially non-parallel” may mean that the angle formed by a line, a surface, and a direction and another line, another surface, and another direction is greater than 0° and less than 180°, specifically, greater than or equal to 1° and less than or equal to 179°, more specifically, greater than or equal to 5° and less than or equal to 175°. “Substantially parallel” may mean that due to process errors or measurement errors recognizable by those of ordinary skill in the art, the angle formed by a line, a surface, and a direction and another line, another surface, and another direction is less than or equal to 1°, or more specifically, less than or equal to 5°, or may mean that a line, a surface, and a direction are parallel to another line, another surface, and another direction.

[0038] For example, the first edge surface C1, the second edge surface C2, the third edge surface C3 and the fourth edge surface C4 are substantially not parallel to the second direction and the third direction, which may mean that for the cross-section of the body 110 in the second direction and the third direction, the angle formed by the first edge surface C1, the second edge surface C2, the third edge surface C3 and the fourth edge surface C4 and the second direction, and the angle formed by the first edge surface C1, the second edge surface C2, the third edge surface C3 and the fourth edge surface C4 and the third direction are greater than 0° and less than 180°, specifically, greater than or equal to 1° and less than or equal to 179°, more specifically, greater than or equal to 5° and less than or equal to 175°.

[0039] The plurality of dielectric layers 111 included in the body 110 may be in a sintered state, and adjacent dielectric layers 111 may be integrated with each other such that a boundary therebetween is not easily distinguishable without using a scanning electron microscope (SEM).

[0040] The raw material included in the dielectric layer 111 is not limited as long as sufficient capacitance can be obtained using it. Generally, perovskite (ABO 3 ) based materials. For example, barium titanate based materials, lead composite perovskite based materials or strontium titanate based materials may be used. The barium titanate based materials may include BaTiO 3 BaTiO 3 Examples of the base ceramic particles may include those obtained by partially dissolving Ca or Zr in BaTiO 3 Obtained in (Ba 1-x Ca x )TiO 3 (0 <x<1)、Ba(Ti 1-y Ca y ) 3 (0 <y<1)、(Ba 1- x Ca x )(Ti 1-y Zr y ) 3(0 < x < 1, 0 < y < 1) or Ba(Ti 1-y Zr y )O 3 (0 < y < 1).

[0041] Additionally, for the purpose of the present disclosure, raw materials included in the dielectric layer 111 can be obtained by adding various ceramic additives, organic solvents, binders, dispersants, etc. to particles such as barium titanate (BaTiO 3 ).

[0042] The average thickness of the dielectric layer 111 is not particularly limited.

[0043] To more easily achieve high capacitance and miniaturization of the multilayer electronic component, the average thickness of the dielectric layer 111 can be less than or equal to 1.0 μm, preferably less than or equal to 0.6 μm, and more preferably less than or equal to 0.4 μm.

[0044] Here, the thickness of the dielectric layer 111 can refer to the thickness of the dielectric layer 111 provided between the first internal electrode 121 and the second internal electrode 122.

[0045] The thickness of the dielectric layer 111 can refer to the dimension of the dielectric layer 111 in the first direction. In addition, the thickness of the dielectric layer 111 can refer to the average thickness of the dielectric layer 111, and can refer to the average dimension of the dielectric layer 111 in the first direction.

[0046] The average dimension of the dielectric layer 111 in the first direction can be measured by scanning an image of a cross-section of the main body 110 in the first and second directions with SEM at a magnification of 10,000 times. More specifically, the average dimension of the dielectric layer 111 in the first direction can refer to the average value of the dimensions of one dielectric layer 111 in the first direction measured at thirty points that are equally spaced from each other in the second direction in the scanned image. Thirty equally spaced points can be specified in the capacitance forming portion. Additionally, when this average value measurement is performed on ten dielectric layers 111, the average dimension of the dielectric layer 111 in the first direction can be further generalized.

[0047] The internal electrodes 121 and 122 can be alternately arranged with the dielectric layer 111 in the first direction.

[0048] The internal electrodes 121 and 122 can include a first internal electrode 121 and a second internal electrode 122. The first internal electrode 121 and the second internal electrode 122 can be alternately arranged opposite to each other, with the dielectric layer 111 therebetween. The first internal electrode 121 and the second internal electrode 122 can be electrically isolated from each other by the dielectric layer 111 therebetween in the first direction.

[0049] Specifically, the internal electrodes 121 and 122 may include a first internal electrode 121 exposed to the first edge surface C1 and the third edge surface C3 , and a second internal electrode 122 exposed to the second edge surface C2 and the fourth edge surface C4 .

[0050] More specifically, the first inner electrode 121 may have a first edge surface 121c1 of the first inner electrode disposed in contact with the first edge surface C1 of the body, a second edge surface 121c2 of the first inner electrode disposed to be spaced apart from the second edge surface C2 of the body, a third edge surface 121c3 of the first inner electrode disposed in contact with the third edge surface C3 of the body, and a fourth edge surface 121c4 of the first inner electrode disposed to be spaced apart from the fourth edge surface C4 of the body.

[0051] In addition, the second inner electrode 122 may have a first edge surface 122c1 of the second inner electrode disposed to be spaced apart from the first edge surface C1 of the body, a second edge surface 122c2 of the second inner electrode disposed to be in contact with the second edge surface C2 of the body, a third edge surface 122c3 of the second inner electrode disposed to be spaced apart from the third edge surface C3 of the body, and a fourth edge surface 122c4 of the second inner electrode disposed to be in contact with the fourth edge surface C4 of the body.

[0052] In this case, the first external electrode 131 and the third external electrode 133 may be respectively disposed on the first edge surface C1 and the third edge surface C3 of the body to be respectively connected to the first edge surface 121c1 and the third edge surface 121c3 of the first inner electrode, and the second external electrode 132 and the fourth external electrode 134 may be respectively disposed on the second edge surface C2 and the fourth edge surface C4 of the body to be respectively connected to the second edge surface 122c2 and the fourth edge surface 122c4 of the second inner electrode.

[0053] That is, the first inner electrode 121 may not be connected to the second outer electrode 132 and the fourth outer electrode 134, but may be connected to the first outer electrode 131 and the third outer electrode 133, and the second inner electrode 122 may not be connected to the first outer electrode 131 and the third outer electrode 133, but may be connected to the second outer electrode 132 and the fourth outer electrode 134.

[0054] In other words, the first edge surface 121c1 and the third edge surface 121c3 of the first inner electrode may be in contact with the first edge surface C1 and the third edge surface C3 respectively, and may be exposed to the first edge surface C1 and the third edge surface C3 respectively. However, the first edge surface 121c1 and the third edge surface 121c3 of the first inner electrode may be spaced apart from the third surface 3, the fourth surface 4, the fifth surface 5, the sixth surface 6, and the second edge surface C2 and the fourth edge surface C4. The second edge surface 122c2 and the fourth edge surface 122c4 of the second inner electrode may be in contact with the second edge surface C2 and the fourth edge surface C4 respectively, and may be exposed to the second edge surface C2 and the fourth edge surface C4 respectively. However, the second edge surface 122c2 and the fourth edge surface 122c4 of the second inner electrode may be spaced apart from the third surface 3, the fourth surface 4, the fifth surface 5, the sixth surface 6, and the first edge surface C1 and the third edge surface C3.

[0055] For a cross-section of the main body 110 in the second and third directions, when the length of each of the edge surfaces C1, C2, C3, and C4 is BL and the length of each of the inner electrodes 121 and 122 in contact with the edge surfaces C1, C2, C3, and C4 is IEL, IEL < BL may be satisfied.

[0056] For example, the first edge surface 121c1 and the third edge surface 121c3 of the first inner electrode may be in contact with the first edge surface C1 and the third edge surface C3 of the main body respectively. When the length of the first edge surface C1 is BL and the length of the first edge surface 121c1 of the first inner electrode is IEL, IEL < BL may be satisfied. Such a configuration can be applied to the length of the third edge surface C3 of the main body and the length of the third edge surface 121c3 of the first inner electrode in the same manner. Similarly, it will be easily understood that such a configuration can be applied to the second inner electrode in the same manner.

[0057] That is to say, for a cross-section of the main body 110 in the second and third directions, the area of the inner electrode exposed through the edge surface may not be in contact with the entire edge surface, and may be in contact with only a part of the edge surface.

[0058] The length BL of each of the edge surfaces C1, C2, C3, and C4 and the length IEL of each of the edge surfaces 121c1, 122c2, 121c3, and 122c4 of the inner electrode satisfy IEL < BL, so that the regions of the inner electrodes 121 and 122 in contact with the outer electrodes 131, 132, 133, and 134 may minimally include or may not include the bottleneck portion, thereby improving the equivalent series resistance (ESR) or the equivalent series inductance (ESL). In addition, the external moisture penetration path can be extended, thereby improving the moisture resistance reliability.

[0059] On the other hand, in the present invention, the bottleneck portion of the inner electrode may refer to a shape in which the width or area of ​​the inner electrode decreases between the central portion of the inner electrode and the region where the inner electrode contacts the outer electrode in the inner electrode structure. In other words, the meaning of the inner electrode minimally including or excluding the bottleneck portion may refer to, but is not particularly limited to, a shape in which the width or area of ​​the inner electrode decreases from the central portion of the inner electrode to the region where the inner electrode abuts the outer electrode.

[0060] In addition, with respect to the cross-section of the body 110 in the second direction and the third direction, the internal electrodes 121 and 122 may have areas substantially parallel to the surfaces 3, 4, 5 and 6 of the body 110, and the surfaces 3, 4, 5 and 6 are adjacent to the edge surfaces C1, C2, C3 and C4 of the body 110 that are in contact with the internal electrodes 121 and 121.

[0061] For example, the first inner electrode 121 may contact the first edge surface C1 and the third edge surface C3. In this case, the first inner electrode 121 may have a region spaced apart from the third surface 3 and the fifth surface 5 (adjacent to the first edge surface C1), the region being substantially parallel to the third surface 3 and the fifth surface 5, and the first inner electrode 121 may have a region spaced apart from the fourth surface 4 and the sixth surface 6 (adjacent to the third edge surface C3), the region being substantially parallel to the fourth surface 4 and the sixth surface 6.

[0062] In an example embodiment of the present disclosure, the inner angles of the inner electrodes 121 and 122 may all be obtuse angles.

[0063] That is, the inner angle of the internal electrodes 121 and 122 formed by the edges of the internal electrodes 121 and 122 may be greater than 90° and less than 180°.

[0064] The inner angles of the inner electrodes 121 and 122 may all be obtuse angles, so that the areas of the inner electrodes 121 and 122 that contact the outer electrodes 131, 132, 133, and 134 may include or may not include bottlenecks to a minimum. As a result, the current path may be improved, thereby improving ESR or ESL. In addition, the inner angles of the inner electrodes 121 and 122 may all be obtuse angles, so that the diffusion of oozing that may occur when printing the edge area during the coating of the inner electrode paste may be easily controlled. Therefore, the inner electrodes having a constant size and a constant shape may be coated, so that control may be easily performed to minimize the shape difference between the inner electrodes.

[0065] In addition, the inner angles of the regions where the first internal electrode 121 and the second internal electrode 122 overlap each other may all be obtuse angles.

[0066] In other words, the inner angles of the capacitor forming portion where the first inner electrode 121 and the second inner electrode 122 overlap each other to form a capacitor can all be obtuse angles, thereby minimizing the size of the bottleneck portion of the inner electrode and maximizing the area for forming the capacitor. Therefore, the maximum capacitance in the same area can be easily achieved.

[0067] The body 110 may be formed by alternately stacking first ceramic green sheets having first internal electrode patterns printed thereon and second ceramic green sheets having second internal electrode patterns printed thereon and then performing sintering thereon. Here, the first internal electrode patterns and the second internal electrode patterns may be formed by coating an internal electrode paste. After performing sintering, the first internal electrode patterns and the second internal electrode patterns may become the first internal electrodes 121 and the second internal electrodes 122.

[0068] In this case, the ceramic green sheet and the first and second internal electrode patterns may be partially removed so that the dielectric layer and the internal electrodes having the octagonal prism shape may be manufactured, and the body having the octagonal prism shape may be manufactured.

[0069] Figure 5A is a schematic diagram including a cross-sectional view of a first inner electrode, and Figure 5B is a schematic diagram including a cross-sectional view of a second inner electrode.

[0070] For realizing dielectric layer and internal electrode Figure 5A and Figure 5B It can be described as an example. First, for Figure 5A , the first ceramic green sheet may be set to a square shape. When the size of one side of the square first ceramic green sheet is A1, a line (thick dotted line) connecting two points on the side of the square first ceramic green sheet that are respectively spaced A1a from the vertex may be cut to produce a first ceramic green sheet having an octagonal shape.

[0071] In this case, the square first ceramic green sheet may include first to fourth vertices located in a clockwise direction from the upper left portion, the distances from the second and fourth vertices adjacent to the third vertex to the point adjacent to the third vertex on the side of the cut first ceramic green sheet may be A1b, and the size of the sum of A1a and A1b may be A1. In this case, A1a may preferably be manufactured to have a size of 1 / 3×A1.

[0072] When removing the corner areas of the first ceramic green sheet, two corner areas opposite to each other among the four corner areas are removed similarly, for example, the two corner areas including the first vertex and the third vertex may be coated with the first internal electrode paste, and the first internal electrode paste is coated closer to the first vertex and the third vertex of the first ceramic green sheet, however, the remaining two corner areas, for example, the two corner areas including the second vertex and the fourth vertex, may not be coated with the first internal electrode paste, and the first internal electrode paste is coated away from the second vertex and the fourth vertex of the first ceramic green sheet.

[0073] In other words, for Figure 5A , the first internal electrode paste may be applied close to the first and third vertices of the first ceramic green sheet, and may be applied away from the second and fourth vertices of the first ceramic green sheet.

[0074] As described above, the first internal electrode paste may be applied. Therefore, after removing the corner area of ​​the first ceramic green sheet, the first internal electrode may be exposed through the first edge surface and the third edge surface of the body, and may not be exposed through the second edge surface and the fourth edge surface of the body, and may be spaced apart from the second edge surface and the fourth edge surface of the body.

[0075] The first internal electrode paste may be preferably applied so that the inner angles of the first internal electrode pattern are all obtuse angles, thereby minimizing the size of the bottleneck portion of the internal electrode and manufacturing the first internal electrode having the above-mentioned shape.

[0076] For example, the first inner electrode pattern may be set as a virtual square. In the same manner as the first ceramic green sheet described above, the first inner electrode pattern of the virtual square may also include the first vertex to the fourth vertex located in the clockwise direction from the upper left portion. When the size of one side of the first inner electrode pattern of the virtual square is B1, the first inner electrode paste may be applied so that the first inner electrode pattern has a shape in which points on the side of the first inner electrode pattern that are spaced B1a from the unexposed second vertex of the first inner electrode pattern are connected to each other, and points on the side of the first inner electrode pattern that are spaced B1a from the unexposed fourth vertex of the first inner electrode pattern are connected to each other. In this case, the distance of the points spaced B1a from the second vertex and the fourth vertex of the virtual square first inner electrode pattern, respectively, with respect to the first vertex and the third vertex of the virtual square first inner electrode pattern, may be B1b, and the size of the sum of B1a and B1b may be B. In this case, B1a may preferably be manufactured to have a size of 0.3×B1.

[0077] The method of forming the first ceramic green sheet and the first internal electrode pattern described above can be applied to the method of forming the second ceramic green sheet and the second internal electrode pattern in the same manner, and those skilled in the art will refer to the related art. Figure 5A Symmetrical Figure 5BIt will be easy to understand.

[0078] Here, the method of removing the corner regions (including the first and second internal electrode patterns) of the first and second ceramic green sheets is not particularly limited, but may include removing the regions to be removed using laser cutting or a blade. Alternatively, a scribing method may be used to scribble a line of the edge to be removed from a strip of the stacked ceramic green sheets before sintering is performed, and then physically break the strip in a subsequent process.

[0079] The material included in the internal electrodes 121 and 122 is not particularly limited, and any material having excellent conductivity may be used. For example, the internal electrodes 121 and 122 may include at least one of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof.

[0080] In addition, the internal electrodes 121 and 122 may be formed by printing an internal electrode conductive paste including at least one of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof on a ceramic green sheet. A screen printing method or a gravure printing method may be used as a method of printing the internal electrode conductive paste, but the present disclosure is not limited thereto.

[0081] The average thickness of each of the internal electrodes 121 and 122 is not particularly limited.

[0082] To more easily achieve high capacitance and miniaturization of the multilayer electronic component, the average thickness of each of the internal electrodes 121 and 122 may be 1.0 μm or less, preferably 0.6 μm or less, and more preferably 0.4 μm or less.

[0083] The thickness of each of the internal electrodes 121 and 122 may refer to a size of each of the internal electrodes 121 and 122 in the first direction. In addition, the thickness of each of the internal electrodes 121 and 122 may refer to an average thickness of each of the internal electrodes 121 and 122, and may refer to an average size of each of the internal electrodes 121 and 122 in the first direction.

[0084] The average size of each of the internal electrodes 121 and 122 in the first direction may be measured by scanning an image of a cross section of the body 110 in the first direction and the second direction at a magnification of 10,000 times with an SEM. More specifically, the average size of each of the internal electrodes 121 and 122 in the first direction may refer to the average value of the size of one internal electrode in the first direction measured at thirty points equally spaced from each other in the second direction in the scanned image. Thirty equally spaced points may be specified in the capacitor forming portion. In addition, when such an average value measurement is performed on ten internal electrodes 121 and 122, the average size of each of the internal electrodes 121 and 122 in the first direction may be further generalized.

[0085] The body 110 may include cover portions 112 and 113 disposed on both surfaces of the capacitance forming portion in the first direction.

[0086] More specifically, the main body 110 may include a first cover portion 112 disposed on one surface of the capacitor forming portion in the first direction, and a second cover portion 113 disposed on another surface of the capacitor forming portion in the first direction, or may include an upper cover portion 112 disposed on an upper portion of the capacitor forming portion in the first direction, and a lower cover portion 113 disposed on a lower portion of the capacitor forming portion in the first direction.

[0087] The upper cover portion 112 and the lower cover portion 113 may be formed by respectively stacking a single dielectric layer or two or more dielectric layers on the upper surface and the lower surface of the capacitor forming portion in the first direction, and may be mainly used to prevent damage to the internal electrodes 121 and 122 caused by physical stress or chemical stress.

[0088] The upper cover portion 112 and the lower cover portion 113 do not include the internal electrodes 121 and 122, and may include the same material as that of the dielectric layer 111. That is, the upper cover portion 112 and the lower cover portion 113 may include a ceramic material, for example, barium titanate (BaTiO 3 ) based ceramic materials.

[0089] The average thickness of each of the cover parts 112 and 113 is not particularly limited.

[0090] To more easily achieve high capacitance and miniaturization of a multilayer electronic component, an average thickness of each of the cover portions 112 and 113 may be 100 μm or less, preferably 30 μm or less, and more preferably 20 μm or less in ultra-small products.

[0091] The thickness of each of the cover portions 112 and 113 may refer to the size of each of the cover portions 112 and 113 in the first direction. In addition, the thickness of each of the cover portions 112 and 113 may refer to the average thickness of each of the cover portions 112 and 113, and may refer to the average size of each of the cover portions 112 and 113 in the first direction.

[0092] The average size of each of the cover portions 112 and 113 in the first direction may be measured by scanning an image of a cross section of the body 110 in the first direction and the second direction at a magnification of 10,000 times using an SEM. For example, the average size of each of the cover portions 112 and 113 in the first direction may refer to an average value of the size of the first cover portion 112 in the first direction measured at thirty points equally spaced from each other in the second direction in the scanned image.

[0093] In addition, an average size of the first cover portion 112 in the first direction measured using the above method may be substantially the same as an average size of the first cover portion 112 in the first direction for cross sections of the body 110 in the first and third directions.

[0094] In the exemplary embodiment of the present disclosure, a structure in which the multilayer electronic component 100 has four external electrodes 131 , 132 , 133 , and 134 is described, but the number, shape, etc. of the external electrodes may vary according to the form of internal electrodes or other purposes.

[0095] The external electrodes 131 , 132 , 133 , and 134 may be disposed on the body 110 to be connected to the internal electrodes 121 and 122 .

[0096] The external electrodes 131 , 132 , 133 , and 134 may include a first external electrode 131 , a second external electrode 132 , a third external electrode 133 , and a fourth external electrode 134 , and may be disposed on the body 110 to be spaced apart from each other.

[0097] More specifically, the first external electrode 131 may be disposed on the first edge surface C1 to contact the first internal electrode 121, the second external electrode 132 may be disposed on the second edge surface C2 to contact the second internal electrode 122, the third external electrode 133 may be disposed on the third edge surface C3 to contact the first internal electrode 121, and the fourth external electrode 134 may be disposed on the fourth edge surface C4 to contact the second internal electrode 122.

[0098] In this case, the first external electrode 131 may completely cover the first edge surface C1 and may be disposed on a portion of the third surface 3 and the fifth surface 5, the second external electrode 132 may completely cover the second edge surface C2 and may be disposed on a portion of the fourth surface 4 and the fifth surface 5, the third external electrode 133 may completely cover the third edge surface C3 and may be disposed on a portion of the fourth surface 4 and the sixth surface 6, and the fourth external electrode 134 may completely cover the fourth edge surface C4 and may be disposed on a portion of the third surface 3 and the sixth surface 6.

[0099] The external electrodes 131 , 132 , 133 , and 134 may be formed of any material having conductivity, such as metal, etc., and a specific material may be determined in consideration of electrical characteristics, structural stability, etc. In addition, the external electrodes 131 , 132 , 133 , and 134 may have a multi-layered structure.

[0100] For example, the external electrode may include an electrode layer disposed on the body 110 , and a plating layer formed on the electrode layer.

[0101] As a more specific example of the electrode layer, the electrode layer may be a sintered electrode including a conductive metal and glass, or a resin-based electrode including a conductive metal and resin.

[0102] In addition, the electrode layer may have a form in which a sintered electrode and a resin-based electrode are sequentially formed on the body 110 .

[0103] In addition, the electrode layer may be formed by transferring a sheet including a conductive metal onto the body 110 or by transferring a sheet including a conductive metal onto a sintered electrode.

[0104] The conductive metal used for the electrode layer is not particularly limited as long as it is a material that can be electrically connected to the internal electrodes 121 and 122 to form a capacitor. For example, the conductive metal may include at least one selected from the group consisting of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof.

[0105] The electrode layer may be formed by coating a conductive paste prepared by adding glass frit to conductive metal powder particles and then sintering the conductive paste.

[0106] Plating can be used to improve mounting characteristics.

[0107] The type of the plating layer is not particularly limited, and may be a single plating layer including at least one of nickel (Ni), tin (Sn), palladium (Pd), and alloys thereof, and may be formed as a plurality of plating layers.

[0108] As a more specific example of the plating layer, the plating layer may be a Ni plating layer or a Sn plating layer, may have a form in which a Ni plating layer and a Sn plating layer are sequentially formed on the electrode layer, and may have a form in which a Sn plating layer, a Ni plating layer, and a Sn plating layer are sequentially formed. In addition, the plating layer may also include a plurality of Ni plating layers and / or a plurality of Sn plating layers.

[0109] The size of the multilayer electronic component 100 is not particularly limited.

[0110] In addition, in order to simultaneously achieve the effect of reducing ESL, the effect of improving moisture resistance reliability and mechanical strength, and the convenience of measuring capacitance in a high-frequency region, the multilayer electronic component 100 may have a size of 0606 (length×width: 0.6 mm×0.6 mm) or smaller, and may have substantially the same length (size in the second direction) and width (size in the third direction). According to the present disclosure, the multilayer electronic component 100 having an ultra-small form factor shape may have a more significant effect.

[0111] Here, substantially the same length and width may not mean that the length and width are exactly the same, but may include an allowable error range. Substantially the same length and width may preferably mean that the difference between the length and width is less than or equal to 10%, and more preferably, the difference between the length and width is less than or equal to 5%. When the length and width are substantially the same, the current loop can be improved, and a multilayer electronic component 100 with low ESL can be more easily implemented.

[0112] Board with multiple layers of electronic components mounted on it Due to its low equivalent series inductance (ESL) and excellent high-frequency characteristics, MLCC has also been widely used for decoupling to remove noise from electrical signals.

[0113] To address noise in high-speed integrated circuits (ICs), pad side capacitors (LSCs) may be applied to portions adjacent to the ICs. It is known that LSCs require low thickness and high-frequency characteristics. To reduce ESL, it is important to minimize the amount of magnetic flux linkage per unit current in the high-frequency region. Such issues have been addressed in various ways, such as controlling the formation and structure in a manner that minimizes current paths or current loops, or setting the inner and outer electrodes in a manner that cancels out magnetic fields.

[0114] Typically, an LSC may be disposed on the lower portion of an IC board and may therefore need to have low thickness and low ESL characteristics. In this case, the LSC may be mounted at a location on the lower portion of the board where solder balls are removed. Low inductance ceramic capacitors have been primarily used. However, there is an increasing demand for capacitors with a square form factor.

[0115] Therefore, in the present disclosure, a multilayer electronic component capable of achieving low ESL can be implemented to include a body having an octagonal prism shape, thereby minimizing the current path to improve ESR and ESL characteristics, and minimizing the solder balls SOL to be removed, thereby creating a favorable structure when mounted on a board.

[0116] Hereinafter, a board on which a multilayer electronic component is mounted will be described. However, the same description as the above description of the multilayer electronic component will be omitted.

[0117] According to another exemplary embodiment of the present disclosure, a board having a multilayer electronic component thereon is provided, the board may include a printed circuit board, a multilayer electronic component disposed on the printed circuit board, and a solder ball SOL disposed on the printed circuit board, the solder ball SOL surrounding the multilayer electronic component 100. The multilayer electronic component 100 may include a body 110 and external electrodes 131, 132, 133, and 134 disposed on the body 110, the body 110 including a dielectric layer 111 and internal electrodes 121 and 122 alternately disposed with the dielectric layer 111 in a first direction, the body 110 having a first surface 1 and a second surface 2 opposite to each other in the first direction, a third surface 3 and a fourth surface 4 opposite to each other in a second direction perpendicular to the first direction, and a fifth surface 5 and a sixth surface 6 opposite to each other in a third direction perpendicular to the first direction and the second direction, the body The body 110 has a first edge surface C1 connected to the first surface 1, the second surface 2, the third surface 3 and the fifth surface 5, a second edge surface C2 connected to the first surface 1, the second surface 2, the fourth surface 4 and the fifth surface 5, a third edge surface C3 connected to the first surface 1, the second surface 2, the fourth surface 4 and the sixth surface 6, and a fourth edge surface C4 connected to the first surface 1, the second surface 2, the third surface 3 and the sixth surface 6, the third edge surface C3 is opposite to the first edge surface C1, and the fourth edge surface C4 is opposite to the second edge surface C2. The inner electrodes 121 and 122 may include a first inner electrode 121 in contact with the first edge surface C1 and the third edge surface C3, and a second inner electrode 122 in contact with the second edge surface C2 and the fourth edge surface C4, and the outer electrodes 131, 132, 133 and 134 may include a first outer electrode 131 and a third outer electrode 133 respectively disposed on the first edge surface C1 and the third edge surface C3, and a second outer electrode 132 and a fourth outer electrode 134 respectively disposed on the second edge surface C2 and the fourth edge surface C4, the first outer electrode 131 and the third outer electrode 133 being in contact with the first inner electrode 121, and the second outer electrode 132 and the fourth outer electrode 134 being in contact with the second inner electrode 122.

[0118] Reference Figure 6Compared with the multilayer electronic component having a hexahedral shape according to the related art, the multilayer electronic component 100 having an octahedral shape according to the exemplary embodiment of the present disclosure can minimize the removal of the solder ball SOL. The solder ball SOL can be further disposed in the edge region having the hexahedral shape according to the related art, thereby easily realizing the multilayer electronic component 100.

[0119] In addition, by disposing the multilayer electronic component 100 having an octagonal prism shape as an LSC on a board, the size and area of ​​the solder ball SOL can be minimized, and the package board can be implemented to have fine ball grid array (BGA) pitch and height characteristics, thereby achieving excellent thermal characteristics and improving low ESL characteristics.

[0120] While example embodiments have been shown and described above, it will be readily apparent to those skilled in the art that modifications and variations may be made without departing from the scope of the present disclosure as defined by the appended claims.

[0121] In addition, the term "exemplary embodiment" used herein does not refer to the same exemplary embodiment, and is provided to emphasize a specific feature or characteristic that is different from a specific feature or characteristic of another exemplary embodiment. However, the exemplary embodiments provided herein are considered to be able to be implemented by combining with each other in whole or in part. For example, an element described in a specific exemplary embodiment, unless an opposite or contradictory description is provided therein, can be understood as a description related to another exemplary embodiment even if it is not described in another exemplary embodiment.

[0122] The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the example embodiments.As used herein, unless the context clearly indicates otherwise, the singular form is intended to include the plural form as well.

Claims

1. A multilayer electronic component comprising: A body comprising a dielectric layer and inner electrodes alternately arranged with the dielectric layer in a first direction, the body having a first surface and a second surface opposite to each other in the first direction, a third surface and a fourth surface opposite to each other in a second direction intersecting the first direction, and a fifth surface and a sixth surface opposite to each other in a third direction intersecting the first direction and the second direction, the body having a first edge surface connected to the first surface, the second surface, the third surface and the fifth surface, a second edge surface connected to the first surface, the second surface, the fourth surface and the fifth surface, a third edge surface connected to the first surface, the second surface, the fourth surface and the sixth surface and opposite to the first edge surface, and a fourth edge surface connected to the first surface, the second surface, the third surface and the sixth surface and opposite to the second edge surface; as well as an outer electrode, disposed on the body, wherein the inner electrode comprises a first inner electrode in contact with the first edge surface and the third edge surface and a second inner electrode in contact with the second edge surface and the fourth edge surface, and The external electrodes include first and third external electrodes, respectively disposed on the first and third edge surfaces to contact the first internal electrode, and second and fourth external electrodes, respectively disposed on the second and fourth edge surfaces to contact the second internal electrode.

2. The multilayer electronic component according to claim 1, wherein In a cross section of the body in the second direction and the third direction, the first to fourth edge surfaces intersect the second direction and the third direction.

3. The multilayer electronic component according to claim 1, wherein: The first inner electrode is spaced apart from the third to sixth surfaces and the second and fourth edge surfaces, and The second inner electrode is spaced apart from the third to sixth surfaces and the first and third edge surfaces.

4. The multilayer electronic component according to claim 1, wherein: In a cross section of the body in the second direction and the third direction, a length BL from the first edge surface to one of the fourth edge surfaces and a length IEL of the inner electrode in contact with the one of the first edge surface to the fourth edge surface satisfy IEL <BL。 5. The multilayer electronic component according to claim 1, wherein In a cross section of the body in the second direction and the third direction, the internal electrode has a region parallel to the third surface to the sixth surface.

6. The multilayer electronic component according to claim 1, wherein: The inner electrode does not have a bottleneck.

7. The multilayer electronic component according to claim 1, wherein: The inner angles of the inner electrodes are all obtuse angles.

8. The multilayer electronic component according to claim 1, wherein In cross sections of the body in the second direction and the third direction, inner angles of regions where the first internal electrode and the second internal electrode overlap each other are both obtuse angles.

9. The multilayer electronic component according to claim 1, wherein: The first external electrode covers a portion of the third surface and a portion of the fifth surface, The second external electrode covers a portion of the fourth surface and a portion of the fifth surface, The third external electrode covers a portion of the fourth surface and a portion of the sixth surface, and The fourth external electrode covers a portion of the third surface and a portion of the sixth surface.

10. The multilayer electronic component according to claim 9, wherein Each of the first to fourth external electrodes covers a portion of the first surface and a portion of the second surface.

11. The multilayer electronic component according to claim 1, wherein The second direction is perpendicular to the first direction, and the third direction is perpendicular to the first direction and the second direction.

12. A board having multiple layers of electronic components mounted thereon, the board comprising: Printed circuit boards; The multilayer electronic component according to any one of claims 1 to 11, arranged on the printed circuit board; as well as Solder balls are arranged on the printed circuit board, and the solder balls surround the multi-layer electronic component.

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