Panel level fabrication of stacked electronic device packages with enclosed cavities

By using interposer substrates with pores and circuit substrates in the packaging of electronic devices, and combining the distribution of molded materials, the problems of low signal attenuation and cavity utilization efficiency in the prior art are solved, and efficient and economical multi-stage electronic device component manufacturing is achieved.

CN120033080APending Publication Date: 2025-05-23NXP USA INC
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Patent Information

Application Number
CN202411397151.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-11-22
Filing Date
2024-10-09
Publication Date
2025-05-23

AI Technical Summary

Technical Problem

The prior art is difficult to effectively utilize hollow or inflatable cavity when packaging electronic devices to optimize the performance of high-frequency components, and signal attenuation problems are more prominent.

Method used

By receiving the first and second substrate panels having an upper surface and a lower surface, respectively, including a first circuit substrate and a first intermediary substrate, the intermediary substrate having a pore therethrough. Then, the lower surface of the second substrate panel is bonded to the upper surface of the first substrate panel, so that the pores are located above the first circuit substrate, and the channels are cut in the second substrate panel to distribute the molding material to form a single-cut device assembly.

Benefits of technology

The cost-effective manufacturing of components with cavity in multi-stage electronic device components is achieved, reducing signal attenuation, improving performance of high-frequency components, and allowing multiple hollow or inflatable cavity to be embedded in high-density packages.

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Abstract

The invention relates to panel level fabrication of stacked electronic device packages with enclosed cavities. An electronic device package may be formed by a panel-level manufacturing process, the electronic device package including one or more circuit substrates, one or more cavities defined by a cover separated from the circuit substrates by an interposer substrate having an aperture disposed over the circuit substrates, the interposer substrate having a plurality of cavities disposed over the circuit substrates, and the one or more cavities being disposed over the one or more cavities. Wherein a plurality of components are formed by singulating a larger panel component formed of a plurality of panels bonded to each other. A panel including a plurality of stages is partially cut to form a channel filled with a molding material. Subsequent structures are also cut to singulate individual package-on-package including a portion of the molding material surrounding the one or more interposers. The molding material may seal a gap between the interposer and the circuit substrate to which the interposer is bonded, and provide electrical isolation between the electrical interconnects that would otherwise be exposed at the edge of each package.
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Description

Technical Field

[0001] Embodiments of the subject matter described herein relate to methods of forming packages for electronic devices that include multiple circuit boards or other substrates. Background Art

[0002] Electronic devices such as integrated circuits are often packaged in polymer or ceramic housings that can be designed to protect the device from damage, help dissipate heat, and provide macroscopic contacts that allow the device to be coupled to other devices on printed circuit boards and other substrates. In some applications, it is desirable to provide a hollow or air-filled cavity within the package to accommodate high-frequency components. Summary of the invention

[0003] In an example embodiment, a method includes receiving a first substrate panel having an upper surface and a lower surface, and receiving a second substrate panel having an upper surface and a lower surface. The first substrate panel includes a first circuit substrate, and the second substrate panel includes a first interposer substrate having an aperture therethrough.

[0004] The method further includes bonding the lower surface of the second substrate panel to the upper surface of the first substrate panel so that the pores of the first interposer substrate are located above the first circuit substrate on the upper surface of the first substrate panel; and bonding a first cover to the upper surface of the second substrate panel so that a first cavity is formed between the first circuit substrate and the first cover.

[0005] The method further includes cutting a channel in the second substrate panel, the channel passing through the first interposer substrate and exposing a portion of the upper surface of the first substrate panel surrounding the first circuit substrate. The method further includes dispensing a molding material in the channel in the second substrate panel such that an aperture in the first interposer substrate is surrounded by the molding material. The method further includes producing a singulated device component by cutting through a portion of the molding material in the channel in the second substrate panel and cutting through a portion of the first substrate panel below the channel.

[0006] The singulated device assembly includes the first circuit substrate; the first interposer substrate bonded to an upper surface of the first circuit substrate at a lower surface of the first interposer substrate; and the first cover bonded to an upper surface of the first interposer substrate.

[0007] In another example embodiment, a method includes providing a panel assembly. The panel assembly includes a first substrate panel, the first substrate panel including a set of first circuit substrates, the set of first circuit substrates including electronic components; and a second substrate panel bonded over the first substrate panel, the second substrate panel including a set of first interposer substrates, the set of first interposer substrates having apertures disposed over corresponding first circuit substrates of the first substrate panel.

[0008] The method further includes partially cutting the panel assembly to form a channel through the second substrate panel. The method further includes singulating the panel assembly into singulated circuit assemblies by cutting through a portion of the molding material in the channel through the second substrate panel and cutting through the first substrate panel below the channel.

[0009] Each singulated circuit assembly includes a first circuit substrate; a first interposer substrate bonded over the first circuit substrate and including a first aperture disposed over a first portion of the first circuit substrate; a first cover bonded over the first aperture such that a first cavity is formed over the portion of the first circuit substrate; and a molding material at least partially surrounding the first interposer substrate.

[0010] In yet another example embodiment, a method includes providing a panel assembly, the panel assembly including a first substrate panel and a second substrate panel. The first substrate panel includes a set of first circuit substrates, the set of first circuit substrates including electronic components, and the second substrate panel is bonded over the first substrate panel. The second substrate panel includes a set of first interposer substrates, the set of first interposer substrates having apertures disposed over corresponding first circuit substrates of the first substrate panel.

[0011] The method also includes partially cutting the panel assembly to form a channel through the second substrate panel. The method also includes singulating the panel assembly into singulated circuit assemblies by cutting through a portion of the molding material in the channel through the second substrate panel and cutting through the first substrate panel below the channel.

[0012] Each singulated circuit assembly includes a first circuit substrate, the first circuit substrate including a thermally conductive structure passing through the first circuit substrate; a first interposer substrate, the first interposer substrate bonded over the first circuit substrate and including a first aperture disposed over a first portion of the first circuit substrate; a first cover bonded over the first aperture so that a first cavity is formed over the portion of the first circuit substrate; and an electronic device disposed on an upper surface of the first circuit substrate and thermally coupled to a lower surface of the first circuit substrate via the thermally conductive structure.

[0013] In one or more embodiments, each singulated component further includes a portion of the molding material in the channel through the second substrate panel remaining after cutting through the channel. In one or more embodiments, each singulated component further includes one or more electronic components disposed on or within the first circuit substrate, the one or more electronic components being electrically coupled to electrical contacts outside the first cavity via electrical interconnects within the first interposer substrate. In one or more embodiments, the molding material electrically isolates conductive structures of the first interposer substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The present disclosure is illustrated by means of examples, embodiments, etc., and is not limited by the accompanying drawings, in which like reference numerals indicate similar elements. The elements in the drawings are illustrated for simplicity and clarity and are not necessarily drawn to scale. The accompanying drawings, together with the detailed description, are incorporated into and form part of this specification, and are used to further illustrate examples, embodiments, etc., and to explain various principles and advantages according to the present disclosure, in which:

[0015] Figure 1A is a partially exploded cross-sectional view of a stacked assembly including a covered cavity according to one or more embodiments.

[0016] Figure 1B yes Figure 1A Assembled cross-sectional view of the components.

[0017] Figure 2A According to one or more embodiments Figure 1A and Figure 1B A partially exploded cross-sectional view of a stacked assembly associated with an assembly wherein the covered cavity is replaced with another circuit substrate.

[0018] Figure 2B yes Figure 2A Assembled cross-sectional view of the components.

[0019] Figure 3 is a process flow diagram illustrating a cross-sectional view of an assembly according to one or more embodiments during an example manufacturing process.

[0020] Figure 4 is a partially exploded cross-section of another example assembly illustrating an embodiment in which carriers engage one another through an interposer via a mating pin and socket system.

[0021] Figure 5 is a cross-sectional view of a multi-level assembly including two cavities according to one or more embodiments.

[0022] Fig. 6A is a partially cutaway cross-sectional view illustrating a multi-level panel-level assembly including multiple stacked carriers with cavities between the carriers according to one or more embodiments.

[0023] Figure 6B It is shown Fig. 6A Cross-sectional view of the molding of a panel-level assembly.

[0024] Figure 6C It is shown Fig. 6A and Figure 6B Cross-sectional view of a single cut of a panel-level assembly. DETAILED DESCRIPTION

[0025] The following detailed description provides examples for the purpose of understanding and is not intended to limit the invention or the application and use of the invention. In addition, it is not intended to be bound by any explicit or implicit theory present in the foregoing technical field, background technology or the following detailed description.

[0026] For simplicity and clarity of illustration, the drawings illustrate general constructions, and descriptions and details of well-known features and techniques may be omitted to avoid unnecessarily obscuring the present invention. In addition, the elements in the drawings are not necessarily drawn to scale. For example, the dimensions of some elements or regions in the drawings may be enlarged relative to other elements or regions to help improve understanding of the embodiments of the present invention.

[0027] The terms "first", "second", "third", "fourth", etc. (if any) in the embodiments and claims can be used to distinguish similar elements and are not necessarily used to describe a specific sequence or time order. It should be understood that the terms used in this way are interchangeable where appropriate, so that the embodiments of the present invention described herein (for example) can operate in a sequence other than the sequence described or otherwise described herein. In addition, the terms "comprise", "include", "have" and any variations thereof are intended to cover non-exclusive inclusions, so that the process, method, article or device including a series of elements is not necessarily limited to those elements, but may include other elements that are not explicitly listed or inherent to such processes, methods, articles or devices. The term "coupled" as used herein is defined as being connected directly or indirectly in an electrical or non-electrical manner. As used herein, the terms "substantially" and "substantially" mean sufficient to achieve the stated purpose in a practical manner, and minor defects (if any) are not important for the stated purpose.

[0028] Unless otherwise stated, directional references such as "top", "bottom", "left", "right", "above", "below", etc. are not intended to require any preferred orientation, but are described for illustrative purposes with reference to the orientation of the corresponding figure or figures.

[0029] Unless expressly stated otherwise, the use of the terms "approximately," "substantially," and similar terms with respect to the size, relative position, or orientation of various features indicates that the size, position, or orientation of those features is subject to tolerances of the equipment and processes selected to form the described features and / or expected process variations. Unless expressly stated otherwise, the use of the terms "approximately," "substantially," and similar terms with respect to measurable values ​​or characteristics is subject to the expected measurement accuracy of the equipment and methods used to measure those values ​​or characteristics and / or is within tolerance limits specified by technical standards applicable to the technology being described.

[0030] It should be understood that the steps of the various processes described herein are non-limiting examples of suitable processes according to embodiments and are used for illustration purposes. The embodiments herein may use any suitable process, including processes that omit the steps described herein, perform those steps in a different order, and similar steps, etc. It should also be understood that well-known features and techniques may be omitted for clarity.

[0031] Conventional techniques for packaging and encapsulating electronic devices include approaches in which components are stacked on top of one another or otherwise occupy multiple levels. However, such approaches typically involve bonding one or more discrete monolithic devices or packaged devices to a substrate or directly to another monolithic device or packaged device, which can have disadvantages. As an example, when radio frequency (RF), microwave (MW), and millimeter wave (mmWave) devices and / or associated components coupled to these devices are surrounded by dielectric materials such as polymer molding materials, the performance of these devices can suffer due to signal losses caused by attenuation of high frequency signals due to absorption within the dielectric.

[0032] Thus, benefits of embodiments herein may include the ability to cost-effectively manufacture multi-level electronic device assemblies having cavities above sensitive components that may be inflated, evacuated, or filled with other materials to achieve desired performance characteristics. Stacked assemblies according to one or more embodiments may have any suitable number of levels, and devices on different levels may be isolated or interconnected as desired by an interposer substrate, which may include interconnects between layers or may form part of a metal shielding structure suitable for isolating selected layers or devices from electromagnetic interference.

[0033] Along these lines, Figure 1A According to one or more embodiments, it can be processed at the panel level (which will be combined later) Figure 3 1. A partially exploded cross-sectional view of an example assembly 100 fabricated in a panel level manufacturing process is shown. Assembly 100 is formed of a carrier 120 having a lower surface 121 and an upper surface 122. An interposer substrate (interposer 150) is bonded to upper surface 122 of carrier 120 by any suitable method, such as solder bonding using solder bumps, such as Figure 1A and Figure 1B as shown in the example.

[0034] A carrier (e.g., carrier 120) may include active and passive electronic devices on its surface (e.g., lower surface 121 and upper surface 122). Such a carrier may include conductive interconnects, such as interconnects 115 disposed within the carrier and on its upper and lower surfaces. As shown, the interconnects (e.g., interconnects 115) may include metallized pads, such as pads shown on the lower surface 121 and / or upper surface 122 of the carrier 120, and the electronic devices (the electronic devices may include active devices, passive devices, or both in any suitable arrangement) may be coupled to these pads using any suitable method to the interconnects. As an example, the electronic device 102 (e.g., a semiconductor device die) is shown as being wire-bonded to the interconnect 115 at the upper surface 122 of the carrier 120. As another example, the passive component 106 (e.g., a discrete resistor, capacitor, inductor, etc.) is shown as having metal contacts bonded to the interconnect on the upper surface 122 of the carrier 120. As another example, electronic device 108 is depicted as having metal pillars of interconnects 115 bonded to upper surface 122 of carrier 120 .

[0035] A carrier (e.g., carrier 120) can be mechanically coupled to other structures (e.g., cover 190) in a stacked arrangement via an interposer substrate or "interposer" (e.g., interposer 150 as shown). The interposer substrate can include electrical interconnects 155 and can bond or otherwise mechanically couple between adjacent structures (e.g., between carrier 120 and cover 190, or between two carriers, as described below in conjunction with FIG. 2). Interposer 150 can be bonded to carrier 120 via solder bump bonding to contact pads (i.e., interconnects 115 at the surface of carrier 120), solder reflow, epoxy bonding, and / or any other suitable method. The interposer substrate (e.g., interposer 150) can be formed of any suitable material, including but not limited to materials similar to or the same as materials used to form a carrier (e.g., carrier 120).

[0036] In one or more embodiments, the carrier (e.g., carrier 120) is also electrically coupled to one or more other such carriers in an assembly (e.g., assembly 200 of FIG. 2) via an interconnect (e.g., interconnect 155) within an interposer (e.g., interposer 150). In other words, an interconnect (e.g., interconnect 115), an electronic component (e.g., component or electronic device 102, 106, or 108), or other feature on or within a first carrier is electrically coupled to one or more interconnects, electronic components, or other features on or within other carriers. Alternatively, in one or more embodiments, as shown in FIG. Figure 1A and Figure 1BAs shown, exposed contacts on a top surface of the interposer (eg, upper surface 152 of interposer 150 ) are electrically coupled to devices or other structures on or within a carrier to which the interposer is coupled.

[0037] It should be understood that when a carrier (e.g., carrier 120) is coupled to a covered interposer (e.g., interposer 150 having apertures 159 therethrough to which cover 190 has been bonded), or when two or more carriers (e.g., carrier 120) are mechanically coupled to each other via an interposer (e.g., interposer 150), a cavity (e.g., formed when apertures 159 are disposed above carrier 120 and apertures 159 are covered by cover 190) may be formed between two adjacent carriers. Figure 1B 180). In one or more embodiments, such cavities are hollow or gas-filled (e.g., filled with air or an inert gas). Such hollow or gas-filled cavities may be desirable for certain applications. For example, if a radio frequency (RF), microwave (MW), millimeter wave (mmWave), or other high frequency electrical signal propagates in a cavity or along a surface surrounded by a cavity (e.g., along a waveguide formed on a surface of carrier 120), signal attenuation can be minimized compared to other packaging methods in which the space between adjacent stacked circuit layers is filled with a polymer material, etc. In addition, compared to other methods of sealing a single circuit substrate in a lidded package to form a hollow or gas-filled cavity, the embodiments herein allow such cavities to be incorporated into a high-density package having multiple circuit layers (e.g., multiple carriers, such as carrier 120). In addition, by using an interposer having multiple pores (e.g., pore 159) and / or by bonding multiple interposers to pores on the surface of a single carrier (e.g., carrier 120), a component (e.g., component 100) may include multiple hollow or gas-filled cavities.

[0038] In one or more embodiments, the interposer (eg, interposer 150) is formed by one or more rolls of molding material (eg, Figure 1A and Figure 1B The molded material may be surrounded by a molded material 175 as shown. Such a molded material may be used to seal the gap between the interposer and the carrier (e.g., the carrier 120 to which the interposer is mounted), thereby allowing the cavity to remain hollow, evacuated, or filled with another material, including but not limited to air or another gas. The molded material may also provide electrical isolation of electrical interconnects (e.g., interconnects 155 of the interposer 150 or interconnects 115 of the carrier 120 that would otherwise be exposed on the surface or edge of the carrier 120) from other conductive structures. Figure 3 The use of a molding material (eg, molding material 175 ) is further described.

[0039] like Figure 1A and Figure 1BAs shown, the carrier may include additional structures, such as a heat sink (e.g., a thermally conductive heat sink 135 forming part of the carrier 120, which may be referred to as a "coin"). The components herein may also include additional structures, such as metallized pads, solder bumps, combinations thereof, etc., that may be used as external contacts on any suitable surface (e.g., the lower surface 121 of the carrier 120 or the upper surface 152 of the interposer 150). It should be appreciated that these features may allow the component to be mounted to a circuit board or other substrate via one surface (e.g., the upper surface 152 and / or the cover 190), and may also be coupled to an additional heat sink component at another surface (e.g., the lower surface 121 of the carrier 120) via structures such as the heat sink 135 in a so-called top-side cooling arrangement.

[0040] Figure 2A shows where a second carrier substrate is used instead of a cover (eg Figure 1A and Figure 1B 190 ). Component 200 is formed of two circuit substrates (carriers 120 and 220; for example, a polymer-based printed circuit board, a ceramic-based circuit board, etc., as non-limiting examples, represented as carrier 120 and a second carrier 220 that replaces cover 190 of component 100). Carrier 220 has a lower surface 221 and an upper surface 222. As shown, carrier 220 may include electronic devices and other components on one or both of surfaces 221, 222, as shown by components 202, 206, and 208 (for example, components 102, 106, and 108, respectively). As shown, a carrier (e.g., carrier 220) may include an interconnect, such as interconnect 215 (e.g., interconnect 115). Interconnect 215 may be coupled to interconnect 155 of interposer 150. Therefore, it should be understood that in one or more embodiments, components on or within a first carrier (e.g., carrier 120) may be coupled to components on or within another carrier (e.g., carrier 220) via interconnects in an interposer (e.g., interposer 150).

[0041] It should be understood that assembly 200 is a non-limiting example, and that embodiments herein may include any suitable number of carriers and interposers, and be made of any suitable materials and include any number and type of suitable devices. In other words, an assembly made according to embodiments herein may include two or more "layers," each of which may be populated with any suitable components on one or both surfaces.

[0042] Each carrier (e.g., carrier 120, 220) may include active and passive electronic devices on its lower surface, upper surface, or both surfaces. Each carrier may include conductive interconnects (e.g., interconnects 115, 215) disposed within the carrier and on its top and lower surfaces. As shown, interconnect 115 may include metallized pads on lower surface 121 and / or upper surface 122 of carrier 120, and electronic devices (the electronic devices may include active devices, passive devices, or both in any suitable arrangement) may be coupled to these pads using any suitable method to interconnect 115. Components or other structures on or within carrier substrate 120 may be electrically coupled to components on or within carrier 220 via interconnects 155 of interposer 150 and interconnects 215 of carrier 220.

[0043] The carriers 120, 220 are mechanically coupled to each other in a stacked arrangement via the interposer 150. Figure 2A and Figure 2B In the example of the present invention, the interposer 150 includes an electrical interconnect 155 and is bonded or otherwise mechanically coupled between the carriers 120, 220. The interposer (e.g., interposer 150) may be bonded to the carrier (e.g., carrier 120, 220) via solder bump bonding to contact pads (e.g., interconnect 115 at the surface of the carrier 120, 220), solder reflow, epoxy bonding, and / or any other suitable method. In one or more embodiments, the first carrier (e.g., carrier 120) is also electrically coupled to one or more other such carriers in the assembly (e.g., assembly 200) via interconnects (e.g., interconnect 155) within the interposer (e.g., interposer 150). In other words, an interconnect (e.g., interconnect 115), an electronic component (e.g., component or electronic device 102, 106, or 108), or other features on or within the first carrier are electrically coupled to one or more interconnects, electronic components, or other features on or within the second carrier (e.g., carrier 220).

[0044] It should be appreciated that when two or more carriers (e.g., carrier 120) are mechanically coupled to each other via an interposer (e.g., interposer 150), a cavity (e.g., cavity 280 between carrier 120 and carrier 220) may be formed between the two carriers. Compared to other approaches that seal a single circuit substrate in a lidded package to form a hollow or gas-filled cavity, embodiments herein allow such cavities to be incorporated into a high-density package having multiple circuit layers (e.g., multiple carriers 120 or 220) and manufactured in a high-volume process, as will be further described below. In addition, an assembly (e.g., assembly 200) may include multiple hollow or gas-filled cavities separated from each other by portions of an interposer substrate.

[0045] It should be understood that the components 100, 200, and other components depicted herein are for illustrative purposes and may show elements omitted or not present in certain embodiments, and elements may be added or omitted, simply to provide illustrative examples. Along these lines, in the embodiments described herein, interconnects (e.g., interconnects 115 and interconnects 155) may be arranged in any suitable manner. For example, Figure 1A , 1B , 2A and 2B, interconnects (e.g., interconnects 115 or 215) can be routed on the surface of a carrier and within the carrier to connect an electronic device to other devices on the same surface or to devices or external contact pads on an opposite surface of the same carrier. Interconnects within an interposer (e.g., interconnects 155 within interposer 150) can be used to form electrical connectors between different carriers. For example, on the left side of FIG. 1, various interconnects 115 and interconnects 155 are coupled to each other so that there is a continuous conductive path from discrete carrier 120A to one of solder bumps 195 on upper surface 122C of carrier 120C. Alternatively, some connectors between the carrier substrate and the interposer may be used only as mechanical connectors.

[0046] Figure 3 300 is a process flow diagram showing a cross-sectional view of assembly 100 during steps of an example process suitable for manufacturing assembly 100 or a related assembly (e.g., assembly 200). Process 300 includes steps 310, 320, 330, and 340. It should be understood that process 300 is an example presented for illustrative purposes, and that processes according to embodiments herein may omit steps described as part of process 300, add additional steps that are not explicitly described as part of process 300, and / or may perform steps of process 300 or similar steps in a different order than that described in conjunction with process 300.

[0047] Process 300 is an example of a so-called panel-level process, in which multiple discrete (or "singulated") substrates or components are manufactured in parallel from a larger substrate ("panel"). For ease of understanding, process 300 is described with reference to the formation of two discrete components 100(1) and 100(2) (e.g., component 100). However, it should be understood that in a process according to embodiments herein, more than two components may be produced, and the individual components need not be identical to each other, but may differ in layout and / or components.

[0048] At step 310, an assembly is provided that is formed of a first substrate panel 312 that includes two or more carriers (e.g., Figure 1A and Figure 1B120), the second substrate panel 315 includes two or more covered interposers (e.g., two identical interposers 150 with covers 190). The approximate midpoint between each of the panels 312, 315 is represented by a vertical dashed line. In one or more embodiments, the panels 312 and 315 are formed to be received separately and bonded together using any suitable process, including thermocompression bonding, solder reflow, conductive adhesive bonding, etc.

[0049] At step 320, panel 315 is cut to singulate the individual interposers 150 from each other, as shown, without cutting the underlying panel 312. Alternatively, in one or more embodiments, a panel (e.g., panel 312) may be partially cut without separating panel 312 into individual carriers.

[0050] At step 330, the interposer 150 is molded by dispensing or otherwise forming multiple rolls of molding material (e.g., molding material 175) surrounding the singulated interposer 150. In one or more embodiments, the molding material fills the gap between the interposer 150 and the (to be singulated) carrier 120 of the panel 312. Any suitable flowable material or combination of materials can be used as the molding material, such as the molding material 175 according to embodiments herein. For example, polymer materials, including adhesives, liquid crystal polymers, and other materials can be used.

[0051] At step 340, assembly 100, represented by assembly 100(1) and assembly 100(2), is completely singulated by cutting through the roll molded material between each interposer 150 and cutting through panel 312. Assembly 100 may be cut or singulated using any suitable method or combination of methods, including, as non-limiting examples, using wafer sawing, laser cutting or scoring, water jetting, and the like. As a non-limiting example, one or more carriers or interposers may be formed of a ceramic material such as aluminum oxide, aluminum nitride, barium titanate, and may include conductive traces formed by direct bonding copper or other methods. Such substrates may benefit from laser scoring followed by separation to singulate the individual substrates from one another.

[0052] Figure 44 is a partially exploded cross-section of another example assembly, presented to illustrate an embodiment in which carriers are joined to each other via a mating pin and socket system through an interposer. Assembly 400 includes a carrier 420A and a carrier 420B joined by an interposer 450 having a pore 459 therethrough. In this example, carrier 420A includes a metallized socket 426 extending into carrier 420A at an upper surface 422A. Socket 426 is configured to receive a corresponding metallized pin. Interposer 450 includes an interconnect 455 (associated with interconnect 155 of interposer 150), the interconnect 455 having pins 457 disposed on one surface, the pins 457 being configured to mate with a corresponding socket (e.g., socket 426 of carrier 420A). Interconnect 455 also includes a metallized socket 456 on an opposing surface of interposer 350, the metallized socket 456 being configured to mate with a corresponding pin. In this example, carrier 420B includes pins 427 on its lower surface 421B (optionally coupled to interconnects on and / or within carrier 420B), which are configured to mate with sockets 456 of interposer 450. It should be appreciated that in one or more embodiments, a socket (e.g., socket 426 or socket 456) is configured only as a mechanical connection point, while in one or more other embodiments, such a socket is configured to function as both a mechanical connection point and an electrical connection point. In some embodiments, pins and / or sockets that do not make electrical connections may not be metallized.

[0053] It should be appreciated that in embodiments including an interposer (e.g., interposer 450 or related interposers), the pins and sockets may be arranged in any suitable manner. For example, the interposer may have sockets on only two surfaces, and the corresponding pins may be disposed on the carrier. Alternatively, the carrier (e.g., carrier 420) and / or the interposer (e.g., interposer 450) may have both sockets (e.g., sockets 426 or 456) and pins (e.g., pins 427 or 457) distributed in any suitable arrangement on one or both of the top and bottom surfaces. It should be appreciated that the components (e.g., component 400 and related components) may be manufactured in batches using a panel-level process (e.g., process 300) or a similar process.

[0054] As described above, a "multi-level" package can be manufactured according to the embodiments herein. For the purpose of illustration, Figure 5 An example two-level assembly is shown. It should be appreciated that assembly 500 includes three carriers 520 (carriers 520A, 520B, 520C) and two interposers 550 (interposers 550A, 550B) including interconnects 555. Cavity 580A is formed between carriers 520A and 520B, and cavity 580B is formed between carriers 520B and 520C. Figure 5In the example of FIG. 5 , component 500 includes external interconnects 595 located on top surface 522C of carrier 520C, represented by solder bumps 595 bonded to metal contact pads. Such interconnects may allow component 500 (or similar components) to be connected to a substrate. Figure 5 The orientation shown is "flipped" and coupled to a larger component, such as a circuit board, thereby exposing the bottom surface 521A of the carrier 520A (e.g., allowing a heat sink or other thermal structure to be bonded to a heat sink or other thermal structure, such as heat sink 535 of component 500, or heat sink 135 of component 100).

[0055] The assembly 500 includes a molding material 575 (e.g., molding material 175 or 475) that can seal the gap between the interposers 550 (i.e., interposers 550A and 550B) and the carriers 520 (i.e., carriers 520A, 520B, and 520C). It should be understood that in one or more embodiments, the molding material (e.g., molding material 575) can be applied around all substrates in the layered assembly (e.g., assembly 500) (i.e., the molding material can also surround the sides of the carrier 520C and / or extend onto all or part of the upper surface 522C of the carrier 520C and / or extend onto all or part of the lower surface 521A of the carrier 520A). Similarly, in one or more embodiments, the molding material (e.g., molding material 575) is selectively applied to one or more substrates or interfaces between substrates (e.g., at the interface between the interposer 550 and the carrier 520).

[0056] Can be used with Figure 3 The process 300 is related to the panel level process for manufacturing a multi-level component (e.g., component 500) and other components having two or more levels, as described below in conjunction with Fig. 6A , 6B and 6C, Fig. 6A , 6B 6C show cross-sectional views of assembly 600 singulated from a larger panel assembly. Assembly 600 is formed from three carriers 620A, 620B, and 620C (eg, carriers 120, 320, 420, or 520) and two interposers 650A, 650B (eg, interposers 150, 450, or 550).

[0057] like Fig. 6A As shown, similar to the cutting step 320 of process 300, the plurality of stacked panels may be cut to form channels above corresponding carriers (eg, carrier 620A and adjacent carriers). Figure 6BAs shown, similar to step 330 of process 300, the interposers 650A and 650B (and carriers 620B, 620C) may be filled with a molding material 675 (eg, molding material 175, 475, or 575). Fig. 6A Finally, as Figure 6C As shown, similar to step 340 of process 300 , component 600 may be singulated from adjacent components by cutting through molding material 675 in channel 610 and bottom-most carrier 620A.

[0058] It should be understood that for illustrative purposes, interposers according to embodiments herein are described as continuous substrates provided with apertures (e.g., apertures 159 or 459), which are intended as non-limiting examples. For example, in one or more embodiments, an interposer (e.g., interposer 150, 450, 550, or 650) is formed of individual interposer units (which may be referred to as "bricks" or "blocks") that are individually bonded to a carrier (e.g., carrier 120, 420, 520, or 620), which may be bonded together by a molding material or other bonding material. In one or more such embodiments, the individual units are molded to form a single interposer substrate prior to bonding the individual units to one or more carriers, while in one or more such embodiments, the individual interposer units are molded together after bonding the individual interposer units to the one or more carriers.

[0059] Various Examples

[0060] Features of the embodiments may be understood with the aid of one or more of the following examples:

[0061] Example 1: A method or apparatus includes a first substrate panel having an upper surface and a lower surface, the first substrate panel including a first circuit substrate; and a second substrate panel having an upper surface and a lower surface, the second substrate panel including a first interposer substrate, the first interposer substrate having an aperture passing through the first interposer substrate. The lower surface of the second substrate panel is bonded to the upper surface of the first substrate panel so that the aperture of the first interposer substrate is located above the first circuit substrate on the upper surface of the first substrate panel. A first cover is bonded to the upper surface of the second substrate panel so that a first cavity is formed between the first circuit substrate and the first cover. A channel is cut in the second substrate panel, the channel passing through the first interposer substrate and exposing a portion of the upper surface of the first substrate panel surrounding the first circuit substrate. A molding material is dispensed in the channel in the second substrate panel so that the aperture in the first interposer substrate is surrounded by the molding material.

[0062] A singulated device assembly is produced by cutting through a portion of the molding material in the channel in the second substrate panel and cutting through a portion of the first substrate panel below the channel. The singulated device assembly includes the first circuit substrate; the first interposer substrate bonded to an upper surface of the first circuit substrate at a lower surface of the first interposer substrate; and the first cover bonded to an upper surface of the first interposer substrate.

[0063] Example 2: The apparatus or method of Example 1, wherein the portion of the molding material surrounding the first cavity seals a gap between the first interposer substrate and the first circuit substrate.

[0064] Example 3: A device or method according to Example 1 or Example 2, wherein the first cover is formed by bonding the lower surface of a third substrate panel to the upper surface of the second substrate panel, the third substrate panel including a second circuit substrate arranged above the aperture in the first interposer substrate; and the single-cut device component further includes the second circuit substrate bonded to the upper surface of the first interposer substrate.

[0065] Example 4: The apparatus or method of any of Examples 1 to 3, wherein one or more electrical components are bonded and electrically coupled to a lower surface of the second circuit substrate, which is also bonded to the first interposer substrate.

[0066] Example 5: The apparatus or method of any of Examples 1 to 4, wherein the first electronic component bonded to the second circuit substrate is electrically coupled to the first circuit substrate via the first interposer substrate.

[0067] Example 6: The device or method according to any one of Examples 3 to 5 further includes a fourth substrate panel having an upper surface and a lower surface, the fourth substrate panel including a second intermediary substrate, the second intermediary substrate having a pore passing through the second intermediary substrate; and a fifth substrate panel having an upper surface and a lower surface, the fifth substrate panel including a third circuit substrate.

[0068] Bonding the lower surface of the fourth substrate panel to the upper surface of the third substrate panel such that the aperture in the second interposer substrate is disposed above the second circuit substrate. Bonding the lower surface of the fifth substrate panel to the upper surface of the fourth substrate panel such that a second cavity is formed between the second circuit substrate and the third circuit substrate. Cutting a channel through the fifth substrate panel and the fourth substrate panel, the channel separating the third circuit substrate from the fifth substrate panel and separating the second interposer substrate from the fourth substrate panel.

[0069] The molding material is distributed in the channels in the fourth substrate panel so that the pores in the second interposer substrate are surrounded by the molding material, and producing the singulated device assembly further includes cutting through a portion of the molding material in the channels in the fourth substrate panel and in the channels in the fifth substrate panel.

[0070] The singulated device assembly additionally includes the second interposer substrate; the third circuit substrate bonded to the second interposer substrate; and the second cavity disposed between the third circuit substrate and the second interposer substrate.

[0071] Example 7: The apparatus or method of Example 1 further includes a third substrate panel having an upper surface and a lower surface, the third substrate panel including a second interposer substrate having an aperture passing through the second interposer substrate.

[0072] Bonding the lower surface of the third substrate panel to the upper surface of the second substrate panel such that the aperture in the second interposer substrate is disposed above the first cover, and bonding the second cover to the upper surface of the fourth substrate panel such that a second cavity is formed between the second interposer substrate and the second cover. Cutting a channel through the third substrate panel, the channel separating the second interposer substrate from the third substrate panel.

[0073] The molding material is dispensed in the channels in the third substrate panel such that apertures in the second interposer substrate are surrounded by the molding material, and producing the singulated device assembly further includes cutting through a portion of the molding material in the channels in the third substrate panel. The singulated device assembly further includes the second interposer substrate; the second cover bonded to the second interposer substrate; and the second cavity disposed between the second cover and the second interposer substrate.

[0074] Example 8: The device or method of Example 7, wherein the first cover is formed by a second circuit substrate.

[0075] Example 9: An apparatus or method wherein a panel assembly includes a first substrate panel including a set of first circuit substrates including electronic components; and a second substrate panel bonded over the first substrate panel, the second substrate panel including a set of first interposer substrates having apertures disposed over corresponding first circuit substrates of the first substrate panel. The panel assembly is partially cut to form a channel through the second substrate panel. The panel assembly is singulated into singulated circuit assemblies by cutting through a portion of the molding material in the channel through the second substrate panel and cutting through the first substrate panel below the channel.

[0076] Each singulated circuit assembly includes a first circuit substrate; a first interposer substrate bonded over the first circuit substrate and including a first aperture disposed over a first portion of the first circuit substrate; a first cover bonded over the first aperture such that a first cavity is formed over the portion of the first circuit substrate; and a molding material at least partially surrounding the first interposer substrate.

[0077] Example 10: The apparatus or method of Example 9, wherein the channel through the second substrate panel is filled with the molding material.

[0078] Example 11: The device or method of any of Examples 9 or 10, wherein the molding material seals a gap between the first interposer substrate and the first circuit substrate.

[0079] Example 12: The apparatus or method of any of Examples 9 to 11, wherein the molding material electrically isolates electrical interconnects between the first interposer substrate and the first circuit substrate.

[0080] Example 13: The apparatus or method of any of Examples 9 to 12, wherein the first cover of each singulated circuit assembly is formed from a second circuit substrate bonded over the first interposer substrate.

[0081] Example 14: A device or method according to any one of Examples 9 to 13, wherein the panel assembly also includes a third substrate panel bonded above the second substrate panel, the third substrate panel including a group of second interposer substrates, the group of second interposer substrates having apertures arranged above the corresponding first circuit substrates of the first substrate panel; and a fourth substrate panel, the fourth substrate panel including a group of second circuit substrates, the group of second circuit substrates bonded to the third substrate panel above the apertures of the second interposer substrate.

[0082] Each singulated circuit assembly also includes a second interposer substrate bonded over the first cover and including a second aperture disposed over the first cover; and a second circuit substrate bonded over the second interposer substrate such that a second cavity is formed over the first cover.

[0083] Example 15: The apparatus or method of any of Examples 9 to 14, wherein the first cover of each singulated circuit assembly is formed from a third circuit substrate bonded between the first interposer substrate and the second interposer substrate.

[0084] Example 16: The device or method of any one of Examples 9 to 15, wherein the panel assembly further comprises a third substrate panel, the third substrate panel comprising a set of second circuit substrates; and a portion cut through the third substrate panel above the channel through the second substrate panel. The cover of each singulated circuit assembly is formed by a corresponding second circuit substrate in the set of second circuit substrates.

[0085] Example 17: The apparatus or method of any one of Examples 9 to 16, wherein the third substrate panel is bonded to the second substrate panel.

[0086] Example 18: An apparatus or method according to any one of Examples 9 to 17, wherein the panel assembly also includes a third substrate panel bonded over the second substrate panel, the third substrate panel including a group of second circuit substrates, the group of second circuit substrates forming the first cover of each single-cut circuit assembly; a fourth substrate panel, the fourth substrate panel including a group of second interposer substrates, the group of second interposer substrates having apertures arranged over corresponding second circuit substrates of the second substrate panel; and a fifth substrate panel, the fifth substrate panel including a group of third circuit substrates, the group of third circuit substrates bonded to the fourth substrate panel over the apertures of the second interposer substrate.

[0087] Each singulated circuit assembly also includes a second interposer substrate bonded over the second circuit substrate and including a second aperture disposed over the second circuit substrate; and a third circuit substrate bonded over the second interposer substrate such that a second cavity is formed over the second circuit substrate.

[0088] Example 19: A device or method includes a panel assembly, the panel assembly comprising: a first substrate panel, the first substrate panel including a group of first circuit substrates, the group of first circuit substrates including electronic components; and a second substrate panel bonded above the first substrate panel, the second substrate panel including a group of first interposer substrates, the group of first interposer substrates having pores arranged above corresponding first circuit substrates of the first substrate panel.

[0089] The panel assembly is partially cut to form a channel through the second substrate panel. The panel assembly is singulated into singulated circuit assemblies by cutting through a portion of the molding material in the channel through the second substrate panel and cutting through the first substrate panel below the channel.

[0090] Each singulated circuit assembly includes a first circuit substrate, the first circuit substrate including a thermally conductive structure passing through the first circuit substrate; a first interposer substrate, the first interposer substrate bonded over the first circuit substrate and including a first aperture disposed over a first portion of the first circuit substrate; a first cover bonded over the first aperture so that a first cavity is formed over the portion of the first circuit substrate; and an electronic device disposed on an upper surface of the first circuit substrate and thermally coupled to a lower surface of the first circuit substrate via the thermally conductive structure.

[0091] Example 20: An apparatus or method according to Example 19, wherein each singulated component further includes one or more electronic components disposed on or within the first circuit substrate, and the one or more electronic components are electrically coupled to electrical contacts outside the first cavity via electrical interconnects within the first interposer substrate.

[0092] Example 21: An apparatus or method according to Example 19 or Example 20, wherein each singulated component also includes a portion of the molding material in the channel passing through the second substrate panel that remains after cutting through the channel; and the molding material electrically isolates the conductive structure of the first interposer substrate.

[0093] The foregoing detailed description and examples are merely illustrative in nature and are not intended to limit the embodiments of the subject matter or the application and use of such embodiments. As used herein, the word "exemplary" means "serving as an example, instance, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as being preferred or advantageous over other embodiments. In addition, there is no intention to be bound by any explicit or implicit theory presented in the foregoing technical field, background technology, or detailed description.

[0094] It should be understood that the application of the present invention is not limited to the details of the construction and arrangement of the components set forth in the foregoing description or shown in the accompanying drawings. The present invention can have other embodiments and be practiced or carried out in various ways. In addition, it should be understood that the words and terms used herein are for descriptive purposes and should not be considered restrictive. The terms "including", "comprising" or "having" and any variations thereof are used herein to cover the items listed thereafter and their equivalents and additional items. Unless otherwise specified or limited, the terms "mount", "connect", "support" and "couple" and their variations are widely used and cover direct and indirect mounting, connection, support and coupling. In addition, "connect" and "couple" are not limited to physical or mechanical connections or couplings.

[0095] The foregoing discussion is presented to enable those skilled in the art to implement and use embodiments of the present invention. Various modifications to the illustrated embodiments will become apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from embodiments of the present invention. Therefore, embodiments of the present invention are not intended to be limited to the illustrated embodiments, but should be given the widest scope consistent with the principles and features disclosed herein. The foregoing detailed description should be read with reference to the figures, in which similar elements in different figures have similar reference numerals. The accompanying drawings, which may not be drawn to scale, depict selected embodiments and are not intended to limit the scope of embodiments of the present invention. Those skilled in the art will recognize that the examples provided herein have many useful alternatives and are within the scope of embodiments of the present invention.

[0096] The connecting lines shown in the various figures included herein are intended to represent exemplary functional relationships and / or physical couplings between various elements. It should be noted that many alternative or additional functional relationships or physical connections may exist in one or more embodiments of the subject matter. In addition, certain terms may also be used herein only for reference purposes, so the terms are not intended to be restrictive, and unless the context clearly indicates, the terms "first", "second" and other such numerical terms referring to structures do not imply an order or sequence.

[0097] The above description refers to elements or nodes or features being "connected" or "coupled" together. As used herein, unless otherwise expressly stated, "connected" means that one element is directly joined to another element (or is directly communicated with another element), and not necessarily mechanically joined. Similarly, unless otherwise expressly stated, "coupled" means that one element is directly or indirectly joined to another element (or is directly or indirectly communicated with another element electrically or otherwise), and not necessarily mechanically joined. Therefore, although the schematic diagrams shown in the figures depict an exemplary arrangement of elements, additional intervening elements, devices, features, or components may be present in one or more embodiments of the depicted subject matter.

Claims

1. A method, characterized in that include: receiving a first substrate panel having an upper surface and a lower surface, the first substrate panel comprising a first circuit substrate; receiving a second substrate panel having an upper surface and a lower surface, the second substrate panel including a first interposer substrate having an aperture therethrough; bonding the lower surface of the second substrate panel to the upper surface of the first substrate panel such that the aperture of the first interposer substrate is located above the first circuit substrate on the upper surface of the first substrate panel; bonding a first cover member to the upper surface of the second substrate panel so that a first cavity is formed between the first circuit substrate and the first cover member; cutting a channel in the second substrate panel, the channel passing through the first interposer substrate and exposing a portion of the upper surface of the first substrate panel surrounding the first circuit substrate; dispensing a molding material in the channels in the second substrate panel such that the apertures in the first interposer substrate are surrounded by the molding material; as well as producing a singulated device component by cutting through a portion of the molding material in the channel in the second substrate panel and cutting through a portion of the first substrate panel below the channel; The single-cut device components include: the first circuit substrate; the first interposer substrate bonded at a lower surface of the first interposer substrate to an upper surface of the first circuit substrate; and The first cover is bonded to the upper surface of the first interposer substrate.

2. The method according to claim 1, characterized in that: The portion of the molding material surrounding the first cavity seals a gap between the first interposer substrate and the first circuit substrate.

3. The method according to claim 1, characterized in that Also includes: forming the first cover by bonding a lower surface of a third substrate panel to the upper surface of the second substrate panel, the third substrate panel including a second circuit substrate disposed over the aperture in the first interposer substrate; Wherein the singulated device assembly further includes the second circuit substrate bonded to the upper surface of the first interposer substrate.

4. The method according to claim 3, characterized in that One or more electrical components are bonded and electrically coupled to a lower surface of the second circuit substrate, which is also bonded to the first interposer substrate.

5. The method according to claim 3, characterized in that The first electronic component bonded to the second circuit substrate is electrically coupled to the first circuit substrate via the first interposer substrate.

6. The method according to claim 3, characterized in that Also includes: receiving a fourth substrate panel having an upper surface and a lower surface, the fourth substrate panel including a second interposer substrate having an aperture therethrough; receiving a fifth substrate panel having an upper surface and a lower surface, the fifth substrate panel including a third circuit substrate; bonding the lower surface of the fourth substrate panel to the upper surface of the third substrate panel such that the aperture in the second interposer substrate is disposed above the second circuit substrate; bonding the lower surface of the fifth substrate panel to the upper surface of the fourth substrate panel such that a second cavity is formed between the second circuit substrate and the third circuit substrate; cutting a channel through the fifth substrate panel and the fourth substrate panel, the channel separating the third circuit substrate from the fifth substrate panel and separating the second interposer substrate from the fourth substrate panel; as well as dispensing the molding material in the channels in the fourth substrate panel such that the apertures in the second interposer substrate are surrounded by the molding material; wherein the apparatus assembly producing the singulation further comprises cutting through a portion of the molding material in the channel in the fourth substrate panel and in the channel in the fifth substrate panel; and The singulated device components further include: the second interposer substrate; the third circuit substrate bonded to the second interposer substrate; and The second cavity is disposed between the third circuit substrate and the second interposer substrate.

7. The method according to claim 1, characterized in that Also includes: receiving a third substrate panel having an upper surface and a lower surface, the third substrate panel including a second interposer substrate having an aperture therethrough; bonding the lower surface of the third substrate panel to the upper surface of the second substrate panel such that the aperture in the second interposer substrate is disposed above the first cover; bonding a second cover to the upper surface of the fourth substrate panel such that a second cavity is formed between the second interposer substrate and the second cover; cutting a channel through the third substrate panel, the channel separating the second interposer substrate from the third substrate panel; as well as dispensing the molding material in the channels in the third substrate panel such that the apertures in the second interposer substrate are surrounded by the molding material; wherein the apparatus assembly producing the singulation further comprises cutting through a portion of the molding material in the channel in the third substrate panel; and The singulated device components further include: the second interposer substrate; the second cover bonded to the second interposer substrate; and The second cavity is disposed between the second cover and the second interposer substrate.

8. The method according to claim 7, characterized in that The first cover is formed of a second circuit substrate.

9. A method, characterized in that include: A panel assembly is provided, the panel assembly comprising: a first substrate panel, the first substrate panel including a group of first circuit substrates including electronic components; and a second substrate panel bonded over the first substrate panel, the second substrate panel comprising a set of first interposer substrates having apertures disposed over corresponding first circuit substrates of the first substrate panel; partially cutting the panel assembly to form a channel through the second substrate panel; and singulating the panel assembly into singulated circuit assemblies by cutting through a portion of the molding material in the channel through the second substrate panel and cutting through the first substrate panel below the channel; Each single-cut circuit component includes: a first circuit substrate; a first interposer substrate bonded over the first circuit substrate and comprising a first aperture disposed over a first portion of the first circuit substrate; a first cover bonded over the first aperture such that a first cavity is formed over the portion of the first circuit substrate; and A molding material at least partially surrounds the first interposer substrate.

10. A method, characterized in that include: A panel assembly is provided, the panel assembly comprising: a first substrate panel, the first substrate panel including a group of first circuit substrates including electronic components; and a second substrate panel bonded over the first substrate panel, the second substrate panel comprising a set of first interposer substrates having apertures disposed over corresponding first circuit substrates of the first substrate panel; partially cutting the panel assembly to form a channel through the second substrate panel; and singulating the panel assembly into singulated circuit assemblies by cutting through a portion of the molding material in the channel through the second substrate panel and cutting through the first substrate panel below the channel; Each single-cut circuit component includes: a first circuit substrate, the first circuit substrate comprising a heat conducting structure passing through the first circuit substrate; a first interposer substrate bonded over the first circuit substrate and comprising a first aperture disposed over a first portion of the first circuit substrate; a first cover bonded over the first aperture such that a first cavity is formed over the portion of the first circuit substrate; and an electronic device disposed on the upper surface of the first circuit substrate and thermally coupled to the lower surface of the first circuit substrate via the heat conductive structure; and wherein each singulated component further comprises a portion of the molding material in the channel through the second substrate panel remaining after cutting through the channel; and The molding material electrically isolates conductive structures of the first interposer substrate.