Miniaturized frequency source structure and preparation method thereof

Abstract

The invention provides a miniaturized frequency source structure and a preparation method thereof, and the structure mainly comprises an upper layer circuit which mainly integrates a loop circuit of a frequency source and a peripheral configuration circuit, the adjustment of the built-in loop circuit and the electromagnetic shielding cavity can be realized through a straight-through hole penetrating through the upper-layer circuit and a top-layer conductor layer of the upper-layer circuit; the frequency source core chips are embedded in the lower layer circuit, and interconnection between the core chips and interconnection between chip ports and frequency source pin bonding pads are achieved through a plurality of wiring layers; the lower layer circuit is provided with a straight-through hole penetrating through the lower layer circuit, and the straight-through hole leads the electrode of the multi-layer wiring layer to the side, away from the multi-layer wiring layer, of the lower layer part. The frequency source can use an internal loop or an external loop through different interconnection modes, so that the adaptability of the frequency source in different use environments is improved; the integrated circuit is high in integration level, low in packaging cost and suitable for batch production, the loop has multiple adjusting modes, and universality is high.

Description

Technical Field

[0001] The present invention relates to the field of wireless communications, and in particular to a miniaturized frequency source structure and a preparation method thereof. Background Art

[0002] Frequency source is the basic signal source of electronic systems and plays a very important role in wireless communication systems, navigation, radar and other fields. With the advent of the post-Moore era, electronic devices have higher requirements for miniaturization and high-density integrated packaging. Frequency source modules are developing towards multi-function, flexibility and high integration while ensuring small size and low power consumption.

[0003] In recent years, domestic research institutes and enterprises have conducted research on miniaturized RF SiP integration technology based on ceramic process platforms and have made some breakthrough progress, including the development of 2D and 2.5D ceramic packaged RF SiP modules. However, the introduction of ceramic shells leads to higher costs, and its assembly still adopts a mixed assembly form of micro-assembly and power assembly, which makes its assembly difficult and the consistency of batch production needs to be improved, making it difficult to mass produce. Summary of the invention

[0004] In view of the above problems existing in the prior art, the present invention proposes a miniaturized frequency source structure and a preparation method thereof, which mainly solves the problems that the existing frequency source packaging process is complex, the size is large and the assembly is difficult.

[0005] In order to achieve the above purpose and other purposes, the technical solution adopted by the present invention is as follows.

[0006] In the first aspect, the present application provides a miniaturized frequency source structure, which includes: an upper-layer circuit, in which a built-in loop circuit of the frequency source structure and a peripheral configuration circuit of the frequency source core chip are arranged; a lower-layer circuit, in which multiple core chips of the frequency source structure are buried, and interconnection between the core chips and interconnection between the chip ports and the pin pads of the frequency source structure are achieved through a multi-layer wiring layer, and the electrodes of the multi-layer wiring layer are led out to the side of the lower-layer circuit away from the multi-layer wiring layer through a second through hole that passes through the lower-layer circuit, wherein the peripheral configuration circuit is connected to the corresponding core chip.

[0007] In one embodiment of the present application, the interconnection method between the upper layer circuit and the lower layer circuit includes: integrated packaging or separate packaging.

[0008] In one embodiment of the present application, the pad surface of the core chip faces upward, and the core chip at least includes: a control chip, a power supply voltage stabilization chip, and a phase-locked chip; the built-in loop circuit is composed of loop devices, including a passive loop and / or an active loop, a first group of connection ports are led out from the phase-locked chip, and a second group of connection ports are led out from the input and output ports of the built-in loop circuit, and the first group of connection ports are correspondingly connected to the second group of connection ports through an external connection structure to form a closed loop, or the first group of ports are interconnected with the external loop to form a closed loop.

[0009] In one embodiment of the present application, an electromagnetic shielding cavity is also provided in the upper circuit, and the electromagnetic shielding cavity is composed of a shielding through hole array and a conductor layer. The shielding through hole array passes through the upper circuit and is grounded through the multi-layer wiring layer. The conductor block closes the opening area of ​​the shielding through hole array on the side of the upper circuit away from the multi-layer wiring layer, and the electromagnetic shielding cavity is used to shield interference signals outside the cavity surrounded by the shielding through hole array.

[0010] In one embodiment of the present application, a debugging device is provided on the side of the upper circuit facing away from the multi-layer wiring layer; the debugging device is connected to the built-in loop circuit through the first straight hole and the routing of the multi-layer wiring layer, and the electrical parameters of the built-in loop circuit are adjusted by debugging the electrical parameters of the debugging device.

[0011] In one embodiment of the present application, a heat dissipation through hole is further provided on a side of the core chip facing away from the upper circuit to transfer the heat of the core chip to a side of the lower circuit facing away from the multi-layer wiring layer.

[0012] In one embodiment of the present application, for the discrete package, the upper layer circuit and the lower layer circuit are interconnected, and a plurality of upper layer circuits with different built-in loops and peripheral configuration circuits are manufactured in advance according to index requirements, and the definition and position of the stacking welding pads of each upper layer circuit are kept consistent. By stacking and welding a specific upper layer circuit with the lower layer circuit, the discrete package frequency source with specific electrical properties can be obtained.

[0013] In the second aspect, the present application also provides a preparation method for the miniaturized frequency source structure, the method comprising: placing a plastic-encapsulated through-hole structure and a phase-locked chip, a control chip, and a power supply voltage stabilizing chip on a temporary carrier; with the pads of each chip facing downward, a plastic-encapsulated material is used for injection molding to obtain a plastic-encapsulated panel, and the side of the plastic-encapsulated panel facing away from each chip is smoothed; the temporary carrier is removed and turned over to make a redistribution layer on the front of each chip, the redistribution layer is the multi-layer wiring layer, and the lower circuit is obtained; the built-in loop circuit and the peripheral configuration circuit are welded on the redistribution layer using a surface mounting process, and then the mounted plastic-encapsulated panel is injection molded, and then the surface where the surface loop circuit and the peripheral configuration circuit are located are smoothed to obtain a plastic-encapsulated panel in which the upper circuit and the lower circuit are integrated, and finally a single integrated packaged frequency source module is obtained by cutting.

[0014] In a third aspect, the present application also provides a method for preparing the miniaturized frequency source, the method comprising: placing a plastic-encapsulated through-hole structure and a phase-locked chip, a control chip, and a power supply voltage stabilizing chip on a temporary carrier; with the solder pads of each chip facing downward, a plastic-encapsulated material is used for injection molding to obtain a plastic-encapsulated panel for a lower circuit, and the side of the plastic-encapsulated panel for the lower circuit facing away from each chip is smoothed; the temporary carrier is removed and flipped over to make a redistribution layer on the front side of each chip, and a single lower circuit is obtained by cutting; a single upper circuit is obtained by the same process steps, and the upper and lower circuits are stacked by reflow soldering to obtain a single discretely packaged frequency source module.

[0015] In one embodiment of the present application, on the side of the chip on the lower circuit that needs to be grounded or dissipated heat that is away from the redistribution layer, the corresponding metal layer on the back of the chip is exposed by laser drilling or laser grooving, and then metal holes or metal blocks are generated by sputtering electroplating, so that the corresponding metal layer on the back of the chip is interconnected with the external pad of the plastic panel.

[0016] As described above, the miniaturized frequency source structure and the preparation method thereof proposed in the present application have the following beneficial effects.

[0017] The frequency source of the present application provides two sets of connection ports, which can realize multiple connection modes, such as connecting to a built-in loop circuit or connecting to an external loop circuit, which can meet the application requirements of different scenarios; by embedding multiple chips in the plastic packaging layer, and assembling the loop circuit and peripheral circuit devices to the surface of the packaging structure through the surface mounting process, and finally plastic sealing and molding, this integration process does not require a frame structure and a traditional PCB circuit board, and directly uses the high-precision wiring of the plastic packaging integration process, which can reduce the packaging cost and assembly difficulty, and improve the consistency of the frequency source module. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1It is a schematic cross-sectional view of the structure of an integrated packaged miniaturized frequency source in one embodiment of the present application.

[0019] Figure 2 It is a schematic cross-sectional view of the structure of a discrete packaged miniaturized frequency source in one embodiment of the present application.

[0020] Figure 3 Schematic diagram of the circuit structure of a frequency source in one embodiment of the present application.

[0021] Figure 4 This is a schematic diagram of the frequency source lead-out interface connection method in one embodiment of the present application.

[0022] Figure 5 This is a schematic diagram of the debugging structure of the built-in loop circuit in one embodiment of the present application.

[0023] Figure 6 Schematic diagram of the circuit structure of a built-in loop circuit in an embodiment of the present application.

[0024] Figure 7 This is a flow chart of a method for preparing an integrated packaged miniaturized frequency source in one embodiment of the present application.

[0025] Figure 8 Flow chart of a method for preparing a discrete package miniaturized frequency source in one embodiment of the present application. DETAILED DESCRIPTION

[0026] The following describes the embodiments of the present invention by specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0027] It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention, and thus the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0028] The inventors have found that:

[0029] Frequency source is the basic signal source of electronic systems and plays a very important role in wireless communication systems, navigation, radar and other fields. With the advent of the post-Moore era, electronic devices have higher requirements for miniaturization and high-density integrated packaging. Frequency source modules are developing towards multi-function, flexibility and high integration while ensuring small size and low power consumption.

[0030] In recent years, domestic research institutes and enterprises have conducted research on miniaturized RF SiP integration technology based on ceramic process platforms and have made some breakthrough progress, including the development of 2D and 2.5D ceramic packaged RF SiP modules. However, the introduction of ceramic shells leads to higher costs, and its assembly still adopts a mixed assembly form of micro-assembly and power assembly, which makes its assembly difficult and the consistency of batch production needs to be improved, making it difficult to mass produce.

[0031] For example, in 2022, Liao Changchun and others from the University of Electronic Science and Technology of China used the HTCC process and gold wire bonding technology to achieve a miniaturized frequency source design. The size of the frequency source is only 9×9×2mm 3 The shell is made of alumina ceramic and metal cavity.

[0032] In 2023, Yin Feng, Qian Xingcheng, Wang Sheng and others from the 28th Institute of China Electronics Technology Group Corporation used SiP technology and board-level stacking technology POP to develop a Ku-band miniaturized phase-locked source with a size of only 16×11×3mm 3 .

[0033] In the field of three-dimensional integration research of frequency source modules, with the widespread use of advanced packaging, modules are rapidly developing towards smaller sizes, and can now be as small as 9×9×1.8mm 3 However, it still does not meet the current needs of high integration and miniaturization of RF circuits. Based on the process advantages of FAN-OUT, the frequency source micromodule using FAN-OUT packaging structure will further reduce the size of the frequency source module. Currently, this field is still in a blank state and has great research value.

[0034] In addition, the existing frequency source modules are generally designed with circuits and layouts according to usage requirements, and are put into production after being tested to meet the indicators. After the frequency source module is processed, the built-in circuit is completely fixed, and the circuit design structure has poor adaptability. If the individual output frequency points need to be adjusted and optimized at a later stage, the internal circuit of the module must be adjusted, which has high R&D costs and is time-consuming, and cannot meet the easy-to-adjust requirements of general frequency sources.

[0035] In view of the problems of complex assembly process, high packaging cost, great difficulty in batch production, poor batch production consistency and fixed circuit structure in existing frequency source micromodules, the present invention proposes a frequency source SiP design method and module based on FAN-OUT process. This module adopts FAN-OUT packaging integration, and multiple chips are embedded and integrated in the packaging structure through FC (Flip chip) and RDL (ReDistribution Layer) processes, and then the peripheral circuit is assembled to the upper plastic sealing layer of the packaging structure through the SMT automatic assembly process, and finally the plastic sealing is formed. The integration process does not require a frame structure and a traditional circuit PCB, which reduces the packaging cost and assembly difficulty, and improves the batch production capacity of the frequency source module. The high-precision wiring based on the FAN-OUT integration process can improve the consistency of the frequency source module.

[0036] In addition, for the frequency source module, which outputs different frequencies, it is necessary to adjust the frequency source loop part to obtain the best output performance. The frequency source loop circuit will affect the phase noise, spurious and other indicators of the frequency source. In the present invention, the frequency source loop has a variety of connection modes, and the external loop mode or the built-in loop mode can be selected according to actual needs to adjust the frequency source performance, and the built-in loop can also be adjusted through the debugging circuit, further improving the performance adjustment ability of the frequency source. The frequency source micro-module structure proposed by the present invention has lower cost, short production cycle, high consistency, and adjustable loop, and has broad application prospects.

[0037] The technical solution of the present application is described in detail below in conjunction with specific embodiments.

[0038] See also Figure 1 , Figure 1This is a schematic diagram of the structural cross-section of an integrated packaged miniaturized frequency source in an embodiment of the present application. The frequency source provided in the embodiment of the present application includes a built-in loop circuit, a control circuit, a power supply circuit, and a phase-locked circuit. The control circuit provides a control signal to the phase-locked circuit, and the power supply is provided by the power supply circuit. The phase-locked circuit can be implemented using an integrated phase-locked loop or a phase detector plus a voltage-controlled oscillator. A first group of connection ports are led out from the loop configuration port of the phase-locked circuit, and a second group of connection ports are led out from the input and output ports of the built-in loop circuit. The first group of connection ports are correspondingly connected to the second group of connection ports through an external connection structure to form a closed loop; each circuit and device in the frequency source is composed of a top-level built-in loop device 6, a peripheral configuration circuit device 4, a bare chip 16 and other devices 5, and the other devices 5 include a DC blocking capacitor, a radio frequency matching device, etc.; the packaging structure includes: an upper circuit 1, which is provided with an electromagnetic shielding cavity, a built-in loop circuit and a peripheral configuration circuit , the electromagnetic shielding cavity is provided with the peripheral configuration circuit device 4 and other devices 5, and the electromagnetic shielding cavity is used to shield the interference signal from the outside; the lower circuit 18, in which the bare chip 16 and the rewiring layer 11 are buried, the rewiring layer 11 is a form of a multi-layer wiring layer, the rewiring layer 11 is arranged between the upper circuit 1 and the lower circuit 18, so as to electrically connect the chip in the upper circuit 1 with the chip in the lower circuit 18, and lead the signal and ground to the side of the lower circuit 18 away from the rewiring layer 11 through the second through hole 12 penetrating the lower circuit 18; wherein the top layer built-in loop device 6 is arranged on the side of the upper circuit 1 away from the rewiring layer 11, and is located outside the electromagnetic shielding cavity; the top layer built-in loop device 6 is electrically connected to the routing of the rewiring layer 11 through the first through hole 8 penetrating the upper circuit 1. Specifically, the devices constituting the built-in loop circuit, such as capacitors and resistors, can be surface mounted devices. The power supply circuit, control circuit, phase-locked circuit, etc. can be implemented by embedded surface mount chips, flip chips or bare chip structures. The power supply voltage regulator chip corresponding to the power supply circuit, the control chip corresponding to the control circuit, and the phase-locked chip corresponding to the phase-locked circuit can be set in the lower circuit as the core chip of the frequency source structure, and the peripheral configuration circuit of the corresponding circuit can be set in the upper circuit. For example, the power supply voltage regulator chip and the corresponding peripheral configuration circuit together constitute the power supply circuit, and the other circuit composition structures are similar, which will not be repeated here. The specific setting position and layout can be set and adjusted according to the actual chip application requirements, and there is no limitation here.

[0039] See also Figure 2 , Figure 2This is a schematic structural cross-sectional diagram of a discretely packaged miniaturized frequency source in an embodiment of the present application, wherein the functional circuits included in the upper-layer circuit 1 and the lower-layer circuit 18 are the same as the functional circuits included in the upper-layer circuit and the lower-layer circuit of an integrated package, but the upper-layer circuit 1 and the lower-layer circuit 18 of the discrete package are independent structures, and stacked pads are respectively made on the side of the peripheral configuration circuit device 4 of the upper-layer circuit 1 and on the side of the redistribution layer 11 of the lower-layer circuit 18, and the upper-layer circuit 1 and the lower-layer circuit 18 are interconnected by three-dimensional stacking.

[0040] In one embodiment, the first through hole 8 of the upper circuit 1 can be made of copper pillars, and of course other conductive metal materials can be used as required. The second through hole 12 in the lower circuit 18 can be made using Through Molding Via (TMV) technology. The TMV through hole can realize the transmission of radio frequency signals between the bottom port and the multi-layer circuit of the redistribution layer 11, thereby realizing the transmission of high-frequency signals.

[0041] See also Figure 3 , Figure 3 Schematic diagram of the circuit architecture of the frequency source in one embodiment of the present application. In the frequency source of the present application, the phase-locked circuit is provided with a control signal by the control circuit, the power supply circuit is powered, and a first group of connection ports A and B are provided to the outside, and the built-in loop circuit provides a second group of connection ports C and D. A and D are connected, and B and C are connected to form a complete closed loop to realize the relevant functions of the frequency source. Of course, the built-in loop circuit may not be used, and an additional external loop circuit may be connected to the first group of connection ports to form a closed loop. Exemplarily, the external loop circuit may provide interfaces E and F, and a closed loop is formed by connecting E to A and F to B.

[0042] See also Figure 4 , Figure 4 Schematic diagram of the frequency source lead-out interface connection method in one embodiment of the present application. In one embodiment, the first group of connection ports and the second group of connection ports are both led out from the side of the lower plastic encapsulation layer away from the redistribution layer. That is, interfaces A, B, C, and D are located on the same side, through an external connection structure (i.e. Figure 4 The circuit substrate in the circuit board can realize the corresponding connection between the first group of connection ports and the second group of connection ports, or the corresponding connection between the first group of connection ports and the ports provided by the external loop circuit. Of course, the shape of the specific external connection structure and the connection line setting method can be selected and adjusted according to the actual application requirements. The internal loop circuit and the external loop circuit can share a set of circuit substrates, or they can be set separately. There is no limitation here.

[0043] In one embodiment, the electromagnetic shielding cavity is composed of a shielding through hole array 2 and a conductor layer 3 on one side of the upper circuit, the shielding through hole array 2 passes through the upper circuit 1 and is grounded through the rewiring layer 11, and the conductor layer 3 is used to close the opening area of ​​the shielding through hole array 2 on the side of the upper circuit 1 away from the rewiring layer 11. Specifically, in order to improve the isolation between the internal circuits of the frequency source, the electromagnetic shielding in the hollow part surrounded by the shielding through hole array can be achieved by the shielding through hole array 2 and the conductor block 3, and the shielding through hole array 2 and the conductor block 3 can be designed as a square, circular or special-shaped hollow structure according to actual needs.

[0044] In one embodiment, for the miniaturized frequency source of the integrated package, a welding layer 9 is provided between the electrical connection points of the upper circuit 1 and the rewiring layer 11, and the components of the upper circuit 1 are connected to the corresponding rewiring layer 11 through the welding layer 9. The first through hole 8 and the shielding through hole array 2 of the upper circuit 1 can be connected to the corresponding circuit of the multiple wiring layer 11 by metallization after laser drilling or buried copper pillars to achieve signal interconnection and ground shielding. The specific wiring structure of the rewiring layer 11 can be set and adjusted according to the device arrangement and the structure of the built-in loop circuit, which is not limited here.

[0045] In one embodiment, the discretely packaged miniaturized frequency source is different from the integrated packaged miniaturized frequency source in that a welding layer 9 is provided on the stacking welding surfaces of the upper circuit 1 and the lower circuit 18, and the stacking interconnection of the upper circuit 1 and the lower circuit 18 can be achieved through solder balls 10.

[0046] See also Figure 5 , Figure 5 This is a schematic diagram of the debugging structure of the built-in loop circuit in one embodiment of the present application. In one embodiment, the electrical parameters of the built-in loop circuit are adjusted by debugging the electrical parameters of the debugging device, and the debugging device is led out to the side of the upper circuit 1 away from the rewiring layer 11 through the first through hole 8, so as to adjust the circuit parameters of the built-in loop circuit through the debugging device. Specifically, after the device of the built-in loop circuit is electrically connected to the wiring of the rewiring layer 11, the corresponding electrode can be led out to the side or designated area of ​​the upper circuit 1 by the wiring of the rewiring layer 11, and then led out to the side of the upper circuit 1 away from the rewiring layer 11 through the first through hole 8 in the corresponding area. The key device port of the built-in loop circuit is led to the top pad of the upper circuit 1 through the conductive through hole 8, and the debugging device is soldered to the top pad, and then the electrical parameters of the built-in loop circuit are adjusted by debugging the electrical parameters of the debugging device.

[0047] See also Figure 6 , Figure 6This is a schematic diagram of the circuit structure of a built-in loop circuit in an embodiment of the present application. The built-in loop circuit includes a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a first resistor R1, a second resistor R2 and a third resistor R3; the first end of the built-in loop circuit is respectively connected to one end of the first capacitor C1, the first resistor R1 and the second resistor R2; the other end of the first capacitor C1 is grounded, the other end of the first resistor R1 is connected to one end of the second capacitor C2, and the other end of the second capacitor C2 is grounded; the other end of the second resistor R2 is respectively connected to one end of the third resistor R3 and one end of the third capacitor C3, and the other end of the third capacitor C3 is grounded ;The other end of the third resistor R3 and one end of the fourth capacitor C4 are connected to the second end of the built-in loop circuit; The other end of the fourth capacitor C4 is grounded; The first end and the second end of the built-in loop circuit constitute the second group of connection ports, wherein the first capacitor C1, the second capacitor C2 and the first resistor C3 are all provided with debugging devices that can be connected in parallel, and the connection end of the debugging device and the corresponding parallel capacitor or resistor is led out by the upper circuit 1, and the parallel connection of the debugging device and the corresponding capacitor or resistor is realized by the connection method, and the capacitance value or resistance value of the corresponding branch is adjusted by debugging the electrical parameters of the debugging device. Exemplarily, the debugging device corresponding to the first capacitor C1 can be C5, the debugging device corresponding to the second capacitor C2 is C6, and the debugging device corresponding to the first resistor R1 is R4. Under normal circumstances, C5, C6 and R4 are not connected to the circuit and are in a disconnected state, but their connection ends and the connection ends of the corresponding capacitors or resistors that need to be connected in parallel can be respectively led out to the debugging pads through conductive columns. By welding debugging devices with different electrical parameters on the debugging pads, the loop parameters can be adjusted. By connecting capacitors or resistors in parallel, the resistance value in the built-in loop can be reduced, the capacitance value can be increased, and the loop bandwidth can be narrowed. Of course, the built-in loop circuit is not limited to this application. Figure 6 The circuit shown can also be set and adjusted according to actual application requirements, and the position of the debugging device can also be set according to requirements, which is not limited here.

[0048] In one embodiment, a heat dissipation via 17 is further provided in the lower circuit 18, and the heat dissipation via 17 can be a metallized hole or a metal block. The heat dissipation via 17 is connected to the side of the bare chip 16 away from the redistribution layer 11 to transfer the heat of the bare chip 16 to the side of the lower plastic packaging layer 18 away from the redistribution layer 11. The heat dissipation via 17 can conduct the heat generated by the bare chip 16 to the outside of the packaging structure to achieve good heat dissipation of the frequency source. The specific number, size, shape and arrangement density of the heat dissipation vias 17 can be set and adjusted according to actual application requirements, and are not limited here. In addition, the heat dissipation vias 17 achieve good grounding while achieving heat dissipation. Heat dissipation vias can be selectively provided at the bottom of one or more core chips to conduct heat to the side away from the redistribution layer.

[0049] In one embodiment, a bottom circuit 13 is further provided on the side of the lower plastic sealing layer 18 facing away from the redistribution layer 11. The bottom circuit 13 is interconnected with the second through hole 12, the redistribution layer 11 and the various devices in the frequency source made by the plastic sealing through hole process. A soldering pad 14 is made on the bottom side of the bottom circuit 13, and the functional ports of the frequency source are led out from the soldering pad 14. The connecting ball 15 is a solder ball, which is soldered to the soldering pad 14 through a welding process. The connecting ball 15 realizes the welding of the frequency source with the PCB board or other circuit substrate when actually in use.

[0050] Based on the technical solutions of the above embodiments of the present application, the FAN-OUT process is adopted to realize the miniaturization of the frequency source through the embedded structure of multi-layer devices. Compared with the traditional planar circuit frequency source, the frequency source module proposed in the present invention adopts multi-layer stacking to integrate internal devices, and the planar area of ​​the module is reduced by more than 50%; compared with the currently popular ceramic packaging process to integrate the frequency source, the frequency source module proposed in the present invention adopts the RDL process to directly interconnect the chip with the switching circuit, and at the same time bury the chip in the plastic package substrate. The module height can be reduced to less than 1.5mm, and the planar size is reduced to less than 6mm×6mm. At the same time, it simplifies the assembly process, improves the assembly accuracy and consistency, and is more suitable for low-cost, mass production; in order to realize the adjustable frequency source loop, the loop part of the frequency source proposed in the present invention can be selected as a built-in loop or an external loop. The schematic diagram is as follows Figure 4 As shown, the input and output ports A, B and the built-in loop ports C, D of the frequency source loop part are connected to the external port of the frequency source module. When the frequency source is actually used, Figure 4As shown, the A, D ports and the B, C ports can be connected through the circuit substrate. At this time, the working mode of the frequency source is the built-in loop mode, and the frequency source will use the internal prefabricated loop circuit for output. If the prefabricated loop frequency source index cannot meet the application requirements, the A, E ports and the B, F ports can be connected through the circuit substrate. At this time, the frequency source will work in the external loop mode, and the external loop can be freely configured to adjust the frequency source output signal index to meet the application requirements; in order to improve the versatility of the frequency source module, a conductive through hole is used to lead the port of the key device of the built-in loop to the top pad of the module, and then the electrical performance of the loop is adjusted by adjusting the device. By parallel connection, the resistance value in the loop can be reduced, the capacitance value can be increased, and the loop bandwidth can be narrowed to achieve the purpose of loop adjustment; compared with the existing frequency source module, it is smaller in size, lower in packaging cost, more suitable for mass production, and the loop has multiple adjustment methods, and is more versatile.

[0051] In one embodiment, a method for preparing an integrated packaged miniaturized frequency source structure includes the following steps: placing a plastic-encapsulated through-hole structure and a phase-locked chip, a control chip, and a power supply voltage regulator chip on a temporary carrier; with each chip pad facing downward, a plastic-encapsulated material is used for injection molding to obtain a plastic-encapsulated panel, and the side of the plastic-encapsulated panel facing away from each chip is smoothed; the temporary carrier is removed and flipped over to make a redistribution layer on the basis of each chip to obtain the lower circuit; the surface mount device or flip chip is welded to the redistribution layer using a surface mount process, and then the mounted plastic-encapsulated panel is injection molded, and then the surface where the surface mount device or flip chip is located is smoothed to obtain a plastic-encapsulated panel in which the upper circuit and the lower circuit are integrated, and finally a single integrated packaged frequency source module is obtained by cutting.

[0052] In one embodiment, a method for preparing a discretely packaged miniaturized frequency source structure includes the following steps: placing a plastic-encapsulated through-hole structure and a phase-locked chip, a control chip, and a power supply voltage regulator chip on a temporary carrier; with each chip pad facing downward, a plastic-encapsulated material is used for injection molding to obtain a lower circuit plastic-encapsulated panel, and the side of the lower circuit plastic-encapsulated panel facing away from each chip is smoothed; the temporary carrier is removed and turned over to make a redistribution layer based on each chip, and a single lower circuit is obtained by cutting; a single upper circuit is obtained by the same process steps, and the upper and lower circuits are stacked by reflow soldering to obtain a single discretely packaged frequency source module.

[0053] See also Figure 7 , Figure 8 , is a flow chart of a method for preparing a three-dimensional stacked structure according to an exemplary embodiment of the present invention. Figure 7 As shown, in an exemplary embodiment, the method for preparing an integrated package miniaturized frequency source includes at least steps S710 to S770, which are described in detail as follows:

[0054] Step S710, placing the plastic-encapsulated through-hole structure and the phase-locked chip, the control chip, and the power chip on a temporary carrier with the chip pads facing downward;

[0055] Step S720, using a plastic packaging material for injection molding to obtain a plastic packaging panel, and grinding the side of the panel facing away from the chip;

[0056] Step S730, remove the temporary carrier plate and turn over the plastic-sealed panel;

[0057] Step S740, making a redistribution layer on the surface where the chip is located;

[0058] Step S750, soldering the surface mount device or flip chip on the redistribution layer using SMT technology;

[0059] Step S760, injection molding the mounted plastic-sealed panel, and then grinding the side where the surface mount device or flip chip is located;

[0060] Step S770, cutting to obtain a single integrated packaged miniaturized frequency source module product.

[0061] like Figure 8 As shown, in an exemplary embodiment, the method for preparing a discrete package miniaturized frequency source includes at least steps S810 to S870, which are described in detail as follows:

[0062] Step S810, placing the plastic-encapsulated through-hole structure and the phase-locked chip, the control chip, and the power chip on a temporary carrier with the chip pads facing downward;

[0063] Step S820, using a plastic packaging material for injection molding to obtain a plastic packaging panel, and grinding the side of the panel facing away from the chip;

[0064] Step S830, remove the temporary carrier plate and turn over the plastic-sealed panel;

[0065] Step S840, making a redistribution layer on the surface where the chip is located;

[0066] Step S850, cutting to obtain a single lower layer circuit;

[0067] Step S860, using the same process steps as above to manufacture a single upper layer circuit;

[0068] Step S870, stacking the upper and lower circuits by reflow soldering to obtain a single discrete package miniaturized frequency source module product.

[0069] The above preparation method steps are merely illustrative and are not intended to be specific limitations of the present application.

[0070] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A miniaturized frequency source structure, characterized in that: The structure comprises: An upper circuit, in which a built-in loop circuit of the frequency source structure and a peripheral configuration circuit of the frequency source core chip are arranged; A lower layer circuit has multiple core chips of the frequency source structure embedded therein, and interconnections between the core chips and between chip ports and pin pads of the frequency source structure are achieved through multi-layer wiring layers, and electrodes of the multi-layer wiring layers are led out to a side of the lower layer circuit away from the multi-layer wiring layers through second through holes that penetrate the lower layer circuit, wherein the peripheral configuration circuit is connected to the corresponding core chip.

2. The miniaturized frequency source structure according to claim 1, characterized in that: The interconnection method of the upper layer circuit and the lower layer circuit includes: integrated packaging or discrete packaging.

3. The miniaturized frequency source structure according to claim 1, characterized in that: The pad surface of the core chip faces upward, and the core chip at least includes: a control chip, a power supply voltage stabilization chip, and a phase-locked chip; the built-in loop circuit is composed of loop devices, including a passive loop and / or an active loop, a first group of connection ports are led out from the phase-locked chip, and a second group of connection ports are led out from the input and output ports of the built-in loop circuit, and the first group of connection ports are correspondingly connected with the second group of connection ports through an external connection structure to form a closed loop, or the first group of ports are interconnected with an external loop to form a closed loop.

4. The miniaturized frequency source structure according to claim 1, characterized in that: An electromagnetic shielding cavity is also provided in the upper circuit, and the electromagnetic shielding cavity is composed of a shielding through-hole array and a conductor layer. The shielding through-hole array passes through the upper circuit and is grounded through the multi-layer wiring layer. The conductor block closes the opening area of ​​the shielding through-hole array on the side of the upper circuit away from the multi-layer wiring layer, and the electromagnetic shielding cavity is used to shield interference signals outside the cavity surrounded by the shielding through-hole array.

5. The miniaturized frequency source structure according to claim 3, characterized in that: A debugging device is provided on the side of the upper circuit away from the multi-layer wiring layer; the debugging device is connected to the built-in loop circuit through the first straight hole and the routing of the multi-layer wiring layer, and the electrical parameters of the built-in loop circuit are adjusted by debugging the electrical parameters of the debugging device.

6. The miniaturized frequency source structure according to claim 1, characterized in that: A heat dissipation through hole is also provided on a side of the core chip away from the upper circuit to transfer the heat of the core chip to a side of the lower circuit away from the multi-layer wiring layer.

7. The miniaturized frequency source structure according to claim 2, characterized in that: For the discrete package, the upper circuit is interconnected with the lower circuit, and a variety of upper circuits with different built-in loops and peripheral configuration circuits are made in advance according to index requirements, and the definition and position of the stacking welding pads of each upper circuit are kept consistent. By stacking and welding a specific upper circuit with the lower circuit, the discrete package frequency source with specific electrical performance can be obtained.

8. A method for preparing the miniaturized frequency source structure according to any one of claims 1 to 7, characterized in that: The method comprises: Place the plastic-encapsulated through-hole structure, phase-locked chip, control chip, and power supply voltage regulator chip on a temporary carrier; With the pads of each chip facing downward, a plastic sealing material is used for injection molding to obtain a plastic sealing panel, and a side of the plastic sealing panel facing away from each chip is smoothed; The temporary carrier is removed and turned over to make a redistribution layer on the front side of each chip, wherein the redistribution layer is the multi-layer wiring layer to obtain the lower circuit; The built-in loop circuit and the peripheral configuration circuit are welded on the redistribution layer by an assembly process, and then the mounted plastic panel is injection molded. The surface of the loop circuit and the peripheral configuration circuit are then smoothed to obtain a plastic panel in which the upper circuit and the lower circuit are integrated. Finally, a single integrated packaged frequency source module is obtained by cutting.

9. A method for preparing the miniaturized frequency source according to any one of claims 1 to 7, characterized in that: The method comprises: Place the plastic-encapsulated through-hole structure, phase-locked chip, control chip, and power supply voltage regulator chip on a temporary carrier; With the pads of each chip facing downward, a plastic sealing material is used for injection molding to obtain a lower circuit plastic sealing panel, and a side of the lower circuit plastic sealing panel facing away from each chip is smoothed; The temporary carrier is removed and turned over to make a redistribution layer on the front side of each chip, and a single lower layer circuit is obtained by cutting; a single upper layer circuit is obtained by the same process steps, and the upper and lower layer circuits are stacked by reflow soldering to obtain a single discrete packaged frequency source module.

10. The method for preparing a miniaturized frequency source structure according to claim 9, characterized in that: On the side of the chip on the lower circuit that needs to be grounded or dissipated away from the redistribution layer, the corresponding metal layer on the back of the chip is exposed by laser drilling or laser grooving, and then metal holes or metal blocks are generated by sputtering electroplating, so that the corresponding metal layer on the back of the chip is interconnected with the external pad of the plastic panel.

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