Bearing control card and switch

Abstract

The invention provides a bearer control card and a switch, which can be applied to the technical field of communication. The bearing control card comprises a processor, a first substrate controller, a second substrate controller and a logic controller, and the logic controller is connected with a switch board card through a connector; wherein the first substrate controller is used for monitoring the working state of the processor, generating a first interrupt signal under the condition of determining that the processor is in an abnormal working state, and respectively sending the first interrupt signal to the second substrate controller and the logic controller; the second substrate controller is used for generating a first communication signal in response to the first interrupt signal; and the logic controller is used for responding to the first interrupt signal and providing the first communication signal to the switch board card so as to switch the control unit bearing the control card to the second substrate controller.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, in particular to the field of communication equipment technology, and more particularly to a load control card and a switch. Background Art

[0002] As the core equipment of modern networks, switches undertake key functions of data forwarding, flow control and network management. In the design of switches, the load control board realizes the coordinated work of control and data exchange by integrating components such as processor boards, baseboard management controllers, and network chips, while the switch board focuses on high-speed data forwarding.

[0003] However, as the scale of networks expands and service reliability requirements increase, the limitations of existing switch architectures in terms of redundancy design and fault recovery capabilities are gradually becoming apparent. Common switch architectures only have one processor card and lack redundancy. If the processor card overheats and crashes, the switch card cannot receive new configuration instructions, causing the entire machine to lose control and service interruption. Summary of the invention

[0004] In view of the above problems, the present invention provides a load control card and a switch for improving the stability and controllability of the entire system.

[0005] According to a first aspect of the present invention, a carrier control card is provided, the carrier control card comprising: a processor, a first baseboard controller, a second baseboard controller and a logic controller, wherein the logic controller is connected to a switch board via a connector; wherein the first baseboard controller is used to monitor the working state of the processor, and when determining that the processor is in an abnormal working state, generates a first interrupt signal, and sends the first interrupt signal to the second baseboard controller and the logic controller respectively; the second baseboard controller is used to generate a first communication signal in response to the first interrupt signal; and the logic controller is used to provide the first communication signal to the switch board in response to the first interrupt signal, so as to switch the control unit of the carrier control card to the second baseboard controller.

[0006] According to an embodiment of the present invention, the above-mentioned first communication signal includes a first asynchronous receiving and transmitting signal; the above-mentioned logic controller is also used to respond to the above-mentioned first interrupt signal to control the above-mentioned second substrate controller to establish a signal link with the above-mentioned switch board card to provide the above-mentioned first asynchronous receiving and transmitting signal to the above-mentioned switch board card.

[0007] According to an embodiment of the present invention, the first substrate controller is also used to generate a second interrupt signal and send the second interrupt signal to the logic controller when it is determined that the processor has returned to a normal working state; the logic controller is also used to respond to the second interrupt signal and provide a second communication signal from the processor to the switch board so as to switch the control unit of the carrier control card to the processor.

[0008] According to an embodiment of the present invention, the second communication signal includes a second asynchronous transmit / receive signal; the logic controller is also used to control the processor to establish a signal link with the switch board in response to the second interrupt signal to provide the second asynchronous transmit / receive signal to the switch board.

[0009] According to an embodiment of the present invention, the above-mentioned carrier control card also includes: a first network unit and a second network unit; wherein the above-mentioned processor is connected to the first network interface of the input-output interface board through the above-mentioned first network unit, and is connected to the second network interface of the above-mentioned input-output interface board through the above-mentioned second network unit; the above-mentioned second baseboard controller is connected to the second network interface of the above-mentioned input-output interface board through the above-mentioned second network unit.

[0010] According to an embodiment of the present invention, the second substrate controller is configured with a first network address; wherein the second substrate controller is further configured to perform network communication via the second network unit and the second network interface based on the first network address.

[0011] According to an embodiment of the present invention, the above-mentioned processor is configured with a second network address; wherein the above-mentioned processor is also used to perform network communication via the above-mentioned first network unit and the above-mentioned first network interface based on the above-mentioned second network address, or, based on the above-mentioned second network address, perform network communication via the above-mentioned second network unit and the above-mentioned second network interface.

[0012] According to an embodiment of the present invention, the above-mentioned carrier control card also includes: multiple multiplexers, the first input end of the above-mentioned multiplexer is connected to the above-mentioned processor, the second input end of the above-mentioned multiplexer is connected to the above-mentioned second substrate controller, the output end of the above-mentioned multiplexer is connected to the above-mentioned switch board through the above-mentioned connector, and the selection end of the above-mentioned multiplexer is connected to the above-mentioned logic controller.

[0013] According to an embodiment of the present invention, the above-mentioned first communication signal also includes multiple first serial signals; wherein the above-mentioned second substrate controller is also used to send the above-mentioned multiple first serial signals to the above-mentioned multiple multiplexers respectively; the above-mentioned logic controller is also used to respond to the above-mentioned first interrupt signal, control the above-mentioned multiple multiplexers to select the above-mentioned multiple first serial signals to the above-mentioned switch board.

[0014] According to an embodiment of the present invention, the second communication signal also includes multiple second serial signals; wherein the above-mentioned processor is also used to send the above-mentioned multiple second serial signals to the above-mentioned multiple multiplexers respectively; the above-mentioned logic controller is also used to respond to the second interrupt signal, control the above-mentioned multiple multiplexers to select the above-mentioned multiple second serial signals to the above-mentioned switch board.

[0015] According to an embodiment of the present invention, the first substrate controller is further used to send the second interrupt signal to the second substrate controller; and the second substrate controller is used to enter a standby state in response to the second interrupt signal.

[0016] According to an embodiment of the present invention, the bearer control card further comprises: a power control unit, configured to supply power to the bearer control card and supply power to the switch card and the input / output interface card via the bearer control card.

[0017] According to an embodiment of the present invention, the power of the second substrate controller is smaller than the power of the processor.

[0018] A second aspect of the present invention provides a switch, comprising: a switch board, an input / output interface board, and the bearer control card as described above; wherein the bearer control card is used to configure and / or control multiple graphics processors through the switch board.

[0019] According to an embodiment of the present invention, the above-mentioned input and output interface board includes an asynchronous transceiver interface; the logic controller of the above-mentioned bearer control card is used to provide the first asynchronous transceiver signal or the second asynchronous transceiver signal to the above-mentioned switch board in response to a test signal received via the above-mentioned asynchronous transceiver interface.

[0020] According to an embodiment of the present invention, the logic controller of the above-mentioned bearer control card is used to respond to a first interrupt signal to provide the above-mentioned first asynchronous receive / transmit signal to the above-mentioned switch board card when the above-mentioned asynchronous receive / transmit interface is not connected to the above-mentioned test signal, and is used to respond to a second interrupt signal to provide the above-mentioned second asynchronous receive / transmit signal to the above-mentioned switch board card.

[0021] According to an embodiment of the present invention, during the startup phase of the switch, the processor of the carrier control card is used to perform configuration processing on the multiple graphics processors.

[0022] According to an embodiment of the present invention, the input / output interface board includes a first network interface and a second network interface, the first network interface and the second network interface are used to connect to Ethernet, and the bearer control card includes a first network unit and a second network unit; wherein the processor of the bearer control card is connected to the first network interface of the input / output interface board through the first network unit, and is connected to the second network interface of the input / output interface board through the second network unit; the second baseboard controller of the bearer control card is connected to the second network interface of the input / output interface board through the second network unit; wherein, in the startup phase of the switch, the switch is used to assign a first network address to the second baseboard controller of the bearer control card, and assign a second network address to the processor of the bearer control card; wherein the second baseboard controller of the bearer control card is used to perform network communication with the Ethernet via the second network unit and the second network interface based on the first network address; the processor of the bearer control card is used to perform network communication with the Ethernet via the first network unit and the first network interface based on the second network address, or, based on the second network address, perform network communication with the Ethernet via the second network unit and the second network interface.

[0023] According to an embodiment of the present invention, during the operation phase of the switch, the processor of the bearer control card is used to control the operation status of the multiple graphics processors.

[0024] According to an embodiment of the present invention, during the operation stage of the above-mentioned switch, when the processor of the above-mentioned bearer control card is in an abnormal working state, the logic controller of the above-mentioned bearer control card is used to switch the control unit of the above-mentioned bearer control card to the second baseboard controller of the above-mentioned bearer control card, and the second baseboard controller of the above-mentioned bearer control card is used to control the operating status of the above-mentioned multiple graphics processors.

[0025] The embodiment of the present invention configures a second baseboard controller in the load control card as a backup of the processor. When the processor works abnormally, the logic controller can switch the control unit of the load control card to the second baseboard controller through logic control to achieve a redundant design of the processor control unit, which can effectively improve the stability and controllability of the whole system. In addition, since the second baseboard controller is in a standby state and runs at low power consumption when the processor is in a normal state as a redundant control unit, it can immediately take over the entire switch system when the processor works abnormally to increase the switching speed, which can significantly reduce the power consumption and hardware cost of the whole machine. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The above contents and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings.

[0027] Figure 1 A schematic diagram of the core architecture of an existing switch is shown.

[0028] Figure 2 A schematic diagram of a bearer control card according to an embodiment of the present invention is shown.

[0029] Figure 3 A schematic diagram showing a signal control function of an asynchronous receiver and transmitter according to a specific embodiment of the present invention is shown.

[0030] Figure 4 A schematic diagram showing a network communication function according to a specific embodiment of the present invention is shown.

[0031] Figure 5 A schematic diagram of the structure of a switch according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0032] Below, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present invention. In the following detailed description, for ease of explanation, many specific details are set forth to provide a comprehensive understanding of embodiments of the present invention. However, it is apparent that one or more embodiments may also be implemented without these specific details. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of concepts of the present invention.

[0033] The terms used herein are only for describing specific embodiments and are not intended to limit the present invention. The terms "include", "comprises", etc. used herein indicate the existence of the features, steps, operations and / or components, but do not exclude the existence or addition of one or more other features, steps, operations or components.

[0034] All terms (including technical and scientific terms) used herein have the meanings commonly understood by those skilled in the art unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0035] When using expressions such as "at least one of A, B, and C, etc.", they should generally be interpreted according to the meaning of the expression commonly understood by those skilled in the art (for example, "a system having at least one of A, B, and C" should include but is not limited to a system having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, C, etc.).

[0036] As the core equipment of modern networks, switches undertake key functions of data forwarding, flow control and network management. Common switches include Ethernet switches, telephone voice switches, fiber optic switches, etc.

[0037] Figure 1 A schematic diagram of the core architecture of an existing switch is shown.

[0038] like Figure 1 As shown, the core architecture of an existing switch is usually composed of multiple functional modules, including a switch board, a load control board, a heat dissipation control board, a power distribution board and a power configuration unit, wherein the load control board includes a processor board and a baseboard management controller board.

[0039] Among them, the switch board is the core switching unit of the switch, usually equipped with a high-performance switch chip to realize the data exchange function of the network node, and is responsible for providing common external interfaces, such as: Quad Small Form-factor Pluggable (QSFP) optical module interface, Common Data Center Interface Protocol (CDFP) interface, RJ45 service network port, RJ45 management network port, RJ45 debug serial port, Universal Serial Bus (USB) interface, Light Emitting Diode (LED) indicator light, etc. The processor board is the control unit of the switch, usually equipped with a central processing unit (CPU) and related power control circuits. The baseboard management controller board is the management unit of the switch, usually using a baseboard management controller (BMC) daughter card or RunBMC module. The fan control board (FCB) is used to realize the fan control function and provide heat dissipation requirements for the whole machine. The Power Distribution Board (PDB) is used to complete the connection and power transfer of the Power Supply Unit (PSU), and provide power supply requirements and power control signals for each board. The Carrier Control Board (CCB) is a key carrier board of the switch, which can be used to carry key devices and core components such as processor boards, baseboard management controllers, heat dissipation control boards, connectors of power distribution boards, storage devices, and network chips. It is mainly used to realize the interconnection function of the switch control unit, management unit, and data exchange unit.

[0040] Among them, the carrier control board may include key devices and core components such as storage devices, security chips, flash memory, logic controllers, frequency adjustment modules, network switching chips, network chips, power supply circuits, etc.

[0041] Among them, the baseboard management controller can realize the management and control functions of each core component through the multi-channel integrated circuit bus (Inter-Integrated Circuit, I2C) signal; realize the management and configuration of the network switching chip and the function of the baseboard management controller board management network port through the management data clock (Management Data Clock, MDC) signal, management data input / output (Management Data Input / Output, MDIO) signal and gigabit media independent interface (Reduced Gigabit Media Independent Interface, RGMII) signal; realize interconnection and communication with the processor board through the low pin count bus (Low Pin Count Bus, LPC), fast peripheral component interconnect Express (Peripheral Component Interconnect Express, PCIe) bus, USB and general-purpose input / output (General-purpose input / output, GPIO); and can also be interconnected with the logic controller through the universal asynchronous receiver / transmitter (UART) serial port, which is used for the management serial port of the front window of the whole machine.

[0042] Among them, the processor board can be interconnected with the storage device through PCIe and serial bus (Serial Advanced Technology Attachment, SATA) to realize the control function of the storage unit; the processor board can realize the 100M and 1000M business network port functions through the network switching chip and network chip, or through the processor's own 10G local area network interface (LAN) to realize the 10G business network port; the processor board can be interconnected with the switching chip through the UART serial port, which is mainly used to monitor the status information of the switching chip.

[0043] In the traditional design of the carrier control board, the control and data exchange are coordinated by integrating components such as the processor board, baseboard management controller, and network chip, while the switch board focuses on high-speed data forwarding. However, as the network scale expands and the service reliability requirements increase, the limitations of the existing switch architecture in redundancy design and fault recovery capabilities are gradually emerging.

[0044] For example, a common switch architecture only has one processor board and lacks redundancy. If the processor board overheats and shuts down, the switch board cannot receive new configuration instructions, which causes the entire machine to lose control and service interruption. If a new processor board is added, multiple selectors will need to be added to manage the switching circuits for all control signals. However, this design will increase the size of the control board, greatly increasing the cost of the entire machine. If the new processor board is always in a state of waiting to be powered on, the power consumption of the entire machine will also increase. If the new processor board is in a shutdown state, the new processor board will be enabled only when the main processor board fails. However, since the processor board takes a long time to start up, it cannot switch to the new processor board immediately, which will cause the entire machine to lose control and fail to function.

[0045] In view of this, an embodiment of the present invention provides a load control card. By configuring a second baseboard controller in the load control card as a backup for the processor, when the processor works abnormally, the logic controller can switch the control unit of the load control card to the second baseboard controller through logic control to achieve a redundant design of the processor control unit, which can effectively improve the stability and controllability of the whole system. In addition, since the second baseboard controller is in a standby state and runs at low power consumption when the processor is in a normal state as a redundant control unit, it can immediately take over the entire switch system when the processor works abnormally to increase the switching speed, which can significantly reduce the power consumption and hardware cost of the whole machine.

[0046] An embodiment of the present invention provides a load-bearing control card, comprising: a processor, a first substrate controller, a second substrate controller and a logic controller, wherein the logic controller is connected to a switch board through a connector; wherein the first substrate controller is used to monitor the working state of the processor, and when determining that the processor is in an abnormal working state, generates a first interrupt signal, and sends the first interrupt signal to the second substrate controller and the logic controller respectively; the second substrate controller is used to generate a first communication signal in response to the first interrupt signal; and the logic controller is used to provide the first communication signal to the switch board in response to the first interrupt signal, so as to switch the control unit of the load-bearing control card to the second substrate controller.

[0047] The following Figure 2~Figure 4 The bearer control card of the embodiment of the present invention is described in detail.

[0048] Figure 2 A schematic diagram of a bearer control card according to an embodiment of the present invention is shown.

[0049] like Figure 2 As shown, the carrier control card includes a processor, a first baseboard controller, a second baseboard controller and a logic controller.

[0050] In an embodiment of the present invention, the processor may include a central processing unit (CPU), which may be used as a main control unit to execute a switch operating system and service logic, etc. The processor may be configured on a bearer control card, and the processor may control I2C signals, GPIO signals, interrupt (INT) signals, etc. of the switch card.

[0051] In an embodiment of the present invention, the first baseboard controller may represent a baseboard management controller (Baseboard Management Controller, BMC), and the first baseboard controller may monitor and manage the system working state of the processor in real time through hardware sensors and protocol interfaces, such as the temperature, voltage, fan speed, etc. of the processor. The first baseboard controller may be configured on a carrier control card.

[0052] For example, when it is determined that the processor is in an abnormal working state, such as when the processor temperature is too high or a power failure causes the processor to crash, the first baseboard controller generates a first interrupt signal and sends the first interrupt signal to the second baseboard controller and the logic controller respectively.

[0053] In an embodiment of the present invention, the second baseboard controller may represent a redundant baseboard management controller (microBaseboard Management Controller, mBMC), and the second baseboard controller is the same as the first baseboard controller in hardware configuration. When a processor fails, the second baseboard controller can immediately take over the entire switch system to avoid the problem of the entire system being out of control and all functions failing. Among them, the second baseboard controller can be configured on a carrier control card, and the second baseboard controller can control the I2C signal, GPIO signal, INT interrupt signal, etc. of the switch board.

[0054] For example, in normal mode, the second substrate controller can synchronize the status data of the first substrate controller through the I2C channel, but does not actively send control instructions, and is in standby mode, maintaining operation in a low-power standby state. In response to receiving a first interrupt signal sent by the first substrate controller, a first communication signal is generated and sent to the logic controller, so that the signal path is switched through the logic controller to realize the takeover control of the second substrate controller.

[0055] In an embodiment of the present invention, the logic controller may represent a programmable digital integrated circuit, such as a complex programmable logic device (CPLD). The logic controller may be configured on a carrier control card, connected to a switch card via a connector, and may be used for hardware signal routing and switching control. For example, the logic controller may control the power-on and power-off timing of the switch card, UART serial port communication, signal database (SDB) signal communication, GPIO signal communication, etc.

[0056] The connector may include, for example, a multi-channel input / output (Mini Cool Edge IO, MCIO) connector, and the switch card may be, for example, an upper and lower layer switch card for implementing data exchange or signal routing functions.

[0057] For example, in response to receiving a first interrupt signal sent by the first substrate controller, the logic controller provides a first communication signal to the switch board so as to switch the signal connection path between the processor or the second substrate controller and the switch board, such as switching the connection between the processor and the switch board to the connection between the second substrate controller and the switch board, thereby switching the control unit carrying the control card from the processor to the second substrate controller.

[0058] Based on this, the embodiment of the present invention configures a second baseboard controller in the carrier control card as a backup of the processor. When the processor works abnormally, the logic controller can switch the control unit of the carrier control card to the second baseboard controller through logic control to achieve a redundant design of the processor control unit, which can effectively improve the stability and controllability of the whole system. In addition, since the second baseboard controller is in a standby state and runs at low power consumption when the processor is in a normal state as a redundant control unit, it can immediately take over the entire switch system when the processor works abnormally to increase the switching speed, which can significantly reduce the power consumption and hardware cost of the whole machine.

[0059] According to an embodiment of the present invention, the first communication signal includes a first asynchronous transceiver signal; the logic controller is also used to control the second baseboard controller to establish a signal link with the switch board in response to the first interrupt signal to provide the first asynchronous transceiver signal to the switch board.

[0060] According to an embodiment of the present invention, the first asynchronous receiving and transmitting signal may be used to represent a universal asynchronous receiving and transmitting (UART) signal. As an asynchronous serial communication protocol, the first asynchronous receiving and transmitting signal is suitable for low-rate and reliable control instruction transmission to ensure the certainty of the takeover process.

[0061] Figure 3A schematic diagram showing a signal control function of an asynchronous receiver and transmitter according to a specific embodiment of the present invention is shown.

[0062] like Figure 3 As shown, in this specific embodiment, the devices that need to perform UART signal control in the switch system include a processor, a first baseboard controller, a second baseboard controller, switch boards SW-A and SW-B, and an input and output interface board. Each device connects its own UART signal line to the logic controller, and the logic controller switches and interconnects as needed.

[0063] According to a specific embodiment of the present invention, when the processor is in a normal working state, the UART signal of the processor is connected to the switch board, and the second baseboard controller continuously synchronizes the status data of the first baseboard controller through the I2C channel in the standby mode. When the processor is in an abnormal working state, the first baseboard controller sends a first interrupt signal to the second baseboard controller and the logic controller respectively. After receiving the first interrupt signal, the logic controller disconnects the UART link between the processor and the switch board, and physically connects the UART signal pin of the second baseboard controller with the corresponding interface of the MCIO connector to control the second baseboard controller to switch from the standby mode to the active control mode, so that the second baseboard controller starts the UART communication module and generates a first asynchronous transceiver signal, and establishes a signal link with the switch board to provide the first asynchronous transceiver signal to the switch board.

[0064] The UART signal may include initialization instructions and configuration parameters required for taking over control, such as sending port enable and routing table update commands to the switch board.

[0065] According to an embodiment of the present invention, the first substrate controller is also used to generate a second interrupt signal and send the second interrupt signal to the logic controller when it is determined that the processor has returned to a normal working state; the logic controller is also used to provide a second communication signal from the processor to the switch board in response to the second interrupt signal so as to switch the control unit carrying the control card to the processor.

[0066] According to a specific embodiment of the present invention, when the processor is in an abnormal working state, the first baseboard controller still continuously monitors the working state of the processor through the hardware sensor and the protocol interface. When the first baseboard controller detects that the processor fault is resolved and restored to a normal working state, a second interrupt signal is generated and sent to the logic controller. At this time, after the processor regains control, it generates a second communication signal, and transmits the second communication signal to the switch board through the control of the logic controller to switch the control unit carrying the control card to the processor.

[0067] According to an embodiment of the present invention, the first substrate controller is further configured to send a second interrupt signal to the second substrate controller; and the second substrate controller is configured to enter a standby state in response to the second interrupt signal.

[0068] According to a specific embodiment of the present invention, when the first substrate controller detects that the processor fault is resolved and restored to a normal working state, it will also send a second interrupt signal to the second substrate controller to notify the second substrate controller to exit the active control mode, release resources and enter standby mode. In response to receiving the second interrupt signal, the second substrate controller exits the active control mode and switches to the standby mode to maintain the operation of the core circuit with low power consumption.

[0069] According to an embodiment of the present invention, the second communication signal includes a second asynchronous transmit / receive signal; the logic controller is further configured to control the processor to establish a signal link with the switch card in response to the second interrupt signal to provide the second asynchronous transmit / receive signal to the switch card.

[0070] According to an embodiment of the present invention, the second asynchronous receive / transmit signal may also be used to represent a universal asynchronous receiver / transmitter (UART) signal.

[0071] According to a specific embodiment of the present invention, in response to receiving the second interrupt signal, the logic controller disconnects the UART signal link between the second baseboard controller and the switch board, and physically connects the UART signal pin of the processor with the corresponding interface of the MCIO connector to control the second baseboard controller to exit the active control mode and return to the standby state, so that the processor starts the UART communication module and generates a second asynchronous transmit and receive signal, and establishes a signal link with the switch board to provide the second asynchronous transmit and receive signal to the switch board.

[0072] Based on this, the embodiments of the present invention realize seamless switching of multi-level UART control links through redundant design and switching management of the UART communication function of the logic controller. At the same time, it eliminates the external multiplexer chip that performs UART switching processing on the processor and the second substrate controller, thereby reducing the cost of the entire machine and significantly improving the system reliability and maintainability.

[0073] According to an embodiment of the present invention, the carrier control card also includes: multiple multiplexers, the first input end of the multiplexer is connected to the processor, the second input end of the multiplexer is connected to the second substrate controller, the output end of the multiplexer is connected to the switch board through the connector, and the enable end of the multiplexer is connected to the logic controller.

[0074] According to an embodiment of the present invention, the bearer control card may further include a plurality of multiplexers, wherein each multiplexer supports two inputs and one output. Figure 2As shown, the first input end of the multiplexer is connected to the processor, the second input end of the multiplexer is connected to the second substrate controller, the output end of the multiplexer is connected to the switch board through the connector, and the selection end of the multiplexer is connected to the logic controller.

[0075] According to an embodiment of the present invention, the first communication signal also includes multiple first serial signals; wherein the second substrate controller is also used to send the multiple first serial signals to multiple multiplexers respectively; and the logic controller is also used to control the multiple multiplexers to select the multiple first serial signals to the switch board in response to the first interrupt signal.

[0076] According to an embodiment of the present invention, the multiple first serial signals may be used to represent control signals sent by the second substrate controller, wherein the multiple first serial signals may be I2C control signals.

[0077] According to an embodiment of the present invention, the logic controller may also be configured to generate a first gating control signal of the multiplexer in response to the first interrupt signal, so as to coordinate gating paths of the multiple first serial signals.

[0078] Specifically, when the processor is in an abnormal working state, the first baseboard controller sends a first interrupt signal to the second baseboard controller and the logic controller respectively, the second baseboard controller exits the standby mode, generates multiple first serial signals, and sends the multiple first serial signals to multiple multiplexers. After receiving the first interrupt signal, the logic controller sends a first selection control signal to the selection end of the multiple multiplexers, so that the multiple first serial signals are selected to the switch board through the multiplexers, so as to switch the control unit of the carrier control card to the second baseboard controller.

[0079] According to an embodiment of the present invention, the second communication signal also includes multiple second serial signals; wherein the processor is also used to send the multiple second serial signals to multiple multiplexers respectively; and the logic controller is also used to control the multiple multiplexers to select the multiple second serial signals to the switch board in response to the second interrupt signal.

[0080] According to an embodiment of the present invention, the multiple second serial signals may be used to represent control signals sent by the processor, wherein the multiple second serial signals may include GPIO state control signals.

[0081] According to an embodiment of the present invention, the logic controller may also be configured to generate a second gating control signal of the multiplexer in response to the second interrupt signal, so as to coordinate gating paths of the multiple second serial signals.

[0082] Specifically, when the first baseboard controller detects that the processor fault is resolved and restored to a normal working state, a second interrupt signal is generated and sent to the logic controller and the second baseboard controller. In response to receiving the second interrupt signal, the second baseboard controller exits the active control mode and switches to the standby mode. At this time, the processor generates multiple second serial signals and sends multiple second serial signals to multiple multiplexers. After receiving the second interrupt signal, the logic controller generates a second selection control signal for the multiplexer and sends the second selection control signal to the selection end of the multiple multiplexers, so that the multiple second serial signals are selected to the switch board through the multiplexer to switch the control unit of the carrier control card to the processor.

[0083] Based on this, the embodiment of the present invention realizes redundant switching of multiple serial signals through the collaborative design of multiple multiplexers and logic controllers, ensuring that when the processor fails or recovers, the control authority can be quickly and reliably switched between the processor and the second baseboard controller. In addition, when the bearer control card needs to add a new signal type, only the corresponding multiplexer needs to be added, and there is no need to reconstruct the overall bearer control card architecture. Moreover, the failure of a single multiplexer only affects its corresponding signal type, and other signals can still be switched normally, thereby improving the flexibility and reliability of the bearer control card.

[0084] According to an embodiment of the present invention, the power of the second substrate controller is smaller than the power of the processor.

[0085] In a specific embodiment of the present invention, the second substrate controller is configured so that its power is less than that of the processor. For example, an embedded microcontroller or a microcontroller with streamlined peripherals can be used, and only necessary interfaces are retained. In standby mode, non-core functions (such as analog-to-digital converter ADC sampling, high-speed clock) are turned off, and only heartbeat detection and status synchronization are maintained. When the processor fails, the active control mode is entered to take over the master control, which temporarily increases power consumption.

[0086] According to an embodiment of the present invention, the carrier control card also includes: a first network unit and a second network unit; wherein the processor is connected to the first network interface of the input-output interface board through the first network unit, and is connected to the second network interface of the input-output interface board through the second network unit; the second baseboard controller is connected to the second network interface of the input-output interface board through the second network unit.

[0087] According to an embodiment of the present invention, the first network unit can be used to represent an Ethernet controller, providing an independent Media Access Control Layer (MAC) and a Physical Interface (PHY), such as Intel I210. The second network unit can be used to represent an Ethernet switch chip, such as Marvell switch chip 88E6321.

[0088] Figure 4 A schematic diagram showing a network communication function according to a specific embodiment of the present invention is shown.

[0089] like Figure 4 As shown, in this specific embodiment, the devices in the switch system that need to perform network communication include a processor, a first baseboard controller, and a second baseboard controller.

[0090] Among them, the network signal of the processor is connected to the first network interface of the input-output interface card through the first network unit, which is convenient for independent business network processing of the processor. In addition, the network signal of the processor is also connected to the second network interface of the input-output interface card through the second network unit. For example, the processor is directly connected to the first network interface on the input-output interface card through the network chip Intel I210. In addition, the processor is also connected to the second network interface through the PHY interface on the input-output interface card through the Marvell switching chip 88E6321.

[0091] In this specific embodiment, the network signals of the first baseboard controller and the second baseboard controller are connected to the second network interface of the input-output interface card through the second network unit. For example, the network signals of the first baseboard controller and the second baseboard controller are directly connected to the Marvell switch chip 88E6321, and then connected to the second network interface through the PHY interface on the input-output interface card.

[0092] According to an embodiment of the present invention, the second baseboard controller is configured with a first network address; wherein the second baseboard controller is further configured to perform network communication via a second network unit and a second network interface based on the first network address.

[0093] According to an embodiment of the present invention, the second baseboard controller is configured with a first network address, such as a static IP address, for identifying itself in the network, and uses the first network address to perform network communication via the second network unit and the second network interface when the second baseboard controller takes over.

[0094] According to an embodiment of the present invention, the processor is configured with a second network address; wherein the processor is also used to perform network communication via the first network unit and the first network interface based on the second network address, or, based on the second network address, perform network communication via the second network unit and the second network interface.

[0095] According to an embodiment of the present invention, the processor is configured with a second network address, such as an IP address different from the first network address. When the processor is in normal working state, network communication can be performed through the first network unit and the first network interface, or communication can be performed through the second network unit and the second network interface when necessary.

[0096] According to a specific embodiment of the present invention, when the processor is in a normal working state, the processor communicates through the network chip Intel I210 and the first network interface RJ45. At this time, the Marvell switch chip 88E6321 can be used as a backup path or for other internal communications.

[0097] In this specific embodiment, when the processor is in an abnormal working state, the second baseboard controller takes over the communication through the Marvell switch chip 88E6321 via the PHY interface and the second network interface RJ45, and uses the first network address to maintain the network connection to ensure that the system can still perform network communication.

[0098] In this specific embodiment, after the processor resumes normal working state, it needs to switch back to the primary path. At this time, the processor can communicate through the network chip Intel I210 or select the Marvell switching chip 88E6321 based on the network configuration and redundancy strategy.

[0099] Based on this, in the embodiment of the present invention, the processor can be connected to the first network interface through the first network unit, and can also be connected to the second network interface through the second network unit. This configuration enables the processor to communicate through two different network paths for redundancy or load balancing. The second baseboard controller is only connected to the second network interface through the second network unit. When the processor is in an abnormal working state, the second baseboard controller can take over and communicate through the second network interface to avoid interruption of the communication link when the processor is abnormal.

[0100] According to an embodiment of the present invention, the first network address and the second network address may also be used to match network paths and detect faults of the control unit when the user communicates and interacts with the system.

[0101] Specifically, since the second baseboard controller fixedly uses the first network address to communicate through the second network unit and the second network interface, the processor dynamically uses the second network address to communicate via the first network unit and the first network interface, or, based on the second network address, communicates via the second network unit and the second network interface.

[0102] Therefore, in a specific embodiment, the user can detect the health status of the control plane based on the first network address. For example, when the processor status is normal and the second baseboard controller status is standby, the user can successfully receive the response of the second baseboard controller, and then it can be determined that the basic functions of the control plane are normal. When the processor status is abnormal (for example, downtime) and the second baseboard controller status is taking over, the user can successfully receive the response of the second baseboard controller, and then it can be determined that the processor is faulty but the system is still under control. When the processor status is abnormal and the second baseboard controller status is faulty, the user receives a response timeout or no response information, and then it can be determined that the control plane of the entire machine has failed.

[0103] In another specific embodiment, the user can detect the health status of the service plane based on the second network address. For example, when the first network unit and the first network interface path are normal, the user receives a low-latency response result, which indicates that there is no abnormality in the service plane. When the first network unit and the first network interface path fail, and the second network unit and the second network interface path are normal, the user receives a slightly higher-latency response result, which indicates that the first network unit is abnormal and the backup network path is effective. When the first network unit and the first network interface path, the second network unit and the second network interface path all fail, the user receives a response timeout or no response information, which indicates that the two network paths corresponding to the processor are both invalid.

[0104] Based on this, the embodiment of the present invention uses the first network address and the second network address to match the network line and detect faults of the control unit. The operation and maintenance personnel do not need to log in to the device, and can perform fault detection on the network path and the control unit only through a dual IP ping test, so as to quickly locate the fault level during the test process to ensure the reliability of the system and the continuity of the business.

[0105] According to an embodiment of the present invention, the bearer control card further comprises: a power control unit, which is used to supply power to the bearer control card and to supply power to the switch card and the input / output interface card via the bearer control card.

[0106] According to a specific embodiment of the present invention, one or more power supply units (PSUs) may be configured on a carrier control card so that one or more power supply control units supply power to switch cards, input / output interface cards, etc. through a power plane on the carrier control card.

[0107] Based on this, the embodiment of the present invention eliminates the need for a separate external PDB board through the integrated design of the power control unit, thereby reducing material cost and assembly complexity; in addition, the integrated design of the power control unit shortens the power path, reduces voltage drop and heat loss, and a faulty power control unit can be directly hot-swapped and replaced on the carrier control card to improve maintenance efficiency and system reliability.

[0108] Figure 5 A schematic diagram of the structure of a switch according to an embodiment of the present invention is shown.

[0109] like Figure 5 As shown, the switch includes a switch card, an input / output interface card, and a load control card, wherein the load control card integrates a processor, a first baseboard controller, a second baseboard controller, a logic controller, etc., to serve as the control center of the switch.

[0110] In a specific embodiment of the present invention, the bearer control card of the switch further includes a plurality of power control units, such as Figure 5 As shown, the power control unit includes a first power control unit and a second power control unit. The first power control unit and the second power control unit are plug-in connected to the carrier control card through an onboard connector (such as a PCIe power interface), and no additional power configuration board is required.

[0111] In a specific embodiment of the present invention, the switch card can be configured as an upper and lower double layer, one layer is designed with a Quad Small Form-factor Pluggable (QSFP) optical module interface, and the other layer is designed with a Common Data Center Interface Protocol (CDFP) interface, so as to connect different network nodes by adopting a dual interface form. The switch card can be used to realize the data exchange function of multiple network nodes and connect multiple graphics processors.

[0112] In a specific embodiment of the present invention, the input and output interface board is used to carry external management interfaces, such as RJ45 network port, RJ45 debugging serial port, USB port, LED indicator light, switch button, etc., to facilitate decoupling operation.

[0113] In a specific embodiment of the present invention, the switch further includes a fan control board (FCB) for implementing a fan control function to provide heat dissipation requirements for the entire machine.

[0114] In a specific embodiment of the present invention, the switch further includes a storage device, such as an M.2 SSD storage device, which is a solid-state hard disk using an M.2 interface to provide a smaller size, faster transmission speed, and higher performance.

[0115] In a specific embodiment of the present invention, the switch further includes a security chip that complies with the Trusted Platform Module (TPM) standard, for storing encryption keys used for encryption and decryption.

[0116] According to an embodiment of the present invention, Figure 5 The bearer control card shown can configure (such as initialization, firmware loading) and control operations (such as task allocation, power consumption management) of multiple graphics processors through the switch card. The bearer control card can support redundant control and dual network paths for switching between the processor and the second baseboard controller.

[0117] Based on this, the embodiment of the present invention realizes flexible management of the switch card through the logic controller and redundant control unit and the second baseboard controller on the carrier control card, and then centrally configures, monitors and controls the multiple connected graphics processors. When the processor fails, the second baseboard controller can quickly take over the control right, ensuring that the configuration and management of multiple graphics processors are not interrupted, and avoiding the downtime of the entire computing cluster due to the failure of the control unit.

[0118] According to an embodiment of the present invention, the input / output interface card includes an asynchronous transceiver interface; the logic controller of the carrier control card is used to provide the first asynchronous transceiver signal or the second asynchronous transceiver signal to the switch card in response to a test signal received via the asynchronous transceiver interface.

[0119] According to an embodiment of the present invention, the logic controller of the carrier control card is used to provide the first asynchronous receive / transmit signal to the switch card in response to a first interrupt signal when the asynchronous receive / transmit interface is not connected to the test signal, and is used to provide the second asynchronous receive / transmit signal to the switch card in response to a second interrupt signal.

[0120] According to an embodiment of the present invention, the input / output interface board includes an asynchronous transceiver interface such as a UART interface, which is used to receive a test signal or a debugging instruction sent by an external test device.

[0121] According to an embodiment of the present invention, the first asynchronous transceiver signal represents a UART signal from the second baseboard controller, and is used for control instructions during fault takeover.

[0122] According to an embodiment of the present invention, the second asynchronous receiving and transmitting signal represents a UART signal from a processor, and is used for service instructions during normal operation.

[0123] Specifically, when the test signal is connected, the logic controller selects different asynchronous transmit and receive signals to be routed directly to the switch card according to the test signal or interrupt signal received via the asynchronous transmit and receive interface, without being processed by the processor or the second baseboard controller, thereby quickly verifying the hardware function.

[0124] In this specific embodiment, when there is no test signal access, the logic controller needs to select different signal sources according to the interrupt signal. For example, in response to the first interrupt signal indicating that the processor fails, the logic controller controls the strobe end of the multiplexer to provide the first asynchronous transceiver signal to the switch card to switch the main control to the second baseboard controller; in response to the second interrupt signal indicating that the processor returns to normal, the logic controller controls the strobe end of the multiplexer to provide the second asynchronous transceiver signal to the switch card to switch the main control back to the processor.

[0125] In a specific embodiment, the serial port of the input / output interface board can be set to the first priority to directly receive the external test signal, and can be switched to any other UART signal source through the logic controller.

[0126] In another specific embodiment, the serial port of the first substrate controller can be set to the second priority so that it can also be switched to any other UART signal source through the logic controller to provide a backup debugging channel when the processor is abnormal.

[0127] Based on this, the embodiments of the present invention realize flexible signal routing of the switch in test mode and normal operation mode through the collaborative design of the asynchronous transceiver interface and the logic controller. It not only supports the trigger switching of external test signals, but also can automatically switch UART control rights through interrupt signals, thereby enhancing the system's autonomous fault tolerance and operation stability.

[0128] According to an embodiment of the present invention, during the startup phase of the switch, the processor of the carrier control card is used to perform configuration processing on the multiple graphics processors.

[0129] According to an embodiment of the present invention, an input / output interface board includes a first network interface and a second network interface, the first network interface and the second network interface are used to connect to Ethernet, and a carrier control card includes a first network unit and a second network unit; wherein the processor of the carrier control card is connected to the first network interface of the input / output interface board through the first network unit, and is connected to the second network interface of the input / output interface board through the second network unit; the second baseboard controller of the carrier control card is connected to the second network interface of the input / output interface board through the second network unit; wherein, during the startup phase of the switch, the switch is used to assign a first network address to the second baseboard controller of the carrier control card, and to assign a second network address to the processor of the carrier control card; wherein, the second baseboard controller of the carrier control card is used to communicate with Ethernet via the second network unit and the second network interface based on the first network address; the processor of the carrier control card is used to communicate with Ethernet via the first network unit and the first network interface based on the second network address, or, based on the second network address, communicate with Ethernet via the second network unit and the second network interface.

[0130] According to an embodiment of the present invention, when the switch is started, the processor needs to perform task configuration on multiple graphics processors connected to the switch.

[0131] In a specific embodiment of the present invention, the input-output interface board includes a first network interface and a second network interface, and the first network interface and the second network interface are both used to connect to Ethernet. Wherein, the bearer control card includes a first network unit and a second network unit, wherein the first network unit is such as a network chip Intel I210, and the second network unit is such as a Marvell switching chip 88E6321. The processor of the bearer control card is directly connected to the first network interface on the input-output interface board through the network chip Intel I210. In addition, the processor is also connected to the second network interface through the Marvell switching chip 88E6321 via the PHY interface on the input-output interface board.

[0132] In this specific embodiment, the network signal of the second baseboard controller is connected to the second network interface of the input-output interface card through the second network unit. For example, the network signal of the second baseboard controller is directly connected to the Marvell switch chip 88E6321, and then connected to the second network interface RJ45 through the PHY interface on the input-output interface card.

[0133] In this specific embodiment, during the startup phase, the switch allocates a first network address to the second baseboard controller through the second network unit, and allocates a second network address to the processor through the first network unit, so that they can communicate with the Ethernet through different network paths.

[0134] For example, when the processor is in an abnormal working state, the second baseboard controller takes over the main control, and the second baseboard controller can use the first network address to communicate with the Ethernet via the second network unit and the second network interface. When the processor is in a normal working state, the second baseboard controller exits the main control and switches to standby mode, and the processor can communicate with the Ethernet via the first network unit and the first network interface, or communicate with the Ethernet via the second network unit and the second network interface.

[0135] Based on this, the embodiment of the present invention improves network redundancy and availability by configuring dual network interfaces and dual network units. Among them, two independent Ethernet interfaces can provide physical layer redundancy to avoid network interruption caused by single point failure. The dual network units correspond to different network controllers respectively to ensure the separation of the control plane and the data plane, thereby improving security. In addition, independent network addresses are assigned to the processor and the second baseboard controller respectively during the startup phase. If the processor fails, the second baseboard controller can still maintain management communication through the second network interface.

[0136] According to an embodiment of the present invention, during the operation phase of the switch, the processor of the carrier control card is used to control the operation status of multiple graphics processors.

[0137] According to an embodiment of the present invention, during the operation stage of the switch, when the processor of the carrier control card is in an abnormal working state, the logic controller of the carrier control card is used to switch the control unit of the carrier control card to the second baseboard controller of the carrier control card, and the second baseboard controller of the carrier control card is used to control the operating status of multiple graphics processors.

[0138] According to an embodiment of the present invention, during the normal operation stage of the switch, the processor needs to configure the operating status of multiple graphics processors. For example, the processor monitors the operating temperatures of the multiple graphics processors, and monitors whether the multiple graphics processors are operating normally by establishing a heartbeat connection.

[0139] In a specific embodiment of the present invention, when the processor is in an abnormal working state (such as a situation where the processor temperature is too high and causes a crash), the logic controller can switch the control unit that carries the control card to the second baseboard controller, and the second baseboard controller will take over the main control to monitor multiple graphics processors.

[0140] Based on this, in an embodiment of the present invention, when the switch is in the normal operation stage, the processor monitors and adjusts the working status of multiple graphics processors in real time through the switch board. When the processor is abnormal (such as crash, deadlock), the logic controller immediately switches the control unit from the processor to the second baseboard controller. After the second baseboard controller takes over, it continues to execute basic management functions (such as temperature monitoring, task pause / resume) to avoid interruption of computing tasks, so as to improve the business continuity and reliability of the switch.

[0141] In a specific embodiment of the present invention, when the processor actively enters a sleep state (for example, the business load is low), the processor sends an active sleep signal to the first baseboard controller. In response to the active sleep signal of the processor, the first baseboard controller sends a first interrupt signal to the logic controller. The logic controller can switch the control unit carrying the control card to the second baseboard controller, and the second baseboard controller will take over the main control to monitor multiple graphics processors.

[0142] In a specific embodiment of the present invention, when the processor enters an awakened state (for example, the business load increases), the processor sends an active wake-up signal to the first baseboard controller. In response to the active wake-up signal of the processor, the first baseboard controller sends a second interrupt signal to the logic controller. The logic controller can switch the control unit carrying the control card to the processor. At this time, the processor will take over the main control to monitor multiple graphics processors.

[0143] Based on this, the embodiments of the present invention control the logic controller to switch the control unit evenly based on the processor's active sleep and wake-up signals and passive interrupt signals to form a dual-signal trigger mechanism, which improves the system's master control switching reliability and flexibility and can also be used for edge computing or processor low-load periods to reduce the idle energy consumption of the switch.

[0144] It will be appreciated by those skilled in the art that the features described in the various embodiments of the present invention may be combined and / or combined in various ways, even if such combinations or combinations are not explicitly described in the present invention. In particular, without departing from the spirit and teachings of the present invention, the features described in the various embodiments of the present invention may be combined and / or combined in various ways. All of these combinations and / or combinations fall within the scope of the present invention.

[0145] The embodiments of the present invention are described above. However, these embodiments are only for the purpose of illustration, and are not intended to limit the scope of the present invention. Although each embodiment is described above, it does not mean that the measures in each embodiment cannot be used in combination advantageously. Without departing from the scope of the present invention, those skilled in the art may make various substitutions and modifications, which should all fall within the scope of the present invention.

Claims

1. A bearer control card, characterized in that: The bearer control card comprises: A processor, a first baseboard controller, a second baseboard controller and a logic controller, wherein the logic controller is connected to the switch card via a connector; Wherein, the first baseboard controller is used to monitor the working state of the processor, and when it is determined that the processor is in an abnormal working state, generate a first interrupt signal, and send the first interrupt signal to the second baseboard controller and the logic controller respectively; The second substrate controller is used to generate a first communication signal in response to the first interrupt signal; The logic controller is used for providing the first communication signal to the switch card in response to the first interrupt signal, so as to switch the control unit of the carrier control card to the second baseboard controller.

2. The load control card according to claim 1, characterized in that: The first communication signal comprises a first asynchronous transmit / receive signal; The logic controller is further configured to control the second baseboard controller to establish a signal link with the switch card in response to the first interrupt signal, so as to provide the first asynchronous transceiver signal to the switch card.

3. The load control card according to claim 1, characterized in that: The first baseboard controller is further configured to generate a second interrupt signal and send the second interrupt signal to the logic controller when determining that the processor has recovered to a normal working state; The logic controller is further configured to provide a second communication signal from the processor to the switch card in response to the second interrupt signal, so as to switch the control unit of the carrier control card to the processor.

4. The load control card according to claim 3, characterized in that: The second communication signal comprises a second asynchronous transmit / receive signal; The logic controller is further configured to control the processor to establish a signal link with the switch card in response to the second interrupt signal, so as to provide the second asynchronous transmit / receive signal to the switch card.

5. The load-bearing control card according to claim 1 or 3, characterized in that: The bearer control card also includes: a first network unit and a second network unit; Wherein, the processor is connected to a first network interface of an input / output interface card through the first network unit, and is connected to a second network interface of the input / output interface card through the second network unit; The second baseboard controller is connected to the second network interface of the input / output interface board through the second network unit.

6. The load control card according to claim 5, characterized in that: The second baseboard controller is configured with a first network address; The second baseboard controller is further used for performing network communication via the second network unit and the second network interface based on the first network address.

7. The load control card according to claim 5, characterized in that: The processor is configured with a second network address; The processor is further configured to perform network communication via the first network unit and the first network interface based on the second network address, or perform network communication via the second network unit and the second network interface based on the second network address.

8. The load control card according to claim 1 or 3, characterized in that: Also includes: A plurality of multiplexers, wherein a first input end of the multiplexer is connected to the processor, a second input end of the multiplexer is connected to the second substrate controller, an output end of the multiplexer is connected to the switch board through the connector, and a selection end of the multiplexer is connected to the logic controller.

9. The bearer control card according to claim 8, characterized in that: The first communication signal also includes multiple first serial signals; Wherein, the second substrate controller is further used to send the multiple first serial signals to the multiple multiplexers respectively; The logic controller is further configured to control the plurality of multiplexers to select the plurality of first serial signals to the switch card in response to the first interrupt signal.

10. The load control card according to claim 8, characterized in that: The second communication signal also includes multiple second serial signals; Wherein, the processor is further used to send the multiple second serial signals to the multiple multiplexers respectively; The logic controller is further configured to control the plurality of multiplexers to select the plurality of second serial signals to the switch card in response to a second interrupt signal.

11. The load control card according to claim 3, characterized in that: The first substrate controller is further used to send the second interrupt signal to the second substrate controller; The second substrate controller is configured to enter a standby state in response to the second interrupt signal.

12. The load control card according to claim 1, characterized in that: The bearer control card also includes: A power control unit is used to supply power to the bearer control card, and to supply power to the switch card and the input / output interface card via the bearer control card.

13. The load control card according to claim 1, characterized in that: The power of the second baseboard controller is smaller than the power of the processor.

14. A switch, characterized in that: The switch comprises: A switch card, an input / output interface card, and a load control card as claimed in any one of claims 1 to 13; The bearer control card is used to configure and / or control multiple graphics processors through the switch card.

15. The switch according to claim 14, characterized in that: The input and output interface board includes an asynchronous transceiver interface; The logic controller of the bearer control card is used for providing the first asynchronous receiving and transmitting signal or the second asynchronous receiving and transmitting signal to the switch card in response to the test signal received via the asynchronous receiving and transmitting interface.

16. The switch according to claim 15, characterized in that: The logic controller of the bearer control card is used to respond to a first interrupt signal to provide the first asynchronous receive / transmit signal to the switch card when the asynchronous receive / transmit interface is not connected to the test signal, and is used to respond to a second interrupt signal to provide the second asynchronous receive / transmit signal to the switch card.

17. The switch according to claim 14, characterized in that: During the startup phase of the switch, the processor of the carrier control card is used to perform configuration processing on the multiple graphics processors.

18. The switch according to claim 17, characterized in that: The input / output interface board includes a first network interface and a second network interface, wherein the first network interface and the second network interface are used to connect to Ethernet, and the bearer control card includes a first network unit and a second network unit; The processor of the carrier control card is connected to the first network interface of the input / output interface card through the first network unit, and is connected to the second network interface of the input / output interface card through the second network unit; The second baseboard controller carrying the control card is connected to the second network interface of the input / output interface board through the second network unit; Wherein, during the startup phase of the switch, the switch is used to allocate a first network address to the second baseboard controller of the carrier control card, and allocate a second network address to the processor of the carrier control card; The second baseboard controller carrying the control card is used to perform network communication with the Ethernet via the second network unit and the second network interface based on the first network address; The processor of the bearer control card is used to perform network communication with the Ethernet via the first network unit and the first network interface based on the second network address, or to perform network communication with the Ethernet via the second network unit and the second network interface based on the second network address.

19. The switch according to claim 14, characterized in that: During the operation phase of the switch, the processor of the bearer control card is used to control the operation status of the multiple graphics processors.

20. The switch according to claim 14, characterized in that: During the operation stage of the switch, when the processor of the bearer control card is in an abnormal working state, the logic controller of the bearer control card is used to switch the control unit of the bearer control card to the second baseboard controller of the bearer control card, and the second baseboard controller of the bearer control card is used to control the operating status of the multiple graphics processors.

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