Communication protocol switching system, method and device, computer equipment and storage medium

Abstract

The invention discloses a communication protocol switching system, method and device, computer equipment and a storage medium, and the system comprises a main control module, a plurality of communication protocol switching chips, and a plurality of dual-path power switch chips which are in one-to-one correspondence with the plurality of communication protocol switching chips, each communication protocol switching chip is used for converting a non-target communication protocol different from a target communication protocol into a target communication protocol which can be processed by the main control module; the control end of each two-way power switch chip is electrically connected with the main control module and is used for receiving a control signal from the main control module and controlling the on-off of a power supply of the corresponding communication protocol switching chip and the on-off of a signal path between the communication protocol switching chip and the main control module under the control of the control signal; when a communication protocol switching chip is not selected, power supply disconnection and signal path isolation are realized, and signal interference among different communication protocols is avoided. The communication stability can be effectively improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of communication, and in particular to a communication protocol switching method and device, a computer device and a storage medium. BACKGROUND

[0002] In the scenarios of industrial automation, intelligent monitoring, data acquisition and device debugging, field devices often need to interact with each other through different communication protocols, such as USB, RS-485, CAN, etc. Different protocols have differences in physical layer characteristics, transmission rate, transmission distance and anti-interference ability, and the applicable working environment and business needs are also different. Traditional communication devices usually only support a single protocol, and if it needs to be switched to other protocols, it often relies on manual replacement of interface modules or external controllers, which is not only cumbersome to operate, but also has low switching efficiency and poor compatibility. Although the existing multi-protocol switching scheme can integrate multiple communication protocol transceiver circuits in one set of hardware, in actual application, signal interference may occur during switching of the multi-protocol transceiver circuit, affecting the stability of communication.

[0003] Therefore, how to provide a communication protocol switching system and method that can effectively improve the stability of communication has become a problem to be solved. SUMMARY

[0004] Therefore, it is necessary to provide a communication protocol switching system, method, device, computer device and storage medium to solve the problem of low communication stability of the traditional communication protocol switching system and method.

[0005] A communication protocol switching system comprises: A master control module, a plurality of communication protocol switching chips, and a plurality of two-way power switch chips corresponding to the plurality of communication protocol switching chips, each of the communication protocol switching chips being used to convert a non-target communication protocol different from a target communication protocol into the target communication protocol processable by the master control module; The control end of each of the two-way power switch chips is electrically connected to the master control module, used to receive a control signal from the master control module, and under the control of the control signal, control the power on-off of the corresponding communication protocol switching chip and the signal path on-off between the communication protocol switching chip and the master control module, so as to realize power disconnection and signal path isolation when the communication protocol switching chip is not selected, and avoid signal interference between different communication protocols.

[0006] Optionally, each of the two-way power switch chips comprises a power switch path and a signal switch path; The power switch path is electrically connected to the power input end of the corresponding communication protocol switching chip, used to control the power on-off of the communication protocol switching chip; The signal switch path is electrically connected to the signal path between the communication protocol switching chip and the main control module, and is used to control the on / off state of the signal path.

[0007] Optionally, the multiple communication protocol switching chip includes: A first communication protocol switching chip for converting the USB protocol into a target communication protocol that the main control module can process; A second communication protocol switching chip for converting the RS-485 protocol into a target communication protocol that the main control module can process; And a third communication protocol switching chip for converting the CAN protocol into a target communication protocol that the main control module can process.

[0008] Optionally, the first dual-channel power switch chip corresponding to the first communication protocol switching chip includes a first power switch path and a first signal switch path. The first power switch path is electrically connected to the power input terminal of the first communication protocol switching chip, and the first signal switch path is electrically connected to the signal path between the first communication protocol switching chip and the main control module. The second dual-channel power switch chip corresponding to the second communication protocol switching chip includes a second power switch path and a second signal switch path. The second power switch path is electrically connected to the power input terminal of the second communication protocol switching chip, and the second signal switch path is electrically connected to the signal path between the second communication protocol switching chip and the main control module. The third dual-channel power switch chip corresponding to the third communication protocol switching chip includes a third power switch path and a third signal switch path. The third power switch path is electrically connected to the power input terminal of the third communication protocol switching chip, and the third signal switch path is electrically connected to the signal path between the third communication protocol switching chip and the main control module.

[0009] Optionally, the main control module is a microcontroller or a wireless communication module with a universal asynchronous transceiver interface, and the signal paths of the multiple communication protocol switching chips are all connected to the same universal asynchronous transceiver interface of the main control module.

[0010] A communication protocol switching method is provided, the method being applied to the main control module of the communication protocol switching system, the main control module including a general asynchronous transceiver interface and multiple enable output interfaces, the method comprising: select one of the enable output interfaces as a current enable output interface according to a preset cycle sequence, and output an enable signal to the corresponding dual-path power switch chip through the current enable output interface, so as to turn on a power switch path and a signal switch path of the corresponding dual-path power switch chip, enable the corresponding communication protocol switching chip, and communicate with the external device; detect whether a valid communication response is received within a preset time; If no valid communication response is detected, turn off the power switch path and the signal switch path of the corresponding dual-path power switch chip, select the next enable output interface as the current enable output interface in the cycle sequence, and repeat the above steps until a valid communication response is detected.

[0011] Optionally, before selecting one of the enable output interfaces as a current enable output interface according to a preset cycle sequence, the method further comprises: obtain a historical enable output interface corresponding to a communication protocol switching chip used when a last valid communication response is obtained, and output an enable signal to the corresponding dual-path power switch chip through the historical enable output interface, so as to turn on a power switch path and a signal switch path of the corresponding dual-path power switch chip, enable the corresponding communication protocol switching chip, and communicate with the external device; detect whether a valid communication response is received within a preset time; If a valid communication response is detected, the power switch path and the signal switch path of the dual-path power switch chip are continuously turned on; If no valid communication response is detected, select one of the enable output interfaces as a current enable output interface according to a preset cycle sequence.

[0012] A communication protocol switching device comprises: an enabling module configured to select one of the enable output interfaces as a current enable output interface according to a preset cycle sequence, and output an enable signal to the corresponding dual-path power switch chip through the current enable output interface, so as to turn on a power switch path and a signal switch path of the corresponding dual-path power switch chip, enable the corresponding communication protocol switching chip, and communicate with the external device; a detection module configured to detect whether a valid communication response is received within a preset time; a switching module configured to, if no valid communication response is detected, turn off the power switch path and the signal switch path of the dual-path power switch chip, select the next enable output interface as the current enable output interface in the cycle sequence, and repeat the above steps until a valid communication response is detected.

[0013] A computer device includes a memory, a processor, and computer readable instructions stored in the memory and executable on the processor, and the processor implements the above communication protocol switching method when executing the computer readable instructions.

[0014] A readable storage medium has computer readable instructions stored thereon, and the computer readable instructions are executed by a processor to implement the communication protocol switching method.

[0015] The above communication protocol switching system, method, device, computer device and storage medium, wherein the system comprises a master module, a plurality of communication protocol switching chips, and a plurality of two-way power switch chips corresponding to the plurality of communication protocol switching chips, each of the communication protocol switching chips is used to convert a non-target communication protocol different from a target communication protocol into the target communication protocol processable by the master module; the control end of each of the two-way power switch chips is electrically connected with the master module, used to receive a control signal from the master module, and under the control of the control signal, control the power on-off of the corresponding communication protocol switching chip and the signal path on-off between the communication protocol switching chip and the master module, so as to realize power off and signal path isolation when the communication protocol switching chip is not selected, and avoid signal interference between different communication protocols. By using the two-way power switch chip to control the power path and the signal path of the communication protocol switching chip respectively, physical power off and signal isolation of the protocol circuit when not in use are realized, the coupling interference of the multi-protocol signal is effectively avoided, and the communication stability is improved. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the description of the embodiments of the present application. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0017] Figure 1 is a structural schematic diagram of a communication protocol switching system in an embodiment of the present application; Figure 2 is a flow schematic diagram of a communication protocol switching method in an embodiment of the present application; Figure 3 is a structural schematic diagram of a communication protocol switching device in an embodiment of the present application; Figure 4 is a schematic diagram of a computer device in an embodiment of the present application.

[0018] Explanation of reference signs: 10, external device; 11. First communication protocol switching chip; 111. First power switch path; 112. First signal switch path; 12. Second communication protocol switching chip; 121. Second power switch path; 122. Second signal switch path; 13. Third communication protocol switching chip; 131. Third power switch path; 132. Third signal switch path; 14. Main control module; 141. Enable output interface; 142. General asynchronous transceiver interface. Detailed Implementation

[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] Firstly, this embodiment relates to a communication protocol switching system, referring to... Figure 1 It includes a main control module 14, multiple communication protocol switching chips, and multiple dual-channel power switch chips corresponding to the multiple communication protocol switching chips. Each communication protocol switching chip is used to convert a non-target communication protocol that is different from the target communication protocol into a target communication protocol that the main control module 14 can process. The control terminal of each dual-channel power switch chip is electrically connected to the main control module 14 and is used to receive control signals from the main control module 14. Under the control of the control signals, it controls the power supply of the corresponding communication protocol switching chip and the signal path between the communication protocol switching chip and the main control module 14, so as to realize power disconnection and signal path isolation when the communication protocol switching chip is not selected, and avoid signal interference between different communication protocols.

[0021] The main control module 14 refers to a processing unit with logic control capabilities, which can be implemented using a microcontroller or a wireless communication module. It generates control signals and processes the converted target protocol data. The communication protocol switching chip is an integrated circuit that converts different protocols to the target protocol, such as a USB-to-UART chip, an RS-485 transceiver, or a CAN controller; the appropriate chip is selected based on the protocol type. The dual-channel power switch chip is a composite device integrating a power switch and a signal switch; a dual-channel power switch chip, model BCT4227ETB, can be used. The control terminal refers to the interface pin that receives external control commands; it can be designed as a GPIO port, triggering switch state switching through high and low level signals.

[0022] Specifically, when a communication protocol switch is required, the main control module 14 sends an enable signal to the dual-channel power switch chip corresponding to the target protocol. This signal simultaneously activates both the power switch path and the signal switch path, enabling the corresponding communication protocol switching chip to receive power and establish a signal connection with the main control module 14. At this time, the dual-channel power switches corresponding to other protocols remain off, and their associated communication protocol switching chips have neither power input nor electrical connection with the main control module 14. This dual isolation mechanism eliminates the possibility of interference from unactivated modules through the power or signal paths, ensuring that only the currently activated protocol conversion circuit is operational.

[0023] It is understood that the dual-power switch chip used in this application simultaneously controls the power supply path and signal path of the communication protocol switching chip. At any given time, it only supplies power to the communication module corresponding to the current target protocol and connects the signal, while the other modules remain powered off and isolated from the signal. This achieves physical isolation of the communication path in the hardware structure, effectively avoids coupling interference between multiple protocol signals, and improves the stability and anti-interference capability of the communication system.

[0024] It should be noted that although each communication protocol switching chip involved in this invention controls the power and signal paths through a corresponding dual-channel power switch chip, in... Figure 1 In the schematic diagram shown, for the sake of simplicity and clarity, the core structure of the dual-channel power switch chip is not specifically drawn. Instead, it is represented by two functional modules: "power switch path" and "signal switch path".

[0025] Those skilled in the art should understand that Figure 1 The “power switch path” and “signal switch path” shown can actually be composed of two controlled paths (such as MOS switch or relay path) in the same dual-channel power switch chip. The control terminal of the chip is connected to the enable output interface of the main control module. When a control signal is received, it can synchronously control the conduction and disconnection of the power path and the signal path.

[0026] In practical implementation, the dual-channel power switch chip can be a chip with two independent control channels, such as the BCT4227ETB, which are used to physically control the power supply path and signal line of the communication protocol switching chip respectively. This device enables the switching path control function shown in the diagram, ensuring complete isolation between each communication protocol switching chip and the main control module when not in operation, preventing signal crosstalk and power supply interference.

[0027] Therefore, although the attached figure does not show the dual-channel power switch chip body in detail, its function is expressed in the figure through the structural relationship between the "power switch path" and the "signal switch path", which is sufficient to reflect the inventive concept and core technical features.

[0028] Preferably, refer to Figure 1 Each dual-channel power switch chip includes a power switch path and a signal switch path; the power switch path is electrically connected to the power input terminal of the corresponding communication protocol switching chip and is used to control the power supply of the communication protocol switching chip; the signal switch path is electrically connected to the signal path between the communication protocol switching chip and the main control module 14 and is used to control the signal path.

[0029] The power switch path refers to the circuit that turns the power supply to the communication protocol switching chip on or off using electronic switching devices. Specifically, it can be implemented using switching devices that provide electrical isolation, such as MOSFETs or relays, and the on / off state is controlled by the level signal output from the main control module 14. The signal switch path refers to the circuit that physically isolates the data transmission line between the communication protocol switching chip and the main control module 14.

[0030] Specifically, when the main control module 14 needs to switch communication protocols, it first cuts off the power supply to the communication protocol switching chip in its non-operating state by controlling the power switch path, eliminating leakage current interference caused by incomplete power-off of the chip's internal circuitry. Simultaneously, the signal switch path physically disconnects the data transmission path between the corresponding chip and the main control module 14, avoiding signal reflection and crosstalk caused by multiple parallel signal lines. For the communication protocol switching chip in its operating state, its power switch path and signal switch path remain conductive, ensuring stable power supply and data transmission integrity. This dual-path independent control mechanism enables synchronous switching of the power and signal paths, avoiding residual signal interference that may occur with single control in traditional solutions.

[0031] Preferably, refer to Figure 1 The multiple communication protocol switching chips include: a first communication protocol switching chip 11 for converting the USB protocol into a target communication protocol that can be processed by the main control module 14; a second communication protocol switching chip 12 for converting the RS-485 protocol into a target communication protocol that can be processed by the main control module 14; and a third communication protocol switching chip 13 for converting the CAN protocol into a target communication protocol that can be processed by the main control module 14.

[0032] The first communication protocol switching chip 11 is an integrated circuit that converts USB protocol signals into signals compatible with the Universal Asynchronous Receiver / Transmitter Interface 142. Specifically, it can be implemented using a CH340 chip. Its function is to convert the USB protocol data format to the target communication protocol data format, enabling the main control module 14 to process data from different protocols through a single interface. The second communication protocol switching chip 12 is a conversion circuit that converts RS-485 differential signals into single-ended signals. Specifically, it can be implemented using an SN65176BD chip. The third communication protocol switching chip 13 is a controller that implements the conversion between the CAN bus protocol and the serial communication protocol. Specifically, it can be implemented using an SN65HVD230 chip.

[0033] Specifically, when external device 10 is connected via USB interface, the first communication protocol switching chip 11 parses the USB protocol data packets into a serial data stream conforming to the target communication protocol, and transmits it to the universal asynchronous transceiver interface 142 of the main control module 14 through the signal path. For devices using the RS-485 protocol, the second communication protocol switching chip 12 converts the differential signal into a single-ended logic level signal, while providing a bus termination matching resistor to eliminate signal reflection. When a CAN bus device is connected, the third communication protocol switching chip 13 completes the conversion of the CAN signal to the target communication protocol signal. The three chips are connected to the main control module 14 through independent dual-channel power switch chips, achieving physical isolation and power management under the action of control signals. The aforementioned target communication protocol can be UART.

[0034] Preferably, refer to Figure 1 The first dual-channel power switch chip corresponding to the first communication protocol switching chip 11 includes a first power switch path 111 and a first signal switch path 112. The first power switch path 111 is electrically connected to the power input terminal of the first communication protocol switching chip 11, and the first signal switch path 112 is electrically connected to the signal path between the first communication protocol switching chip 11 and the main control module 14. The second dual-channel power switch chip corresponding to the second communication protocol switching chip 12 includes a second power switch path 121 and a second signal switch path 122. The second power switch path 121 is electrically connected to the power input terminal of the second communication protocol switching chip 12, and the second signal switch path 122 is electrically connected to the signal path between the second communication protocol switching chip 12 and the main control module 14. The third dual-channel power switch chip corresponding to the third communication protocol switching chip 13 includes a third power switch path 131 and a third signal switch path 132. The third power switch path 131 is electrically connected to the power input terminal of the third communication protocol switching chip 13, and the third signal switch path 132 is electrically connected to the signal path between the third communication protocol switching chip 13 and the main control module 14.

[0035] The first dual-channel power switch chip provides independent power to the first communication protocol switching chip 11 through the first power switch path 111. When the main control module 14 sends a control signal, the first power switch path 111 is turned on, enabling the first communication protocol switching chip 11 to enter the working state. At the same time, the first signal switch path 112 is turned on synchronously, establishing a communication link between the USB protocol conversion module and the main control module 14. The second dual-channel power switch chip supplies power to the second communication protocol switching chip 12 through the second power switch path 121. When the main control module 14 switches to the RS-485 protocol, the second power switch path 121 and the second signal switch path 122 are activated simultaneously, ensuring that the RS-485 signal conversion circuit is connected to the system only when needed. The third dual-channel power switch chip controls the power input of the third communication protocol switching chip 13 through the third power switch path 131, and maintains the connection of the third signal switch path 132 during CAN protocol communication, while completely disconnecting the power and signal connections when other protocols are working. The three dual-channel power switch chips operate independently, achieving physical isolation between the power and signal paths of different protocol conversion modules.

[0036] Preferably, refer to Figure 1 The main control module 14 is a microcontroller or a wireless communication module with a universal asynchronous transceiver interface 142. The signal paths of various communication protocol switching chips are all connected to the same universal asynchronous transceiver interface 142 of the main control module 14.

[0037] In this context, a microcontroller refers to a miniature computer that integrates a processor, memory, and input / output interfaces. Specifically, it can be implemented using STM32 or ATmega series chips and is used to execute communication protocol switching control logic. A wireless communication module with a universal asynchronous transceiver interface 142 refers to a module that integrates wireless communication functions and has a built-in UART interface, such as an ESP32 or SIMCOM series 4G module, which uses UART to transmit data with external device 10. The same universal asynchronous transceiver interface 142 means that the main control module 14 uses only a single UART physical port, connecting to the signal paths of different communication protocol switching chips through time-division multiplexing, thereby reducing hardware resource consumption.

[0038] Specifically, the main control module 14 is connected to the signal output terminals of multiple communication protocol switching chips through the same UART interface. Each communication protocol switching chip is powered off when not in use, and its signal path is isolated from the UART interface through a dual-channel power switch chip. When the main control module 14 activates a dual-channel power switch chip via an enable signal, the corresponding communication protocol switching chip is powered on and connected to the UART interface. At this time, the main control module 14 communicates with the external device 10 using the target protocol through this UART interface. During the switching process, only the currently activated communication protocol switching chip remains connected to the UART interface; the power and signal paths of the other chips are cut off, thereby avoiding interference from multiple signals.

[0039] Secondly, such as Figure 2 As shown, a communication protocol switching method is provided, applied to the main control module 14 of a communication protocol switching system, including the following steps: 201. Select one enable output interface 141 from multiple enable output interfaces 141 according to the preset cycle sequence as the current enable output interface, and output an enable signal to the corresponding dual-channel power switch chip through the current enable output interface to conduct the power switch path and signal switch path of the corresponding dual-channel power switch chip, enable the corresponding communication protocol switching chip, and communicate with the external device 10.

[0040] In this embodiment, the main control module 14 can be a microcontroller with multiple general purpose input / output (GPIO) pins and at least one general purpose asynchronous transceiver interface 142 (UART). Its multiple GPIO pins serve as enable output interfaces 141, used to output control signals to switch between different communication protocol channels. Specifically, the control signals can be sent to the corresponding dual-channel power switch chip via the WIFI module deployed on the microcontroller. The communication protocol switching system includes three communication protocol switching chips, used for converting between USB, RS-485, and CAN communication protocols, respectively, and each is connected to the main control module 14 through a corresponding dual-channel power switch chip.

[0041] After device initialization or detection of external device 10 connection, the main control module 14 selects the current enable output interface 141 from multiple enable output interfaces 141 according to the preset protocol attempt sequence (e.g., USB→RS-485→CAN), such as GPIO1, and outputs a high-level control signal from GPIO1 as the current enable output interface. This control signal acts on the first dual-channel power switch chip connected to it (e.g., the switching chip CH340 corresponding to the USB protocol), turning on its internal power switch path to provide a stable operating power supply for the first communication protocol switching chip 11. At the same time, it turns on the signal switch path, enabling the data output terminal of the first communication protocol switching chip 11 to establish a valid signal path with the UART pin of the main control module 14.

[0042] Subsequently, the first communication protocol switching chip 11 begins communicating with the external device 10, for example, converting the data signal input from the external USB interface into serial data in UART format and transmitting it to the main control module 14. The main control module 14 determines whether the communication has been successfully established based on the data signal received from the UART interface, and then proceeds to the subsequent communication process or executes a protocol switch.

[0043] 202. Check whether a valid communication response has been received within a preset time.

[0044] In this embodiment of the invention, after the corresponding communication protocol switching chip is enabled, the main control module 14 listens to the data signal returned by the external device 10 through the universal asynchronous transceiver interface 142 (UART) to determine whether the current communication link has been successfully established. The main control module 14 presets a time window, such as 3 seconds, as the detection time limit for the communication response.

[0045] Within the preset time window, the main control module 14 continuously monitors whether its UART receive buffer receives data input from the current communication protocol switching chip, or whether it receives a data frame conforming to the set format. If a valid communication response (e.g., handshake signal, acknowledgment frame, or valid data byte) is successfully received within this time window, the communication is considered to be successfully established, and the main control module 14 maintains the current protocol channel in the enabled state and enters the formal communication phase.

[0046] If no valid communication response is detected within this time, or if the received response data does not meet the frame format requirements set by the protocol (such as start bit, check bit error, etc.), the current communication is determined to have failed, and preparations are made to perform a protocol switch. The specific process will be carried out in subsequent steps.

[0047] 203. If no valid communication response is detected, the power switch path and signal switch path of the corresponding dual power switch chip are turned off, and the next enable output interface 141 is selected as the current enable output interface in the loop sequence. The above steps are repeated until a valid communication response is detected.

[0048] In this embodiment of the invention, if no valid communication response is detected within the preset time window of step 202, the main control module 14 will control the currently enabled output interface to output a low-level signal, thereby shutting down the currently connected dual-channel power switch chip. This shutdown operation includes: disconnecting the power switch path to cut off the power supply to the corresponding communication protocol switching chip, ensuring its internal circuitry is completely powered off; simultaneously, disconnecting the signal switch path to physically isolate the data line between the communication protocol switching chip and the main control module 14, preventing signal coupling, reflection, or interference caused by multi-channel connections.

[0049] After completing the shutdown action, the main control module 14 selects the next interface from the remaining untried enable output interfaces 141 as the current enable output interface according to the preset protocol switching order, for example, switching from GPIO1 to GPIO2. Subsequently, the main control module 14 repeats steps 201 and 202: sending an enable signal to the next dual-channel power switch chip through the current enable output interface, enabling the corresponding communication protocol switching chip and retrying communication with the external device 10.

[0050] The above process will cycle through all communication protocol switching channels in a preset order until a channel detects a valid communication response within a preset time, thereby automatically completing the communication protocol matching and switching process without user intervention.

[0051] In this embodiment of the invention, one enable output interface 141 is selected as the current enable output interface from among multiple enable output interfaces 141 according to a preset cyclic sequence. An enable signal is then output to the corresponding dual-channel power switch chip through this current enable output interface to activate the power switch path and signal switch path of the corresponding dual-channel power switch chip, enabling the corresponding communication protocol switching chip and facilitating communication with the external device 10. A valid communication response is detected within a preset time. If no valid communication response is detected, the power switch path and signal switch path of the corresponding dual-channel power switch chip are closed, and the next enable output interface 141 is selected as the current enable output interface in the cyclic sequence. This process is repeated until a valid communication response is detected. Through this scheme, the present invention can automatically detect and switch the appropriate protocol channel in various communication protocol environments, avoiding manual intervention and improving the protocol compatibility and intelligence of the device. Furthermore, by employing dual power switch chips to separately control the power supply and signal path connection of the communication protocol switching chip, only one communication channel is activated at any given time, while the remaining channels are completely powered off and physically isolated. This achieves decoupled and interference-free switching control of the communication path, effectively avoiding signal conflicts and power backflow issues. In addition, this invention, through setting a reasonable timeout judgment mechanism (e.g., a 3-second timeout window), ensures the reliability of communication response while controlling the activation time of each protocol channel, avoiding energy waste caused by prolonged invalid attempts. The entire switching process, combined with the hardware design of dual power and signal isolation, realizes a system-level low-power operation strategy and a fast adaptive protocol selection mechanism, suitable for embedded communication devices in multi-protocol environments, and particularly suitable for power-sensitive application scenarios.

[0052] Optionally, before selecting one enable output interface 141 from multiple enable output interfaces 141 as the current enable output interface according to a preset cyclic sequence, the historical enable output interface 141 corresponding to the communication protocol switching chip used in the last valid communication response can be obtained, and an enable signal can be output to the corresponding dual-channel power switch chip through the historical enable output interface 141 to conduct the power switch path and signal switch path of the corresponding dual-channel power switch chip, enable the corresponding communication protocol switching chip, and communicate with the external device 10; detect whether a valid communication response is received within a preset time; if a valid communication response is detected, the power switch path and signal switch path of the dual-channel power switch chip are continuously conducted; if no valid communication response is detected, select one enable output interface 141 from multiple enable output interfaces 141 as the current enable output interface according to a preset cyclic sequence.

[0053] In this embodiment of the invention, before selecting the current enable output interface from multiple enable output interfaces 141 according to a preset cyclic order, the main control module 14 may preferentially obtain the historical enable output interface 141 corresponding to the communication protocol switching chip used when the communication connection was successfully established last time.

[0054] After obtaining the historical enable output interface 141, the main control module 14 sends an enable signal to the corresponding dual-channel power switch chip through the historical enable output interface 141, so that the power switch path and signal switch path of the dual-channel power switch chip are turned on, thereby activating the corresponding communication protocol switching chip and attempting to communicate with the external device 10.

[0055] The main control module 14 checks whether it has received a valid communication response from the external device 10 within a preset time window (e.g., 3 seconds). If a valid communication response is detected, the power switch path and signal switch path of the dual power switch chip are kept in the conducting state to maintain the normal operation of the current communication channel and avoid delays and increased power consumption caused by repeated switching.

[0056] If no valid communication response is detected within the preset time window, the main control module 14 determines that the communication has failed, shuts down the power switch path and signal switch path of the current dual power switch chip, releases the power and signal resources of the current communication channel, and selects the next one from the remaining enable output interfaces 141 as the current enable output interface according to the preset cycle order, and restarts the protocol switching process.

[0057] By prioritizing historical communication channels, this approach can achieve "first-time success" in most cases, effectively improving communication establishment efficiency, reducing system response latency, minimizing invalid handovers and power consumption, and further enhancing the system's intelligence and stability.

[0058] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0059] In one embodiment, a communication protocol switching device is provided, which corresponds one-to-one with the communication protocol switching methods described in the above embodiments. For example... Figure 3 As shown, the communication protocol switching device includes an enable module 301, a detection module 302, and a switching module 303. Detailed descriptions of each functional module are as follows: The enable module 301 is used to select one enable output interface from a plurality of enable output interfaces according to a preset cyclic sequence as the current enable output interface, and output an enable signal to the corresponding dual-channel power switch chip through the current enable output interface, so as to turn on the power switch path and signal switch path of the dual-channel power switch chip, enable the corresponding communication protocol switching chip, and communicate with external devices. The detection module 302 is used to detect whether a valid communication response has been received within a preset time. The switching module 303 is used to close the power switch path and signal switch path of the dual power switch chip if no valid communication response is detected, and select the next enable output interface as the current enable output interface in the cycle sequence, repeating the above steps until a valid communication response is detected.

[0060] Optionally, the communication protocol switching device is further configured to: The historical enable output interface corresponding to the communication protocol switching chip used in the last valid communication response is obtained, and an enable signal is output to the corresponding dual-channel power switch chip through the historical enable output interface to conduct the power switch path and signal switch path of the corresponding dual-channel power switch chip, enable the corresponding communication protocol switching chip, and communicate with external devices. Check whether a valid communication response has been received within a preset time; If a valid communication response is detected, the power switch path and signal switch path of the dual power switch chip are continuously connected. If no valid communication response is detected, one of the multiple enabled output interfaces is selected as the current enabled output interface according to a preset cyclic sequence.

[0061] Specific limitations regarding the communication protocol switching device can be found in the limitations of the communication protocol switching method described above, and will not be repeated here. Each module in the aforementioned communication protocol switching device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in hardware or independently of the processor in the computer device, or stored in software in the memory of the computer device, so that the processor can call and execute the operations corresponding to each module.

[0062] In one embodiment, a computer device is provided, which may be a terminal device, and its internal structure diagram may be as follows: Figure 4As shown, the computer device includes a processor, memory, and a network interface connected via a system bus. The processor provides computing and control capabilities. The memory includes a readable storage medium storing computer-readable instructions. The network interface communicates with external terminals via a network connection. When executed by the processor, the computer-readable instructions implement a communication protocol switching method. The readable storage medium provided in this embodiment includes both non-volatile and volatile readable storage media.

[0063] In this application embodiment, a computer device is provided, including a memory, a processor, and computer-readable instructions stored in the memory and executable on the processor. When the processor executes the computer-readable instructions, it implements the steps of the communication protocol switching method described above.

[0064] In one embodiment of the application, a readable storage medium is provided, which stores computer-readable instructions. When the computer-readable instructions are executed by a processor, they implement the steps of the communication protocol switching method described above.

[0065] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by instructing related hardware with computer-readable instructions. These computer-readable instructions can be stored in a non-volatile readable storage medium or a volatile readable storage medium. When executed, these computer-readable instructions can include the processes of the embodiments of the methods described above. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0066] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is used as an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0067] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A communication protocol switching system, characterized in that, include: The main control module (14), multiple communication protocol switching chips, and multiple dual-channel power switch chips corresponding to the multiple communication protocol switching chips, each of the communication protocol switching chips is used to convert a non-target communication protocol that is different from the target communication protocol into a target communication protocol that the main control module (14) can process; The control terminal of each dual-channel power switch chip is electrically connected to the main control module (14) to receive control signals from the main control module (14) and, under the control of the control signals, control the power supply of the corresponding communication protocol switching chip and the signal path between the communication protocol switching chip and the main control module (14) to achieve power disconnection and signal path isolation when the communication protocol switching chip is not selected, so as to avoid signal interference between different communication protocols.

2. The communication protocol switching system as described in claim 1, characterized in that, Each of the dual-channel power switch chips includes a power switch path and a signal switch path; The power switch path is electrically connected to the power input terminal of the corresponding communication protocol switching chip, and is used to control the power supply of the communication protocol switching chip. The signal switch path is electrically connected to the signal path between the communication protocol switching chip and the main control module (14), and is used to control the on / off state of the signal path.

3. The communication protocol switching system as described in claim 1, characterized in that, The multi-communication protocol switching chip includes: A first communication protocol switching chip (11) is used to convert the USB protocol into a target communication protocol that the main control module (14) can process. A second communication protocol switching chip (12) is used to convert the RS-485 protocol into a target communication protocol that the main control module (14) can process. And a third communication protocol switching chip (13) for converting the CAN protocol into a target communication protocol that the main control module (14) can process.

4. The communication protocol switching system as described in claim 3, characterized in that, The first dual-channel power switch chip corresponding to the first communication protocol switching chip (11) includes a first power switch path (111) and a first signal switch path (112). The first power switch path (111) is electrically connected to the power input terminal of the first communication protocol switching chip (11), and the first signal switch path (112) is electrically connected to the signal path between the first communication protocol switching chip (11) and the main control module (14). The second dual-channel power switch chip corresponding to the second communication protocol switching chip (12) includes a second power switch path (121) and a second signal switch path (122). The second power switch path (121) is electrically connected to the power input terminal of the second communication protocol switching chip (12), and the second signal switch path (122) is electrically connected to the signal path between the second communication protocol switching chip (12) and the main control module (14). The third dual-channel power switch chip corresponding to the third communication protocol switching chip (13) includes a third power switch path (131) and a third signal switch path (132). The third power switch path (131) is electrically connected to the power input terminal of the third communication protocol switching chip (13), and the third signal switch path (132) is electrically connected to the signal path between the third communication protocol switching chip (13) and the main control module (14).

5. The communication protocol switching system as described in claim 1, characterized in that, The main control module (14) is a microcontroller or a wireless communication module with a universal asynchronous transceiver interface (142). The signal paths of the multiple communication protocol switching chips are all connected to the same universal asynchronous transceiver interface (142) of the main control module (14).

6. A communication protocol switching method, characterized in that, The method is applied to the main control module (14) of the communication protocol switching system as described in any one of claims 1 to 5, the main control module (14) including a universal asynchronous transceiver interface (142) and multiple enable output interfaces (141), the method comprising: According to the preset cyclic sequence, one of the multiple enable output interfaces (141) is selected as the current enable output interface (141), and an enable signal is output to the corresponding dual-channel power switch chip through the current enable output interface (141) to turn on the power switch path and signal switch path of the corresponding dual-channel power switch chip, enable the corresponding communication protocol switching chip, and communicate with the external device (10). Check whether a valid communication response has been received within a preset time; If no valid communication response is detected, the power switch path and signal switch path of the corresponding dual power switch chip are turned off, and the next enable output interface (141) is selected as the current enable output interface (141) in the loop sequence. The above steps are repeated until a valid communication response is detected.

7. The communication protocol switching method as described in claim 6, characterized in that, Before selecting one of the multiple enable output interfaces (141) as the current enable output interface (141) according to a preset cyclic sequence, the method further includes: The historical enable output interface (141) corresponding to the communication protocol switching chip used in the last valid communication response is obtained, and an enable signal is output to the corresponding dual-channel power switch chip through the historical enable output interface (141) to turn on the power switch path and signal switch path of the corresponding dual-channel power switch chip, enable the corresponding communication protocol switching chip, and communicate with the external device (10). Check whether a valid communication response has been received within a preset time; If a valid communication response is detected, the power switch path and signal switch path of the dual power switch chip are continuously connected. If no valid communication response is detected, one of the multiple enabled output interfaces (141) is selected as the current enabled output interface (141) according to a preset cyclic order.

8. A communication protocol switching device, characterized in that, include: The enable module is used to select one enable output interface (141) from multiple enable output interfaces (141) according to a preset cyclic sequence as the current enable output interface (141), and output an enable signal to the corresponding dual-channel power switch chip through the current enable output interface (141) to turn on the power switch path and signal switch path of the dual-channel power switch chip, enable the corresponding communication protocol switching chip, and communicate with the external device (10); The detection module is used to detect whether a valid communication response has been received within a preset time. The switching module is used to shut down the power switch path and signal switch path of the dual power switch chip if no valid communication response is detected, and select the next enable output interface (141) in the loop sequence as the current enable output interface (141), repeating the above steps until a valid communication response is detected.

9. A computer device comprising a memory, a processor, and computer-readable instructions stored in the memory and running on the processor, characterized in that, When the processor executes the computer-readable instructions, it implements the communication protocol switching method as described in claim 6 or 7.

10. A readable storage medium having computer-readable instructions stored thereon, characterized in that, When the computer-readable instructions are executed by the processor, they implement the communication protocol switching method as described in claim 6 or 7.

Images