A vertical GaN HEMT with a gradient component ScAIN insertion layer and a preparation method thereof

Abstract

The application relates to a vertical GaN HEMT with a gradient component ScAlN insertion layer and a preparation method thereof, which comprises a GaN buffer layer arranged on a first surface of a substrate; a first current blocking layer region and a second current blocking layer region arranged on both side edges of the buffer layer respectively; a source electrode arranged on a part of the surface of the first current blocking layer region; a GaN layer, a gradient component ScAlN insertion layer, a gradually changing AlGaN barrier layer and a cap layer which are arranged in a stack on the buffer layer; a gate electrode arranged on the cap layer; and a drain electrode arranged on a second surface of the substrate; on the basis of the vertical HEMT device structure, the GaN channel layer, the gradient component ScAlN insertion layer and the gradually changing AlGaN barrier layer which are arranged in a stack optimize the electron mobility and the electron concentration distribution of the device, and improve the linearity of the device, especially the performance of the device in a high-power environment.

Description

Technical Field

[0001] This invention relates to the field of microelectronics technology, and more particularly to a vertical GaN HEMT employing a gradient-component ScAlN intercalation layer and its fabrication method. Background Technology

[0002] As the demand for wireless communication technology continues to grow, the performance requirements for radio frequency (RF) devices are becoming increasingly stringent. High electron mobility transistors (HEMTs) are widely used in wireless communication, radar, satellite communication, and other fields due to their excellent high-frequency and high-power characteristics. In particular, gallium nitride (GaN) material has become the material of choice for RF applications due to its excellent properties such as wide bandgap, high breakdown voltage, and high electron mobility.

[0003] However, despite the excellent performance of GaN HEMT devices in the RF field, some bottlenecks remain in high-frequency applications. Current technologies primarily face the following challenges: improving transconductance and linearity while maintaining low channel resistance. Especially in power amplifiers and switching devices, improved linearity is crucial for signal quality and efficiency.

[0004] To address these issues, researchers have recently employed graded AlGaN barrier layers to optimize the electrical performance of GaN HEMTs. Graded AlGaN layers adjust the Al composition, optimize the electric field distribution, reduce abrupt electric field changes, mitigate interface charge accumulation, and lower the electric field strength between the source and drain, thereby improving device stability and breakdown voltage (BV). However, despite the effectiveness of graded AlGaN barrier layers in regulating the electric field distribution and improving the DC characteristics of devices, there is still room for further optimization of electron mobility and electron concentration.

[0005] ScAlN, as a highly polarizable material, can significantly improve the electron gas mobility. Compared with traditional AlGaN, ScAlN has a stronger polarization effect, which can reduce electron concentration and electron scattering, thereby effectively improving the electron velocity and mobility of the device. However, when optimizing electron mobility, traditional single-component ScAlN intercalation layers often cannot simultaneously achieve a uniform distribution of electron concentration, which may lead to problems such as local electric field concentration or non-uniform electron concentration when the device operates at high power. Summary of the Invention

[0006] This invention provides a vertical GaN HEMT with a gradient-component ScAlN insertion layer and its fabrication method, aiming to optimize the device's power performance, electric field distribution, and linearity.

[0007] This invention provides a vertical GaN type employing a gradient-component ScAlN insertion layer. HEMT includes: a substrate having a first surface and a second surface disposed opposite to each other; a GaN buffer layer disposed on the first surface of the substrate; a first current blocking layer region and a second current blocking layer region respectively disposed on the two sides of the buffer layer, extending along the surface of the buffer layer to a certain depth in the buffer layer; a source electrode disposed on a portion of the surface of the first current blocking layer region; a GaN layer disposed on the buffer layer; a gradient composition ScAlN insertion layer disposed on the GaN layer with an Sc composition of 10% to 30%, wherein the Sc composition increases sequentially at equal intervals along the direction from the substrate to the buffer layer; a gradient AlGaN barrier layer disposed on the gradient composition ScAlN insertion layer, wherein the Al composition gradually changes from 40% to 10% along the direction from the substrate to the buffer layer; a cap layer disposed on the gradient AlGaN barrier layer; a gate electrode disposed on the cap layer; the end faces of the GaN layer, the gradient composition ScAlN insertion layer, and the gradient AlGaN barrier layer are connected to the source electrode; a passivation layer disposed on the gradient AlGaN barrier layer, located between the source electrode and the cap layer; and a drain electrode disposed on the second surface of the substrate. The gradient-component ScAlN intercalation layer, through its gradient-varying Sc composition, more precisely controls the distribution of the two-dimensional electron gas, more effectively reduces electron scattering, and improves electron mobility. Especially in high-power environments, it significantly improves device linearity and reduces signal distortion, making it suitable for high-power amplifiers and switching devices. The introduction of the gradient AlGaN barrier layer primarily focuses on optimizing the electric field distribution and breakdown voltage by adjusting the Al composition. The gradient-component ScAlN intercalation layer is positioned between the GaN layer and the gradient AlGaN barrier layer to form a PN junction. Vertical HEMT devices primarily withstand voltage through this internal PN junction, effectively reducing buffer layer leakage and preventing the formation of a high-field region in the GaN area near the gate. This avoids breakdown caused by gate electric field concentration and reduces specific on-resistance, improving device performance. This configuration not only improves the device's DC characteristics, especially in high-power environments, but also solves the linearity bottleneck problem of existing GaN HEMT devices.

[0008] Furthermore, the thickness of the gradient-component ScAlN insertion layer is 2–6 nm. Further, along the direction from the substrate to the GaN buffer layer, the Sc components are successively 16%, 18%, 20%, and 22%, with each Sc component corresponding to a thickness of 1 nm. This ScAlN insertion layer optimizes electron mobility and electron concentration distribution, significantly improving the device's RF performance, especially its excellent performance at high frequencies.

[0009] Furthermore, the Al composition of the graded AlGaN barrier layer gradually changes from 40% to 10% along the direction from the substrate to the GaN buffer layer. This graded AlGaN barrier layer optimizes the DC characteristics of the device, reduces channel resistance, and improves the device's operational stability.

[0010] Furthermore, the thickness of the gradient AlGaN barrier layer is 10–20 nm.

[0011] Furthermore, the current blocking layer is p-type GaN with a thickness of 0.5–1.5 μm and a doping concentration of 1e17–1e19.

[0012] Furthermore, the cap layer is p-type GaN with a thickness of 20–100 nm.

[0013] Furthermore, the substrate is a Si substrate, and an AlN nucleation layer with a thickness of 200 nm to 400 nm is disposed between the Si substrate and the GaN buffer layer.

[0014] Furthermore, the thickness of the GaN buffer layer is 2-8 μm.

[0015] This invention also provides a method for fabricating a vertical GaN HEMT using a gradient-component ScAlN insertion layer, comprising the following steps:

[0016] An AlN nucleation layer and a GaN buffer layer stacked on the AlN nucleation layer are epitaxially grown on the first surface of a Si substrate using a metal-organic chemical vapor deposition process.

[0017] A first p-type GaN current blocking layer region and a second p-type GaN current blocking layer region are formed along the surfaces of both sides of the GaN buffer layer to a certain depth in the GaN buffer layer, respectively.

[0018] GaN layers, gradient composition ScAlN insertion layers, graded AlGaN barrier layers, and p-type GaN cap layers are epitaxially grown sequentially on GaN buffer layers.

[0019] Etching is performed along the surface of the p-type GaN cap layer to the surface of the first p-type GaN current blocking layer region to form a source opening;

[0020] Metal is deposited in the source opening to form a source.

[0021] The surface of the p-type GaN cap layer is etched to the surface of the gradient AlGaN barrier layer to form a passivation layer opening between the source and the cap layer, and then passivation layer material is deposited in the passivation layer opening.

[0022] A metal is deposited on the p-type GaN cap layer to form a gate;

[0023] Metal is deposited on the second surface of the Si substrate to form a drain.

[0024] Furthermore, the first p-type GaN current blocking layer region and the second p-type GaN current blocking layer region are formed using an ion implantation process.

[0025] Compared to existing technologies, the vertical GaN HEMT device of this invention is more suitable for applications in high-voltage, high-power environments. Based on the vertical HEMT device structure, this invention employs an AlGaN barrier layer with a graded Al composition. Between the GaN channel layer and the graded AlGaN barrier layer, a gradient-composed ScAlN insertion layer with a gradient Sc composition is placed. The Sc composition increases sequentially along the direction from the substrate to the buffer layer, optimizing electron mobility and electron concentration distribution, and regulating the electric field distribution. This results in superior device performance in high-power environments, exhibiting a flatter transconductance compared to traditional devices and maintaining better linearity. The device of this invention is more suitable for applications in high-voltage, high-power environments. In this vertical HEMT device, the GaN channel layer, the gradient-composed ScAlN insertion layer, and the graded AlGaN barrier layer form a PN junction to withstand voltage, effectively reducing the leakage current problem of the buffer layer. This prevents the formation of a high-field region in the GaN region near the gate, avoiding breakdown caused by the gate electric field concentration effect, and reducing the specific on-resistance. This design improves the DC characteristics of the device, especially in high-power environments, where linearity is significantly enhanced. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the structure of a vertical GaN HEMT device according to an embodiment of the present invention.

[0027] Figure 2 This is a transconductance diagram of a vertical GaN HEMT device according to an embodiment of the present invention and a conventional vertical GaN HEMT device.

[0028] Figure 3 This is a first-order transconductance diagram of a vertical GaN HEMT device according to an embodiment of the present invention and a conventional vertical GaN HEMT device.

[0029] Figure 4 This is a transconductance second-order diagram of a vertical GaN HEMT device according to an embodiment of the present invention and a conventional vertical GaN HEMT device.

[0030] Figure 5 This is an output characteristic diagram of a vertical GaN HEMT device according to an embodiment of the present invention and a conventional vertical GaN HEMT device. Detailed Implementation

[0031] The technical solutions in the embodiments of the present invention will now be clearly and completely described with reference to the accompanying drawings. The described embodiments are merely some, not all, of the embodiments of the present invention. Other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are all within the scope of protection of the present invention. Unless otherwise specified, the experimental methods described in the following embodiments are conventional methods; the reagents and materials, unless otherwise specified, can be obtained from publicly available commercial channels.

[0032] This specification uses spatially relative terms such as “below,” “under,” “down,” “above,” “above,” and “upper” to explain the positioning of one element relative to a second element. These terms are intended to cover different orientations of the device, except for those different from those shown in the figures.

[0033] Furthermore, the use of terms such as "first" and "second" to describe various elements, layers, regions, and sections is not intended to be restrictive. The use of terms such as "having," "containing," "including," and "comprises" are open-ended terms, indicating the presence of the stated elements or features, but not excluding additional elements or features, unless the context clearly indicates otherwise.

[0034] like Figure 1 As shown, one embodiment of the present invention provides a vertical GaNHEMT employing a gradient composition ScAlN intercalation layer, comprising a substrate 2. In a preferred embodiment, the substrate 2 is a Si substrate. In other embodiments, other suitable substrates may be used, and no specific limitation is made here. The substrate 2 has a first surface and a second surface disposed opposite to each other. An AlN nucleation layer 3 is disposed on the first surface, the thickness of which is 200 nm to 400 nm. A GaN buffer layer 4 is disposed on the AlN nucleation layer 3, the thickness of which is 2 to 8 micrometers.

[0035] p-type GaN current blocking layer regions are set on both sides of the GaN buffer layer, such as Figure 1As shown, the p-type GaN current blocking layer region includes a first current blocking layer region 51 and a second current blocking layer region 52, which extend along the surface of the GaN buffer layer to a certain depth within the buffer layer. Specifically, the thickness of the first and second current blocking layer regions is 0.5 μm to 1.5 μm, and their doping concentration is 1e17 to 1e19. In a preferred embodiment, the thickness of the first current blocking layer region 51 is equal to the thickness of the second current blocking layer region 52; in other embodiments, the thicknesses of the two current blocking layer regions may be unequal. In a preferred embodiment, the current blocking layer region is formed by an ion implantation process. In other embodiments, the regions on both sides of the buffer layer are etched to form openings in the current blocking layer region, and then a p-type GaN layer is epitaxially grown in the openings to form the first current blocking layer region 51 and the second current blocking layer region 52.

[0036] GaN channel layer 6 is disposed on buffer layer 4, with a thickness of 10nm to 20nm, and covers a portion of the first current blocking layer region 51 and the second current blocking layer region 52. Gradient composition ScAlN insertion layer 7 is disposed on GaN layer 6, with a thickness of 2 to 6nm, and Sc composition of 10% to 30%, the composition of Sc increasing in a gradient along the direction from the substrate to the buffer layer; in a preferred embodiment, the composition of Sc along the direction from the substrate to the buffer layer is successively 16%, 18%, 20%, and 22%, and the thickness of each Sc composition is 1nm.

[0037] A gradient AlGaN layer 8 is disposed on the gradient composition ScAlN insertion layer 7, with a thickness of 10–20 nm and an Al composition of 40%–10%, the Al composition gradually decreasing from 40% to 10% along the direction from the substrate to the buffer layer. By placing the gradient composition ScAlN insertion layer between the GaN channel layer and the gradient AlGaN layer, the electron mobility and electron concentration distribution are optimized.

[0038] The cap layer 9 is disposed on the graded AlGaN layer 8, and its thickness is 2nm to 5nm. The cap layer is p-type GaN, and its doping concentration is 1e17 to 1e19.

[0039] Gate 11 is disposed on cap layer 9. Source groove extends along the surface of cap layer to a portion of the surface of the first current blocking layer region, and source 10 is disposed in source groove; the ends of GaN channel layer 6, gradient component ScAlN insertion layer 7 and gradient AlGaN layer 8 are connected to source 10, and passivation layer 12 is disposed between source 10 and cap layer 9, and passivation layer 12 isolates source and gate.

[0040] Drain 1 is disposed on the second surface of substrate 2.

[0041] An embodiment of the present invention provides a method for fabricating the above-described vertical GaN HEMT, comprising the following steps:

[0042] First, a thin layer of Al was grown on a Si substrate using metal-organic chemical vapor deposition (MOCVD). Specifically, the Si substrate was placed in a reaction chamber and heated to 940°C under a N2 atmosphere for 10 minutes to remove the oxide film on the substrate surface. Then, the temperature was increased to 1060°C, and TMAl was introduced for 12 seconds.

[0043] Next, an AlN nucleation layer was grown on a thin Al layer. During growth, TMA was continuously introduced, while NH3 was introduced in a pulsed manner, meaning NH3 was introduced during time T1 and not during time T2. The TMA flow rate was 13 sccm, the NH3 flow rate was 800 sccm, T1 was 12 s, T2 was 6 s, and the growth thickness was 160 nm. The AlN nucleation layer growth was then complete.

[0044] Continue epitaxial growth of a GaN buffer layer on the AlN nucleation layer. The growth temperature is 920℃, the pressure is 40 Torr, the N2 flow rate is 500 sccm, the NH3 flow rate is 5000 sccm, the TMGa flow rate is 220 sccm, and the growth thickness of the buffer layer is 2 μm to 8 μm.

[0045] Next, a mask layer is fabricated on the buffer layer, and a first current blocking layer pattern and a second current blocking layer pattern are etched to form them. The epitaxial growth process described above is then continued, and p-type GaN is epitaxially grown in the regions of the first and second current blocking layer patterns. First and second current blocking layer regions are formed on both sides of the buffer layer. The growth temperature is 920℃, the pressure is 40 Torr, the nitrogen flow rate is 5000 sccm, the ammonia flow rate is 5000 sccm, and the TMGa flow rate is 220 sccm. ICP etching is used, and the coil power and pressure plate power of the system are set to 50W and 15W, respectively.

[0046] In another embodiment, an ion implantation process is used to form a first current blocking layer region and a second current blocking layer region at both edges of the buffer layer.

[0047] Next, the MOCVD process was used to grow a GaN layer with a thickness of 10nm to 20nm on the buffer layer and the current blocking layer as a channel layer. The growth temperature was 920℃, the pressure was 40Torr, the N2 flow rate was 500sccm, the NH3 flow rate was 5000sccm, and the TMGa flow rate was 220sccm.

[0048] A gradient composition ScAlN intercalation layer was grown on the GaN channel layer. The growth temperature was set to 1100℃, and the total growth thickness was 4 nm. N2 was used as the carrier gas, and ScAlN was deposited using a continuously supplied Cp3Sc. The gradient composition ScAlN intercalation layer was obtained by changing the Cp3Sc flow rate. The Sc composition along the direction from the substrate to the top of the buffer layer was 16%, 18%, 20%, and 22%, respectively, with each Sc composition having a thickness of 1 nm.

[0049] Next, a gradient AlGaN barrier layer was grown on the gradient composition ScAlN insertion layer using MOCVD process, with N2, NH3, TMGa and TMA introduced. The growth thickness of the gradient AlGaN layer was 15 nm, and the flow rate of TMA gradually decreased, thus obtaining an AlGaN layer with the molar content of Al element gradually changing from 40% to 10% from bottom to top (along the direction from the substrate to the buffer layer).

[0050] The MOCVD process was continued to grow a 60 nm thick GaN cap layer on a graded AlGaN barrier layer. The growth temperature was 920 °C, the pressure was 40 Torr, the nitrogen flow rate was 5000 sccm, the ammonia flow rate was 5000 sccm, and the TMGa flow rate was 220 sccm.

[0051] Next, the surface of the cap layer is etched down to the surface of the first current blocking layer region to form a source window, which exposes a portion of the surface of the first current blocking layer region. Subsequently, a Ti / Al / Ni / Au metal composite is deposited using electron beam evaporation. The vacuum level is less than 1.8 × 10⁻⁶. -3 Pa, power range of 200–1000 W, evaporation rate of Next, the epitaxial wafer was immersed in acetone solution for 20 minutes, followed by ultrasonic cleaning, rinsing with ultrapure water, and drying with nitrogen to achieve metal stripping. Subsequently, ohmic contact annealing was performed for 30 seconds in a nitrogen atmosphere at 850°C to form the source electrode.

[0052] Next, the cap layer is etched to form a trench with a width of 2 μm and a thickness of 200 nm between the source and gate. Then, SiN is deposited in the trench as a passivation layer using plasma-enhanced chemical vapor deposition at a deposition temperature of 300 °C. The passivation layer on the surface of the cap layer is removed by high-temperature ICP etching.

[0053] Next, a gate window is formed on the cap layer by spin-coating photoresist, soft baking, exposure, and development. Subsequently, a Ti / Al / Ni / Au metal composite is deposited using electron beam evaporation. The vacuum level is less than 1.8 × 10⁻⁶. -3 Pa, power range of 200–1000 W, evaporation rate of After evaporation, the epitaxial wafer is immersed in acetone solution for 20 minutes, then ultrasonically cleaned, rinsed with ultrapure water and dried with nitrogen to finally obtain the gate.

[0054] Next, the epitaxial wafer is inverted, and the drain region is photolithographically etched on the second surface of the substrate. The drain window is then etched, and a Ti / Al / Ni / Au metal combination is deposited using an electron beam evaporation instrument. The Ti / Al / Ni / Au metal combination is then deposited and the drain is formed after peeling and annealing.

[0055] Finally, photolithography was performed on the surface of the epitaxial wafer with the source, drain, and gate electrodes already formed to obtain thickened electrode patterns. Electron beam evaporation was then used to thicken the electrodes, completing the process as follows: Figure 1 The device shown is manufactured.

[0056] Figures 2 to 5 The conventional vertical GaN HEMT device involved in this application is... Figure 1 Based on the device structure shown, there is no ScAlN insertion layer, and the Al composition of the AlGaN layer is fixed. In comparison, [the following is a more detailed description of the device structure]. Figure 2 , 3 As can be seen from point 4, the transconductance of the device of the present invention is flatter and the linearity is better than that of traditional devices. Figure 5 It is evident that the device of this invention has a larger output current, making it more suitable for applications under high voltage and high power conditions.

[0057] The above embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited to the above embodiments. Any changes, modifications, substitutions, combinations, or simplifications made without departing from the spirit and principle of the present invention shall be considered equivalent substitutions and shall be included within the protection scope of the present invention.

Claims

1. A vertical GaN HEMT employing a gradient-component ScAlN insertion layer, characterized in that, include, A substrate having a first surface and a second surface that are arranged opposite to each other; A GaN buffer layer disposed on the first surface of the substrate; The first current blocking layer region and the second current blocking layer region are respectively set at the two sides of the buffer layer, extending along the surface of the buffer layer to a certain depth in the buffer layer. A GaN channel layer, a gradient-component ScAlN insertion layer, a graded AlGaN barrier layer, and a cap layer are sequentially stacked on a buffer layer. The Sc composition of the gradient-component ScAlN insertion layer is 10%~30%, and the Sc composition increases at equal intervals along the direction from the substrate to the buffer layer. The Al composition of the graded AlGaN barrier layer gradually changes from 40% to 10% along the direction from the substrate to the buffer layer. The gate is disposed on the cap layer; A source groove is provided on a portion of the surface from the cap layer to the first current blocking layer region, and the source is disposed in the source groove; The passivation layer is disposed on the surface of the gradient AlGaN barrier layer and is located between the source and the gate. The drain is disposed on the second surface of the substrate.

2. The vertical GaN HEMT device according to claim 1, characterized in that, The thickness of the gradient component ScAlN insertion layer is 2~6 nm.

3. The vertical GaN HEMT device according to claim 2, characterized in that, Along the direction from the substrate to the GaN buffer layer, the Sc components are 16%, 18%, 20%, and 22% respectively, and the thickness of a single Sc component is 1 nm.

4. The vertical GaN HEMT device according to any one of claims 1 to 3, characterized in that, The thickness of the gradient AlGaN barrier layer is 10~20nm.

5. The vertical GaN HEMT device according to claim 4, characterized in that, The current blocking layer is p-type GaN with a thickness of 0.5~1.5μm.

6. The vertical GaN HEMT device according to claim 5, characterized in that, The cap layer is p-type GaN with a thickness of 20~100nm.

7. The vertical GaN HEMT device according to claim 4 or 5, characterized in that, The substrate is a Si substrate.

8. The vertical GaN HEMT device according to claim 7, characterized in that, An AlN nucleation layer is also disposed between the Si substrate and the GaN buffer layer.

9. A method for fabricating a vertical GaN HEMT employing a gradient-component ScAlN intercalation layer, characterized in that, Includes the following steps: An AlN nucleation layer and a GaN buffer layer stacked on the AlN nucleation layer are epitaxially grown on the first surface of a Si substrate using a metal-organic chemical vapor deposition process. A first p-type GaN current blocking layer region and a second p-type GaN current blocking layer region are formed along the surfaces of both sides of the GaN buffer layer to a certain depth in the GaN buffer layer, respectively. GaN layers, gradient composition ScAlN insertion layers, graded AlGaN barrier layers, and p-type GaN cap layers are epitaxially grown sequentially on GaN buffer layers. Etching is performed along the surface of the p-type GaN cap layer to the surface of the first p-type GaN current blocking layer region to form a source opening; Metal is deposited in the source opening to form a source. The surface of the p-type GaN cap layer is etched to the surface of the gradient AlGaN barrier layer to form a passivation layer opening between the source and the cap layer, and then passivation layer material is deposited in the passivation layer opening. A metal is deposited on the p-type GaN cap layer to form a gate; Metal is deposited on the second surface of the Si substrate to form a drain.

10. The preparation method according to claim 9, characterized in that, The first p-type GaN current blocking layer region and the second p-type GaN current blocking layer region are formed by ion implantation.

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