Independent pixel infrared focal plane device and preparation method thereof
By separate the cells of the focal plane detector independently and using a combination of epoxy glue and transparent electrodes, the mechanical stress and crosstalk problems of the focal plane detector during operation are solved, lower structural stress and crosstalk are achieved, and efficient preparation of large-scale small-cell infrared focal detectors is supported.
Patent Information
- Application Number
- CN202510027850.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-08
- Publication Date
- 2025-05-23
AI Technical Summary
When the focal plane detector is working, the mechanical stress caused by the thermal expansion and contraction of the material can easily cause chip cracks and crosstalk between the cells.
All cells in the semiconductor focal plane array are completely separated, connected by a silicon readout circuit and metal electrode, filled with epoxy glue and covered with transparent electrodes, reducing structural stress and reducing crosstalk between cells.
It greatly reduces the structural stress of the semiconductor focal plane array, reduces cracks during cooling, and reduces crosstalk between cells, laying the foundation for the low-cost and high-efficiency preparation of large-scale infrared focal plane detectors.
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Figure CN120035239A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of infrared focal plane detector preparation in semiconductor technology, and specifically discloses an infrared focal plane device with independent pixels and a preparation method thereof. Background Art
[0002] In order to improve the system's spatial resolution and other performance, focal plane detector chips have been developing towards large-scale sizes. However, large-scale sizes will not only cause material cracks, but also lead to increased system power consumption and costs. In order to reduce system power consumption and costs, focal plane detector chips need to develop towards small pixel sizes, and small pixel sizes will cause crosstalk between pixels.
[0003] The structure and working conditions of the focal plane detector determine that the chip will be loaded with stress when working. The wafer with a table and the silicon readout circuit are interconnected, and the middle is filled with filler. The focal plane array structure is installed on the Dewar cold head. Since there is a temperature difference of more than 200°C between the temperature at which the structure is formed (higher than room temperature) and the working temperature (liquid nitrogen temperature), various materials will shrink, and the thermal expansion coefficients of these parts are also very different. The difference in the shrinkage coefficient of the material will inevitably load mechanical stress on the detector chip when the detector is working. The chip is very thin, and the horizontal contraction is constrained by the readout circuit, and is subject to the lateral tensile force applied by the overall readout circuit. In the vertical direction, due to the shrinkage of the filler, it is supported by the indium column, which will apply local shear force and torsion to the chip. When the chip is in a normal state, the stress is evenly distributed, does not exceed the fracture strength, and will not cause failure. When the external stress of the chip is too large or the internal stress is concentrated, it is possible that the local stress exceeds the fracture strength, brittle fracture occurs, and cracks are formed.
[0004] The crosstalk between the normal detection units of the focal plane detector and the surrounding detection units is called crosstalk. The main reason for the crosstalk is the lateral diffusion of photogenerated carriers between adjacent detection units of the focal plane detector. Therefore, the crosstalk between adjacent detection units of the traditional table-shaped focal plane detector is unavoidable.
[0005] Traditional table-structure devices reduce cracks and crosstalk by optimizing the process. By optimizing the structural design and strengthening the process control, the crack failure of the focal plane chip when working at low temperature can be suppressed, and the crosstalk between the pixels of the focal plane chip can be reduced, but it cannot be fundamentally avoided. Therefore, designing a new structure to realize the preparation of large-scale small-pixel infrared focal plane detectors at low cost and high efficiency is a key research direction. Summary of the invention
[0006] In order to solve the problems in the background technology, the present invention discloses an infrared focal plane device with independent pixels and a preparation method thereof, which completely and independently separates all pixels in a semiconductor focal plane array, can greatly reduce the structural stress of the semiconductor focal plane array, reduce cracks generated by the chip during cooling, and reduce crosstalk between pixels, laying a foundation for low-cost and high-efficiency preparation of large-scale small-pixel infrared focal plane detectors.
[0007] In order to achieve the above-mentioned invention object, the present invention adopts the following technical scheme: An infrared focal plane device with independent pixels comprises a silicon readout circuit and a semiconductor focal plane array, wherein the semiconductor focal plane array comprises a plurality of independently arranged pixels, wherein the silicon readout circuit and the metal electrodes of the corresponding pixels are connected via indium columns, wherein the metal electrodes and the indium columns are wrapped with epoxy glue, wherein a passivation layer is wrapped around the periphery of the pixels, wherein a window is arranged on the side of the passivation layer facing away from the silicon readout circuit, and wherein a transparent electrode is wrapped outside the passivation layer.
[0008] Furthermore, in the infrared focal plane device of the independent pixel, adjacent pixels in the semiconductor focal plane array are completely separated by photolithography or etching.
[0009] Furthermore, the material of the infrared focal plane device of the independent pixel and the semiconductor focal plane array is InSb, HgCdTe, InAsSb or superlattice material.
[0010] Furthermore, in the infrared focal plane device of the independent pixel, the material of the transparent electrode is a conductive material that can transmit infrared.
[0011] Furthermore, in the infrared focal plane device of the independent pixel, the material of the transparent electrode is graphene, a thin platinum electrode, ITO or molybdenum disulfide.
[0012] Furthermore, in the infrared focal plane device of the independent pixel, the transparent electrode is prepared by evaporation, sputtering, CVD or transfer method.
[0013] A method for preparing an independent pixel infrared focal plane device, used for preparing any of the independent pixel infrared focal plane devices described above, comprising the following steps: 1) According to the required array scale and pixel size, the required silicon readout circuit with indium pillars is prepared by photolithography, etching or stripping process, and the required infrared focal plane chip with indium pillars is prepared by coating, photolithography, etching or stripping process; 2) Flip-chip interconnecting the silicon readout circuit with indium pillars prepared in step 1) and the infrared focal plane chip; 3) Filling the flip-chip interconnected focal plane chip obtained in step 2) with epoxy glue; 4) thinning and polishing the side of the focal plane chip filled with epoxy obtained in step 3) facing away from the silicon readout circuit; 5) performing post-photolithography etching or etching on the thinned and polished focal plane chip obtained in step 4) to form a plurality of independent pixels; 6) preparing a passivation layer on the etched focal plane chip obtained in step 5), and etching or etching the side of the passivation layer facing away from the silicon readout circuit after photolithography to form a passivation window; 7) A transparent electrode is prepared on the surface of the focal plane chip obtained in step 6) by evaporation, sputtering, CVD or transfer method. The transparent electrode can serve as a common electrode and can also achieve infrared light transmission.
[0014] Compared with the prior art, the present invention has the following beneficial effects: The independent pixel infrared focal plane device of the present invention comprises a silicon readout circuit and a semiconductor focal plane array, wherein the semiconductor focal plane array comprises a plurality of independently arranged pixels, wherein the silicon readout circuit and the metal electrodes of the corresponding pixels are connected via an indium column, wherein the metal electrodes and the indium column are wrapped with epoxy glue, wherein a passivation layer is wrapped around the periphery of the pixel, wherein a window is arranged on the side of the passivation layer facing away from the silicon readout circuit, and wherein a transparent electrode is wrapped around the passivation layer. In the independent pixel infrared focal plane device of the present invention, all pixels in the semiconductor focal plane array are completely independently and separately arranged, thereby greatly reducing the structural stress of the semiconductor focal plane array, reducing cracks generated by the chip during cooling, and reducing crosstalk between pixels, thereby laying a foundation for the low-cost and high-efficiency preparation of large-scale small-pixel infrared focal plane detectors; The preparation method of the infrared focal plane device of the independent pixel of the present invention abandons the original method of making the focal plane array table. First, a metal electrode is made on the semiconductor material and an indium column is grown. It is connected with a silicon readout circuit of the same scale by a high-precision flip soldering machine, and the gap is filled with epoxy glue; then the semiconductor material is thinned and polished, each pixel is etched and separated, and then passivation treatment is performed, and a window is opened to make a transparent conductive electrode. This method has achieved extremely good results in significantly reducing the working stress and crack failure of the focal plane chip. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.
[0016] Figure 1 It is a schematic structural diagram of an infrared focal plane device with independent pixels of the present invention; Figure 2 It is a schematic diagram of the preparation process of the infrared focal plane device with independent pixels of the present invention; In the above figure: 1-silicon readout circuit; 2-semiconductor focal plane array; 3-metal electrode; 4-indium column; 5-epoxy glue; 6-passivation layer; 7-transparent electrode. DETAILED DESCRIPTION
[0017] In order to better understand the present invention, the content of the present invention is further clearly set forth in conjunction with the embodiments below, but the protection content of the present invention is not limited to the following embodiments. In the following description, a large number of specific details are provided in order to provide a more thorough understanding of the present invention. However, it is obvious to those skilled in the art that the present invention can be implemented without one or more of these details.
[0018] Combined with Figure 1 , the present invention describes in detail an infrared focal plane device with independent pixels, including a silicon readout circuit 1 and a semiconductor focal plane array 2, the semiconductor focal plane array 2 includes a plurality of independently arranged pixels, the silicon readout circuit 1 and the metal electrode 3 of the corresponding pixel are connected through an indium column 4, the metal electrode 3 and the indium column 4 are wrapped with epoxy glue 5, a passivation layer 6 is wrapped around the periphery of the pixel, a window is arranged on the side of the passivation layer 6 facing away from the silicon readout circuit 1, and a transparent electrode 7 is wrapped outside the passivation layer 6.
[0019] As an optional design, the infrared focal plane device of the independent pixel is preferred, and the adjacent pixels in the semiconductor focal plane array 2 are completely separated by photolithography or etching.
[0020] As an optional design, the infrared focal plane device of the independent pixel is preferably used, and the material of the semiconductor focal plane array is InSb, HgCdTe, InAsSb or superlattice material.
[0021] As an optional design, the infrared focal plane device of the independent pixel is preferably made of a conductive material that is infrared-transmissive.
[0022] As an optional design, the infrared focal plane device of the independent pixel is preferably used, and the material of the transparent electrode 7 is graphene, a thin platinum electrode, ITO or molybdenum disulfide.
[0023] As an optional design, the infrared focal plane device of the independent pixel is preferred, and the transparent electrode 7 is prepared by evaporation, sputtering, CVD or transfer method.
[0024] A method for preparing an independent pixel infrared focal plane device, used to prepare an independent pixel infrared focal plane device as described in any one of the above, such as Figure 2 , comprising the following steps: 1) According to the required array scale and pixel size, the required silicon readout circuit 1 with indium pillar 4 is prepared by photolithography, etching or stripping process, and the required infrared focal plane chip with indium pillar 4 is prepared by coating, photolithography, etching or stripping process; 2) Flip-chip interconnecting the silicon readout circuit 1 with the indium pillar 4 prepared in step 1) and the infrared focal plane chip; 3) Filling the flip-chip interconnected focal plane chip obtained in step 2) with epoxy glue 5; 4) thinning and polishing the side of the focal plane chip filled with epoxy glue 5 obtained in step 3) facing away from the silicon readout circuit 1; 5) performing post-photolithography etching or corrosion on the thinned and polished focal plane chip obtained in step 4) to form a plurality of independent pixels; 6) preparing a passivation layer 6 on the etched focal plane chip obtained in step 5), and etching or etching the side of the passivation layer 6 facing away from the silicon readout circuit 1 after photolithography to form a passivation window; 7) A transparent electrode 7 is prepared on the surface of the focal plane chip obtained in step 6) by evaporation, sputtering, CVD or transfer method. The transparent electrode 7 can serve as a common electrode and can also achieve infrared light transmission. Embodiment 1
[0025] Step 1: Select a silicon readout circuit with an array size of 640×512 and a pixel center distance of 15μm. The thickness of the silicon readout circuit is about 650μm. Use a coating machine to evaporate a chromium / gold double-layer film with a thickness of 500nm. Use photolithography and etching to form a metal electrode, and then photolithograph an indium column pattern. Use an indium evaporation coating machine to evaporate an indium film with a thickness of 7μm. Use a lift-off method to form an indium column array; The infrared focal plane chip uses InSb material with a thickness of 500μm. A pn junction is formed by diffusion or ion implantation, and then a chromium / gold double-layer film with a thickness of 500nm is evaporated by a coating machine. According to the pattern size of the array scale of 640×512 and the pixel center distance of 15μm, the electrode array is etched, and an indium column pattern is photoetched at the corresponding position. An indium film is evaporated by an indium evaporation coating machine to form an indium film with a thickness of 7μm. The indium column array is formed by a lift-off method. Step 2: Use a high-precision flip-chip soldering machine to perform flip-chip interconnection between the silicon readout circuit with indium pillars and the infrared focal plane chip; Step 3: Fill and cure the focal plane chip with epoxy glue after flip-chip interconnection; Step 4: Thin the InSb chip to about 10 μm by thinning and polishing; Step 5: Photolithography is performed on the thinned surface, and attention is paid to aligning with the pixel of the silicon readout circuit. The InSb material is etched to the bottom by ICP dry etching to ensure that each pixel is separated independently; Step 6: Using Chemical Vapor Deposition SiO 2 As a passivation film, and after photolithography, etching to open a window; Step 7: Use a transfer method to transfer graphene to the surface of the component to form a common electrode. Embodiment 2
[0026] The difference from the first embodiment is that in step 1, the infrared focal plane chip uses superlattice material, in the thinning and polishing process in step 4, the GaSb substrate is completely removed by chemical etching, and the electrode in step 7 is prepared by sputtering as a thin platinum electrode. Embodiment 3
[0027] The difference from the first embodiment is that the infrared focal plane chip in step 1 is made of InAsSb material, the substrate is completely removed by chemical etching in the thinning and polishing process in step 4, and the electrode in step 7 is made of ITO electrode by CVD. Embodiment 4
[0028] The difference from Example 1 is that in step 1, the infrared focal plane chip is made of HgCdTe material, in the thinning and polishing process in step 4, the substrate is completely removed by chemical etching, and the electrode in step 7 is prepared by a transfer method to form a molybdenum disulfide electrode.
[0029] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Other modifications or equivalent substitutions made to the technical solution of the present invention by ordinary technicians in the field should be included in the scope of the claims of the present invention as long as they do not depart from the spirit and scope of the technical solution of the present invention.
Claims
1. An infrared focal plane device with independent pixels, comprising a silicon readout circuit and a semiconductor focal plane array, characterized in that: The semiconductor focal plane array includes a plurality of independently arranged picture elements, the silicon readout circuit and the metal electrode of the corresponding picture element are connected through an indium column, the metal electrode and the indium column are wrapped with epoxy glue, a passivation layer is wrapped around the periphery of the picture element, a window is arranged on the side of the passivation layer facing away from the silicon readout circuit, and a transparent electrode is wrapped outside the passivation layer.
2. The infrared focal plane device with independent pixels according to claim 1, characterized in that: Adjacent pixels in a semiconductor focal plane array are completely separated by photolithography or etching.
3. The infrared focal plane device with independent pixels according to claim 2, characterized in that: The semiconductor focal plane array is made of InSb, HgCdTe, InAsSb or superlattice material.
4. The infrared focal plane device with independent pixels according to claim 3, characterized in that: The material of the transparent electrode is a conductive material that can transmit infrared light.
5. The infrared focal plane device with independent pixels according to claim 4, characterized in that: The transparent electrode is made of graphene, thin platinum electrode, ITO or molybdenum disulfide.
6. The infrared focal plane device with independent pixels according to claim 4, characterized in that: The transparent electrode is prepared by evaporation, sputtering, CVD or transfer method.
7. A method for preparing an independent pixel infrared focal plane device, used for preparing the independent pixel infrared focal plane device as claimed in any one of claims 1 to 6, characterized in that: The steps include: 1) According to the required array scale and pixel size, the required silicon readout circuit with indium pillars is prepared by photolithography, etching or stripping process, and the required infrared focal plane chip with indium pillars is prepared by coating, photolithography, etching or stripping process; 2) Flip-chip interconnecting the silicon readout circuit with indium pillars prepared in step 1) and the infrared focal plane chip; 3) Filling the flip-chip interconnected focal plane chip obtained in step 2) with epoxy glue; 4) thinning and polishing the side of the focal plane chip filled with epoxy obtained in step 3) facing away from the silicon readout circuit; 5) performing post-photolithography etching or etching on the thinned and polished focal plane chip obtained in step 4) to form a plurality of independent pixels; 6) preparing a passivation layer on the etched focal plane chip obtained in step 5), and etching or etching the side of the passivation layer facing away from the silicon readout circuit after photolithography to form a passivation window; 7) A transparent electrode is prepared on the surface of the focal plane chip obtained in step 6) by evaporation, sputtering, CVD or transfer method.