Display panel

Abstract

Provided is a display panel having an enlarged display area such that an image can be displayed in a sensor area. The display panel includes: a first base layer including a display area including a plurality of main pixels and a sensor area including a transmissive portion and a plurality of auxiliary pixels; a conductive layer on the first base layer and corresponding to the plurality of auxiliary pixels; and the second substrate layer is located on the first substrate layer, and the conductive layer is located between the second substrate layer and the first substrate layer. A resolution of an image displayed by the sensor area is lower than a resolution of an image displayed by the display area.

Description

[0001] This application is a divisional application of a patent application with an application date of January 16, 2020, application number 202010045007.0, and invention name “Display Panel”. Technical Field

[0002] One or more embodiments relate to a display device, and more particularly, to a display device having an expanded display area so that an image can be presented in a sensor area. Background Art

[0003] Recently, the use of display devices has become diversified. In particular, the thickness and weight of display devices have been reduced, thus increasing their range of use.

[0004] Since the display device is used in various ways, there may be various methods of designing the shape of the display device. In addition, a function of combining a display device with another display device or connecting a display device to another display device has been added. Summary of the invention

[0005] One or more embodiments include a display device having a sensor area in which a sensor or the like is placed inside the display area, so that a function of combining or connecting the display device with another display device can be added.

[0006] According to one or more embodiments, a display panel includes: a first base layer, including a display area and a sensor area, the display area including a plurality of main pixels, the sensor area including a transmission part and a plurality of auxiliary pixels; a conductive layer, located on the first base layer and corresponding to the plurality of auxiliary pixels; and a second base layer, located on the first base layer, the conductive layer being located between the second base layer and the first base layer, wherein a resolution of an image displayed by the sensor area is lower than a resolution of an image displayed by the display area.

[0007] The conductive layer may have a thickness of 1500Å or greater.

[0008] The display panel may further include: a first inorganic barrier layer located between the first base layer and the second base layer; and a second inorganic barrier layer located on the second base layer, wherein the conductive layer may be located between the first inorganic barrier layer and the second base layer.

[0009] The first base layer and the second base layer may include an organic material and may be flexible.

[0010] The sensor area may include an auxiliary pixel area and a transmission area, one or more auxiliary pixels are located in the auxiliary pixel area, the transmission part is located in the transmission area, and the auxiliary pixel area and the transmission area may be arranged in a grid form.

[0011] The conductive layer may correspond to the auxiliary pixel region.

[0012] The display panel may further include: a first wiring electrically connected to the auxiliary pixel and extending in a first direction; and a second wiring extending in a second direction crossing the first direction, wherein the conductive layer may be electrically connected to the first wiring or the second wiring via a contact hole.

[0013] The contact hole may be formed in the non-display area outside the display area.

[0014] The auxiliary pixel may include a first thin film transistor including a first semiconductor layer and a second thin film transistor including a second semiconductor layer, and the conductive layer may overlap the first semiconductor layer but not the second semiconductor layer.

[0015] The first base layer may include a glass material, and the second base layer may include an organic material.

[0016] The thickness of the first base layer may be greater than the thickness of the second base layer.

[0017] The auxiliary pixel may include a common electrode facing the pixel electrode and an intermediate layer between the pixel electrode and the common electrode, and the common electrode may have an opening corresponding to the transmission portion.

[0018] According to one or more embodiments, a display device includes: a first substrate layer, including a display area and a sensor area, the display area including a plurality of main pixels, the sensor area including a transmission part and a plurality of auxiliary pixels; a conductive layer, located on the first substrate layer and corresponding to the plurality of auxiliary pixels; a second substrate layer, located on the first substrate layer, the conductive layer being located between the second substrate layer and the first substrate layer; and a component, located under the first substrate layer and corresponding to the sensor area.

[0019] Components may include electronic components that transmit or receive light.

[0020] The conductive layer may have a thickness of 1500Å or greater.

[0021] The sensor area may include an auxiliary pixel area and a transmission area, one or more auxiliary pixels are located in the auxiliary pixel area, the transmission part is located in the transmission area, and the auxiliary pixel area and the transmission area may be arranged in a grid form.

[0022] The first substrate layer and the second substrate layer may include organic materials, and the display device may also include a first inorganic barrier layer and a second inorganic barrier layer, the first inorganic barrier layer is located between the first substrate layer and the second substrate layer, the second inorganic barrier layer is located on the second substrate layer, and the conductive layer may be located between the first inorganic barrier layer and the second substrate layer.

[0023] The first base layer may include a glass material, the second base layer may include an organic material, and the display device may further include a buffer layer on the second base layer.

[0024] The resolution of the image displayed by the sensor area may be lower than the resolution of the image displayed by the display area.

[0025] According to one or more embodiments, the display panel includes: a first substrate layer including a display area and a sensor area, the display area including a plurality of main pixels, the sensor area including a transmission part and a plurality of auxiliary pixels; a conductive layer located on the first substrate layer and corresponding to the plurality of auxiliary pixels; and a second substrate layer located on the first substrate layer, the conductive layer being located between the second substrate layer and the first substrate layer, wherein the sensor area includes an auxiliary pixel area and a transmission area, one or more auxiliary pixels are located in the auxiliary pixel area, the transmission part is located in the transmission area, and the auxiliary pixel area and the transmission area are arranged in a grid. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 is a perspective view of a display device according to an embodiment.

[0027] Figure 2 is a cross-sectional view of a display device according to an embodiment.

[0028] Figure 3 is a cross-sectional view of a display device according to another embodiment.

[0029] Figure 4 is a plan view of a display panel according to an embodiment, Figure 5 yes Figure 4 An enlarged plan view of the sensor area shown in FIG.

[0030] Figure 6 is an equivalent circuit diagram of a pixel according to the embodiment.

[0031] Figure 7 is an equivalent circuit diagram of a pixel according to another embodiment.

[0032] Figures 8 to 11 is a cross-sectional view of a stack structure included in a display panel according to an embodiment.

[0033] Fig.12 and Fig.13 is a cross-sectional view of a stack structure included in a display panel according to an embodiment.

[0034] Figures 14 to 16 is a cross-sectional view of a stack structure included in a display panel according to other embodiments. DETAILED DESCRIPTION

[0035] Reference will now be made in detail to exemplary embodiments, examples of which are shown in the accompanying drawings, wherein like reference numerals may represent like elements throughout. In this regard, exemplary embodiments may have different forms and should not be construed as being limited to the descriptions set forth herein.

[0036] Hereinafter, those components that are the same or correspond may be identified by the same reference numerals regardless of the figure numbers, and redundant descriptions of these components may be omitted.

[0037] It will be understood that when a layer, a region, or a component is referred to as being “formed on” another layer, region, or component, the layer, region, or component may be directly or indirectly formed on the other layer, region, or component.

[0038] The sizes of elements in the drawings may be exaggerated for convenience of explanation.

[0039] Figure 1 is a perspective view of a display device according to an embodiment.

[0040] Reference Figure 1 According to an embodiment, the display device 1 includes a display area DA in which an image is displayed and a non-display area NDA in which no image is displayed. The display device 1 displays an image using light emitted from a plurality of primary pixels Pm placed in the display area DA.

[0041] According to an embodiment, the display device 1 includes a sensor area SA. Figure 2 As described, the sensor area SA is an area surrounded by the display area DA, and a component such as a sensor using infrared light (IR), visible light, or sound is disposed in the sensor area SA. The sensor area SA includes a transmissive portion TA through which light or sound is transmitted. Light or sound may be output from the component, or may be propagated toward the component from an external source. In an embodiment, when IR light is transmitted through the sensor area SA, the transmittance may be about 10% or more, more specifically, about 20% or more, about 25% or more, about 50% or more, about 85% or more, or about 90% or more.

[0042] In the present embodiment, a plurality of auxiliary pixels Pa are located in the sensor area SA, and an image may be displayed from the sensor area SA using light emitted from the plurality of auxiliary pixels Pa. The image displayed from the sensor area SA has a resolution lower than that of the image displayed from the display area DA. That is, since the sensor area SA includes the transmissive portion TA through which light or sound may propagate, the number of auxiliary pixels Pa that may be provided per unit area in the display area DA is less than the number of primary pixels Pm provided per unit area.

[0043] According to an embodiment, the sensor area SA is at least partially surrounded by the display area DA. In an embodiment, Figure 1 The sensor area SA is shown being completely surrounded by the display area DA.

[0044] Hereinafter, according to an embodiment, an organic light emitting display device is used as the display device 1. However, the display device according to the embodiment is not limited thereto. In other embodiments, other types of display devices such as an inorganic electroluminescent (EL) display device, a quantum dot light emitting display device, etc. may be used.

[0045] exist Figure 1 In the embodiment, the sensor area SA is at one side (upper right side) of the rectangular display area DA. However, the embodiment is not limited thereto. The shape of the display area DA may be circular, elliptical, or polygonal (eg, triangular or pentagonal), etc., and the position and number of the sensor areas SA may vary.

[0046] Figure 2 is a cross-sectional view of a display device according to an embodiment. Figure 2 Along with Figure 1 Corresponding to the cross section taken by line A-A'.

[0047] Reference Figure 2 According to an embodiment, a display device 1 includes a display panel 10 including a display element and an assembly 20 located under the display panel 10 and corresponding to a sensor area SA.

[0048] According to an embodiment, the display panel 10 includes a substrate 100, a display element layer 200 located on the substrate 100, and a thin film encapsulation layer 300 located on the display element layer 200 and sealing the display element layer 200. In addition, the display device 1 further includes a lower protective film 175 located under the substrate 100.

[0049] According to an embodiment, the substrate 100 includes a first base layer SL1, a first barrier layer BL1, a second base layer SL2, and a second barrier layer BL2. The second base layer SL2 is stacked on the first base layer SL1, and the first barrier layer BL1 is disposed between the first base layer SL1 and the second base layer SL2. The second barrier layer BL2 is disposed on the second base layer SL2. In addition, as shown in FIG. Figure 8 As shown in FIG. 8 , a buffer layer may be disposed on the second barrier layer BL2 .

[0050] According to an embodiment, the first base layer SL1 and the second base layer SL2 include a polymer resin. Since the first base layer SL1 and the second base layer SL2 include a polymer resin, the substrate 100 is flexible, rollable or bendable. The polymer resin includes polyethersulfone (PES), polyacrylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate, polyimide (PI), polycarbonate (PC) or cellulose acetate propionate (CAP).

[0051] In an embodiment, the first base layer SL1 and the second base layer SL2 may include the same polymer resin. In another embodiment, the first base layer SL1 and the second base layer SL2 may include different polymer resins.

[0052] According to an embodiment, the first barrier layer BL1 and the second barrier layer BL2 include an inorganic insulating material. For example, the inorganic insulating material includes silicon oxide (SiO 2 )、Silicon Nitride(SiN x ) or silicon oxynitride (SiON). The first barrier layer BL1 and the second barrier layer BL2 are respectively located on the upper surfaces of the first base layer SL1 and the second base layer SL2.

[0053] According to an embodiment, the display element layer 200 includes a circuit layer including a plurality of thin film transistors (TFTs) such as a main TFT TFTm and an auxiliary TFT TFTa and an organic light emitting diode (OLED) as a display element, and an insulating layer IL therebetween.

[0054] According to an embodiment, a main pixel Pm including a main TFT TFTm and an OLED connected thereto is located in the display area DA, and an auxiliary pixel Pa including an auxiliary TFT TFTa and an OLED connected thereto and related wirings is located in the sensor area SA.

[0055] In addition, according to an embodiment, the auxiliary TFT TFTa and the transmissive portion TA in which the display element is not placed are located in the sensor area SA. The transmissive portion TA is a region through which light or signals emitted from or incident on the component 20 can propagate.

[0056] According to an embodiment, the component 20 is placed in the sensor area SA. The component 20 is an electronic component that uses light or sound. For example, the component 20 may be a sensor that receives and uses light (such as an IR sensor), a sensor that outputs and detects light or sound to measure distance or recognize fingerprints, a small lamp that outputs light, or a speaker that outputs sound. In the case of an electronic component using light, light of various wavelengths (such as visible light, IR light, or ultraviolet (UV) light) may be used. A plurality of components 20 are provided in the sensor area SA. For example, the component 20 may include a light emitting device and a light receiving device in one sensor area SA. Alternatively, the light emitting device and the light receiving device may be combined in one component 20 at the same time.

[0057] In the present embodiment, the conductive layer BSM is located in the sensor area SA. The conductive layer BSM corresponds to the auxiliary pixel Pa in the sensor area SA. Specifically, the conductive layer BSM corresponds to the lower portion of the auxiliary TFT TFTa. The conductive layer BSM prevents light emitted from the component 20 from reaching the auxiliary pixel Pa and the auxiliary TFT TFTa.

[0058] According to an embodiment, a constant voltage or signal is transmitted to the conductive layer BSM to prevent damage to the pixel circuit due to electrostatic discharge. In addition, the conductive layer BSM is connected to the auxiliary pixel Pa and is electrically in contact with the wiring that transmits power or signals, so that a constant voltage or signal can be transmitted to the conductive layer BSM.

[0059] According to an embodiment, the thin film encapsulation layer 300 includes at least one inorganic encapsulation layer and at least one organic encapsulation layer. In this regard, Figure 2 A first inorganic encapsulating layer 310 and a second inorganic encapsulating layer 330 and an organic encapsulating layer 320 between the first inorganic encapsulating layer 310 and the second inorganic encapsulating layer 330 are shown.

[0060] According to an embodiment, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 include one or more inorganic insulating materials, such as aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, or silicon oxynitride. The organic encapsulation layer 320 includes a polymer material. The polymer material includes polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polycarbonate (PC), PI, polyether sulfonate, polyoxymethylene, polyarylate, hexamethyldisiloxane (HMDSO), acrylic resin (such as polymethyl methacrylate, polyacrylic acid, etc.) or any combination thereof.

[0061] According to an embodiment, the lower protective film 175 is attached to the lower portion of the substrate 100 and supports and protects the substrate 100. The lower protective film 175 includes an opening 175OP corresponding to the sensor area SA. The opening 175OP is formed in the lower protective film 175 to improve the light transmittance of the sensor area SA. The lower protective film 175 may include PET or PI.

[0062] According to an embodiment, the area of ​​the sensor region SA is larger than the area occupied by the component 20. Figure 2 In the embodiment, the area of ​​the sensor area SA and the opening 175OP are the same. However, the embodiment is not limited thereto, and in other embodiments, the area of ​​the opening 175OP in the lower protective film 175 is different from the area of ​​the sensor area SA. For example, the area of ​​the opening 175OP may be smaller than the area of ​​the sensor area SA.

[0063] In addition, according to an embodiment, other elements such as an input sensing member that senses a touch input, an anti-reflection member including a polarizer, a retarder, or a color filter, a black matrix, or a transparent window are also provided on the display panel 10 .

[0064] In the present embodiment, the thin film encapsulation layer 300 is used as an encapsulation or sealing member for sealing the display element layer 200. However, the embodiment is not limited thereto. For example, a sealing substrate combined with the substrate 100 may be used to seal the display element layer 200 using a sealant or glass frit.

[0065] Figure 3 is a cross-sectional view of a display device according to another embodiment.

[0066] According to an embodiment, Figure 3 The display device 1' is similar to the display device 1' in terms of the structure of the substrate 100'. Figure 2 The display device 1 is different from the other structures. Figure 2 Therefore, redundant descriptions of the other configurations are omitted, and the substrate 100' will be described.

[0067] According to an embodiment, the substrate 100' includes a first base layer SL1 and a second base layer SL2. The second base layer SL2 is located on the first base layer SL1.

[0068] In the present embodiment, the first base layer SL1 and the second base layer SL2 include different materials. The first base layer SL1 includes a glass material, and the second base layer SL2 includes an organic insulating material. For example, the organic insulating material includes a general polymer (such as benzocyclobutene (BCB), PI, HMDSO, polymethyl methacrylate (PMMA) or PS), a polymer derivative including a phenolic group, an acrylic polymer, an imide polymer, an aromatic ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, a vinyl alcohol polymer or a blend thereof.

[0069] According to an embodiment, the first base layer SL1 is a rigid substrate formed of a glass material. The conductive layer BSM is located on the first base layer SL1, and the second base layer SL2 is located on the conductive layer BSM and planarizes a top surface of the conductive layer BSM.

[0070] According to an embodiment, the conductive layer BSM corresponds to the auxiliary pixel Pa in the sensor area SA. Specifically, the conductive layer BSM corresponds to the lower portion of the auxiliary TFT TFTa. Figure 3 In the embodiment, the conductive layer BSM is directly located on the first base layer SL1. In another embodiment, an inorganic layer such as a buffer layer is located on the first base layer SL1, and the conductive layer BSM is located on the inorganic layer.

[0071] According to an embodiment, the conductive layer BSM prevents light emitted from the component 20 from reaching the auxiliary pixel Pa and the auxiliary TFT TFTa. A constant voltage or signal is transmitted to the conductive layer BSM to prevent damage to the pixel circuit due to electrostatic discharge.

[0072] According to an embodiment, Figure 2 and Figure 3 The conductive layer BSM shown in has a thickness of about 1500Å or greater. In an embodiment, the conductive layer BSM has a thickness of 800Å or greater, 1000Å or greater, 1500Å or greater, or 2000Å or greater. These thicknesses depend on the functions and effects of the conductive layer BSM described above. In order to prevent the light emitted from the component 20 from reaching the auxiliary pixel Pa, the conductive layer BSM has a minimum thickness of 1500Å. When the thickness of the conductive layer BSM is less than 1500Å, the light emitted from the component 20 is not completely blocked.

[0073] In the comparative example, when an inorganic layer (such as a buffer layer or an inorganic barrier layer) is located on the conductive layer BSM, cracks may appear in the inorganic layer at the stepped portion of the conductive layer BSM due to the thickness of the conductive layer BSM. These cracks propagate into the upper wiring and circuit devices and cause a short circuit in the semiconductor layer of the TFT, thereby causing visible defects in the pixel. Experimentally, cracks may appear when the conductive layer BSM has a thickness of 800Å or more. Therefore, it is challenging to achieve a conductive layer BSM with a thickness of 1500Å or more.

[0074] Therefore, in the display panel according to one or more embodiments, since the conductive layer BSM is located between the first base layer SL1 formed of an organic material or a glass material and the second base layer SL2 formed of an organic material, the conductive layer BSM may be provided with different thicknesses, such as 800 Å or more, or 1500 Å or more. The second base layer SL2 formed of an organic material flattens the top surface of the conductive layer BSM, so that circuit devices such as TFTs may be easily formed on the second base layer SL2.

[0075] Figure 4 is a plan view of a display panel according to an embodiment, Figure 5 yes Figure 4 An enlarged plan view of the sensor area SA is shown in FIG.

[0076] Reference Figure 4 According to an embodiment, the display panel 10 includes a display area DA including a plurality of primary pixels Pm. Each of the plurality of primary pixels Pm includes a display element such as an OLED. Each primary pixel Pm emits one of red light, green light, blue light, and white light through the OLED. The display area DA is composed of a plurality of primary pixels Pm and a plurality of primary pixels Pm. Figure 2 The described packaging structure is covered and protected from external air or moisture.

[0077] According to an embodiment, the sensor area SA is located in the display area DA, and a plurality of auxiliary pixels Pa are located in the sensor area SA. Each auxiliary pixel Pa includes a display element such as an OLED. Each auxiliary pixel Pa emits one of red light, green light, blue light, and white light through the OLED. The transmissive portion TA is disposed in the sensor area SA and between the auxiliary pixels Pa.

[0078] In an embodiment, the primary pixel Pm and the auxiliary pixel Pa include the same pixel circuit. However, the embodiment is not limited thereto. In other embodiments, the pixel circuit included in the primary pixel Pm is different from the pixel circuit included in the auxiliary pixel Pa.

[0079] According to an embodiment, because the sensor area SA includes the transmissive portion TA, the resolution of the sensor area SA is lower than the resolution of the display area DA. For example, the resolution of the sensor area SA is about 1 / 2 of the resolution of the display area DA. In some embodiments, the resolution of the display area DA is 400 ppi or higher, and the resolution of the sensor area SA is about 200 ppi.

[0080] Reference Figure 5 According to an embodiment, the sensor area SA includes an auxiliary pixel area PaA including one or more auxiliary pixels Pa and a transmission area TAA including a transmission portion TA. The auxiliary pixel area PaA and the transmission area TAA are arranged in a grid form.

[0081] In an embodiment, the auxiliary pixel area PaA includes a first auxiliary pixel Par emitting red light, a second auxiliary pixel Pag emitting green light, and a third auxiliary pixel Pab emitting blue light. Figure 5 In FIG. 1 , the auxiliary pixels Pa have a pentile type arrangement. However, the embodiment is not limited thereto, and the auxiliary pixels Pa may have other arrangements such as stripes. Figure 5 , eight auxiliary pixels Pa are disposed in the auxiliary pixel area PaA. However, the number of the auxiliary pixels Pa may be changed according to the resolution of the sensor area SA.

[0082] According to an embodiment, each of the main pixel Pm and the auxiliary pixel Pa is electrically connected to an external circuit located in the non-display area NDA. The first scan driving circuit 110, the second scan driving circuit 120, the terminal 140, the data driving circuit 150, the first power line 160, and the second power line 170 are located in the non-display area NDA.

[0083] According to an embodiment, the first scan driving circuit 110 transmits a scan signal to each of the primary pixel Pm and the auxiliary pixel Pa via a scan line SL. The first scan driving circuit 110 transmits an emission control signal to each pixel via an emission control line EL. The second scan driving circuit 120 is arranged in parallel with the first scan driving circuit 110, and the display area DA is located between the second scan driving circuit 120 and the first scan driving circuit 110. Some of the primary pixels Pm and the auxiliary pixels Pa in the display area DA are electrically connected to the first scan driving circuit 110, while other primary pixels Pm and the auxiliary pixels Pa in the display area DA are connected to the second scan driving circuit 120. In another embodiment, the second scan driving circuit 120 is omitted.

[0084] According to an embodiment, the terminal 140 is located at one side of the substrate 100. The terminal 140 is not covered by the insulating layer, but is exposed and electrically connected to a printed circuit board (PCB). A pad (or "pad") PCB-P of the PCB is electrically connected to the terminal 140 of the display panel 10. The PCB transmits a signal or power of the controller to the display panel 10. A control signal generated by the controller is transmitted to each of the first scan driving circuit 110 and the second scan driving circuit 120 via the PCB. The controller transmits the first connection wiring 161 and the second connection wiring 171 described below. Figure 6 and Figure 7 The first power voltage (also referred to as a driving voltage) ELVDD and the second power voltage ELVSS are transmitted to the first power line 160 and the second power line 170. The first power voltage ELVDD is transmitted to each of the primary pixel Pm and the auxiliary pixel Pa via the driving voltage line PL connected to the first power line 160, and the second power voltage ELVSS is transmitted to the counter electrode of each of the primary pixel Pm and the auxiliary pixel Pa connected to the second power line 170.

[0085] According to an embodiment, the data driving circuit 150 is electrically connected to the data line DL. The data signal of the data driving circuit 150 is transmitted to each of the primary pixel Pm and the auxiliary pixel Pa via the connection wiring 151 connected to the terminal 140 and the data line DL. Figure 4 The data driving circuit 150 is shown as being located on the PCB. In another embodiment, the data driving circuit 150 is located on the substrate 100. For example, the data driving circuit 150 may be located between the terminal 140 and the first power line 160.

[0086] According to an embodiment, the first power line 160 includes first and second sub-lines 162 and 163 extending parallel to each other in the x direction, and the display area DA is between the first and second sub-lines 162 and 163. The second power line 170 has a ring shape with one open side and partially surrounds the display area DA.

[0087] Figure 6 is an equivalent circuit diagram of a pixel according to an embodiment, Figure 7 is an equivalent circuit diagram of a pixel according to another embodiment.

[0088] According to an embodiment, Figure 6 or Figure 7 The equivalent circuit diagram of is applied to the main pixel Pm or the auxiliary pixel Pa.

[0089] Reference Figure 6 According to an embodiment, each of the main pixel Pm and the auxiliary pixel Pa includes a pixel circuit PC and an OLED, the pixel circuit PC is connected to the scan line SL and the data line DL, and the OLED is connected to the pixel circuit PC.

[0090] According to an embodiment, the pixel circuit PC includes a driving TFT T1, a switching TFT T2 and a storage capacitor Cst. The switching TFT T2 is connected to the scan line SL and the data line DL and transmits a data signal Dm input through the data line DL to the driving TFT T1 according to a scan signal Sn received through the scan line SL.

[0091] According to an embodiment, the storage capacitor Cst is connected to the switching TFT T2 and the driving voltage line PL and stores a voltage corresponding to a difference between a voltage transmitted from the switching TFT T2 and a first power voltage ELVDD which is a driving voltage transmitted to the driving voltage line PL.

[0092] According to an embodiment, the driving TFT T1 is connected to the driving voltage line PL and the storage capacitor Cst, and controls a driving current flowing from the driving voltage line PL through the OLED corresponding to the voltage stored in the storage capacitor Cst. The OLED emits light with brightness corresponding to the driving current.

[0093] exist Figure 6 According to the embodiment, the pixel circuit PC includes two TFTs and one storage capacitor. However, the embodiment is not limited thereto. Figure 7 As shown in , the pixel circuit PC may include seven TFTs and one storage capacitor.

[0094] Reference Figure 7 According to an embodiment, each of the main pixel Pm and the auxiliary pixel Pa includes a pixel circuit PC and an OLED connected to the pixel circuit PC. The pixel circuit PC includes a plurality of TFTs and a storage capacitor. The plurality of TFTs and the storage capacitor are connected to the signal lines SL, SL-1, EL and DL, the initialization voltage line VL and the driving voltage line PL.

[0095] exist Figure 7 In the embodiment, each of the main pixel Pm and the auxiliary pixel Pa is connected to the signal lines SL, SL-1, EL and DL, the initialization voltage line VL and the driving voltage line PL. However, the embodiment is not limited thereto. In another embodiment, at least one of the signal lines SL, SL-1, EL and DL, the initialization voltage line VL and the driving voltage line PL is shared with an adjacent pixel.

[0096] According to the embodiment, the plurality of TFTs include a driving TFT T1, a switching TFT T2, a compensation TFT T3, a first initialization TFT T4, an operation control TFT T5, an emission control TFT T6, and a second initialization TFT T7.

[0097] According to the embodiment, the signal line includes a scan line SL, a previous scan line SL-1, an emission control line EL, and a data line DL. The scan line SL transmits a scan signal Sn. The previous scan line SL-1 transmits the previous scan signal Sn-1 to the first initialization TFT T4 and the second initialization TFT T7. The emission control line EL transmits the emission control signal En to the operation control TFT T5 and the emission control TFT T6. The data line DL crosses the scan line SL and transmits the data signal Dm. The driving voltage line PL transmits the driving voltage ELVDD to the driving TFT T1. The initialization voltage line VL transmits the initialization voltage Vint that initializes the driving TFT T1 and the pixel electrode of the OLED.

[0098] According to the embodiment, the driving gate electrode G1 of the driving TFT T1 is connected to the first storage capacitor plate Cst1 of the storage capacitor Cst, the driving source electrode S1 of the driving TFT T1 is connected to the driving voltage line PL via the operation control TFT T5, and the driving drain electrode D1 of the driving TFT T1 is electrically connected to the pixel electrode of the OLED via the emission control TFT T6. The driving TFT T1 receives the data signal Dm according to the switching operation of the switching TFT T2, and converts the driving current I OLED Transfer to OLED.

[0099] According to the embodiment, the switching gate electrode G2 of the switching TFT T2 is connected to the scan line SL, the switching source electrode S2 of the switching TFT T2 is connected to the data line DL, the switching drain electrode D2 of the switching TFT T2 is connected to the driving source electrode S1 of the driving TFT T1, and is connected to the driving voltage line PL via the operation control TFT T5. The switching TFT T2 is turned on according to the scan signal Sn received via the scan line SL, and performs a switching operation of transmitting the data signal Dm received via the data line DL to the driving source electrode S1 of the driving TFT T1.

[0100] According to the embodiment, the compensation gate electrode G3 of the compensation TFT T3 is connected to the scan line SL, the compensation source electrode S3 of the compensation TFT T3 is connected to the driving drain electrode D1 of the driving TFT T1 and is connected to the pixel electrode of the OLED via the emission control TFT T6, and the compensation drain electrode D3 of the compensation TFT T3 is connected to the first storage capacitor plate Cst1 of the storage capacitor Cst, the first initialization drain electrode D4 of the first initialization TFT T4, and the driving gate electrode G1 of the driving TFT T1. The compensation TFT T3 is turned on according to the scan signal Sn received via the scan line SL, and electrically connects the driving gate electrode G1 to the driving drain electrode D1 of the driving TFT T1, thereby making the driving TFT T1 diode-connected.

[0101] According to the embodiment, the first initialization gate electrode G4 of the first initialization TFT T4 is connected to the previous scan line SL-1, the first initialization source electrode S4 of the first initialization TFT T4 is connected to the second initialization drain electrode D7 of the second initialization TFT T7 and the initialization voltage line VL, and the first initialization drain electrode D4 of the first initialization TFT T4 is connected to the first storage capacitor plate Cst1 of the storage capacitor Cst, the compensation drain electrode D3 of the compensation TFT T3, and the driving gate electrode G1 of the driving TFT T1. The first initialization TFT T4 is turned on according to the previous scan signal Sn-1 received via the previous scan line SL-1, and performs an initialization operation of transmitting the initialization voltage Vint to the driving gate electrode G1 of the driving TFT T1 so that the voltage of the driving gate electrode G1 of the driving TFT T1 is initialized.

[0102] According to an embodiment, an operation control gate electrode G5 of the operation control TFT T5 is connected to the emission control line EL, an operation control source electrode S5 of the operation control TFT T5 is connected to the driving voltage line PL, and an operation control drain electrode D5 of the operation control TFT T5 is connected to the driving source electrode S1 of the driving TFT T1 and the switching drain electrode D2 of the switching TFT T2.

[0103] According to an embodiment, the emission control gate electrode G6 of the emission control TFT T6 is connected to the emission control line EL, the emission control source electrode S6 of the emission control TFT T6 is connected to the driving drain electrode D1 of the driving TFT T1 and the compensation source electrode S3 of the compensation TFT T3, and the emission control drain electrode D6 of the emission control TFT T6 is electrically connected to the second initialization source electrode S7 of the second initialization TFT T7 and the pixel electrode of the OLED.

[0104] According to an embodiment, the operation control TFT T5 and the emission control TFT T6 may be simultaneously turned on according to the emission control signal En received via the emission control line EL, so that the driving voltage ELVDD is transmitted to the OLED and the driving current I OLED Flow through the OLED.

[0105] According to the embodiment, the second initialization gate electrode G7 of the second initialization TFT T7 is connected to the previous scan line SL-1, the second initialization source electrode S7 of the second initialization TFT T7 is connected to the emission control drain electrode D6 of the emission control TFT T6 and the pixel electrode of the OLED, and the second initialization drain electrode D7 of the second initialization TFT T7 is connected to the first initialization source electrode S4 of the first initialization TFT T4 and the initialization voltage line VL. The second initialization TFT T7 is turned on according to the previous scan signal Sn-1 received via the previous scan line SL-1, and initializes the pixel electrode of the OLED.

[0106] exist Figure 7 In the embodiment, the first initialization TFT T4 and the second initialization TFT T7 are connected to the previous scan line SL-1. However, the embodiment is not limited thereto. In another embodiment, the first initialization TFT T4 is connected to the previous scan line SL-1 and is driven according to the previous scan signal Sn-1, and the second initialization TFT T7 is connected to an additional signal line such as a subsequent scan line and is driven according to a signal to be transmitted to the subsequent scan line.

[0107] According to an embodiment, the second storage capacitor plate Cst2 of the storage capacitor Cst is connected to the driving voltage line PL, and the counter electrode of the OLED is connected to the second power supply voltage ELVSS as a common voltage. Therefore, the OLED receives the driving current I from the driving TFT T1. OLED And emit light, thus displaying images.

[0108] exist Figure 7 According to the embodiment, the compensation TFT T3 and the first initialization TFT T4 have a double gate electrode. However, the embodiment is not limited thereto, and in other embodiments, the compensation TFT T3 and the first initialization TFT T4 have one gate electrode.

[0109] In this embodiment, a primary pixel Pm and an auxiliary pixel Pa have pixel circuits PC having the same structure. However, the embodiment is not limited thereto. In other embodiments, the primary pixel Pm and the auxiliary pixel Pa include pixel circuits PC having different structures. For example, in some embodiments, the primary pixel Pm uses Figure 7 The pixel circuit of the auxiliary pixel Pa uses Figure 6 Pixel circuit.

[0110] Figures 8 to 11 is a cross-sectional view of a stack structure included in a display panel according to an embodiment.

[0111] Reference Figure 8 According to an embodiment, the main pixel Pm is located in the display area DA, and the auxiliary pixel Pa and the transmission portion TA are located in the sensor area SA. Hereinafter, one pixel structure will be described based on the main pixel Pm. However, the auxiliary pixel Pa has substantially the same structure.

[0112] According to an embodiment, the substrate 100 includes a first substrate layer SL1 and a second substrate layer SL2. The first substrate layer SL1 and the second substrate layer SL2 include a polymer resin. The polymer resin includes PES, PAR, PEI, PEN, PET, PPS, polyarylate, PI, PC, or CAP. The substrate 100 including the polymer resin is flexible, rollable, or bendable.

[0113] According to an embodiment, the substrate 100 has a multilayer structure including the first base layer SL1 and the second base layer SL2 described above, and the first barrier layer BL1 therebetween and the second barrier layer BL2 located on the second base layer SL2. The first base layer SL1 and the second base layer SL2 and the first barrier layer BL1 and the second barrier layer BL2 are alternately stacked. The first barrier layer BL1 and the second barrier layer BL2 include an inorganic insulating material to prevent moisture or impurities from penetrating into the display panel 10 via the first base layer SL1 and the second base layer SL2.

[0114] According to an embodiment, the buffer layer 111 is located on the substrate 100, and reduces or prevents penetration of foreign matter, moisture, or external air from a lower portion of the substrate 100, and provides a flat surface to the substrate 100. The buffer layer 111 may include an inorganic material such as an oxide or a nitride, an organic material, or an organic / inorganic mixture, and may have a single-layer structure or a multi-layer structure including an inorganic material and an organic material.

[0115] According to an embodiment, the semiconductor layer A is located on the buffer layer 111. The semiconductor layer A includes amorphous silicon. In another embodiment, the semiconductor layer A includes an oxide semiconductor including an oxide of at least one of indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). For example, the semiconductor layer A includes an oxide semiconductor such as indium gallium zinc oxide (IGZO), zinc tin oxide (ZTO), or zinc indium oxide (ZIO).

[0116] According to an embodiment, the gate electrode G is located on the semiconductor layer A, and the gate insulating layer 113 is located between the gate electrode G and the semiconductor layer A. The gate electrode G includes molybdenum (Mo), aluminum (Al), copper (Cu), Ti, etc., and has a single-layer structure or a multi-layer structure. For example, the gate electrode G has a single-layer structure of Mo.

[0117] According to an embodiment, the gate insulating layer 113 includes silicon oxide (SiO 2 )、Silicon Nitride(SiN x )、Silicon Oxynitride (SiON), Aluminum Oxide (Al 2 O 3 ), titanium oxide (TiO 2 )、Tantalum oxide(Ta 2 O 5 )、HfO 2 ) or zinc oxide (ZnO 2 ).

[0118] According to an embodiment, the source electrode S and the drain electrode D are located on the gate electrode G, and the interlayer insulating layer 115 is located between the source electrode S and the drain electrode D and the gate electrode G. The source electrode S and the drain electrode D include Mo, Al, Cu, Ti, etc., and have a single-layer structure or a multi-layer structure. In an example, the source electrode S and the drain electrode D have a multi-layer structure of Ti / Al / Ti.

[0119] According to an embodiment, the planarization layer 117 covers the top surfaces of the source electrode S and the drain electrode D and has a flat top surface so that the pixel electrode 210 can be formed flatly. The planarization layer 117 may have a single-layer structure or a multi-layer structure formed of an organic material. The planarization layer 117 may include a general polymer (such as BCB, PI, HMDSO, PMMA, or PS), a polymer derivative having a phenolic group, an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, a vinyl alcohol polymer, or a blend thereof. The planarization layer 117 may include an inorganic material. The planarization layer 117 may include silicon oxide (SiO 2 )、Silicon Nitride(SiN x )、Silicon Oxynitride (SiON), Aluminum Oxide (Al 2 O 3 ), titanium oxide (TiO 2 )、Tantalum oxide(Ta 2 O 5 )、HfO 2 ) or zinc oxide (ZnO 2 ). When the planarization layer 117 includes an inorganic material, chemical planarization polishing may be performed according to circumstances. The planarization layer 117 may include both an organic material and an inorganic material.

[0120] According to an embodiment, the pixel electrode 210 may be a (semi) light-transmitting electrode or a reflective electrode. In some embodiments, the pixel electrode 210 includes a reflective layer formed of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr or a mixture thereof, and a transparent electrode layer or a semi-transparent electrode layer formed on the reflective layer. The transparent electrode layer or the semi-transparent electrode layer includes ITO, IZO, ZnO, In 2 O 3 In some embodiments, the pixel electrode 210 has a stack structure of ITO / Ag / ITO.

[0121] According to an embodiment, the pixel defining layer 119 is located on the planarization layer 117. The pixel defining layer 119 has an opening through which the center of the pixel electrode 210 is exposed, thereby defining the emission area of ​​the pixel. In addition, the pixel defining layer 119 increases the distance between the edge of the pixel electrode 210 and the edge of the counter electrode 230 at the upper portion of the pixel electrode 210, thereby preventing arcing from occurring at the edge of the pixel electrode 210. The pixel defining layer 119 is formed of an organic insulating material such as PI, polyamide, acrylic resin, BCB, HMDSO, or phenol resin using spin coating.

[0122] According to an embodiment, the intermediate layer 220 of the OLED includes an organic emission layer. The organic emission layer includes an organic material, and the organic material includes a fluorescent material or a phosphorescent material that emits red light, green light, blue light or white light. The organic emission layer is a low molecular weight organic material or a polymer organic material, and a functional layer (such as a hole transport layer (HTL), a hole injection layer (HIL), an electron transport layer (ETL) or an electron injection layer (EIL)) is optionally further located under the organic emission layer or on the organic emission layer. The intermediate layer 220 corresponds to each of the plurality of pixel electrodes 210. However, the embodiment is not limited thereto. In other embodiments, the intermediate layer 220 includes an integral layer extending over all pixel electrodes of the plurality of pixel electrodes 210.

[0123] According to an embodiment, the counter electrode 230 may include a light-transmitting electrode or a reflective electrode. In some embodiments, the counter electrode 230 includes a transparent electrode or a semi-transparent electrode and includes a thin metal layer with a low work function, such as Li, Ca, LiF / Ca, LiF / Al, Al, Ag, Mg, or a mixture thereof. In addition, a material such as ITO, IZO, ZnO, or In may be provided on the thin metal layer. 2 O 3 The counter electrode 230 is located in the display area DA and the non-display area NDA, and is located on the intermediate layer 220 and the pixel defining layer 119. The counter electrode 230 is formed as one body for a plurality of OLEDs, and corresponds to a plurality of pixel electrodes 210.

[0124] According to an embodiment, when the pixel electrode 210 is a reflective electrode and the counter electrode 230 is a light-transmitting electrode, the light emitted from the intermediate layer 220 is emitted toward the counter electrode 230, so that the display device 1 is a top (front) emission type. When the pixel electrode 210 is a transparent electrode or a semi-transparent electrode and the counter electrode 230 is a reflective electrode, the light emitted from the intermediate layer 220 is emitted toward the substrate 100, so that the display device 1 is a bottom (rear) emission type. However, the embodiment is not limited thereto. The display device 1 according to the present embodiment may be a dual emission type in which light is emitted in two directions (such as a front direction and a rear direction).

[0125] The above-described pixel structure according to the embodiment may be included in both the main pixel Pm and the auxiliary pixel Pa.

[0126] According to an embodiment, a conductive layer BSM is located at a lower portion of each auxiliary pixel Pa. The conductive layer BSM overlaps the front surface of the lower portion of each auxiliary pixel Pa and the semiconductor layer Aa of the auxiliary TFT TFTa. The conductive layer BSM prevents light emitted from the component 20 from reaching the auxiliary pixel Pa and the auxiliary TFT TFTa.

[0127] In an embodiment, Figure 8 As shown in FIG. 1 , in the sensor area SA, the conductive layer BSM is electrically connected to the driving voltage line PL via the contact hole CH1 so that a constant voltage is maintained at the conductive layer BSM. Fig. 9 As shown in FIG. 1 , in the sensor area SA, the conductive layer BSM is electrically connected to the scan line SL via the contact hole CH2 so that the signal is transmitted to the conductive layer BSM. Figure 8 The difference is that, as shown in Fig.10 As shown in , the conductive layer BSM may also be disposed in the non-display area NDA, in which the conductive layer BSM is electrically connected to the driving voltage connection line PL' extending in the non-display area NDA via the contact hole CH3, thereby maintaining a constant voltage in the conductive layer BSM. Figure 8 The difference is that, as shown in Fig.11 As shown in , the conductive layer BSM may also be disposed in the non-display area NDA, in which the conductive layer BSM is electrically connected to the scan connection line SL' extending in the non-display area NDA via the contact hole CH4, so that the signal is transmitted to the conductive layer BSM. In this way, the conductive layer BSM is electrically contacted with the wiring capable of transmitting power or signals, so that a constant voltage or signal is transmitted to the conductive layer BSM. Therefore, damage to the pixel circuit due to electrostatic discharge can be prevented.

[0128] exist Figures 8 to 11 In the above-described embodiment, according to an embodiment, the contact holes CH1 , CH2 , CH3 , and CH4 penetrate the second barrier layer BL2 and the second base layer SL2 .

[0129] Fig.12 and Fig.13 is a cross-sectional view schematically illustrating a stack structure included in a display panel according to an embodiment.

[0130] Fig.12 and Fig.13 The display panel 10 described above Figure 8 The display panel 10 is similar to the display panel 10 of FIG. 1 , but the structure of the substrate 100 ′ is different from that of the display panel 10 of FIG. 1 . Figure 8 The display panel 10 is different. Fig.12 and Fig.13 Other structures and Figure 8 The configurations of the substrates 100 and 100 ′ are substantially the same, and therefore, the substrate 100 ′ will be described below.

[0131] Reference Fig.12 According to an embodiment, the substrate 100' includes a first base layer SL1 including a glass material and a second base layer SL2 including an organic insulating material. Fig.12 In the embodiment of the present invention, the first base layer SL1 is a rigid base formed of a glass material used as a substrate, and the second base layer SL2 is an organic layer that flattens the top surface of the first base layer SL1. Since the first base layer SL1 substantially supports the display panel 10, the thickness T1 of the first base layer SL1 is greater than the thickness T2 of the second base layer SL2.

[0132] In this embodiment, as in the above-described embodiment, the conductive layer BSM is located at the lower portion of the auxiliary pixel Pa. The conductive layer BSM overlaps the front surface of the lower portion of the auxiliary pixel Pa and overlaps the semiconductor layer Aa of the auxiliary TFT TFTa. The conductive layer BSM prevents light emitted from the component 20 from reaching the auxiliary pixel Pa and the auxiliary TFT TFTa.

[0133] In an embodiment, Fig.12 As shown in FIG. 1 , in the sensor area SA, the conductive layer BSM is electrically connected to the driving voltage line PL via the contact hole CH1 ′ so that a constant voltage is transmitted to the conductive layer BSM. Fig.13 As shown in FIG. 1 , in the non-display area NDA, the conductive layer BSM is electrically connected to the scan link line SL′ extending in the non-display area NDA via the contact hole CH4′, so that the signal is transmitted to the conductive layer BSM. However, as described above Fig. 9 or Fig.10 As shown in FIG. 1 , the conductive layer BSM may be electrically connected to the scan line SL via a contact hole in the sensor area SA, or may be electrically connected to the driving voltage connection line PL′ via a contact hole in the non-display area NDA.

[0134] exist Fig.12 and Fig.13 In the embodiment of FIG. 5 , the contact holes CH1 ′ and CH4 ′ penetrate the second base layer SL2 .

[0135] Figures 14 to 16 is a cross-sectional view of a stack structure included in a display panel according to other embodiments.

[0136] Fig.14 and Fig.15 A portion of the sensor area SA is shown, and the sensor area SA includes the auxiliary pixel Pa and the transmissive portion TA.

[0137] According to an embodiment, Fig.14 The flexible substrate 100 of the display panel 10 includes a first base layer SL1, a first barrier layer BL1, a second base layer SL2, and a second barrier layer BL2. Fig.15 The rigid substrate 100 ′ including the first base layer SL1 and the second base layer SL2 of the display panel 10 is shown. Fig.15 In the embodiment, the top structure of the substrate 100' is Fig.14 The top structure is the same, so the repeated description will be omitted.

[0138] Reference Fig.14 According to an embodiment, the auxiliary pixel Pa includes two or more auxiliary TFTs TFTa. In this embodiment, the conductive layer BSM is disposed to correspond to a lower portion of the first auxiliary TFT TFTa1 but not to correspond to a lower portion of the second auxiliary TFT TFTa2.

[0139] In an embodiment, when the auxiliary pixel Pa has Figure 6 When the pixel circuit of the auxiliary pixel Pa has a first auxiliary TFT TFTa1, the first auxiliary TFT TFTa1 may be a driving TFT T1 or a switching TFT T2. Figure 7 When the pixel circuit is formed, the first auxiliary TFT TFTa1 may be at least one of the driving TFT T1, the switching TFT T2, the compensation TFT T3, the first initialization TFT T4, the operation control TFT T5, the emission control TFT T6 and the second initialization TFT T7.

[0140] According to an embodiment, the sensor area SA includes the transmissive portion TA. The planarization layer 117 includes a first permeable opening 117OP corresponding to the transmissive portion TA, and the pixel defining layer 119 includes a second permeable opening 119OP.

[0141] Therefore, according to the embodiment, in the transmission part TA, the buffer layer 111, the gate insulating layer 113, the interlayer insulating layer 115, and the opposite electrode 230 are stacked on the substrate 100. In the transmission part TA, the organic layers of the intermediate layer 220 (such as HTL, HIL, ETL, and EIL) may also be disposed in the transmission part TA. Figure 2 The thin film encapsulation layer 300 or sealing substrate is depicted as being located on top of the counter electrode 230 .

[0142] In another embodiment, if Fig.16As shown in , the counter electrode 230 is removed in the region corresponding to the transmission part TA. In this case, the counter electrode 230 includes a third permeable opening 230OP corresponding to the transmission part TA. In another embodiment, the inorganic insulating layer (i.e., the buffer layer 111, the gate insulating layer 113, and the interlayer insulating layer 115) is removed in the region corresponding to the transmission part TA. In this way, some layers corresponding to the transmission part TA are removed to improve the transmittance in the transmission part TA.

[0143] As described above, according to one or more embodiments, a display device having an expanded display area in which an image can be displayed even in a sensor area can be implemented.

[0144] Therefore, a display device having various functions and improved quality can be provided.

[0145] It should be understood that the exemplary embodiments described herein should be considered in a descriptive sense only and not for purposes of limitation. Descriptions of features or aspects within each embodiment should generally be considered as available for other similar features or aspects in other embodiments.

[0146] Although one or more exemplary embodiments have been described with reference to the drawings, people skilled in the art will understand that various changes in form and details may be made therein without departing from the spirit and scope defined by the claims.

Claims

1. A display panel, the display panel include: A substrate, comprising a first base layer and a second base layer disposed on the first base layer; a thin film transistor, disposed on the second base layer and having a semiconductor layer; as well as a conductive layer disposed below the semiconductor layer to at least partially overlap the semiconductor layer, The second base layer is disposed between the semiconductor layer and the conductive layer and includes an organic material.

2. The display panel according to claim 1, wherein the display panel further comprises: include: a first barrier layer, located between the first substrate layer and the second substrate layer; as well as a second barrier layer, located on the second substrate layer, Wherein, the conductive layer is located between the first barrier layer and the second base layer.

3. The display panel according to claim 2, in, The conductive layer is directly on the first barrier layer.

4. The display panel according to claim 2, in, The first barrier layer and the second barrier layer include an organic material and are flexible.

5. The display panel according to claim 1, in, The first base layer includes an organic material.

6. The display panel according to claim 1, wherein the display panel further comprises: include: A connecting line is electrically connected to the conductive layer.

7. The display panel according to claim 6, in, The connection line supplies a constant voltage or signal to the conductive layer.

8. The display panel according to claim 6, in, The thin film transistor further includes a gate electrode disposed on the semiconductor layer to at least partially overlap the semiconductor layer, and an electrode layer disposed on the gate electrode and electrically connected to the semiconductor layer, and The connecting wire and the electrode layer are arranged on the same layer.

9. The display panel according to claim 6, in, The thin film transistor further includes a gate electrode disposed on the semiconductor layer to at least partially overlap the semiconductor layer, and an electrode layer disposed on the gate electrode and electrically connected to the semiconductor layer, and The connection line and the gate electrode are arranged on the same layer.

10. The display panel according to claim 6, in, The display panel includes a display area including pixels and a non-display area surrounding the display area. The conductive layer is disposed in the display area and at least partially extends toward the non-display area, and A contact hole electrically connecting the connection line and the conductive layer is located in the non-display area.

11. The display panel according to claim 1, in, The conductive layer has a thickness of 1500Å or greater.

12. The display panel according to claim 1, The display panel includes a display area and a sensor area disposed in the display area, and The thin film transistor is disposed in the sensor region.

13. The display panel according to claim 12, in, The sensor area includes an auxiliary pixel area and a transmission area, one or more auxiliary pixels are located in the auxiliary pixel area, a transmission part is located in the transmission area, and the auxiliary pixel area and the transmission area are arranged in a grid form.

14. The display panel according to claim 13, in, The conductive layer is located corresponding to the auxiliary pixel region.

15. The display panel according to claim 14, wherein the display panel further comprises: include: a first wiring electrically connected to the plurality of auxiliary pixels and extending in a first direction; as well as a second wiring extending in a second direction intersecting the first direction, The conductive layer is electrically connected to the first wiring or the second wiring via a contact hole.

16. The display panel according to claim 15, in, The contact hole is formed in a non-display area outside the display area.

17. The display panel according to claim 1, in, The thickness of the first base layer is greater than the thickness of the second base layer.

18. A display device, the display device include: A substrate, comprising a first base layer and a second base layer disposed on the first base layer; a thin film transistor, disposed on the second base layer and having a semiconductor layer; a conductive layer disposed below the semiconductor layer to at least partially overlap the semiconductor layer; as well as an assembly positioned below the substrate and having a sensor using infrared light, The second base layer is disposed between the semiconductor layer and the conductive layer and includes an organic material.

19. The display device according to claim 18, in, The components include electronic components that emit or receive light.

20. The display device according to claim 18, in, The substrate includes a display area and a sensor area disposed in the display area, and The resolution of the image displayed by the sensor area is lower than the resolution of the image displayed by the display area.

Images