Combined navigation system based on multi-core DSP

Abstract

The invention discloses an integrated navigation system based on a multi-core DSP (Digital Signal Processor), which is characterized in that algorithm function division of the integrated navigation system is combined with resources of the multi-core DSP, a shared storage device in the multi-core DSP is utilized to construct an interrupt processing mechanism, and a calculation process and a data interaction mode of each core are reasonably optimized and designed; the DSP core 0 is used for carrying out inertial navigation period calculation and external sensor and external equipment data interaction, the DSP core 1 is used for carrying out inertial measurement data acquisition, correction and error compensation, the DSP core 2 is used for carrying out filter calculation and error parameter estimation, and the DSP core 3 is used for carrying out Nandflash read-write operation and internal data recording, so that the parallel calculation of integrated navigation is realized, the real-time performance of the system is improved, and the real-time performance of the system is improved. And independent and flexible updating of each function module can be realized through reasonable function division. The system has the characteristics of high integration level, good expansibility, small size, low cost and the like.

Description

Technical Field

[0001] The present invention relates to the field of integrated navigation systems, and in particular to an integrated navigation system based on a multi-core DSP. Background Art

[0002] Navigation technology, as one of the core key technologies of unmanned autonomous systems, its performance has become the key to restricting the functions of unmanned systems. Since inertial navigation does not require external data participation and does not need to radiate energy to the outside world, it has the characteristics of high concealment, strong anti-interference ability, and complete autonomy. However, its navigation accuracy shows a divergent trend over time. Therefore, other navigation methods are often introduced, such as satellite navigation, map navigation, odometer and other navigation methods, to correct the inertial navigation error, forming an integrated navigation system with multiple mode fusions. The core of integrated navigation calculation lies in the design of the filter. Higher-order filters can often perform more accurate error estimation, which has a significant effect on improving the accuracy of integrated navigation. However, the problem is that the requirement for computing power increases exponentially with the filter order. Digital Signal Processor (DSP) is widely used in embedded integrated navigation systems because of its advantages such as high-speed input and output, high computing accuracy, and strong real-time performance. The research on multi-source integrated navigation systems based on DSP has become a hot topic.

[0003] The paper "Design and Implementation of a Hardware Platform for Missile-Borne Integrated Navigation System Based on TMS320C6748" discloses a method for implementing integrated navigation on a single-core DSP platform. The method serializes the processing of sensor data, inertial navigation calculation, integrated navigation filter calculation, and reading and writing Nandflash to complete data storage and other functions. This method provides a good reference for small-computing-power-scale sensor data fusion projects. However, since the computing platform is a single-core processor, it cannot implement parallel computing for some functions, and the computing power cannot support the real-time calculation of higher-order filters, and it cannot meet the integrated navigation system with more data sources and higher performance requirements.

[0004] The paper "Design and Research on the Dual-DSP Hardware Platform for SINS / GPS Integrated Navigation" discloses an integrated navigation method. By constructing two DSP operating platforms to run the inertial navigation algorithm and the filter algorithm respectively, and realizing the mutual transmission of navigation parameters through the general serial port interface McASP between the two DSPs, the integrated navigation function is realized. This method realizes parallel computing of some algorithms through two independent DSP platforms, ensuring the real-time requirements of integrated navigation. However, there are problems such as high cost and large circuit volume, which are not suitable for mass production applications. Summary of the Invention

[0005] The technical problem solved by the present invention is: aiming at the problem that the integrated navigation system for multi-source data fusion has high requirements for computing power and real-time performance, a combined navigation system based on a multi-core DSP is proposed. Parallel computing is realized through each independent DSP core, and data transmission and synchronization between cores are realized by using the shared storage device (SDP) in the DSP to complete functions such as timing control, integrated navigation solution, and data internal recording.

[0006] The technical solution of the present invention is: a combined navigation system based on a multi-core DSP, including a multi-core DSP, an FPGA, and a non-volatile memory;

[0007] The FPGA is used to expand the external interface of the multi-core DSP, interconnect between the multi-core DSP and external sensors and external devices, and realize data transmission;

[0008] The multi-core DSP is used to obtain external sensor data, perform parallel computing for integrated navigation, realize data transmission and synchronization between cores through the SDP in the DSP, and output navigation results to external devices;

[0009] The non-volatile memory is used to store data.

[0010] Further, the multi-core DSP includes DSP core 0, DSP core 1, DSP core 2, and DSP core 3;

[0011] DSP core 0 regularly reads external sensor data and sends the external sensor data to DSP core 3; receives the inertial measurement data sent by DSP core 1, performs inertial navigation solution to obtain inertial navigation parameters, and sends the inertial navigation parameters and external sensor data to DSP core 2; receives the error estimation parameters sent by DSP core 2, uses the error estimation parameters to correct the inertial navigation parameters to obtain navigation results, and outputs them to external devices;

[0012] DSP core 1 regularly obtains inertial measurement data and temperature sensor data, and sends the inertial measurement data and temperature sensor data to DSP core 3; corrects the inertial measurement data and performs error compensation using the temperature sensor data to obtain the corrected and compensated inertial measurement data, and sends the corrected and compensated inertial measurement data to DSP core 0;

[0013] DSP core 2 regularly sends filter parameter data to DSP core 3; receives the inertial navigation parameters and external sensor data sent by DSP core 0, performs filter calculation to obtain filter parameter data and error estimation parameters, and sends the error estimation parameters to DSP core 0;

[0014] The DSP core 3 receives the external sensor data sent by the DSP core 0, the inertial measurement data and temperature sensor data sent by the DSP core 1, and the filtering parameter data sent by the DSP core 2, and frames and packs the received data and writes it into the non-volatile memory.

[0015] Furthermore, data transmission and synchronization between multi-core DSPs are achieved through the interrupt mechanism.

[0016] Furthermore, the functions of the DSP core 0 are implemented through the main function of the DSP core 0, the timer interrupt of the DSP core 0, the SDP_1_0 interrupt, and the SDP_2_0 interrupt;

[0017] The main function of the DSP core 0 is as follows:

[0018] (0-1) Initialize the DSP, external interface, and inertial navigation parameters;

[0019] (0-2) Start the SDP interrupt;

[0020] (0-3) Determine whether the variable Nav_flag is valid. If it is, go to step (0-4); otherwise, go to step (0-12);

[0021] (0-4) Set the variable Nav_flag to invalid;

[0022] (0-5) Use the inertial measurement data to perform inertial navigation solution to obtain inertial navigation parameters;

[0023] (0-6) Determine whether the variable Multi_flag is valid. If it is, go to step (0-7); otherwise, go to step (0-12);

[0024] (0-7) Set the variable Multi_flag to invalid;

[0025] (0-8) Write the inertial navigation parameters and external sensor data into the SDP memory;

[0026] (0-9) Generate an SDP_0_2 interrupt signal to the DSP core 2;

[0027] (0-10) If the variable Est_flag is valid, go to step (0-11); otherwise, go to step (0-12);

[0028] (0-11) Use the error estimation parameters to correct the inertial navigation parameters to obtain the navigation result;

[0029] (0-12) If the output period is reached, go to step (0-13); otherwise, go to step (0-3);

[0030] (0-13) Output the navigation result to the external device; go to step (0-3);

[0031] The DSP core 0 has a timing interrupt, and the specific method is as follows:

[0032] Read the external sensor data from the FPGA register;

[0033] Set the variable Multi_flag to valid;

[0034] Write the external sensor data to the SDP memory;

[0035] Generate an SDP_0_3 interrupt signal to the DSP core 3;

[0036] End;

[0037] The SDP_1_0 interrupt, and the specific method is as follows:

[0038] Read the inertial measurement data from the SDP memory;

[0039] Set the variable Nav_flag to valid;

[0040] End;

[0041] The SDP_2_0 interrupt, and the specific method is as follows:

[0042] Read the error estimation parameters from the SDP memory;

[0043] Set the variable Est_flag to valid;

[0044] End.

[0045] Further, the function of the DSP core 1 is implemented through the main function of the DSP core 1 and the timing interrupt of the DSP core 1;

[0046] The main function of the DSP core 1, and the specific method is as follows:

[0047] (1-1) Initialize the DSP and the IMU parameters;

[0048] (1-2) Start the SDP interrupt;

[0049] (1-3) Determine whether the variable IMU_flag is valid. If it is, go to step (1-4); otherwise, go to step (1-3);

[0050] (1-4) Correct the inertial measurement data;

[0051] (1-5) Calculate the temperature benefit error parameter according to the temperature sensor data;

[0052] (1-6) Perform temperature benefit error compensation on the inertial measurement data;

[0053] (1 - 7) Write the corrected and compensated inertial measurement data into the SDP memory;

[0054] (1 - 8) Generate an SDP_1_0 interrupt signal to DSP core 0 and enter step (1 - 3);

[0055] The timing interrupt of DSP core 1 is as follows:

[0056] Read the inertial measurement data and temperature sensor data from the FPGA register;

[0057] Set the variable IMU_flag to valid;

[0058] Write the inertial measurement data and temperature sensor data into the SDP memory;

[0059] Generate an SDP_1_3 interrupt signal to DSP core 3;

[0060] End.

[0061] Furthermore, the function of DSP core 2 is implemented through the main function of DSP core 2, the timing interrupt of DSP core 2, and the SDP_0_2 interrupt;

[0062] The main function of DSP core 2 is as follows:

[0063] (2 - 1) Initialize the DSP and initialize the filter parameters;

[0064] (2 - 2) Start the SDP interrupt;

[0065] (2 - 3) Judge whether the variable Time_flag is valid. If it is, enter step (2 - 4); otherwise, enter step (3);

[0066] (2 - 4) If the variable Cal_flag is valid, enter step (2 - 5); otherwise, enter step (2 - 3);

[0067] (2 - 5) Perform filter calculation based on the inertial navigation parameters and external sensor data to obtain the filter parameter data and error estimation parameters;

[0068] (2 - 6) Write the error estimation parameters into the SDP memory;

[0069] (2 - 7) Generate an SDP_2_0 interrupt signal to DSP core 0 and enter step (2 - 3);

[0070] The timing interrupt of DSP core 2 is as follows:

[0071] Set the variable Time_flag to valid;

[0072] Write the filtering parameter data into the SDP memory;

[0073] Generate an SDP_2_3 interrupt signal to the DSP core 3;

[0074] End;

[0075] The SDP_0_2 interrupt is as follows:

[0076] Read the inertial navigation parameters and external sensor data from the SDP memory;

[0077] Set the variable Cal_flag to valid;

[0078] End.

[0079] Furthermore, the functions of the DSP core 3 are implemented through the main function of the DSP core 3, the SDP_0_3 interrupt, the SDP_1_3 interrupt, and the SDP_2_3 interrupt;

[0080] The main function of the DSP core 3 writes the packed data into the non-volatile memory in a page-by-page operation mode;

[0081] The SDP_0_3 interrupt, the SDP_1_3 interrupt, and the SDP_2_3 interrupt are respectively used to read the external sensor data, the inertial measurement data, the temperature sensor data, and the filtering parameter data from the SDP memory and write them into the internal data buffer.

[0082] Furthermore, the FPGA is interconnected with the multi-core DSP through the EMIF bus and is interconnected with the external sensors and external devices through the serial port.

[0083] Furthermore, the external sensors at least include an inertial measurement unit and a temperature sensor.

[0084] Furthermore, the external sensors also include sensor devices capable of acquiring the position, speed, and altitude of the measured carrier.

[0085] The advantages of the present invention compared with the prior art are as follows:

[0086] The present invention combines the algorithmic functions of the integrated navigation system with the resources of the multi-core DSP. An interrupt handling mechanism is constructed using the shared storage device inside the multi-core DSP. The computing processes of each core and the data interaction methods are reasonably optimized and designed. DSP core 0 is used for inertial navigation cycle solution, data interaction with external sensors and external devices. DSP core 1 is used for inertial measurement data acquisition, correction, and error compensation. DSP core 2 is used for filter calculation and error parameter estimation. DSP core 3 is used for Nandflash read and write operations and internal data recording. The parallel computing of integrated navigation is realized, improving the real-time performance of the system. Moreover, the reasonable function division enables independent and flexible update of each functional module. Compared with other systems, it has the characteristics of high integration, good scalability, small size, and low cost. Description of the Drawings

[0087] Figure 1 It is a schematic diagram of the system composition of the present invention;

[0088] Figure 2 It is a program flowchart of DSP core 0 of the present invention;

[0089] Figure 3 It is a program flowchart of DSP core 1 of the present invention;

[0090] Figure 4 It is a program flowchart of DSP core 2 of the present invention;

[0091] Figure 5 It is a program flowchart of DSP core 3 of the present invention. Detailed Embodiment

[0092] In order to better understand the technical solution of the present invention, the following specifically elaborates the detailed embodiment of the present invention in conjunction with the drawings.

[0093] As Figure 1 shown, the system mainly consists of a multi-core DSP, an FPGA, and a non-volatile memory (Nandflash). Among them, the FPGA is used to expand the external interface of the multi-core DSP, perform Nandflash read and write operations, and serial data preprocessing, and is interconnected with the multi-core DSP, external sensors, and external devices through the EMIF bus and the serial port to achieve data transmission. The multi-core DSP obtains external sensor data received by the serial port from the FPGA through the EMIF bus, performs parallel computing of integrated navigation, realizes inter-core data transmission and synchronization through the SDP inside the DSP, outputs navigation results to external devices, and processes the interaction protocols of external devices. The non-volatile memory is used to store data. For external sensors, it should at least include an inertial measurement unit and a temperature sensor, and may also include sensor devices capable of obtaining position (such as a satellite navigation receiver), speed (speed sensor), and altitude (altimeter).

[0094] Specifically, the multi-core DSP includes DSP core 0, DSP core 1, DSP core 2, and DSP core 3;

[0095] DSP core 0 periodically reads external sensor data and sends the external sensor data to DSP core 3; receives the inertial measurement data sent by DSP core 1, performs inertial navigation solution to obtain inertial navigation parameters, and sends the inertial navigation parameters and external sensor data to DSP core 2; receives the error estimation parameters sent by DSP core 2, uses the error estimation parameters to correct the inertial navigation parameters to obtain a navigation result, and outputs it to an external device;

[0096] DSP core 1 periodically obtains inertial measurement data and temperature sensor data, and sends the inertial measurement data and temperature sensor data to DSP core 3; corrects the inertial measurement data and performs error compensation using the temperature sensor data to obtain the corrected and compensated inertial measurement data, and sends the corrected and compensated inertial measurement data to DSP core 0;

[0097] DSP core 2 periodically sends filter parameter data to DSP core 3; receives the inertial navigation parameters and external sensor data sent by DSP core 0, performs filter calculation to obtain filter parameter data and error estimation parameters, and sends the error estimation parameters to DSP core 0;

[0098] DSP core 3 receives the external sensor data sent by DSP core 0, receives the inertial measurement data and temperature sensor data sent by DSP core 1, receives the filter parameter data sent by DSP core 2, groups and packs these data, and writes the packed data into a non-volatile memory.

[0099] The functions of DSP core 0 are implemented through the main function of DSP core 0, the timer interrupt of DSP core 0, the SDP_1_0 interrupt, and the SDP_2_0 interrupt. Refer to Figure 2 。

[0100] The specific implementation method of the main function of DSP core 0 is as follows:

[0101] (1) Initialize the DSP, external interfaces, and inertial navigation parameters;

[0102] (2) Start the SDP interrupt;

[0103] (3) If the variable Nav_flag is valid, go to step (4); otherwise, go to step (12);

[0104] (4) Set the variable Nav_flag to invalid;

[0105] (5) Perform inertial navigation solution using the inertial measurement data to obtain inertial navigation parameters;

[0106] (6) If the variable Multi_flag is valid, go to step (7); otherwise, go to step (12).

[0107] (7) Set the variable Multi_flag to invalid.

[0108] (8) Write the inertial navigation parameters and external sensor data into the SDP memory.

[0109] (9) Generate an SDP interrupt signal (SDP_0_2 interrupt) to DSP core 2.

[0110] (10) If the variable Est_flag is valid, go to step (11); otherwise, go to step (12).

[0111] (11) Use the error estimation parameters to correct the errors of the inertial navigation parameters to obtain the navigation result.

[0112] (12) If the output period is reached, go to step (13); otherwise, go to step (3).

[0113] (13) Output the navigation result to the external device through the serial port. Go to step (3).

[0114] The specific implementation method of the timer interrupt of DSP core 0 is as follows:

[0115] (1) Read the external sensor data from the FPGA register.

[0116] (2) Set the variable Multi_flag to valid.

[0117] (3) Write the external sensor data into the SDP memory.

[0118] (4) Generate an SDP interrupt signal (SDP_0_3 interrupt) to DSP core 3.

[0119] (5) End.

[0120] The specific implementation method of the SDP_1_0 interrupt of DSP core 0 is as follows:

[0121] (1) Read the inertial measurement data from the SDP memory.

[0122] (2) Set the variable Nav_flag to valid.

[0123] (3) End.

[0124] The specific implementation method of the SDP_2_0 interrupt of DSP core 0 is as follows:

[0125] (1) Read the error estimation parameters from the SDP memory.

[0126] (2) Set the variable Est_flag to valid;

[0127] (3) End.

[0128] The function of DSP core 1 is implemented through the main function of DSP core 1 and the timer interrupt of DSP core 1, which can be referred to Figure 3 .

[0129] The specific implementation method of the main function of DSP core 1 is as follows:

[0130] (1) Initialize the DSP and the IMU parameters;

[0131] (2) Start the timer interrupt;

[0132] (3) If the variable IMU_flag is valid, go to step (4), otherwise go to step (3);

[0133] (4) Correct the inertial measurement data, including tool error compensation, coordinate system transformation, etc.;

[0134] (5) Calculate the temperature benefit error parameters according to the temperature sensor data;

[0135] (6) Perform temperature benefit error compensation on the inertial measurement data;

[0136] (7) Write the corrected and compensated inertial measurement data into the SDP memory;

[0137] (8) Generate an SDP interrupt signal (SDP_1_0 interrupt) to DSP core 0 and go to step (3).

[0138] The specific implementation method of the timer interrupt of DSP core 1 is as follows:

[0139] (1) Read the inertial measurement data and the temperature sensor data from the FPGA register;

[0140] (2) Set the variable IMU_flag to valid;

[0141] (3) Write the inertial measurement data and the temperature sensor data into the SDP memory;

[0142] (4) Generate an SDP interrupt signal to DSP core 3;

[0143] (5) End.

[0144] The function of DSP core 2 is implemented through the main function of DSP core 2, the timer interrupt of DSP core 2, and the SDP_0_2 interrupt, which can be referred to Figure 4 .

[0145] The specific implementation method of the main function of DSP core 2 is as follows:

[0146] (1) Initialize the DSP and initialize the filter parameters;

[0147] (2) Start the timer interrupt;

[0148] (3) If the variable Time_flag is valid, go to step (4); otherwise, go to step (3);

[0149] (4) If the variable Cal_flag is valid, go to step (5); otherwise, go to step (3);

[0150] (5) Perform filter calculations based on the inertial navigation parameters and external sensor data to obtain the filtered parameter data and error estimation parameters;

[0151] (6) Write the error estimation parameter data to the SDP memory;

[0152] (7) Generate an SDP interrupt signal (SDP_2_0 interrupt) to DSP core 0 and go to step (3).

[0153] The specific implementation method of the timer interrupt of DSP core 2 is as follows:

[0154] (1) Set the variable Time_flag to valid;

[0155] (2) Write the filtered parameter data to the SDP memory;

[0156] (3) Generate an SDP interrupt signal (SDP_2_3 interrupt) to DSP core 3;

[0157] (4) End.

[0158] The specific implementation method of the SDP_0_2 interrupt of DSP core 2 is as follows:

[0159] (1) Read the inertial navigation parameters and external sensor data from the SDP memory;

[0160] (2) Set the variable Cal_flag to valid;

[0161] (3) End.

[0162] The functions of DSP core 3 are implemented through the main function of DSP core 3, the SDP_0_3 interrupt, the SDP_1_3 interrupt, and the SDP_2_3 interrupt. For reference, see Figure 5 .

[0163] The specific implementation method of the main function of DSP core 3 is as follows:

[0164] (1) Initialize the DSP and initialize the Nandflash;

[0165] (2) Assign the variable num the value of 0;

[0166] (3) If the value of the variable num is greater than or equal to the byte length of each page of the Nandflash, go to step (4); otherwise, go to step (3);

[0167] (4) Assign the variable num the value of 0;

[0168] (5) Write the internal memory data to the Nandflash in page operation mode and go to step (3).

[0169] The specific implementation method of the SDP_0_3 interrupt of DSP core 3 is as follows:

[0170] (1) Read the external sensor data from the SDP memory;

[0171] (2) Write the external sensor data to the internal memory data buffer.

[0172] (3) Increase the value of the variable num by the value of the length of the external sensor data;

[0173] (4) End.

[0174] The specific implementation method of the SDP_1_3 interrupt of DSP core 3 is as follows:

[0175] (1) Read the inertial measurement and temperature sensor data from the SDP memory;

[0176] (2) Write the inertial measurement data and temperature sensor data to the internal memory data buffer.

[0177] (3) Increase the value of the variable num by the value of the length of the inertial measurement and temperature sensor data;

[0178] (4) End.

[0179] The specific implementation method of the SDP_2_3 interrupt of DSP core 3 is as follows:

[0180] (1) Read the filter parameter data from the SDP memory;

[0181] (2) Write the filter parameter data to the internal memory data buffer.

[0182] (3) Increase the value of the variable num by the value of the length of the filter parameter data;

[0183] (4) End.

[0184] It should be understood that the present invention is described by way of examples, and those skilled in the art will be aware that various changes or equivalent replacements can be made to these features and examples without departing from the spirit and scope of the present invention. Additionally, under the teaching of the present invention, these features and examples can be modified to adapt to specific circumstances without departing from the spirit and scope of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed herein, and embodiments that can fall within the scope of the claims of this application all belong to the scope protected by the present invention.

[0185] The content not described in detail in the specification of the present invention belongs to the well-known technology of those skilled in the art.

Claims

1. An integrated navigation system based on multi-core DSP, characterized by: Includes multi-core DSP, FPGA and non-volatile memory; The FPGA is used to expand the external interface of the multi-core DSP, interconnect the multi-core DSP with external sensors and external devices, and realize data transmission; The multi-core DSP is used to obtain external sensor data, perform parallel calculations for combined navigation, realize inter-core data transmission and synchronization through the SDP in the DSP, and output navigation results to external devices; The non-volatile memory is used to store data.

2. The integrated navigation system based on multi-core DSP according to claim 1, characterized in that: The multi-core DSP includes DSP core 0, DSP core 1, DSP core 2 and DSP core 3; DSP core 0 periodically reads external sensor data and sends the external sensor data to DSP core 3; receives inertial measurement data sent by DSP core 1, performs inertial navigation solution, obtains inertial navigation parameters, and sends inertial navigation parameters and external sensor data to DSP core 2; receives error estimation parameters sent by DSP core 2, uses error estimation parameters to perform error correction on inertial navigation parameters, obtains navigation results, and outputs them to external devices; DSP core 1 periodically obtains inertial measurement data and temperature sensor data, and sends the inertial measurement data and temperature sensor data to DSP core 3; Correct the inertial measurement data, and use the temperature sensor data to perform error compensation to obtain the corrected and compensated inertial measurement data, and send the corrected and compensated inertial measurement data to DSP core 0; DSP core 2 periodically sends filter parameter data to DSP core 3; receives inertial navigation parameters and external sensor data sent by DSP core 0, performs filter calculation, obtains filter parameter data and error estimation parameters, and sends the error estimation parameters to DSP core 0; DSP core 3 receives external sensor data sent by DSP core 0, receives inertial measurement data and temperature sensor data sent by DSP core 1, receives filtering parameter data sent by DSP core 2, frames and packages the received data, and writes them into non-volatile memory.

3. The integrated navigation system based on multi-core DSP according to claim 2 is characterized in that: Inter-core data transmission and synchronization are achieved between multi-core DSPs through the interrupt mechanism.

4. The integrated navigation system based on multi-core DSP according to claim 3 is characterized in that: The functions of the DSP core 0 are implemented through the DSP core 0 main function, the DSP core 0 timing interrupt, the SDP_1_0 interrupt, and the SDP_2_0 interrupt; DSP core 0 main function, the specific method is as follows: (0-1) Initialize DSP, external interface, and inertial navigation parameters; (0-2) Start SDP interrupt; (0-3) Determine whether the variable Nav_flag is valid, if so, go to step (0-4), otherwise go to step (0-12); (0-4) Set the variable Nav_flag to invalid; (0-5) Use inertial measurement data to perform inertial navigation solution and obtain inertial navigation parameters; (0-6) Determine whether the variable Multi_flag is valid, if so, go to step (0-7), otherwise go to step (0-12); (0-7) Set the variable Multi_flag to invalid; (0-8) Write inertial navigation parameters and external sensor data into the SDP memory; (0-9) Generate SDP_0_2 interrupt signal to DSP core 2; (0-10) If the variable Est_flag is valid, go to step (0-11), otherwise go to step (0-12); (0-11) Using the error estimation parameters to perform error correction on the inertial navigation parameters, and obtain the navigation results; (0-12) If the output cycle is reached, go to step (0-13), otherwise go to step (0-3); (0-13) Output navigation results to external devices; go to step (0-3); DSP core 0 timer interrupt, the specific method is as follows: Read external sensor data from FPGA registers; The variable Multi_flag is set to valid; Write external sensor data to SDP memory; Generate SDP_0_3 interrupt signal to DSP core 3; Finish; SDP_1_0 interrupt, the specific method is as follows: Read inertial measurement data from SDP memory; Set the variable Nav_flag to be valid; Finish; SDP_2_0 interrupt, the specific method is as follows: Read error estimation parameters from SDP memory; Set the variable Est_flag to be valid; Finish.

5. The integrated navigation system based on multi-core DSP according to claim 4 is characterized in that: The DSP core 1 function is implemented through the DSP core 1 main function and the DSP core 1 timing interrupt; DSP core 1 main function, the specific method is as follows: (1-1) Initialize DSP and IMU parameters; (1-2) Start SDP interrupt; (1-3) Determine whether the variable IMU_flag is valid, if so, go to step (1-4), otherwise go to step (1-3); (1-4) Correct the inertial measurement data; (1-5) Calculating temperature benefit error parameters based on temperature sensor data; (1-6) Compensate the inertial measurement data for temperature effect errors; (1-7) Writing the corrected and compensated inertial measurement data into the SDP memory; (1-8) Generate SDP_1_0 interrupt signal to DSP core 0 and go to step (1-3); DSP core 1 timer interrupt, the specific method is as follows: Read inertial measurement data and temperature sensor data from FPGA registers; Set the variable IMU_flag to be valid; Write inertial measurement data and temperature sensor data into the SDP memory; Generate SDP_1_3 interrupt signal to DSP core 3; Finish.

6. The integrated navigation system based on multi-core DSP according to claim 5, characterized in that: The DSP core 2 function is implemented through the DSP core 2 main function, DSP core 2 timing interrupt, and SDP_0_2 interrupt; DSP core 2 main function, the specific method is as follows: (2-1) Initialize DSP and filter parameters; (2-2) Start SDP interrupt; (2-3) Determine whether the variable Time_flag is valid, if so, proceed to step (2-4), otherwise proceed to step (3); (2-4) If the variable Cal_flag is valid, go to step (2-5), otherwise go to step (2-3); (2-5) performing filter calculation according to inertial navigation parameters and external sensor data to obtain filter parameter data and error estimation parameters; (2-6) Writing error estimation parameters into the SDP memory; (2-7) Generate SDP_2_0 interrupt signal to DSP core 0 and go to step (2-3); DSP core 2 timer interrupt, the specific method is as follows: Set the variable Time_flag to be valid; Write filter parameter data into SDP memory; Generate SDP_2_3 interrupt signal to DSP core 3; Finish; SDP_0_2 interrupt, the specific method is as follows: Read inertial navigation parameters and external sensor data from SDP memory; Set the variable Cal_flag to be valid; Finish.

7. The integrated navigation system based on multi-core DSP according to claim 6, characterized in that: The DSP core 3 function is implemented through the DSP core 3 main function, SDP_0_3 interrupt, SDP_1_3 interrupt, and SDP_2_3 interrupt; The main function of DSP core 3 writes the packed data into the non-volatile memory using page-by-page operation; The SDP_0_3 interrupt, SDP_1_3 interrupt, and SDP_2_3 interrupt are used to read external sensor data, inertial measurement data, temperature sensor data, and filter parameter data from the SDP memory and write them into the internal data buffer.

8. The integrated navigation system based on multi-core DSP according to claim 1, characterized in that: The FPGA is interconnected with the multi-core DSP via the EMIF bus, and is interconnected with external sensors and external devices via a serial port.

9. The integrated navigation system based on multi-core DSP according to claim 1, characterized in that: The external sensors include at least an inertial measurement unit and a temperature sensor.

10. The integrated navigation system based on multi-core DSP according to claim 9, characterized in that: The external sensors also include sensor devices that can obtain the position, speed, and height of the measured carrier.

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