Spacecraft laser radar image acquisition and preprocessing system based on FPGA

Abstract

The invention discloses a spacecraft laser radar image acquisition and preprocessing system based on an FPGA (Field Programmable Gate Array). The system comprises a high-speed ADC (Analog to Digital Converter) module, a working process management module, a laser imaging protocol processing module, a laser control module, an image uploading module and an LVDS (Low Voltage Differential Signaling) downloading module. According to the invention, data output by a high-speed ADC is rapidly processed in an FPGA, then a laser image is preprocessed through a curve fitting algorithm, and an imaging result is output in the form of distance plus gray; parameter setting and state acquisition can be performed on the laser radar imaging module through an RS422 interface; the FPGA multi-point parallel processing technology is used for searching the echo maximum value, the clutter screening speed of reference light and receiving light is increased, the time for collecting effective echoes is shortened, the reliability of the laser radar imaging process is enhanced, and the imaging precision is improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of laser image acquisition and processing of spacecraft control computers, and particularly relates to a spacecraft lidar image acquisition and preprocessing system based on FPGA. Background Art

[0002] As an active remote sensing detection technology, lidar is currently widely used in fields such as meteorology, astronomy, and biology. Among them, traditional lidar is mainly used for laser atmospheric transmission, global climate prediction, marine environment monitoring, etc. With the rapid development of technologies such as laser technology, optoelectronic detection technology, and computer control, lidar has unique advantages in terms of the height of remote sensing detection, spatial resolution, continuous monitoring in time, and measurement accuracy. Especially in atmospheric detection, significant development has been achieved, and the measurement spatial coverage height of various parameters can already reach from the ground to a height of 120 kilometers. Its application prospects are considerable, such as it can be used to measure wind speed, the condensation degree of certain gases, Doppler frequency shift, the fluctuations of the object surface, etc. Among them, laser ranging is the most important application of lidar.

[0003] A laser rangefinder is an instrument that accurately measures the distance to a target using the principle of laser ranging. When working, the laser rangefinder emits a very thin laser beam towards the target. After being reflected by the target, it is received by a photodetector, and a timer measures the round-trip running time of the laser beam, and then the measured distance can be calculated. If the laser is continuously emitted, the measurement range can reach about 40 kilometers. If the laser is pulsed, the measurement range can reach more than 30000m, but the absolute accuracy is relatively low.

[0004] The defect of the prior art is that the speed of data acquisition and preprocessing is slow. For a typical application scenario with a detection distance of 300m and an imaging accuracy of 1cm, the time overhead for the prior art to acquire and process 1 pixel point is usually dozens of microseconds, which is difficult to meet the requirements of new spacecraft for high-speed laser image acquisition and processing. Summary of the Invention

[0005] The technical problem solved by the present invention is: overcoming the deficiencies of the prior art, providing a spacecraft lidar image acquisition and preprocessing system based on FPGA, enhancing the reliability of the lidar imaging process, and improving the imaging accuracy.

[0006] The object of the present invention is achieved through the following technical solutions: A spacecraft lidar image acquisition and preprocessing system based on FPGA, comprising: a high-speed ADC module, a workflow management module, a laser imaging protocol processing module, a laser control module, an image upload module, and an LVDS download module; wherein, the high-speed ADC module: collects the I-channel analog voltage value, the Q-channel analog voltage value, and the clock signal, processes the I-channel analog voltage value, the Q-channel analog voltage value, and the clock signal to obtain parallel data DI, parallel data DId, parallel data DQ, parallel data DQd, the accompanying clock DCLKI, and the accompanying clock DCLKQ, processes the parallel data DI, parallel data Did, and the accompanying clock DCLKI to obtain data DATAI, and processes the parallel data DQ, parallel data DQd, and the accompanying clock DCLKQ to obtain data DATAQ; sends the data DATAI and the data DATAQ to the laser imaging protocol processing module; the workflow management module: receives an external reset signal, when the reset signal is just released or a standby entry command for parameter setting is received, sends a laser off control signal to the laser control module, and controls the high-speed ADC module to power off; when a standby exit command for parameter setting is received, sends a laser on control signal to the laser control module, and controls the high-speed ADC module to power on; the laser imaging protocol processing module: receives the data DATAI and the data DATAQ; receives control commands from the control command RS422 interface, parses the control commands to obtain parameter setting commands and imaging commands, when the parsed control command is a parameter setting command, if the parameter setting command is a standby entry / exit instruction, forwards the standby entry / exit instruction to the workflow management module; if the parameter setting command is an imaging parameter setting command, generates imaging parameters according to the imaging parameter setting command, obtains image data and MEMS angles according to the imaging command, imaging parameters, data DATAI, and data DATAQ, and transmits the image data to the image upload module and the LVDS download module respectively; when the parsed control command is an imaging command, transmits the imaging command to the imaging command processing module; receives the laser status information output by the laser control module; the laser control module: receives the laser off control signal, sends a light-off command sequence to the laser RS422 interface; receives the laser on control signal, sends a light-on command sequence to the laser RS422 interface; transmits the laser status information to the laser imaging protocol processing module; the image upload module: receives the image data, writes the image data into a dual-clock RAM in sequence, and after finishing writing a picture, sends a write picture complete interrupt signal to the processor; after receiving the interrupt signal, the processor reads out the image data from the dual-clock RAM sequentially by address through the EMIF interface until the reading is completed;The LVDS download module: receives the image data from the laser imaging protocol processing module, writes the image data into a dual-clock FIFO, then packs the data according to the LVDS protocol, and finally sends the image data out through the LVDS interface.

[0007] In the above-mentioned FPGA-based spacecraft lidar image acquisition and preprocessing system, the high-speed ADC module includes a high-speed ADC chip, a first IOD_RX unit, and a second IOD_RX unit; among them, the high-speed ADC chip: acquires the I-channel analog voltage value, Q-channel analog voltage value, and clock signal, processes the I-channel analog voltage value, Q-channel analog voltage value, and clock signal to obtain parallel data DI, parallel data DId, parallel data DQ, parallel data DQd, in-channel clock DCLKI, and in-channel clock DCLKQ, and transmits the parallel data DI, parallel data DId, and in-channel clock DCLKI to the first IOD_RX unit; transmits the parallel data DQ, parallel data DQd, and in-channel clock DCLKQ to the second IOD_RX unit; the first IOD_RX unit: receives the parallel data DI, parallel data DId, and in-channel clock DCLKI, processes the parallel data DI and parallel data Did according to the in-channel clock DCLKI to obtain data DATAI, and sends the data DATAI to the laser imaging protocol processing module; the second IOD_RX unit: receives the parallel data DQ, parallel data DQd, and in-channel clock DCLKQ, processes the parallel data DQ and parallel data DQd according to the in-channel clock DCLKQ to obtain data DATAQ, and sends the data DATAQ to the laser imaging protocol processing module.

[0008] In the above-mentioned FPGA-based spacecraft lidar image acquisition and preprocessing system, processing the parallel data DI and parallel data Did according to the in-channel clock DCLKI to obtain data DATAI includes: placing the parallel data DI in the lower 10 bits of the 20-bit signal DI_DDR, placing the parallel data DId in the higher 10 bits of the 20-bit signal DI_DDR, performing double-edge sampling using the in-channel clock DCLKI, placing the falling-edge data DI_F and falling-edge data DId_F in the highest 10 bits and the second-highest 10 bits of the data DATAI, and placing the rising-edge data DI_R and rising-edge data DId_R in the second-lowest 10 bits and the lowest 10 bits of the data DATAI, and finally sending the data DATAI to the laser imaging protocol processing module.

[0009] In the above-mentioned FPGA-based spacecraft lidar image acquisition and preprocessing system, the data DATAQ is obtained by processing the parallel data DQ and the parallel data DQd according to the clock DCLKQ along the path, which includes: placing the parallel data DQ in the lower 10 bits of the 20-bit signal DQ_DDR, placing the parallel data DQ in the higher 10 bits of the 20-bit signal DQ_DDR, performing double-edge sampling using the clock DCLKQ along the path, placing the falling-edge data DQ_F and the falling-edge data DDQd_F in the highest 10 bits and the second-highest 10 bits of the data DATAQ, and placing the rising-edge data DQ_R and the rising-edge data DQd_R in the second-lowest 10 bits and the lowest 10 bits of the data DATAQ. Finally, the data DATAQ is sent to the laser imaging protocol processing module.

[0010] In the above-mentioned FPGA-based spacecraft lidar image acquisition and preprocessing system, the laser imaging protocol processing module includes an RS422 command receiving module, a parameter setting command processing module, and an imaging command processing module. Among them, the RS422 command receiving module: receives the control command from the control command RS422 interface, parses the control command, and when the parsed control command is a parameter setting command, transmits the parameter setting command to the parameter setting command processing module; if the parameter setting command is an imaging command, transmits the imaging command to the imaging command processing module; the parameter setting command processing module: receives the parameter setting command, and if the parameter setting command is a standby in / standby out instruction, forwards the standby in / standby out instruction to the workflow management module; if the parameter setting command is an imaging parameter setting command, transmits the imaging parameters to the imaging command processing module; the imaging command processing module: receives the data DATAI, the data DATAQ, the imaging command, and the imaging parameters, obtains the image data and the MEMS angle according to the data DATAI, the data DATAQ, the imaging command, and the imaging parameters, and transmits the image data to the image upload module and the LVDS download module respectively.

[0011] In the above-mentioned FPGA-based spacecraft lidar image acquisition and preprocessing system, the laser imaging protocol processing module further includes an RS422 status sending module. Among them, the RS422 status sending module: receives the laser status information output by the laser control module.

[0012] In the above-mentioned FPGA-based spacecraft lidar image acquisition and preprocessing system, the imaging command processing module includes a pulse repetition period management module, a MEMS control module, an echo acquisition module, and a fitting algorithm module. Among them, the pulse repetition period management module: after receiving the imaging command, subtracts 1 from the pulse repetition period count freq at each rising edge of the working clock clk. When freq cnt is equal to 0, sets freq cnt = 0, and thencnt Reset to the initial value freq cnt0 , and set the start signal laser_sync of laser emission to 1; the MEMS control module: when detecting that the start signal laser_sync is 1, read the MEMS angle; the echo acquisition module: receive the data DATAI and the data DATAQ, write the data DATAI into the transmitted wave echo FIFO_I, write the data DATAQ into the received wave echo FIFO_Q, then read the data from the transmitted wave echo FIFO_I, search for the transmitted wave echo extreme point i and the time value hadc_i_ptcnt corresponding to the extreme point i, and gather the voltage values of the extreme point i, 9 points to the left of the extreme point i, and 10 points to the right of the extreme point i into an array hadc_i_data[19:0]; read the data from the received wave echo FIFO_Q, search for the received wave echo extreme point q and the time value hadc_q_ptcnt corresponding to the extreme point q, gather the voltage values of the extreme point q, 9 points to the left of the extreme point q, and 10 points to the right of the extreme point q into an array hadc_q_data[19:0], and then send the array hadc_i_data[19:0], the time value hadc_i_ptcnt corresponding to the extreme point i, the array hadc_q_data[19:0], and the time value hadc_q_ptcnt corresponding to the extreme point q to the fitting algorithm module; the fitting algorithm module: receive the array hadc_i_data[19:0], the time value hadc_i_ptcnt corresponding to the extreme point i, the array hadc_q_data[19:0], and the time value hadc_q_ptcnt corresponding to the extreme point q, perform curve fitting on the array hadc_i_data[19:0] to obtain the transmitted wave echo intensity value magnitude_i, perform curve fitting on the array hadc_q_data[19:0] to obtain the received wave echo intensity value magnitude_q, obtain the distance value dist according to the time value hadc_i_ptcnt corresponding to the extreme point i and the time value hadc_q_ptcnt corresponding to the extreme point q, and transmit the received wave echo intensity value magnitude_q and the distance value dist to the image upload module and the LVDS download module respectively.

[0013] In the above FPGA-based spacecraft lidar image acquisition and preprocessing system, the image data includes the received wave echo intensity value magnitude_q and the distance value dist.

[0014] In the above FPGA-based spacecraft lidar image acquisition and preprocessing system, the initial value freq cnt0 is obtained through the following formula:

[0015]

[0016] Among them, freq clk is the frequency of the working clock clk of the PRF period management module, and freq param is the PRF parameter.

[0017] In the above-mentioned FPGA-based spacecraft lidar image acquisition and preprocessing system, the imaging parameters include range gate parameters, echo acquisition threshold, and PRF parameters.

[0018] The present invention has the following beneficial effects compared with the prior art:

[0019] (1) The present invention realizes the core functions of lidar, can not only perform laser ranging, but also output three-dimensional imaging results, providing strong support for the operation of complex intelligent algorithms on the spacecraft control computer;

[0020] (2) The present invention searches for the maximum value of the echo through the multi-point parallel processing technology, speeds up the clutter screening speed of the reference light and the received light, shortens the time for collecting effective echoes, and thus processes the sampling data within 300 meters of detection distance within 5 microseconds;

[0021] (3) The present invention strengthens the lidar imaging module through the triple modular redundancy technology, reduces the probability of single event upset when applied to the spacecraft control computer, and enhances the reliability of the lidar imaging process;

[0022] (4) The present invention excludes interference signals through the echo sampling range gate technology and improves the accuracy of laser imaging through curve fitting by the least square method. Description of the Drawings

[0023] By reading the following detailed description of the preferred embodiments, various other advantages and benefits will become clear to those of ordinary skill in the art. The drawings are only for the purpose of showing the preferred embodiments and are not considered as limiting the present invention. Moreover, throughout the drawings, the same reference numerals are used to represent the same components. In the drawings:

[0024] Figure 1 is the structural block diagram of the FPGA-based spacecraft lidar image acquisition and preprocessing system provided by the embodiment of the present invention;

[0025] Figure 2 is the schematic diagram of the LVDS image downlink format provided by the embodiment of the present invention. Detailed Embodiments

[0026] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided so that the present disclosure can be more thoroughly understood and the scope of the present disclosure can be fully conveyed to those skilled in the art. It should be noted that, without conflict, the embodiments in the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the drawings and in conjunction with the embodiments.

[0027] Figure 1 is a structural block diagram of a spacecraft lidar image acquisition and preprocessing system based on FPGA provided by an embodiment of the present invention. As Figure 1 shown, the spacecraft lidar image acquisition and preprocessing system based on FPGA includes: a high-speed ADC module, a workflow management module, a laser imaging protocol processing module, a laser control module, an image upload module, and an LVDS download module. Among them,

[0028] High-speed ADC module: Collects the I-channel analog voltage value, Q-channel analog voltage value, and clock signal, processes the I-channel analog voltage value, Q-channel analog voltage value, and clock signal to obtain parallel data DI, parallel data DId, parallel data DQ, parallel data DQd, in-channel clock DCLKI, and in-channel clock DCLKQ, processes the parallel data DI, parallel data Did, and in-channel clock DCLKI to obtain data DATAI, and processes the parallel data DQ, parallel data DQd, and in-channel clock DCLKQ to obtain data DATAQ; sends the data DATAI and data DATAQ to the laser imaging protocol processing module. Specifically, the high-speed ADC module: Samples the two-channel (I-channel and Q-channel) analog voltage values through a high-speed ADC chip, outputs 10-bit parallel data DI, DId, DQ, DQd, and in-channel clocks DCLKI and DCLKQ. Then, for the I-channel data, places DI in the lower 10 bits of the 20-bit signal DI_DDR, places DId in the higher 10 bits of DI_DDR, and uses the DCLKI clock through the IOD_RX unit 1 inside the FPGA for dual-edge sampling, places the falling-edge data DI_F and DId_F in the highest 10 bits and the second-highest 10 bits of the 40-bit data DATAI, and places the rising-edge data DI_R and DId_R in the second-lowest 10 bits and the lowest 10 bits of DATAI, and finally sends DATAI to the laser imaging protocol processing module; performs similar processing on the Q-channel data, and obtains DATAQ after passing through the IOD_RX unit 2 inside the FPGA, and also sends DATAQ to the laser imaging protocol processing module.

[0029] Workflow management module: Receives an external reset signal. When the reset signal is just released or a standby command set by parameters is received, it sends a laser off control signal to the laser control module and controls the high-speed ADC module to power off. When a standby exit command set by parameters is received, it sends a laser on control signal to the laser control module and controls the high-speed ADC module to power on. Specifically, the workflow management module: Receives a clock and a reset signal. When the reset signal is just released or a standby command set by parameters is received, it sets the system to the standby mode. In this mode, it turns off the laser, clears the laser emission signal to 0, powers off the high-speed ADC, and sets the MEMS angle value to the initial value. When a standby exit command set by parameters is received, it first powers on the high-speed ADC, then performs high-speed ADC calibration through the signal cal. When cal_run changes from low to high and then from high to low, the calibration is completed. Next, it gives the laser emission signal according to the repetition frequency, then turns on the laser, and finally sets the system to the standby exit mode.

[0030] Laser imaging protocol processing module: Receives data DATAI and data DATAQ; Receives control commands from the control command RS422 interface, parses the control commands to obtain parameter setting commands and imaging commands. When the parsed control command is a parameter setting command, if the parameter setting command is a standby entry / exit instruction, it forwards the standby entry / exit instruction to the workflow management module; if the parameter setting command is an imaging parameter setting command, it generates imaging parameters according to the imaging parameter setting command, and obtains image data and MEMS angles based on the imaging command, imaging parameters, data DATAI, and data DATAQ, and transmits the image data to the image upload module and the LVDS download module respectively; when the parsed control command is an imaging command, it transmits the imaging command to the imaging command processing module; Receives the laser status information output by the laser control module. Specifically, the laser imaging protocol processing module: Receives data from the control command RS422 interface, parses the command through the RS422 command receiving sub-module. When a parameter setting command is received, it sends the command to the parameter setting command processing sub-module. When an imaging command is received, it sends the command to the imaging command processing sub-module. When imaging ends, it sends the status information through the RS422 status sending sub-module.

[0031] Laser control module: Receives the laser shutdown control signal and sends the light-off command sequence to the laser RS422 interface; receives the laser startup control signal and sends the light-on command sequence to the laser RS422 interface; transmits the laser status information to the laser imaging protocol processing module. Specifically, the laser control module: Receives the control signal from the workflow management module. When the laser startup command is valid, it sends the light-on command sequence to the laser RS422 interface. When the laser shutdown command is valid, it sends the light-off command sequence to the laser RS422 interface. At the same time, the laser control module also sends the telemetry command sequence to the laser at a frequency of once per second and sends the status information returned by the laser to the RS422 status sending sub-module of the laser imaging protocol processing module.

[0032] Image upload module: Receives the image data, writes the image data into a dual-clock RAM in sequence. After finishing writing one image, it sends the write-image complete interrupt signal to the processor; after receiving the interrupt signal, the processor reads out the image data from the dual-clock RAM sequentially by address until the reading is complete. Specifically, the image upload module: Receives the image data from the laser imaging protocol processing module, writes it into a dual-clock RAM in sequence. After finishing writing one image (256 * 256 pixels), it sends the write-image complete interrupt signal to the processor; after receiving the interrupt signal, the processor reads out the image data from the dual-clock RAM sequentially by address until the reading is complete.

[0033] LVDS download module: Receives the image data from the laser imaging protocol processing module, writes the image data into a dual-clock FIFO, then packs the data according to the LVDS protocol, and finally sends the image data out through the LVDS interface. Specifically, the LVDS download module: Receives the image data from the laser imaging protocol processing module, writes the data into a dual-clock FIFO, then packs the data according to the LVDS protocol, and finally sends the image data out through the LVDS interface.

[0034] The high-speed ADC module includes a high-speed ADC chip, a first IOD_RX unit, and a second IOD_RX unit; among them, the high-speed ADC chip: collects the I-channel analog voltage value, the Q-channel analog voltage value, and the clock signal, processes the I-channel analog voltage value, the Q-channel analog voltage value, and the clock signal to obtain parallel data DI, parallel data DId, parallel data DQ, parallel data DQd, in-channel clock DCLKI, and in-channel clock DCLKQ, and transmits the parallel data DI, parallel data DId, and in-channel clock DCLKI to the first IOD_RX unit; transmits the parallel data DQ, parallel data DQd, and in-channel clock DCLKQ to the second IOD_RX unit; the first IOD_RX unit: receives the parallel data DI, parallel data DId, and in-channel clock DCLKI, processes the parallel data DI and parallel data Did according to the in-channel clock DCLKI to obtain data DATAI, and sends the data DATAI to the laser imaging protocol processing module; the second IOD_RX unit: receives the parallel data DQ, parallel data DQd, and in-channel clock DCLKQ, processes the parallel data DQ and parallel data DQd according to the in-channel clock DCLKQ to obtain data DATAQ, and sends the data DATAQ to the laser imaging protocol processing module.

[0035] Processing the parallel data DI and parallel data Did according to the in-channel clock DCLKI to obtain data DATAI includes: placing the parallel data DI in the lower 10 bits of the 20-bit signal DI_DDR, placing the parallel data DId in the higher 10 bits of the 20-bit signal DI_DDR, performing double-edge sampling using the in-channel clock DCLKI, placing the falling-edge data DI_F and falling-edge data DId_F in the highest 10 bits and the second-highest 10 bits of the data DATAI, and placing the rising-edge data DI_R and rising-edge data DId_R in the second-lowest 10 bits and the lowest 10 bits of the data DATAI, and finally sending the data DATAI to the laser imaging protocol processing module.

[0036] Processing the parallel data DQ and parallel data DQd according to the in-channel clock DCLKQ to obtain data DATAQ includes: placing the parallel data DQ in the lower 10 bits of the 20-bit signal DQ_DDR, placing the parallel data DQ in the higher 10 bits of the 20-bit signal DQ_DDR, performing double-edge sampling using the in-channel clock DCLKQ, placing the falling-edge data DQ_F and falling-edge data DDQd_F in the highest 10 bits and the second-highest 10 bits of the data DATAQ, and placing the rising-edge data DQ_R and rising-edge data DQd_R in the second-lowest 10 bits and the lowest 10 bits of the data DATAQ, and finally sending the data DATAQ to the laser imaging protocol processing module.

[0037] The laser imaging protocol processing module includes an RS422 command receiving module, an RS422 status sending module, a parameter setting command processing module, and an imaging command processing module. Among them, the RS422 command receiving module: receives control commands from the control command RS422 interface, parses the control commands, and when the parsed control command is a parameter setting command, transmits the parameter setting command to the parameter setting command processing module; if the parameter setting command is an imaging command, transmits the imaging command to the imaging command processing module. The parameter setting command processing module: receives the parameter setting command. If the parameter setting command is a standby in / out instruction, forwards the standby in / out instruction to the workflow management module; if the parameter setting command is an imaging parameter setting command, transmits the imaging parameters to the imaging command processing module. Among them, the imaging parameters include range gate parameters, echo acquisition thresholds, and pulse repetition frequency parameters. The imaging command processing module: receives data DATAI, data DATAQ, imaging commands, and imaging parameters, obtains image data and MEMS angles based on the data DATAI, data DATAQ, imaging commands, and imaging parameters, and transmits the image data to the image upload module and the LVDS download module respectively. The RS422 status sending module: receives the laser status information output by the laser control module.

[0038] The RS422 command receiving module: receives data from the control command RS422 interface, parses the data. If it is a parameter setting command, sends the parameter setting type and parameters to the parameter setting command processing module. If it is an imaging command, sends the command to the imaging command processing module. If it is a status acquisition command, sends the command to the RS422 status sending module.

[0039] Specifically, the RS422 status sending module: receives the laser status information from the laser control module and the imaging status information from the imaging command processing module, latches the information, and when receiving the status acquisition command from the RS422 command receiving module, sends the latched status information in the RS422 protocol format; the parameter setting command processing module: receives the parameter setting command from the RS422 command receiving module, and processes it separately according to the parameter setting type and the set parameters. If it is a standby in / retreat command, the command is forwarded to the workflow management module. If it is an imaging parameter setting command, the range gate parameter, echo acquisition threshold, pulse repetition frequency parameter, etc. are sent to the imaging command processing module; the imaging command processing module: receives the imaging command from the RS422 command receiving module, performs laser imaging according to the specified pulse repetition frequency. When the count value of the pulse repetition frequency period management counter is 0, first adjust the MEMS angle value, wait for the MEMS to stabilize, then start the laser emission signal, and then enable the emission wave echo acquisition and the reception wave echo acquisition. Finally, send the obtained emission wave echo voltage value (mV), emission wave echo time value (ns), reception wave echo voltage value (mV), and reception wave echo time value (ns) to the fitting algorithm sub-module together. When the result of the algorithm sub-module is valid, output the distance value and intensity value returned by the algorithm as 1 pixel.

[0040] The imaging command processing module includes a pulse repetition frequency period management module, a MEMS control module, an echo acquisition module, and a fitting algorithm module; among them, the pulse repetition frequency period management module: after receiving the imaging command, subtracts 1 from the pulse repetition frequency count freq at each rising edge of the working clock clk. When freq cnt = 0, reset freq cnt to the initial value freq cnt cnt0 ​, and set the start signal laser_sync of the laser emission to 1; MEMS control module: when detecting that the start signal laser_sync is 1, read the MEMS angle; Echo acquisition module: receive data DATAI and data DATAQ, write data DATAI into the transmitted wave echo FIFO_I, write data DATAQ into the received wave echo FIFO_Q, then read data from the transmitted wave echo FIFO_I, search for the transmitted wave echo extreme point i and the time value hadc_i_ptcnt corresponding to the extreme point i, and collect the voltage values of the extreme point i, 9 points to the left of the extreme point i, and 10 points to the right of the extreme point i into an array hadc_i_data[19:0]; read data from the received wave echo FIFO_Q, search for the received wave echo extreme point q and the time value hadc_q_ptcnt corresponding to the extreme point q, and collect the voltage values of the extreme point q, 9 points to the left of the extreme point q, and 10 points to the right of the extreme point q into an array hadc_q_data[19:0], and then send the array hadc_i_data[19:0], the time value hadc_i_ptcnt corresponding to the extreme point i, the array hadc_q_data[19:0], and the time value hadc_q_ptcnt corresponding to the extreme point q to the fitting algorithm module; Fitting algorithm module: receive the array hadc_i_data[19:0], the time value hadc_i_ptcnt corresponding to the extreme point i, the array hadc_q_data[19:0], and the time value hadc_q_ptcnt corresponding to the extreme point q, perform curve fitting on the array hadc_i_data[19:0] to obtain the transmitted wave echo intensity value magnitude_i, perform curve fitting on the array hadc_q_data[19:0] to obtain the received wave echo intensity value magnitude_q, obtain the distance value dist according to the time value hadc_i_ptcnt corresponding to the extreme point i and the time value hadc_q_ptcnt corresponding to the extreme point q, and transmit the received wave echo intensity value magnitude_q and the distance value dist to the image upload module and the LVDS download module respectively.

[0041] The image data includes the received wave echo intensity value magnitude_q and the distance value dist.

[0042] Initial value freq cnt0 Obtained through the following formula:

[0043]

[0044] where freq clk is the frequency of the working clock clk of the PRF period management module, and freq param is the PRF parameter.

[0045] Specifically, the PRF period management module: internally sets a PRF period counter freq cnt , with an initial value of freq cnt0 calculates according to the PRF parameter freq specified by the parameter setting module param using the following formula:

[0046]

[0047] In the formula, freq clk is the frequency of the working clock clk of the PRF period management module. When an imaging command is received, freq is decremented by 1 at each rising edge of the working clock clk. When freq cnt = 0, freq cnt is reset to freq cnt , and the start signal laser_sync for laser emission is set to 1 and cleared after one clock cycle; cnt0

[0048] MEMS control module: When the laser_sync signal is detected as 1, according to the coordinate values of the current imaging pixel, the corresponding MEMS X coordinate angle value MEMS_X and MEMS Y coordinate angle value MEMS_Y are retrieved from the internal SRAM, and then MEMS_X and MEMSY are output to the external MEMS angle control unit;

[0049] Transmitted wave and received wave echo acquisition module: Writes DATAI and DATAQ from the high-speed ADC module to the transmitted wave echo FIFO_I and the received wave echo FIFO_Q respectively. The write end width is 40 bits, and the read end width is 640 bits. Then reads data from FIFO_I, searches for the transmitted wave echo extreme point i and the corresponding time value hadc_i_ptcnt, and aggregates the voltage values of the extreme point i, 9 points to the left of i, and 10 points to the right of i into an array hadc_i_data[19:0]. The data width of each point in the array is 10 bits. Reads data from FIFO_Q, searches for the received wave echo extreme point q and the corresponding time value hadc_q_ptcnt, and aggregates the voltage values of the extreme point q, 9 points to the left of q, and 10 points to the right of q into an array hadc_q_data[19:0]. Then sends the search results hadc_i_data[19:0], hadc_i_ptcnt, hadc_q_data[19:0], and hadc_q_ptcnt to the fitting algorithm module;

[0050] ​Fitting algorithm module: Perform curve fitting on the hadc_i_data from the transmitted wave and received wave echo acquisition module to obtain the transmitted wave echo intensity value magnitude_i, perform curve fitting on the hadc_i_data to obtain the received wave echo intensity value magnitude_q, then calculate the distance value dist based on the time values hadc_i_ptcnt and hadc_q_ptcnt, and finally send magnitude_q and dist to the image upload module and the LVDS download module.

[0051] (1) System architecture

[0052] A method for spacecraft lidar image acquisition and preprocessing based on FPGA, and an example of the implementation of its system architecture is Figure 1 as shown.

[0053] Figure 1 The system in [reference] includes: a high-speed ADC module, a workflow management module, a laser imaging protocol processing module, a laser control module, an image upload module, an LVDS download module, etc.

[0054] (2) High-speed ADC module

[0055] The external input clock of the high-speed ADC chip is 1 GHz, and the output data after internal sampling of the chip is DI, DId, DCLKI, DQ, DQd, and DCLKQ. DCLKI and DCLKQ are 250 MHz clocks synchronized with the output data.

[0056] When the FPGA processes the I-channel data, it first instantiates the PF_IOD_RX unit, uses the 20-bit data of DId&DI as the input end, and drives PF_IOD_RX for double-edge sampling with the 250 MHz clock DCLKI; then outputs 20 2-bit (the high bit is the falling-edge data, and the low bit is the rising-edge data) data and the synchronous clock s_DCLKI; finally, splice the low bits of the first 10 2-bit data together to form the data s_DI_R, splice the high bits together to form the data s_DI_F, splice the low bits of the last 10 2-bit data together to form the data s_DId_R, and splice the high bits together to form the data s_DId_F.

[0057] When processing the Q-channel data, use the 20-bit data of DQd&DQ as the input end, and drive PF_IOD_RX for double-edge sampling with the 250 MHz clock DCLKQ; then process the output 20 2-bit data in the same way as the I-channel to obtain s_DQ_R, s_DQ_F, s_DQd_R, s_DQd_F, and the output synchronous clock is s_DCLKQ.

[0058] After the above processing, the clocks and data output by the high-speed ADC data collected on the I channel and Q channel are respectively:

[0059] Clki <= s_DCLKI;

[0060] Clkq <= s_DCLKQ;

[0061] Datai <= s_DI_F & s_DId_F & s_DI_R & s_DId_R;

[0062] Dataq <= s_DQ_F & s_DQd_F & s_DQ_R & s_DQd_R;

[0063] (3) Workflow management module

[0064] 1) Initialization and entry into standby process

[0065] ① Send a shutdown command to the laser;

[0066] ② Power off the I channel and Q channel of the high-speed ADC;

[0067] ③ Stop sending the laser emission signal;

[0068] ④ Update the MEMS control DA drive values to the first X value and the first Y value in the MEMS table;

[0069] ⑤ Set the current mode to standby mode.

[0070] 2) Exit the standby process

[0071] ① Power on the I channel and Q channel of the high-speed ADC;

[0072] ② Perform calibration of the high-speed ADC;

[0073] ③ Start sending the laser emission signal according to the repetition frequency;

[0074] ④ Send an open command to the laser;

[0075] ⑤ Set the current mode to exit standby mode.

[0076] (4) Laser imaging protocol processing module

[0077] 1) RS422 command receiving process

[0078] ① When the FPGA is reset, it is in the idle state. Set the RS422 serial port receive FIFO clear signal s_rx_fifo_clear to 1, clear the receive enable signal s_rx_enable to 0, clear the receive FIFO read signal s_rx_read to 0, clear the received byte count s_rx_bytes to 0, clear all command receive flag signals, set s_rx_enable to 1, clear s_rx_fifo_clear to 0, then set the next state s_gncc_rs422_nst to 0x03, and then enter state 0x01;

[0079] ② In state 0x01, if the RS422 serial port receive FIFO empty flag s_rx_fifo_empty = '0', then the FPGA sets s_rx_read to 1 and then enters state 0x02;

[0080] ③ In state 0x02, assign the next state s_gncc_rs422_nst to the current state s_gncc_rs422_st;

[0081] ④ In state 0x03, determine whether the condition (s_rx_bytes = 0x00 and the received data s_rx_data = 0xEB) is satisfied. If satisfied, set s_gncc_rs422_nst to 0x04 and increment s_rx_bytes by 1. Otherwise, set s_gncc_rs422_nst to 0x03, clear s_rx_bytes to 0, and then jump to state 0x01;

[0082] ⑤ In state 0x04, determine whether the condition (s_rx_bytes = 0x01 and the received data s_rx_data = 0x90) is satisfied. If satisfied, set s_gncc_rs422_nst to 0x05 and increment s_rx_bytes by 1. Otherwise, set s_gncc_rs422_nst to 0x03, clear s_rx_bytes to 0, and then jump to state 0x01;

[0083] ⑥In state 0x05, set s_gncc_rs422_nst according to the received data s_rx_data to determine the specific processing branch. When s_rx_data = 0x01, s_gncc_rs422_nst = 0x10, and jump to the receiving processing branch of the imaging command; when s_rx_data = 0x02, s_gncc_rs422_nst = 0x20, and jump to the receiving processing branch of the internal parameter setting command; when s_rx_data = 0x06, s_gncc_rs422_nst = 0x60, and jump to the receiving processing branch of the status acquisition command; when s_rx_data is equal to other values, the FPGA gives the command error flag s_gncc_cmd_err, and then returns to state 0x01.

[0084] 2) RS422 status sending process

[0085] ①When the FPGA is reset, the sending FIFO clear signal s_tx_fifo_clear of the RS422 serial port should be set to 1, the sending enable signal s_tx_enable should be cleared to 0, the sending FIFO write signal s_tx_write should be cleared to 0, and the number of bytes to be sent s_tx_bytes should be cleared to 0;

[0086] ②After reset, check whether the checksum error flag s_gncc_chksum_err, the command error flag s_gncc_cmd_err, and each protocol command flag (s_gncc_3dimg_cmd, s_gncc_paramset_cmd, s_gncc_rtget_cmd, etc.) are valid. If there is an error in s_gncc_chksum_err or s_gncc_cmd_err, return the error code (0xFF);

[0087] ③When s_gncc_rtget_cmd is valid, the FPGA should send the status information according to the following steps:

[0088] Step 1: The FPGA sets s_get_t_req and s_get_adc128h_req to 1 to request to obtain the laser telemetry information (laser seed light temperature, main amplifier temperature, pre-amplifier temperature, main amplifier power, pre-amplifier power, laser status, etc.) and the internal analog quantity (3.3V, 2.5V, 1.8V, 1.0V voltage values and APD temperature) information;

[0089] Step 2: Send the first 3 bytes 0xEB9006 to the RS422 serial port, and then send the data byte by byte according to the serial port protocol. After sending all the telemetry information, send 1 byte of checksum;

[0090] Step 3: Wait for the transmit FIFO empty signal s_tx_fifo_empty='1' of the UART module, and wait for 0x2000 clock cycles, then end the telemetry information transmission process.

[0091] 3) Parameter setting command processing

[0092] After the FPGA receives the parameter setting command (instruction ID = 0x02) through the RS422 serial port, it should first check whether the checksum of the data is correct. If the checksum is correct, give a high pulse of the parameter setting command flag signal s_gncc_paramset_cmd, and extract the register ID, parameter 1 (param1) to parameter 4 (param4) of this command and hand them over to the parameter setting module for processing. If the checksum is incorrect, discard both the command and the data.

[0093] Inside the parameter setting module, the FPGA determines the type to be processed based on the externally input register ID and a set of parameters, correctly identifies the parameter setting command list, processes them separately according to the parameter type, latches the parameter values, and outputs the corresponding control signals.

[0094] 4) Imaging command processing

[0095] After the FPGA receives the three-dimensional imaging command (instruction ID = 0x01), it first checks whether the checksum is correct. If it is correct, give a high pulse of the three-dimensional imaging command flag s_gncc_3dimg_cmd to notify the three-dimensional imaging module to perform the imaging operation. Otherwise, discard both the command and the data.

[0096] ① Pulse repetition frequency time control

[0097] The main function of the three-dimensional imaging module is to periodically complete operations such as MEMS mirror setting, laser emission pulse signal output, output of the start signal (startsample_i) for collecting the echo of the transmitted wave, output of the start signal (startsample_q) for collecting the start of the echo of the received wave, and judging the validity of the transmitted wave echo and received wave echo data according to a certain pulse repetition frequency (default period 5us, which can be modified by the parameter setting command).

[0098] If no valid transmitted wave echo or received wave echo is collected within the specified pulse repetition frequency time, the FPGA forcibly ends the current pulse repetition period, outputs a set of invalid data, gives a data invalid flag, and starts the next pulse repetition operation. If valid transmitted wave echo and received wave echo are collected within the specified pulse repetition frequency time, the FPGA waits for the end of the current pulse repetition period, outputs a set of valid data, gives a data valid flag, and then starts the next pulse repetition operation.

[0099] ② High-speed ADC data preprocessing

[0100] In the preprocessing section, the 40-bit data obtained by high-speed ADC sampling should first be output to the buffer FIFO. Since there are two channels of echo data, two buffer FIFOs should be added. The start command for the transmitted-wave echo buffer FIFO is the high pulse of startsample_i. Similarly, the start command for the received-wave echo buffer FIFO is the high pulse of startsample_q.

[0101] ③ Sampling data processing module

[0102] The sampling data processing module is used to further process the data in the preprocessing buffer FIFO. The main operations should include: data splicing, searching for extreme points of the spliced data, judging the value of the extreme points, and result output. The processing steps for the transmitted-wave echo and the received-wave echo are basically the same, except for the stage of judging the value of the extreme points. In this stage, for the transmitted-wave echo, only the amplitude value needs to be judged against a threshold, while for the received-wave echo, a range gate (used to eliminate the adverse effects of aerogel, and the parameter value is set by the parameter setting command) also needs to be judged.

[0103] Data splicing can combine 64 sampling points (each sampling point is 10 bits) together to form a group of 640-bit data, and then write it into a dual-clock FIFO. The operation of searching for extreme points of the spliced data is to judge whether the dual-clock FIFO is empty at each rising edge of the read clock. If it is not empty, 640 bits of data (64 points) are read out at one time, and the 64 points are written into a 750-bit-wide register (the writing position is from the 10th point to the 73rd point. Initially, the first 9 points are 0, and the 74th and 75th points are 0). Then, the amplitudes Hn (1≦n≦75) of these 75 points are compared and analyzed. If the i-th (10≦i≦73) point is larger than the amplitude values of its two previous points (Hi>Hi-1∧Hi-1>Hi-2), and not less than the amplitude values of its two subsequent points (Hi≥Hi+1∧Hi+1≥Hi+2), then i is the extreme point that meets the conditions. If no extreme point is found, the last 11 points in the 750-bit register Reg are moved to the first 11 points, then 64 points are taken from the FIFO and spliced to the last 64 points of Reg, and the search continues.

[0104] The judgment of the value of the extreme point is to perform a threshold judgment on the amplitude value and a range gate judgment on the searched extreme point. If the extreme point does not meet the criterion, the extreme point search process continues; otherwise, the search process is exited, and the extreme point that meets the criterion is output as the result.

[0105] ④ Curve fitting algorithm data processing

[0106] The FPGA shall input a total of 20 points, namely the extreme points of the valid echoes collected, 9 points before the extreme points, and 10 points after the extreme points, into the curve fitting algorithm module. After calculation by the algorithm module, information such as the received wave amplitude, received wave position, and distance measurement value is obtained, and then sent to the image upload module and the LVDS download module as a point of the laser 3D image (16-bit distance value + 16-bit intensity value, the intensity value is in the low byte, and the MEMS X voltage value is in the high byte).

[0107] (5) LVDS Download Module

[0108] After the FPGA executes the imaging instruction, it shall write the image data into the download FIFO and then execute the image download. The image download shall adopt a seven-wire system (1 clock signal, 1 field sync signal, 1 line sync signal, 4 data signals). The field sync signal is active high, and the line sync signal is active low.

[0109] When transmitting the image, the FPGA download unit first judges the download start signal lvds_dn_start. When this signal is 1 and the download buffer FIFO is not empty, it enters the working state; otherwise, it stays in the idle state. After entering the working state, the data is output in sequence according to the Figure 2 shown LVDS download format.

[0110] (6) Image Upload Module

[0111] The main steps for the FPGA to transmit the image to the external processor are as follows:

[0112] 1) Shared SRAM

[0113] The FPGA designs a dual-clock SRAM to cache the imaging data after the start of image capture for the external processor to read. The size of this shared SRAM (U0_PF_URAM_C0) is 256 * 2 * 64 bits, which can cache 2 rows of image data. After 2 rows of image caching are completed, the FPGA shall send a read image interrupt to the processor to notify the processor software to read the image data in time.

[0114] 2) Imaging Data Writing into SRAM State Machine

[0115] The FPGA designs an imaging data writing into SRAM state machine to achieve the orderly writing of imaging data into the shared SRAM and the issuance of interrupt signals. The main working steps of this state machine are as follows:

[0116] ① When power-on reset or detecting the high level of the single imaging command flag, the image transmission state machine is in the idle state;

[0117] ② In the idle state, after the image reading interrupt, the first write SRAM flag s_firstwram is set to 1, the imaging data FIFO reset signal s_ufifo_rst is set to 1, the interrupt count counter s_irqcnt and the SRAM write length count value s_imgsram_wlen are cleared to 0. When the reset is completed or the single imaging command flag is 0, the image transfer state machine enters state 9;

[0118] ② In state 9, wait for 1 us and then enter state 0xA;

[0119] ③ In state 0xA, clear the s_ufifo_rst signal to 0, and then jump to state 0xB;

[0120] ④ In state 0xB, wait for 1 us and then enter state 0xC;

[0121] ⑤ In state 0xC, wait for the image buffer FIFO to be non-empty (i.e., s_ufifowram_empty = 0), and then check if s_firstwram is 1. If it is, clear s_firstwram to 0 and then enter state 5; otherwise, enter state 6;

[0122] ⑥ In state 5, wait for 1 us, and then enter state 6;

[0123] ⑦ In states 6 - 8, read 32-bit imaging data from the image buffer FIFO, then latch the data into s_imgsram_wrdata, assign s_imgsram_wlen to s_imgsram_wraddr, and then enter state 1;

[0124] ⑧ In state 1, set the write signal s_imgsram_wen of SRAM U0_PF_URAM_C0 to 1, increment the write count value s_imgsram_wlen by 1, and then jump to state 2;

[0125] ⑨ In state 2, check if s_imgsram_wlen is greater than or equal to the pixel count of 2 rows, which is 0x200. If it is, set the interrupt flag s_wimg_ok to 1, increment the interrupt count s_irqcnt by 1, clear the SRAM write length count value s_imgsram_wlen to 0, and then enter state 3. If s_imgsram_wlen is less than 0x200, return to state 0xC to continue reading the next 32-bit image data from the image buffer FIFO and writing it to the SRAM;

[0126] ⑩In states 3 to 4, clear the interrupt flag s_wimg_ok to 0, and then determine whether the interrupt count value s_irqcnt is greater than or equal to 0x80. If so, it indicates that a whole image has been forwarded, and return to the idle state; otherwise, return to state 0xC to continue forwarding the next image data.

[0127] This embodiment uses an aerospace-grade high-speed ADC device to collect the reference light and received light of the laser with nanosecond-level time accuracy, quickly process the data output by the high-speed ADC in the FPGA, then preprocess the laser image through a curve fitting algorithm, and output the imaging result in the form of distance plus gray scale; the laser radar imaging module can be parameterized and its status can be obtained through the RS422 interface; the echo maximum value is searched through the FPGA multi-point parallel processing technology, which speeds up the clutter screening speed of the reference light and received light, shortens the time for collecting effective echoes, and thus processes the sampling data within 300 meters of detection distance within 5 microseconds; the laser radar imaging module is fortified through the triple modular redundancy technology, which reduces the probability of single-event upsets when applied to the spacecraft control computer and enhances the reliability of the laser imaging process; through the range gate technology, the minimum distance threshold of the received wave is set, effectively excluding the interference of aerosols on laser imaging and improving the imaging accuracy.

[0128] This embodiment can not only perform laser ranging, but also realize laser three-dimensional imaging. By adopting the method of multi-point parallel processing to speed up the clutter screening speed and shorten the time for collecting effective echoes, it can complete the echo collection and fitting algorithm processing within 5 us. And through the triple modular redundancy technology, the laser radar imaging module is fortified, which reduces the probability of single-event upsets when applied to the spacecraft control computer and enhances the reliability of the laser imaging process. Through the range gate technology, the minimum distance threshold of the received wave is set, effectively excluding the interference of aerosols on laser imaging and improving the imaging accuracy.

[0129] Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make possible changes and modifications to the technical solutions of the present invention without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solutions of the present invention all fall within the protection scope of the technical solutions of the present invention.

Claims

1. A spacecraft laser radar image acquisition and preprocessing system based on FPGA, characterized in that include: High-speed ADC module, workflow management module, laser imaging protocol processing module, laser control module, image upload module and LVDS download module; among them, The high-speed ADC module: collects the analog voltage value of I channel, the analog voltage value of Q channel and the clock signal, processes the analog voltage value of I channel, the analog voltage value of Q channel and the clock signal to obtain parallel data DI, parallel data DId, parallel data DQ, parallel data DQd, accompanying clock DCLKI and accompanying clock DCLKQ, processes the parallel data DI, parallel data Did and accompanying clock DCLKI to obtain data DATAI, processes the parallel data DQ, parallel data DQd and accompanying clock DCLKQ to obtain data DATAQ; sends the data DATAI and data DATAQ to the laser imaging protocol processing module; The workflow management module receives an external reset signal, and when the reset signal is just released or a parameter-set standby command is received, sends a laser-off control signal to the laser control module, and controls the high-speed ADC module to turn off the power; when a parameter-set standby exit command is received, sends a laser-on control signal to the laser control module, and controls the high-speed ADC module to turn on the power; The laser imaging protocol processing module: receives data DATAI and data DATAQ; receives a control command from a control command RS422 interface, parses the control command to obtain a parameter setting command and an imaging command, and when it is parsed that the control command is a parameter setting command, if the parameter setting command is an advance / retreat standby command, forwards the advance / retreat standby command to the workflow management module; if the parameter setting command is an imaging parameter setting command, generates imaging parameters according to the imaging parameter setting command, obtains image data and MEMS angle according to the imaging command, imaging parameters, data DATAI and data DATAQ, and transmits the image data to the image upload module and the LVDS download module respectively; when it is parsed that the control command is an imaging command, transmits the imaging command to the imaging command processing module; receives laser status information output by the laser control module; The laser control module: receives a laser off control signal, and sends a light off command sequence to the laser RS422 interface; receives a laser on control signal, and sends a light on command sequence to the laser RS422 interface; transmits the laser status information to the laser imaging protocol processing module; The image upload module receives image data and writes the image data into a dual-clock RAM in sequence. After writing a picture, it sends a picture writing completion interrupt signal to the processor. After receiving the interrupt signal, the processor reads the image data from the dual-clock RAM in sequence according to the address through the EMIF interface until the reading is completed. The LVDS downlink module receives the image data from the laser imaging protocol processing module, writes the image data into a dual-clock FIFO, then packages the data according to the LVDS protocol, and finally sends the image data out through the LVDS interface.

2. The FPGA-based spacecraft laser radar image acquisition and preprocessing system according to claim 1, characterized in that: The high-speed ADC module includes a high-speed ADC chip, a first IOD_RX unit and a second IOD_RX unit; wherein, The high-speed ADC chip collects an analog voltage value of I, an analog voltage value of Q and a clock signal, processes the analog voltage value of I, the analog voltage value of Q and the clock signal to obtain parallel data DI, parallel data DId, parallel data DQ, parallel data DQd, a clock DCLKI and a clock DCLKQ, and transmits the parallel data DI, the parallel data DId and the clock DCLKI to the first IOD_RX unit; transmits the parallel data DQ, the parallel data DQd and the clock DCLKQ to the second IOD_RX unit; The first IOD_RX unit receives parallel data DI, parallel data DId and an accompanying clock DCLKI, processes the parallel data DI and the parallel data Did according to the accompanying clock DCLKI to obtain data DATAI, and sends the data DATAI to the laser imaging protocol processing module; The second IOD_RX unit receives parallel data DQ, parallel data DQd and the accompanying clock DCLKQ, processes the parallel data DQ and the parallel data DQd according to the accompanying clock DCLKQ to obtain data DATAQ, and sends the data DATAQ to the laser imaging protocol processing module.

3. The FPGA-based spacecraft laser radar image acquisition and preprocessing system according to claim 2, characterized in that: According to the accompanying clock DCLKI, the parallel data DI and the parallel data Did are processed to obtain the data DATAI including: The parallel data DI is placed in the lower 10 bits of the 20-bit signal DI_DDR, and the parallel data DId is placed in the upper 10 bits of the 20-bit signal DI_DDR. Double-edge sampling is performed using the accompanying clock DCLKI, and the falling edge data DI_F and the falling edge data DId_F are placed in the highest 10 bits and the second highest 10 bits of the data DATAI, and the rising edge data DI_R and the rising edge data DId_R are placed in the second lowest 10 bits and the lowest 10 bits of the data DATAI. Finally, the data DATAI is sent to the laser imaging protocol processing module.

4. The FPGA-based spacecraft laser radar image acquisition and preprocessing system according to claim 2, characterized in that: The parallel data DQ and the parallel data DQd are processed according to the accompanying clock DCLKQ to obtain the data DATAQ including: Place the parallel data DQ to the lower 10 bits of the 20-bit signal DQ_DDR, place the parallel data DQ to the upper 10 bits of the 20-bit signal DQ_DDR, use the accompanying clock DCLKQ for double-edge sampling, place the falling edge data DQ_F and the falling edge data DDQd_F to the highest 10 bits and the second highest 10 bits of the data DATAQ, and place the rising edge data DQ_R and the rising edge data DQd_R to the second lowest 10 bits and the lowest 10 bits of the data DATAQ, and finally send the data DATAQ to the laser imaging protocol processing module.

5. The FPGA-based spacecraft laser radar image acquisition and preprocessing system according to claim 1, characterized in that: The laser imaging protocol processing module includes an RS422 command receiving module, a parameter setting command processing module and an imaging command processing module; wherein, The RS422 command receiving module receives a control command from the control command RS422 interface, parses the control command, and transmits the parameter setting command to the parameter setting command processing module when the control command is parsed to be a parameter setting command; if the parameter setting command is an imaging command, transmits the imaging command to the imaging command processing module; The parameter setting command processing module receives a parameter setting command, and if the parameter setting command is an advance / retreat standby command, forwards the advance / retreat standby command to the workflow management module; if the parameter setting command is an imaging parameter setting command, transmits the imaging parameters to the imaging command processing module; The imaging command processing module receives data DATAI, data DATAQ, imaging commands and imaging parameters, obtains image data and MEMS angle according to the data DATAI, data DATAQ, imaging commands and imaging parameters, and transmits the image data to the image upload module and the LVDS download module respectively.

6. The FPGA-based spacecraft laser radar image acquisition and preprocessing system according to claim 5, characterized in that: The laser imaging protocol processing module also includes an RS422 status sending module; wherein the RS422 status sending module receives laser status information output by the laser control module.

7. The FPGA-based spacecraft laser radar image acquisition and preprocessing system according to claim 5, characterized in that: The imaging command processing module includes a repetition cycle management module, a MEMS control module, an echo acquisition module and a fitting algorithm module; wherein, The repetition frequency cycle management module: after receiving the imaging command, the repetition frequency cycle count freq is counted at each rising edge of the working clock clk cnt Minus 1, when freq cnt = 0, the freq cnt Reset to initial value freq cnt0 , and set the laser emission start signal laser_sync to 1; The MEMS control module: when detecting that the start signal laser_sync is 1, reads the MEMS angle; The echo acquisition module: receives data DATAI and data DATAQ, writes data DATAI into the transmission wave echo FIFO_I, writes data DATAQ into the reception wave echo FIFO_Q, then reads data from the transmission wave echo FIFO_I, searches for the transmission wave echo extreme point i and the time value hadc_i_ptcnt corresponding to the extreme point i, collects the voltage values ​​of the extreme point i, the 9 points to the left of the extreme point i and the 10 points to the right of the extreme point into an array hadc_i_data[19:0]; reads data from the reception wave echo FIFO_Q Read the data, search for the extreme point q of the received wave echo and the time value hadc_q_ptcnt corresponding to the extreme point q, collect the voltage values ​​of the extreme point q, the 9 points to the left of the extreme point q and the 10 points to the right of the extreme point q into an array hadc_q_data[19:0], and then send the array hadc_i_data[19:0], the time value hadc_i_ptcnt corresponding to the extreme point i, the array hadc_q_data[19:0] and the time value hadc_q_ptcnt corresponding to the extreme point q to the fitting algorithm module; The fitting algorithm module: receives the array hadc_i_data[19:0], the time value hadc_i_ptcnt corresponding to the extreme point i, the array hadc_q_data[19:0] and the time value hadc_q_ptcnt corresponding to the extreme point q, performs curve fitting on the array hadc_i_data[19:0] to obtain the transmitted wave echo intensity value magnitude_i, performs curve fitting on the array hadc_q_data[19:0] to obtain the received wave echo intensity value magnitude_q, obtains the distance value dist according to the time value hadc_i_ptcnt corresponding to the extreme point i and the time value hadc_q_ptcnt corresponding to the extreme point q, and transmits the received wave echo intensity value magnitude_q and the distance value dist to the image upload module and the LVDS download module respectively.

8. The FPGA-based spacecraft lidar image acquisition and preprocessing system according to claim 5 or 7, characterized in that: The image data includes a received wave echo intensity value magnitude_q and a distance value dist.

9. The FPGA-based spacecraft laser radar image acquisition and preprocessing system according to claim 7, characterized in that: Initial value freq cnt0 It is obtained by the following formula: Among them, freq clk is the frequency of the working clock clk of the re-frequency cycle management module, freq param is the repetition frequency parameter.

10. The FPGA-based spacecraft laser radar image acquisition and preprocessing system according to claim 6, characterized in that: The imaging parameters include range gate parameters, echo acquisition thresholds, and repetition rate parameters.

Images