One-key start-stop switch control circuit and device

Abstract

The invention discloses a one-key start-stop switch control circuit and device, the one-key start-stop switch control circuit comprises a start-stop switch SW1 and a power-on and power-off circuit, one-key start-stop switch control is realized only through elements and an integrated circuit, compared with an existing knob type structure, the one-key start-stop switch control circuit is simple to operate and high in control efficiency, and compared with a key type switch structure, the one-key start-stop switch control circuit does not need a programming storage chip and is convenient to use. The design of an external detection circuit of the whole machine is omitted, and the use of controller ports is reduced.

Description

Technical Field

[0001] The present invention relates to a one - key start - stop switch control circuit and device, belonging to the field of construction machinery. Background Art

[0002] One - key start - stop switches have been widely used in road vehicles and construction machinery. Existing one - key start - stop switches are mainly divided into two categories: One is the rotary type, see Figure 1 , which is composed of a rotary switch and a push - button switch. Different signals (power - on, power - off or start) are distinguished by different operations of the rotary switch and the push - button switch. In essence, it is a combination of two switches, with relatively complex operations and low control efficiency; The other is the push - button type switch, see Figure 2 , which mainly distinguishes switch action information through an external circuit and a controller. The distinction between start and stop signals entirely depends on the external circuit and the control unit, requiring a programmable storage chip, with high costs and a complex external circuit. Summary of the Invention

[0003] The present invention provides a one - key start - stop switch control circuit and device, which solves the problems disclosed in the background art.

[0004] According to one aspect of the present disclosure, a one - key start - stop switch control circuit is provided, including a start - stop switch SW1 and a power - on / off circuit including an OR gate U3. The first end of the start - stop switch SW1 is externally connected to a first power supply, and the second end of the start - stop switch SW1 is connected to the input end of the power - on / off circuit; When the start - stop switch SW1 is pressed for a first preset time and when it is released after being pressed for the first preset time, the output end of the OR gate U3 outputs a high level to control the output end of the power - on / off circuit to output a power - on signal when the output end of the power - on / off circuit does not output a power - on signal; When the start - stop switch SW1 is released after being pressed for the first preset time when the output end of the power - on / off circuit outputs a power - on signal, the output end of the OR gate U3 outputs a low level to control the output end of the power - on / off circuit to output a power - off signal.

[0005] Furthermore, the power - on / off circuit further includes a delay trigger switch U2, a PMOS transistor Q1, an NMOS transistor Q2, an NMOS transistor Q3, and a PMOS transistor Q4; The second terminal of the start-stop switch SW1 is respectively connected to the 1st pin of the delay trigger switch U2 and the G pole of the NMOS transistor Q2. The S pole of the NMOS transistor Q2 is grounded. The D pole of the NMOS transistor Q2 is connected to the G pole of the PMOS transistor Q1. The S pole of the PMOS transistor Q1 is connected to the second power supply. The D pole of the PMOS transistor Q1 and the 4th pin of the delay trigger switch U2 are respectively connected to the 1st pin and the 2nd pin of the OR gate U3. The 4th pin of the OR gate U3 is connected to the G pole of the NMOS transistor Q3. The S pole of the NMOS transistor Q3 is grounded. The D pole of the NMOS transistor Q3 is connected to the G pole of the PMOS transistor Q4. The S pole of the PMOS transistor Q4 is connected to the first power supply. The D pole of the PMOS transistor Q4 serves as the output terminal of the power-on and power-off circuit.

[0006] Further, in the power-on and power-off circuit, a resistor R1 is connected between the second terminal of the start-stop switch SW1 and the G pole of the NMOS transistor Q2. A resistor R2 is connected between the G pole and the S pole of the NMOS transistor Q2. A resistor R3 is connected between the D pole of the PMOS transistor Q1 and the ground. A resistor R6 is connected between the D pole of the NMOS transistor Q3 and the G pole of the PMOS transistor Q4. A resistor R5 is connected between the G pole and the S pole of the PMOS transistor Q4.

[0007] Further, it also includes a start and start protection circuit including an AND gate U6. The input terminal of the start and start protection circuit is connected to the second terminal of the start-stop switch SW1; When the start-stop switch SW1 is pressed for a second preset time under the condition that a power-on signal is output at the output terminal of the power-on and power-off circuit, the output terminal of the AND gate U6 outputs a high level to control the output terminal of the start and start protection circuit to output a start signal; When the start-stop switch SW1 is pressed for a third preset time under the condition that a power-on signal is output at the output terminal of the power-on and power-off circuit, the output terminal of the AND gate U6 outputs a low level to control the output terminal of the start and start protection circuit to output floating.

[0008] Further, the start and start protection circuit also includes an NMOS transistor Q5, an NMOS transistor Q6, a PMOS transistor Q7, an NMOS transistor Q8, a first turn-on time control device, a second turn-on time control device, a D flip-flop U5, a D flip-flop U7 and an inverter U4; The second terminal of the start-stop switch SW1 is respectively connected to the G poles of the NMOS transistors Q5 and Q8. The S poles of the NMOS transistors Q5 and Q8 are grounded. The D pole of the NMOS transistor Q5 is respectively connected to the second power supply and the 7th pin of the D flip-flop U7. The 5th and 6th pins of the D flip-flop U7 are connected to the first turn-on time control device. The 3rd pin of the D flip-flop U7 is connected to the 2nd pin of the inverter U4. The 4th pin of the inverter U4 is connected to the 5th pin of the AND gate U6. The D pole of the NMOS transistor Q8 is respectively connected to the second power supply and the 7th pin of the D flip-flop U5. The 5th and 6th pins of the D flip-flop U5 are connected to the second turn-on time control device. The 3rd pin of the D flip-flop U5 is connected to the 6th pin of the AND gate U6. The 1st pin of the AND gate U6 is connected to the output terminal of the OR gate U3. The 7th pin of the AND gate U6 is connected to the G pole of the NMOS transistor Q6. The S pole of the NMOS transistor Q6 is grounded. The D pole of the NMOS transistor Q6 is connected to the G pole of the PMOS transistor Q7. The S pole of the PMOS transistor Q7 is connected to the first power supply. The D pole of the PMOS transistor Q7 serves as the output terminal of the start-up and start-up protection circuit. Among them, the first turn-on time control device and the second turn-on time control device respectively control the turn-on times of the D flip-flop U7 and the D flip-flop U5.

[0009] Further, in the start-up and start-up protection circuit, a resistor R9 is connected between the second terminal of the start-stop switch SW1 and the G pole of the NMOS transistor Q5. A resistor R10 is connected between the G pole and the S pole of the NMOS transistor Q5. A resistor R12 is connected between the second terminal of the start-stop switch SW1 and the G pole of the NMOS transistor Q8. A resistor R13 is connected between the G pole and the S pole of the NMOS transistor Q8. A resistor R17 is connected between the G pole and the S pole of the NMOS transistor Q6. A resistor R19 is connected between the D pole of the NMOS transistor Q6 and the G pole of the PMOS transistor Q7. A resistor R18 is connected between the G pole and the S pole of the PMOS transistor Q7. A resistor R8 is connected between the D pole of the NMOS transistor Q5 and the second power supply. A resistor R11 is connected between the D pole of the NMOS transistor Q8 and the second power supply.

[0010] Further, the first turn-on time control device includes a resistor R7, a capacitor C4, and a diode D3. One end of the resistor R7 is connected to the second power supply. The other end of the resistor R7 is respectively connected to the positive electrode of the capacitor C4, the positive electrode of the diode D3, and the 6th pin of the D flip-flop U7. The negative electrode of the capacitor C4 is grounded. The negative electrode of the diode D3 is connected to the 5th pin of the D flip-flop U7. The second turn-on time control device includes a resistor R14, a capacitor C3, and a diode D4. One end of the resistor R14 is connected to the second power supply. The other end of the resistor R14 is respectively connected to the positive electrode of the capacitor C3, the positive electrode of the diode D4, and the 6th pin of the D flip-flop U5. The negative electrode of the capacitor C3 is grounded. The negative electrode of the diode D4 is connected to the 5th pin of the D flip-flop U5.

[0011] Further, the second power supply is obtained by converting the first power supply through a power conversion circuit.

[0012] According to another aspect of the present disclosure, there is provided a device including the above-mentioned one-key start-stop switch control circuit.

[0013] The beneficial effects achieved by the present invention are as follows: 1. The present invention includes a start-stop switch SW1 and a power-on and power-off circuit, and realizes one-key start-stop switch control only through components and integrated circuits. Compared with the existing rotary knob structure, the operation is simple and the control efficiency is high. Compared with the push-button switch structure, there is no need for a programming storage chip, eliminating the design of the external detection circuit of the whole machine and reducing the use of controller ports, with low cost; 2. In the start-up and start-up protection circuit of the present invention, the start-up time control is realized through the circuit, and signals with different delay times can be output by adjusting the parameters of electronic components, realizing start-up protection for the required time without occupying the controller ports. Description of the Drawings

[0014] Figure 1 is a schematic diagram of a rotary knob type start-stop switch circuit; Figure 2 is a schematic diagram of a push-button type start-stop switch control circuit; Figure 3 is a schematic diagram of a one-key start-stop switch control circuit; Figure 4 is a schematic diagram of a start-up and start-up protection circuit; Figure 5 is a schematic diagram of a power conversion circuit; Figure 6 is a schematic diagram of a status display circuit. Detailed Embodiments

[0015] Next, the technical solutions in the embodiments of the present disclosure will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all of the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and in no way limits the present disclosure and its application or use. Based on the embodiments in the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present disclosure.

[0016] Unless otherwise specifically stated, the relative arrangements, numerical expressions, and numerical values of the components set forth in these embodiments do not limit the scope of the present disclosure.

[0017] At the same time, it should be understood that for the convenience of description, the dimensions of the various parts shown in the drawings are not drawn in actual proportional relationship.

[0018] Technologies, methods, and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, such technologies, methods, and devices should be considered as part of the specification.

[0019] In all the examples shown and discussed herein, any specific values should be construed as merely exemplary and not as a limitation. Thus, other examples of the exemplary embodiments may have different values.

[0020] It should be noted that like reference signs and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof in subsequent figures is not necessary.

[0021] Meanwhile, in the description of the embodiments of the present application, terms such as "first", "second", etc. are only used for distinguishing descriptions and should not be construed as indicating or implying relative importance. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more features.

[0022] To solve the problems existing in the traditional one - key start - stop switch, the present disclosure proposes a control circuit for a one - key start - stop switch. Specifically, the control circuit is optimized and integrated into the switch, and is implemented only through components and integrated circuits.

[0023] Figure 3 FIG. is a schematic diagram of the control circuit for the one - key start - stop switch of the present disclosure. The circuit mainly includes a start - stop switch SW1, a delay - trigger switch U2, and a power - on / off circuit including an OR gate U3. Among them, the first terminal of the start - stop switch SW1 is externally connected to a first power supply (i.e., VCC in the figure, which can be connected to the low - voltage power supply of the vehicle, and the DC voltage range can be 9V - 32V, and GND is used as the ground signal of the power supply). The second terminal of the start - stop switch SW1 is connected to the input terminal of the power - on / off circuit, and the output terminal (i.e., ACC) of the power - on / off circuit outputs a power - on signal or a power - on signal.

[0024] It should be noted that the start - stop switch SW1 can be a toggle switch of any structure. For the convenience of operation, a self - reset switch can be used here.

[0025] The power - on / off circuit is implemented through components and integrated circuits. The power - on / off circuit will control its subsequent output of a power - on signal or a power - on signal according to the operation of the start - stop switch SW1 and its own current output situation. The specific process can be as follows: When the power-on signal is not output at the output end of the power-on and power-off circuit, when the start-stop switch SW1 is pressed for the first preset time, and when it is released after being pressed for the first preset time, the output end of the OR gate U3 outputs a high level, controlling the output end of the power-on and power-off circuit to output a power-on signal; when the power-on signal is output at the output end of the power-on and power-off circuit, when the start-stop switch SW1 is released after being pressed for the first preset time, the output end of the OR gate U3 outputs a low level, controlling the output end of the power-on and power-off circuit to output a power-off signal.

[0026] See Figure 3 , the power-on and power-off circuit may include a delay trigger switch U2, a PMOS transistor Q1, an NMOS transistor Q2, an NMOS transistor Q3, a PMOS transistor Q4, and an OR gate U3; the second terminal of the start-stop switch SW1 is respectively connected to the 1st pin of the delay trigger switch U2 and the G pole of the NMOS transistor Q2, the 2nd pin of the delay trigger switch U2 is connected to the second power supply (i.e., 5V), the 3rd pin of the delay trigger switch U2 is grounded, the S pole of the NMOS transistor Q2 is grounded, the D pole of the NMOS transistor Q2 is connected to the G pole of the PMOS transistor Q1, the S pole of the PMOS transistor Q1 is connected to the second power supply, the D pole of the PMOS transistor Q1 and the 4th pin of the delay trigger switch U2 are respectively connected to the 1st pin and the 2nd pin of the OR gate U3, the 3rd pin of the OR gate U3 is grounded, the 5th pin of the OR gate U3 is connected to the second power supply, the 4th pin of the OR gate U3 is connected to the G pole of the NMOS transistor Q3, the S pole of the NMOS transistor Q3 is grounded, the D pole of the NMOS transistor Q3 is connected to the G pole of the PMOS transistor Q4, the S pole of the PMOS transistor Q4 is connected to the first power supply, and the D pole of the PMOS transistor Q4 is used as the output end of the power-on and power-off circuit; among them, a resistor R1 is connected between the second terminal of the start-stop switch SW1 and the G pole of the NMOS transistor Q2, a resistor R2 is connected between the G pole and the S pole of the NMOS transistor Q2, a resistor R3 is connected between the D pole of the PMOS transistor Q1 and the ground, a resistor R6 is connected between the D pole of the NMOS transistor Q3 and the G pole of the PMOS transistor Q4, and a resistor R5 is connected between the G pole and the S pole of the PMOS transistor Q4.

[0027] In the power-on and power-off circuit, assuming that initially the power-on signal is not output at the output end of the power-on and power-off circuit, such as the output is floating, when the start-stop switch SW1 is pressed for the first preset time, the NMOS transistor Q2 is turned on, the G pole of the PMOS transistor Q1 is grounded, the input B (i.e., the 1st pin) of the OR gate U3 is at a high level, the output Y (i.e., the 4th pin) of the OR gate U3 is at a high level, the NMOS transistor Q3 is turned on, the PMOS transistor Q4 is turned on, and the output of the power-on and power-off circuit is equivalent to the output of the first power supply, which can be used as the ACC power-on signal; when the start-stop switch SW1 is released, the delay trigger switch U2 has been turned on, the input A (i.e., the 2nd pin) of the OR gate U3 is at a high level, although the input B (i.e., the 1st pin) of the OR gate U3 is at a low level, the output (i.e., the 4th pin) of the OR gate U3 is still at a high level, maintaining the output of the power-on signal.

[0028] When the ACC is powered on, that is, when the power-on signal is output, when the start-stop switch SW1 is pressed again and released after the first preset time, the NMOS transistor Q2 is turned off, the G pole of the PMOS transistor Q1 is grounded, and the input B of the OR gate U3 is at a low level; at the same time, the delay trigger switch U2 has been closed, and the output (the 4th pin) of the delay trigger switch U2 is at a low level, that is, the input A of the OR gate U3 is also at a low level. At this time, the output Y of the OR gate U3 is at a low level, the NMOS transistor Q3 and the PMOS transistor Q4 are turned off, and the output is floating, which can be used as a power-off signal.

[0029] In some embodiments, the one-key start-stop switch control circuit further includes a start and start protection circuit including an AND gate U6, and the input end of the start and start protection circuit is connected to the second end of the start-stop switch SW1.

[0030] It should be noted that, similar to the power-on and power-off circuit, the start and start protection circuit is also implemented by components and integrated circuits. In the case where the power-on signal is output at the output end of the power-on and power-off circuit, the start and start protection circuit controls its subsequent output of the start signal or floating according to the operation of the start-stop switch SW1. The specific process can be as follows: In the case where the power-on signal is output at the output end of the power-on and power-off circuit, when the start-stop switch SW1 is pressed for the second preset time, the output end of the AND gate U6 outputs a high level, and the output end of the start and start protection circuit outputs a start signal; in the case where the power-on signal is output at the output end of the power-on and power-off circuit, when the start-stop switch SW1 is pressed for the third preset time, the output end of the AND gate U6 outputs a low level, and the output end of the start and start protection circuit outputs a floating state; that is, even if the start-stop switch SW1 is pressed all the time, the output end of the start and start protection circuit will output a floating state after reaching the third preset time, so that the preset start time can be achieved without the need for the controller to detect and control, and further protect the vehicle starting motor.

[0031] See Figure 4, the startup and startup protection circuit may include NMOS transistor Q5, NMOS transistor Q6, PMOS transistor Q7, NMOS transistor Q8, a first turn-on time control device, a second turn-on time control device, AND gate U6, D flip-flop U5, D flip-flop U7, and inverter U4; the second terminal of start-stop switch SW1 is respectively connected to the G pole of NMOS transistor Q5 and the G pole of NMOS transistor Q8, the S poles of NMOS transistor Q5 and NMOS transistor Q8 are grounded, the D pole of NMOS transistor Q5 is respectively connected to the second power supply and the 7th pin of D flip-flop U7, the 5th and 6th pins of D flip-flop U7 are connected to the first turn-on time control device, the 8th pin of D flip-flop U7 is connected to the second power supply, the 4th and 2nd pins of D flip-flop U7 are grounded, the 1st pin of D flip-flop U7 is connected to the second power supply, the 3rd pin of D flip-flop U7 is connected to the 2nd pin of inverter U4, the 4th pin of inverter U4 is grounded, the 5th pin of inverter U4 is connected to the second power supply, the 4th pin of inverter U4 is connected to the 5th pin of AND gate U6, the D pole of NMOS transistor Q8 is respectively connected to the second power supply and the 7th pin of D flip-flop U5, the 5th and 6th pins of D flip-flop U5 are connected to the second turn-on time control device, the 8th pin of D flip-flop U5 is connected to the second power supply, the 4th and 2nd pins of D flip-flop U5 are grounded, the 1st pin of D flip-flop U5 is connected to the second power supply, the 3rd pin of D flip-flop U5 is connected to the 6th pin of AND gate U6, the 1st pin of AND gate U6 is connected to the output terminal of OR gate U3, the 2nd and 3rd pins of AND gate U6 are connected, the 4th pin of AND gate U6 is grounded, the 8th pin of AND gate U6 is connected to the second power supply, the 7th pin of AND gate U6 is connected to the G pole of NMOS transistor Q6, the S pole of NMOS transistor Q6 is grounded, the D pole of NMOS transistor Q6 is connected to the G pole of PMOS transistor Q7, the S pole of PMOS transistor Q7 is connected to the first power supply, the D pole of PMOS transistor Q7 is used as the output terminal of the startup and startup protection circuit (i.e., START in the figure); wherein, the first turn-on time control device and the second turn-on time control device respectively control the turn-on time of D flip-flop U7 and D flip-flop U5; a resistor R9 is connected between the second terminal of start-stop switch SW1 and the G pole of NMOS transistor Q5, a resistor R10 is connected between the G pole and the S pole of NMOS transistor Q5, a resistor R12 is connected between the second terminal of start-stop switch SW1 and the G pole of NMOS transistor Q8, a resistor R13 is connected between the G pole and the S pole of NMOS transistor Q8, a resistor R17 is connected between the G pole and the S pole of NMOS transistor Q6, a resistor R19 is connected between the D pole of NMOS transistor Q6 and the G pole of PMOS transistor Q7, a resistor R18 is connected between the G pole and the S pole of PMOS transistor Q7, a resistor R8 is connected between the D pole of NMOS transistor Q5 and the second power supply, a resistor R11 is connected between the D pole of NMOS transistor Q8 and the second power supply, a resistor R16 is connected between the 1st pin of D flip-flop U7 and the second power supply, and a resistor R15 is connected between the 1st pin of D flip-flop U5 and the second power supply.

[0032] In the start and start protection circuit, when the ACC is powered on, that is, when the power-on signal is output, when the start-stop switch SW1 is pressed for the second preset time, the output Q# (i.e., the 3rd pin) of the D flip-flop U7 is at a low level, and the output Y (i.e., the 4th pin) of the inverter U4 is at a high level. At the same time, the start time of the D flip-flop U5 has not arrived, and at this time, the output Q# (i.e., the 3rd pin) of the D flip-flop U5 is also at a high level. Then, the output 1Y (i.e., the 7th pin) of the AND gate U6 is at a high level, and the NMOS transistor Q6 and the PMOS transistor Q7 are turned on. The output of the start and start protection circuit is equivalent to the output of the first power supply and can be used as the START start signal.

[0033] In the start and start protection circuit, when the ACC is powered on and the start-stop switch SW1 is pressed for the third preset time, the output Q# (i.e., the 3rd pin) of the D flip-flop U5 is at a low level, then the input 2B (i.e., the 6th pin) of the AND gate U6 is at a low level, and the output 1Y of the AND gate U6 is at a low level. The NMOS transistor Q6 and the PMOS transistor Q7 are turned on, and the output is floating, prohibiting startup.

[0034] The AND gate U6 introduces the input of the OR gate U3, that is, the 1st pin of the AND gate U6 is connected to the output of the OR gate U3, that is, the ACC state of the vehicle is used as the determination condition for outputting the vehicle start signal. When the output of the OR gate U3 (i.e., the 4th pin) is at a low level (the ACC signal output is floating), regardless of whether the start-stop switch SW1 is pressed for the second preset time, the START signal output of the start and start protection circuit is floating.

[0035] It should be noted that the opening time of the delay trigger switch U2 is denoted as T0, the opening time of the D flip-flop U7 is denoted as T1, and the opening time of the D flip-flop U5 is denoted as T2. According to the process of power-on first and then start, the range of the first preset time can be set to T0~T1, the range of the second preset time can be set to T1~T2, and the range of the third preset time can be set to be greater than T2.

[0036] It should be noted that T1 and T2 can be controlled by the first opening time control device and the second opening time control device respectively. The opening time control device is also realized through electronic components. Therefore, signals with different delay times can be output by adjusting the parameters of the electronic components, realizing start protection.

[0037] The first opening time control device can include a resistor R7, a capacitor C4, and a diode D3; one end of the resistor R7 is connected to the second power supply, and the other end of the resistor R7 is respectively connected to the positive electrode of the capacitor C4, the positive electrode of the diode D3, and the 6th pin of the D flip-flop U7. The negative electrode of the capacitor C4 is grounded, and the negative electrode of the diode D3 is connected to the 5th pin of the D flip-flop U7. Therefore, the magnitude of T1 can be adjusted by adjusting the resistance value of the resistor R7 and the capacitance value of the capacitor C4.

[0038] Similar to the structure of the first turn-on time control device, the second turn-on time control device includes a resistor R14, a capacitor C3, and a diode D4; one end of the resistor R14 is connected to the second power supply, and the other end of the resistor R14 is respectively connected to the positive electrode of the capacitor C3, the positive electrode of the diode D4, and the 6th pin of the D flip-flop U5. The negative electrode of the capacitor C3 is grounded, and the negative electrode of the diode D4 is connected to the 5th pin of the D flip-flop U5. Therefore, the size of T1 can be adjusted by adjusting the resistance value of the resistor R14 and the capacitance value of the capacitor C3.

[0039] It should be noted that the above-mentioned second power supply can be a separate power supply or a power supply obtained by converting the first power supply through a power conversion circuit.

[0040] See Figure 5 , the power conversion circuit may include a diode D1, a diode D2, a capacitor C1, a conversion chip U1 (for converting the input voltage to 5V), and a capacitor C2; the positive electrode of the diode D1 is externally connected to the first power supply, and the negative electrode of the diode D1 is respectively connected to the negative electrode of the diode D2, one end of the capacitor C1, and the 1st pin of the conversion chip U1. The positive electrode of the diode D2, the other end of the capacitor C1, and the 2nd pin of the conversion chip U1 are grounded. The 5th pin of the conversion chip U1 is used as the output end of the power conversion circuit. One end of the capacitor C2 is connected to the 5th pin of the conversion chip U1, and the other end of the capacitor C2 is grounded. The power conversion circuit outputs 5V electricity to supply power to the delay trigger switch U2, the OR gate U3, the AND gate U6, the D flip-flop U5, the D flip-flop U7, the inverter U4, etc.

[0041] In order to feedback the running state of the vehicle on the one-key start-stop switch, in some embodiments, a status indication circuit is further included, and status indication is performed through the indicator light in the status indication circuit.

[0042] See Figure 6 , the status indication circuit includes a diode D5, a diode D6, a resistor R20, a resistor R21, a resistor R22, a resistor R4, a light-emitting diode LED1, and a light-emitting diode LED2; GREEN and RED are used as indication identifiers of the input signal and can be connected to the controller end (such as a vehicle-mounted controller, that is, the controller issues an indication according to the status). The light-emitting colors of the light-emitting diodes LED1 and LED2 can be selected according to actual needs, and other colors of light-emitting diodes can be selected, and at the same time, GREEN and RED are adjusted to the corresponding colors. The positive electrode of the diode D5 is connected to GREEN, the negative electrode of the diode D5 is connected to the positive electrode of the light-emitting diode LED2 through the resistor R20, the negative electrode of the light-emitting diode LED2 is grounded, the resistor R21 is connected in parallel with the light-emitting diode LED2, the positive electrode of the diode D6 is connected to RED, the negative electrode of the diode D6 is connected to the positive electrode of the light-emitting diode LED1 through the resistor R22, the negative electrode of the light-emitting diode LED1 is grounded, and the resistor R4 is connected in parallel with the light-emitting diode LED1.

[0043] In an application embodiment, the power-on and start signals of the vehicle can be connected to the GREEN and RED signal input terminals, and the power-on and start states of the vehicle can be fed back through the colors of the light-emitting diodes LED1 and LED2.

[0044] The above circuit realizes one-key start-stop switch control only through components and integrated circuits. Compared with the existing knob-type structure, the operation is simple and the control efficiency is high. Compared with the button-type switch structure, there is no need for a programming storage chip, the design of the external detection circuit of the whole machine is omitted, and the use of the controller ports is reduced.

[0045] The present disclosure also relates to a device, which includes a one-key start-stop switch control circuit, that is, the start-stop of the device itself or a certain component adopts the above one-key start-stop switch control circuit, and the device can be a road vehicle, a construction machine, etc.

[0046] For the device adopting the above one-key start-stop switch control circuit, the start-stop operation is simple and the control efficiency is high. The one-key start-stop switch does not require a programming storage chip, the design of the external detection circuit of the whole machine is omitted, and the use of the controller ports is reduced.

[0047] The above are only the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the technical principle of the present invention, several improvements and deformations can still be made, and these improvements and deformations should also be regarded as the protection scope of the present invention.

Claims

1. A one-button start-stop switch control circuit, characterized in that: It includes a start-stop switch SW1 and a power-on and power-off circuit including an OR gate U3, wherein a first end of the start-stop switch SW1 is externally connected to a first power source, and a second end of the start-stop switch SW1 is connected to an input end of the power-on and power-off circuit; When the output end of the power-on and power-off circuit does not output a power-on signal, when the start-stop switch SW1 is pressed for the first preset time and released after being pressed for the first preset time, the output end of the OR gate U3 outputs a high level to control the output end of the power-on and power-off circuit to output a power-on signal; When the output end of the power-on and power-off circuit outputs a power-on signal, when the start-stop switch SW1 is released after being pressed for a first preset time, the output end of the OR gate U3 outputs a low level to control the output end of the power-on and power-off circuit to output a power-off signal.

2. The circuit according to claim 1, characterized in that The power-on and power-off circuit also includes a delay trigger switch U2, a PMOS tube Q1, an NMOS tube Q2, an NMOS tube Q3 and a PMOS tube Q4; The second end of the start-stop switch SW1 is respectively connected to the first pin of the delay trigger switch U2 and the G pole of the NMOS tube Q2, the S pole of the NMOS tube Q2 is grounded, the D pole of the NMOS tube Q2 is connected to the G pole of the PMOS tube Q1, the S pole of the PMOS tube Q1 is connected to the second power supply, the D pole of the PMOS tube Q1 and the fourth pin of the delay trigger switch U2 are respectively connected to the first pin and the second pin of the OR gate U3, the fourth pin of the OR gate U3 is connected to the G pole of the NMOS tube Q3, the S pole of the NMOS tube Q3 is grounded, the D pole of the NMOS tube Q3 is connected to the G pole of the PMOS tube Q4, the S pole of the PMOS tube Q4 is connected to the first power supply, and the D pole of the PMOS tube Q4 serves as the output end of the upper and lower power circuits.

3. The circuit according to claim 2, characterized in that In the power-on and power-off circuits, a resistor R1 is connected between the second end of the start-stop switch SW1 and the G pole of the NMOS tube Q2, a resistor R2 is connected between the G pole and the S pole of the NMOS tube Q2, a resistor R3 is connected between the D pole of the PMOS tube Q1 and the ground, a resistor R6 is connected between the D pole of the NMOS tube Q3 and the G pole of the PMOS tube Q4, and a resistor R5 is connected between the G pole and the S pole of the PMOS tube Q4.

4. The circuit according to claim 1, characterized in that It also includes a startup and startup protection circuit including an AND gate U6, and the input end of the startup and startup protection circuit is connected to the second end of the start-stop switch SW1; When the power-on signal is output from the output terminal of the power-on and power-off circuit, when the start-stop switch SW1 is pressed for a second preset time, the output terminal of the AND gate U6 outputs a high level, and the output terminal of the control start and start protection circuit outputs a start signal; When the output terminal of the power-on and power-off circuit outputs a power-on signal, when the start-stop switch SW1 is pressed for a third preset time, the output terminal of the AND gate U6 outputs a low level, and the output terminal of the control start and start protection circuit is suspended.

5. The circuit according to claim 4, characterized in that The startup and startup protection circuit also includes an NMOS tube Q5, an NMOS tube Q6, a PMOS tube Q7, an NMOS tube Q8, a first startup time control device, a second startup time control device, a D flip-flop U5, a D flip-flop U7 and an inverter U4; The second end of the start-stop switch SW1 is connected to the G pole of the NMOS tube Q5 and the G pole of the NMOS tube Q8 respectively, the S pole of the NMOS tube Q5 and the S pole of the NMOS tube Q8 are grounded, the D pole of the NMOS tube Q5 is connected to the second power supply and the 7th pin of the D flip-flop U7 respectively, the 5th pin and the 6th pin of the D flip-flop U7 are connected to the first opening time control device, the 3rd pin of the D flip-flop U7 is connected to the 2nd pin of the inverter U4, the 4th pin of the inverter U4 is connected to the 5th pin of the AND gate U6, the D pole of the NMOS tube Q8 is connected to the second power supply and the 7th pin of the D flip-flop U5 respectively, the 5th pin of the D flip-flop U5 is connected to the 5th pin of the AND gate U6 The 6th pin is connected to the second start-up time control device, the 3rd pin of the D flip-flop U5 is connected to the 6th pin of the AND gate U6, the 1st pin of the AND gate U6 is connected to the output end of the OR gate U3, the 7th pin of the AND gate U6 is connected to the G pole of the NMOS tube Q6, the S pole of the NMOS tube Q6 is grounded, the D pole of the NMOS tube Q6 is connected to the G pole of the PMOS tube Q7, the S pole of the PMOS tube Q7 is connected to the first power supply, and the D pole of the PMOS tube Q7 serves as the output end of the startup and startup protection circuit; wherein, the first start-up time control device and the second start-up time control device respectively control the start-up time of the D flip-flop U7 and the D flip-flop U5.

6. The circuit according to claim 5, characterized in that In the startup and startup protection circuit, a resistor R9 is connected between the second end of the start-stop switch SW1 and the G pole of the NMOS tube Q5, a resistor R10 is connected between the G pole and the S pole of the NMOS tube Q5, a resistor R12 is connected between the second end of the start-stop switch SW1 and the G pole of the NMOS tube Q8, a resistor R13 is connected between the G pole and the S pole of the NMOS tube Q8, a resistor R17 is connected between the G pole and the S pole of the NMOS tube Q6, a resistor R19 is connected between the D pole of the NMOS tube Q6 and the G pole of the PMOS tube Q7, a resistor R18 is connected between the G pole and the S pole of the PMOS tube Q7, a resistor R8 is connected between the D pole of the NMOS tube Q5 and the second power supply, and a resistor R11 is connected between the D pole of the NMOS tube Q8 and the second power supply.

7. The circuit according to claim 5, characterized in that The first opening time control device includes a resistor R7, a capacitor C4 and a diode D3; one end of the resistor R7 is connected to the second power supply, the other end of the resistor R7 is respectively connected to the positive electrode of the capacitor C4, the positive electrode of the diode D3 and the 6th pin of the D flip-flop U7, the negative electrode of the capacitor C4 is grounded, and the negative electrode of the diode D3 is connected to the 5th pin of the D flip-flop U7; The second opening time control device includes a resistor R14, a capacitor C3 and a diode D4; one end of the resistor R14 is connected to the second power supply, and the other end of the resistor R14 is respectively connected to the positive electrode of the capacitor C3, the positive electrode of the diode D4 and the 6th pin of the D flip-flop U5, the negative electrode of the capacitor C3 is grounded, and the negative electrode of the diode D4 is connected to the 5th pin of the D flip-flop U5.

8. The circuit according to claim 2, 5, 6 or 7, characterized in that The second power source is obtained by converting the first power source through a power conversion circuit.

9. A device, characterized in that: A circuit comprising any one of claims 1 to 8.

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