An organic-inorganic hetero dielectric layer-based sensing and computing integrated transistor, a preparation method thereof and application thereof in programmable display driving

Abstract

The application provides an organic-inorganic hetero dielectric layer-based sensing, storage and calculation integrated transistor and a preparation method and application in programmable display driving, and belongs to the technical field of organic field effect transistors. The organic-inorganic hetero dielectric layer-based sensing, storage and calculation integrated transistor comprises, from bottom to top, a substrate, a dielectric layer, an organic small molecule semiconductor layer and source / drain electrodes; the dielectric layer is an organic-inorganic hetero dielectric layer; the organic-inorganic hetero dielectric layer is a double-layer structure composed of a lower dielectric layer and an upper dielectric layer; the upper dielectric layer is a polyamide acid layer; and the lower dielectric layer is a hafnium oxide layer. The polyamide acid-hafnium oxide hetero dielectric layer is used to obtain a high-performance, low-energy sensing, storage and calculation integrated organic thin film transistor array with storage performance and excellent photoelectric sensing performance, and the organic thin film transistor array is used in programmable display driving, thereby opening up a new way for the development and application of organic sensing, storage and calculation integrated neuromorphic vision devices and display driving fields.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of organic field effect transistors, and particularly relates to a sensing and storage integrated transistor based on an organic-inorganic hetero dielectric layer, a preparation method thereof and application thereof in programmable display driving. BACKGROUND

[0002] With the rapid development of the Internet of Things and artificial intelligence, sensing data is experiencing explosive growth. The separation of sensing, storage and computing units in traditional machine vision systems in physical space makes it increasingly difficult to meet the growing demand for low energy consumption and high efficiency. Organic thin film transistors (OTFTs) integrating "sensing-storage-computing" functions are expected to overcome the bottleneck of high energy consumption and low efficiency in traditional machine vision systems. However, only a limited number of organic thin film transistors integrate sensing, synaptic performance and storage functions to explore the synergistic enhancement effect of light responsiveness and storage performance. This limitation stems from the inherent conflict between charge trapping effect and effective charge transport characteristics. In addition, currently available organic photonic synapse transistors usually have short-term plasticity, rapid post-synaptic current decay, and insufficient attention to the sensitivity and response speed of the device. Although a few devices integrate photonic synapses and storage functions, there is no realization of the synergistic enhancement of light sensing capability, storage performance and computing capability, and the use of "sensing-storage-computing" integrated OTFTs to drive light-emitting diode (LED) arrays to achieve programmable control of LED arrays has not been reported. Therefore, it is of great importance to realize high-performance, low-energy "sensing-storage-computing" integrated organic thin film transistor arrays with storage performance and excellent optoelectronic sensing performance for the development and application of organic sensing-storage-computing integrated neuromorphic vision devices and display driving fields. SUMMARY

[0003] In view of the key problem that organic thin film transistors (OTFTs) are difficult to have both storage performance and excellent optoelectronic sensing performance, the application provides a sensing and storage integrated transistor based on an organic-inorganic hetero dielectric layer, a preparation method thereof and application thereof in programmable display driving. The application combines inorganic oxide hafnium oxide (HfO2) and polymer polyamide acid (PAA) as the dielectric layer of the organic thin film transistor, combines the ability of PAA to induce strong charge carriers and the charge trapping ability of HfO2, and obtains a high-performance, low-energy "sensing-storage-computing" integrated organic thin film transistor array with both storage performance and excellent optoelectronic sensing performance. The "sensing-storage-computing" characteristics make it applicable to programmable OTFT-driven LED arrays.

[0004] To achieve the above object, the application provides the following technical solutions.

[0005] One of the technical solutions of the application is:

[0006] An organic-inorganic hetero dielectric layer based sensing and storage integrated transistor, from bottom to top, sequentially comprises a substrate, a dielectric layer, an organic small molecule semiconductor layer and source / drain electrodes, the dielectric layer is an organic-inorganic hetero dielectric layer; the organic-inorganic hetero dielectric layer is a double-layer structure composed of a lower dielectric layer and an upper dielectric layer, the upper dielectric layer is a polyamic acid (PAA) layer, and the lower dielectric layer is a hafnium oxide (HfO2) layer.

[0007] The transistor with a single-layer polyamic acid as the dielectric layer has excellent charge transport performance, but does not have non-volatile storage performance, and the charge transport capacity of the transistor with a single-layer hafnium oxide as the dielectric layer is poor, and the light sensing ability is poor, the organic-inorganic hetero dielectric layer is prepared by combining polyamic acid (PAA) layer and hafnium oxide (HfO2), which gives the organic thin film transistor excellent light sensing ability and high efficient charge transport performance, and also has excellent storage performance, wherein the polyamic acid as the upper dielectric layer is in direct contact with the organic small molecule semiconductor layer, which is conducive to inducing charge transfer at the semiconductor-dielectric layer interface, has better charge transport performance, improves the mobility of the device, and also realizes the detection of weak light. Meanwhile, the hafnium oxide in the lower layer can well capture the charge as a charge capture layer, so that the device has excellent non-volatile storage performance.

[0008] Further, the thickness of the lower dielectric layer is 15 nm, and the thickness of the upper dielectric layer is 0-270 nm (not 0); preferably, the thickness of the lower dielectric layer is 15 nm, and the thickness of the upper dielectric layer is 20 nm.

[0009] Further, the substrate is a silicon substrate, the organic small molecule semiconductor layer is a 2,9-didecyl naphtho[2,3B:2',3'F]thieno[3,2B]thiophene (C10-DNTT) layer, and the source / drain electrode is a gold (Au) source / drain electrode.

[0010] Further, the thickness of the organic small molecule semiconductor layer is 20 nm, and the thickness of the source / drain electrode is 20 nm.

[0011] The technical scheme two of the present application:

[0012] A preparation method of the organic-inorganic hetero dielectric layer based sensing and storage integrated transistor, comprising the following steps:

[0013] The hafnium oxide layer is prepared on a substrate by plasma enhanced atomic layer deposition (PEALD), a polyamide acid layer is prepared on the hafnium oxide layer by a spin coating method, an organic-inorganic hetero dielectric layer is formed on the substrate, then an organic small molecule semiconductor layer is evaporated and deposited on the organic-inorganic hetero dielectric layer by a coating instrument, and a source / drain electrode is evaporated and deposited by a metal coating instrument, so that the organic-inorganic hetero dielectric layer-based memory and computing integrated transistor is obtained.

[0014] Further, tetrakis(dimethylamino)hafnium (Hf[N(CH3)2]4) is used as a precursor for preparing the hafnium oxide layer.

[0015] The third technical scheme of the present application is as follows:

[0016] The organic-inorganic hetero dielectric layer-based memory and computing integrated transistor is applied in programmable display driving.

[0017] The fourth technical scheme of the present application is as follows:

[0018] A programmable organic thin film transistor driven light emitting diode array comprises the organic-inorganic hetero dielectric layer-based memory and computing integrated transistor.

[0019] Further, the organic-inorganic hetero dielectric layer-based memory and computing integrated transistor is connected with a light emitting diode through a circuit, a pattern is written through an external light source and a mask plate, and then the pattern is erased through a negative gate voltage, so that the programmable organic thin film transistor driven light emitting diode array is obtained.

[0020] Compared with the prior art, the present application uses a polyamide acid-hafnium oxide hetero dielectric layer to obtain a high-performance, low-energy memory and computing integrated organic thin film transistor array with storage performance and excellent photoelectric sensing performance, which opens up a new way for the development and application of organic memory and computing integrated neuromorphic vision devices and display driving fields.

[0021] 1. The present application uses PAA-HfO2 as a dielectric layer and C10-DNTT as a semiconductor to construct an organic thin film transistor array, first tests the electrical performance of the device, and the device shows P-type semiconductor transmission characteristics. 2 V -1 -1 7 The average mobility of 20 devices is 5.3 cm 2 V​​-1 s -1 , 6.8 cm 2 V -1 s -1 and 14.9 cm 2 V -1 s -1 .

[0022] 2、In the sensing performance to light, due to the ability of PAA to induce charge carriers, when PAA is used as the upper dielectric layer, the device has obvious light response behavior under the irradiation of 450 nm blue light with an intensity of 3.38 μW / cm 2 , and the weakest light intensity that can be responded is 102 nW / cm 2 , and the fastest response speed is 50 μs. In addition, the device based on the PAA-HfO2 hetero-dielectric layer also has obvious light response to different wavelengths of light between 300 nm and 515 nm.

[0023] 3、In the storage performance, HfO2 is introduced below PAA as a charge trapping layer, -20 V and 1 s voltage is used for writing, and 450 nm light is used for erasing, the maximum storage window is 4.1 V, the source-drain current after writing and erasing is read under a fixed gate voltage, and a storage maintenance time of more than 50,000 seconds is achieved, in addition, the device based on the PAA-HfO2 hetero-dielectric layer can also be written, read, erased and read for 1,000 cycles.

[0024] 4、In the aspect of simulating biological synapses and performing neuromorphic computing, the device based on the PAA-HfO2 hetero-dielectric layer successfully simulates excitatory postsynaptic current (EPSC) and inhibitory postsynaptic current (IPSC), exhibits long-range synaptic plasticity (LTP), and the minimum energy consumption of one synaptic event is 53 aJ / spike, in addition, the process of learning forgetting and relearning is simulated, and the recognition accuracy of handwritten digits based on an artificial neural network reaches 94.64%.

[0025] 5、The sensing and storage integrated transistor based on the organic-inorganic hetero-dielectric layer of the application in the programmable display driving uses the characteristics of "sensing-storage-computing" integration, combines external light with a mask plate, and can repeatedly write and erase patterns on an LED array. BRIEF DESCRIPTION OF DRAWINGS

[0026] The accompanying drawings, which form a part of the present application, are used to provide further understanding of the present application, and the illustrative embodiments of the present application and their description serve the purpose of explaining the present application, and do not constitute an improper limitation of the present application. In the drawings:

[0027] Figure 1Charge transport and output characteristics of devices (sensor array) with different dielectric layers, where a is the transfer characteristic curve of Bare HfO2 (Comparative Example 1), 20 nm-PAA / HfO2 (Example 1), 270 nm-PAA / HfO2 (Example 2) devices, b is the output characteristic curve of 20 nm-PAA / HfO2 (Example 1) device;

[0028] Figure 2 Statistical diagram of mobility of 20 devices of Bare HfO2 (Comparative Example 1), 20 nm-PAA / HfO2 (Example 1), 270 nm-PAA / HfO2 (Example 2) devices under source-drain voltage of -1 V, -3 V and -5 V;

[0029] Figure 3 Optical response performance test results of Bare HfO2 (Comparative Example 1), 20 nm-PAA / HfO2 (Example 1) under 450 nm light irradiation, where a is the transfer curve of Bare HfO2 (Comparative Example 1), b is the transfer curve of 20 nm-PAA / HfO2 (Example 1) device;

[0030] Figure 4 Transfer curves of 20 nm-PAA / HfO2 (Example 1) device under irradiation of different wavelengths of light, where a is the transfer curve under irradiation of 300 nm light, b is the transfer curve under irradiation of 365 nm light, c is the transfer curve under irradiation of 515 nm light;

[0031] Figure 5 Storage performance of Bare HfO2 (Comparative Example 1), 20 nm-PAA / HfO2 (Example 1), 270 nm-PAA / HfO2 (Example 2) devices, where the initial transfer curve, the transfer curve after applying a write voltage of -20 V for 1 s and erasing with 450 nm light of each of the three devices are tested. Where a is the storage window of Bare HfO2 (Comparative Example 1), b is the storage window of 20 nm-PAA / HfO2 (Example 1), c is the storage window of 270 nm-PAA / HfO2 (Example 2). d is the source-drain current of 20 nm-PAA / HfO2 (Example 1) device at read V G = -0.2 V.

[0032] Figure 6 Storage cycle performance of 20 nm-PAA / HfO2 (Example 1) device, where a is the curve after 1000 cycles, b is the enlarged detail of the initial cycle, c is the enlarged detail at the end of the cycle;

[0033] Figure 7Structure schematic diagram and optical synaptic performance of 20 nm-PAA / HfO2 (Example 1) device, wherein a is a structure schematic diagram of the prepared 20 nm-PAA / HfO2 heterodi electric layer-based device and the structure of biological synapse, b is the change of postsynaptic current under the application of 6.26 mW / cm2of 450 nm light stimulus for different time, c is the change of postsynaptic current under the application of different number of 6.26 mW / cm2of 450 nm light; 2 2

[0034] Figure 8 Electrical synaptic performance of 20 nm-PAA / HfO2 (Example 1) device;

[0035] Figure 9 Energy consumption of 20 nm-PAA / HfO2 (Example 1) device under different operating voltages (V DS );

[0036] Figure 10 Recognition of handwritten digits by 20 nm-PAA / HfO2 (Example 1) device through neural network, wherein a is a schematic diagram of a multi-layer neural network for digit recognition; b is the long-term potentiation (LTP) and long-term depression (LTD) characteristic curves of three kinds of devices; c is the change of recognition accuracy of handwritten digits with training period;

[0037] Figure 11 OTFT-driven LED array of 20 nm-PAA / HfO2 (Example 1) device, wherein a is a circuit schematic diagram of the OTFT-driven LED array; b is the optical images of the OTFT-driven LED array in the initial state, under the application of light and after the removal of light; c is that any one row of the LED array can be controlled to be lighted by external light stimulus; d is that the letters “T”, “J” and “U” are respectively written into the LED array by writing and erasing; e is that the OTFT-driven LED array undergoes switching cycle under the control of external light and negative voltage of the gate. DETAILED DESCRIPTION

[0038] The various illustrative embodiments of the present application will now be described in detail in connection with the following figures. This description is not to be considered limiting in scope, but rather as being exemplary of the various aspects, features and implementations of the present application.

[0039] ​​It is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. Additionally, for a range of values of, for example, concentrations, solvent amounts, and the like, there are intended to be included in the present application each and every intermediate value and sub-range of this range of values. For example, a range from 1 to 2.5 of, for example, a particular molecular weight or concentration is intended to include each and every intermediate value and sub-range of this range of values, i.e., specific, numeric values such as 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, 2.4, and 2.5 are included within the scope of the present application. The upper and lower limits of these smaller ranges can independently be included or excluded in the ranges.

[0040] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. Although methods and materials similar or equivalent to those described herein can be used in the practice or testing of the present application, the preferred methods and materials are described. All publications mentioned in this specification are herein incorporated by reference to disclose and describe the methods and / or materials in connection with which the publications are cited. The citation of any reference in this specification is not an admission that it is prior art.

[0041] Many modifications and variations of the present application described in the specification are possible without departing from the scope or spirit of the present application. Other embodiments of the present application will be apparent to those skilled in the art from consideration of the specification and practice of the present application. The specification and examples are illustrative only.

[0042] As used herein, the terms "comprises", "comprising", "includes", "including", "has", "having", "contains", "containing", or variations thereof, are intended to be open-ended terms that mean inclusion, but not limited to, the listed material or step.

[0043] The embodiment of the present application provides a sensor-memory integrated transistor based on an organic-inorganic hetero dielectric layer, which comprises, from bottom to top, a substrate, a dielectric layer, an organic small molecule semiconductor layer and source / drain electrodes, wherein the dielectric layer is an organic-inorganic hetero dielectric layer; the organic-inorganic hetero dielectric layer is a double-layer structure composed of a lower dielectric layer and an upper dielectric layer, the upper dielectric layer is a polyamic acid (PAA) layer, and the lower dielectric layer is a hafnium oxide (HfO2) layer.

[0044] In the embodiment of the present application, the thickness of the lower dielectric layer is 15 nm, and the thickness of the upper dielectric layer is 0-270 nm (not 0); preferably, the thickness of the lower dielectric layer is 15 nm, and the thickness of the upper dielectric layer is 20 nm.

[0045] In the embodiment of the present application, the substrate is a silicon substrate, and the resistivity of the silicon substrate is 0.001-0.0052 Ω·cm.

[0046] In the embodiment of the present application, the organic small-molecule semiconductor layer is a 2,9-didecyl naphtho[2,3B:2',3'F]thieno[3,2B]thiophene (C10-DNTT) layer, and the source / drain electrode is a gold (Au) source / drain electrode.

[0047] In the embodiment of the present application, the thickness of the organic small-molecule semiconductor layer is 20 nm, and the thickness of the source / drain electrode is 20 nm.

[0048] The embodiment of the present application also provides a preparation method of the memory and computing integrated transistor based on the organic-inorganic hetero dielectric layer.

[0049] The hafnium oxide layer is prepared on the substrate by using a plasma enhanced atomic layer deposition (PEALD) method, a polyamide acid layer is prepared on the hafnium oxide layer by using a spin coating method, an organic-inorganic hetero dielectric layer is formed on the substrate, then an organic small-molecule semiconductor layer is evaporated and deposited on the organic-inorganic hetero dielectric layer by using a coating instrument, a source / drain electrode is evaporated and deposited by using a metal coating instrument, and the memory and computing integrated transistor based on the organic-inorganic hetero dielectric layer is obtained.

[0050] In the embodiment of the present application, the processes of the PEALD method, the spin coating method, the coating instrument evaporation and deposition, and the metal coating instrument deposition are all conventional technologies in the field, and will not be described in detail herein. The PEALD method uses a Beneq TFS-200 device, uses hafnium tetrakis(dimethylamide) (Hf[N(CH3)2]4) as a precursor for preparing the hafnium oxide layer, uses water as an oxygen source, and the chamber temperature for growth is 200℃; the spin coating method uses a spin coater to spin at 5000 rpm; the deposition rate of the coating instrument evaporation and deposition is 0.1-0.5 nm / s; The deposition rate of the metal coating instrument deposition is 0.1-0.5 nm / s.

[0051] In the embodiment of the present application, the PAA solution used in the spin coating method is prepared by mixing PAA and DMAC (N,N-dimethylacetamide) at a volume ratio of 1:(2-8).

[0052] The embodiment of the present application also provides a programmable organic thin film transistor driven light emitting diode array, which comprises the memory and computing integrated transistor based on the organic-inorganic hetero dielectric layer, and the memory and computing integrated transistor based on the organic-inorganic hetero dielectric layer is connected with a light emitting diode through a circuit, pattern writing is realized through an external light source and a mask plate, and erasing is realized through a negative gate voltage, so that the programmable organic thin film transistor driven light emitting diode array is obtained.

[0053] The raw materials used in the embodiments of the present application are all commercially available, and part of the raw materials and sources are as follows:

[0054] 1. Polyamic acid (PAA):

[0055]

[0056] Beijing University of Chemical Technology.

[0057] 2. C10 DNTT (2,9-didecyl naphtho[2,3B:2',3'F]thieno[3,2B]thiophene):

[0058]

[0059] Hangzhou Aodete Science and Technology Co., Ltd.

[0060] 3. Gold (Au), purity 99.999%, purchased from Tianjin Livitan Technology Co., Ltd.

[0061] The technical solutions of the present application are further illustrated by the following examples.

[0062] Example 1

[0063] A preparation method of a sensing and computing integrated transistor based on an organic-inorganic hetero dielectric layer, comprising the following steps:

[0064] A 15 nm HfO2 film (hafnium oxide layer) is grown on a silicon substrate by PEALD method, and the HfO2 film is further subjected to plasma treatment (50 W, 5 min) using a vacuum oxygen plasma cleaning machine. Then, a PAA solution (mixed by PAA and DMAC in a volume ratio of 1:8) is spin-coated on the surface of the HfO2 film (hafnium oxide layer) by a spin coater at 5000 rpm, to obtain a PAA film (polyamic acid layer) with a thickness of 20 nm, so as to form an organic-inorganic hetero dielectric layer on the silicon substrate. The sample is placed in a glove box overnight to volatilize the DMAC solvent, and then a 20 nm thick organic semiconductor C10-DNTT layer is deposited on the PAA film (polyamic acid layer) at a deposition rate of 0.1 nm / s using a coating machine under vacuum condition of 1×10 -5 Pa. Finally, a 20 nm thick Au layer is deposited on the surface of the C10-DNTT layer as a source / drain electrode at a deposition rate of 0.1 nm / s using a metal mask plate, to obtain a sensing and computing integrated transistor based on an organic-inorganic hetero dielectric layer.

[0065] Comparative Example 1

[0066] A preparation method of a sensing and computing integrated transistor based on a hafnium oxide dielectric layer, comprising the following steps: ​

[0067] A 15 nm HfO2 film (hafnium oxide layer) was grown on a silicon substrate using PEALD, and then a 20 nm thick organic semiconductor C10-DNTT layer was deposited on the HfO2 film (hafnium oxide layer) at a deposition rate of 0.5 nm / s under vacuum conditions of 1 x 10 -5 Pa, using a coater at a deposition rate of 0.5 nm / s. A 20 nm thick organic semiconductor C10-DNTT layer was deposited on the HfO2 film (hafnium oxide layer) at a deposition rate of 0.5 nm / s under vacuum conditions of 1 x 10 A 20 nm thick Au was deposited on the surface of the C10-DNTT layer at a deposition rate of 0.5 nm / s using a metal mask plate as a source / drain electrode, obtaining a sensing and computing integrated transistor based on a hafnium oxide hetero-dielectric layer.

[0068] Example 2

[0069] A method for preparing a sensing and computing integrated transistor based on an organic-inorganic hetero-dielectric layer, comprising the following steps:

[0070] A 15 nm HfO2 film (hafnium oxide layer) was grown on a silicon substrate using PEALD, and then the HfO2 film was subjected to plasma treatment (50 W, 5 min) using a vacuum oxygen plasma cleaning machine. A PAA solution (PAA and DMAC were mixed in a volume ratio of 1:2) was then surface spin-coated on the HfO2 film (hafnium oxide layer) using a spin coater at 5000 rpm, obtaining a PAA film (polyamide acid layer) with a thickness of 270 nm, thereby forming an organic-inorganic hetero-dielectric layer on the silicon substrate. The sample was placed in a glove box overnight to allow the DMAC solvent to evaporate, and then a 20 nm thick organic semiconductor C10-DNTT layer was deposited on the PAA film (polyamide acid layer) at a deposition rate of 0.5 nm / s under vacuum conditions of 1 x 10 -5 Pa, using a coater at a deposition rate of 0.5 nm / s. A 20 nm thick organic semiconductor C10-DNTT layer was deposited on the PAA film (polyamide acid layer) at a deposition rate of 0.5 nm / s under vacuum conditions of 1 x 10 A 20 nm thick Au was deposited on the surface of the C10-DNTT layer at a deposition rate of 0.5 nm / s using a metal mask plate as a source / drain electrode, obtaining a sensing and computing integrated transistor based on an organic-inorganic hetero-dielectric layer.

[0071] Performance test

[0072] Examples 1-2, Comparative Example 1 were all obtained by spin-coating polyamic acid (PAA) of different thicknesses (0 nm (Comparative Example 1), 20 nm (Example 1), and 270 nm (Example 2)) on a HfO2 thin film as an organic-inorganic hetero dielectric layer, then using C10-DNTT as a semiconductor and Au as a source / drain electrode to obtain a neuromorphic visual sensor array with a bottom-gate top-contact architecture, and constructing an integrated transistor with a bottom-gate top-contact architecture, denoted as Bare HfO2 (Comparative Example 1), 20 nm-PAA / HfO2 (Example 1), 270 nm-PAA / HfO2 (Example 2), respectively. The charge transport characteristics and output characteristics of the devices (sensor arrays) of the above different dielectric layers were tested, and the results are shown in Figure 1 , where a is the transfer characteristic curve of the Bare HfO2 (Comparative Example 1), 20 nm-PAA / HfO2 (Example 1), 270 nm-PAA / HfO2 (Example 2) device, and b is the output characteristic curve of the 20 nm-PAA / HfO2 (Example 1) device. From Figure 1 It can be seen that all devices can work normally at a working voltage of -1 V, but the on-state current of the transfer curve of the device with PAA introduced is significantly increased. Further statistics of the mobility of the device are shown in Figure 2 , where a is the transfer characteristic curve of the Bare HfO2 (Comparative Example 1), 20 nm-PAA / HfO2 (Example 1), 270 nm-PAA / HfO2 (Example 2) device, and b is the output characteristic curve of the 20 nm-PAA / HfO2 (Example 1) device. From Figure 2 It can be seen that at different source-drain voltages (V DS ), the mobility of the device based on the organic-inorganic hetero dielectric layer is higher than that of the Bare HfO2 (Comparative Example 1), wherein when the source-drain voltage is -5 V, the mobility of the 20 nm-PAA / HfO2 (Example 1) measured at 20 Hz is more than 10 cm 2 V -1 s -1 When the source-drain voltage is -1 V, -3 V, and -5 V, 20 devices of Example 1 were repeatedly tested, and the average mobilities were 5.3 cm 2 V -1 s -1 , 6.8 cm 2 V -1 s -1 , and 14.9 cm 2 V -1 s -1 , respectively. The improvement of the mobility of the device proves that the PAA in the hetero dielectric layer induces the charge transfer at the interface between the semiconductor and the dielectric layer, which is beneficial to efficient carrier transport.

[0073] The results of the light response performance test of Bare HfO2 (Comparative Example 1), 20 nm-PAA / HfO2 (Example 1) under 450 nm light irradiation are shown in Figure 3 , where a is the transfer characteristic curve of the Bare HfO2 (Comparative Example 1), 20 nm-PAA / HfO2 (Example 1), 270 nm-PAA / HfO2 (Example 2) device, and b is the output characteristic curve of the 20 nm-PAA / HfO2 (Example 1) device. From Figure 3As shown, a is the photoresponse transfer curve of Bare HfO2 (Comparative Example 1) under 3.38-690 μW / cm 2 of weak light, it can be seen that it exhibits poor detection ability, b shows that the introduction of PAA into 20nm-PAA / HfO2 (Example 1) endows the device with stronger ability to perceive weak light, and the threshold voltage change of the transfer curve is more obvious. Further, the photoresponse performance of the 20nm-PAA / HfO2 (Example 1) device to light of different wavelengths was tested, as shown in Figure 4 a is the photoresponse transfer curve under 300 nm light irradiation, b is the photoresponse transfer curve under 365 nm light irradiation, and c is the photoresponse transfer curve under 515 nm light irradiation, all of which exhibit obvious positive shift of threshold voltage.

[0074] The storage performance of Bare HfO2 (Comparative Example 1), 20nm-PAA / HfO2 (Example 1), and 270nm-PAA / HfO2 (Example 2) devices is shown in Figure 5 , the initial transfer curve, the transfer curve after applying a write voltage of -20 V for 1 s, and the transfer curve after erasing with 450 nm light of the three devices were tested, respectively. Wherein a is the storage window of Bare HfO2 (Comparative Example 1), b is the storage window of 20nm-PAA / HfO2 (Example 1), and c is the storage window of 270nm-PAA / HfO2 (Example 2). After applying a voltage pulse of -20 V for 1 s to the device, the transfer curve moves from the initial state to the negative direction to achieve electrical writing, and then under the stimulation of a light pulse of 450 nm, the transfer curve moves to the positive voltage to achieve optical erasing. The storage window (ΔVth) is defined as the deviation of the threshold voltage between the electrical writing and optical erasing curves. As shown in Figure 5 , it can be seen that Bare HfO2 (Comparative Example 1), 20nm-PAA / HfO2 (Example 1), and 270nm-PAA / HfO2 (Example 2) devices can obtain storage windows of 3.7 V, 4.1 V, and 1.0 V, respectively. After spin-coating the polymer PAA onto HfO2, the holes in the channel are likely to be captured in the shallow defect states existing at the PAA-HfO2 interface during negative voltage programming. Therefore, when the thickness of PAA increases, the channel holes are difficult to tunnel from PAA and be captured by the interface, so the storage performance of the device is significantly deteriorated, and the storage window is the smallest. Further, when the thickness of PAA is 20 nm, the device exhibits the best light perception and storage performance. As shown in Figure 5 d, the storage maintenance time of the 20nm-PAA / HfO2 (Example 1) device was tested in nitrogen, and the on-state and off-state currents remained greater than 10 6 on-off ratio after more than 50,000 seconds of testing time,

[0075] In addition, the ability to withstand a cycle of continuous write-read-erase-read operation is a key indicator for evaluating the stability and reliability of the device, and the results are shown in Figure 6 wherein a is the curve after 1000 cycles, b is the detail enlargement at the beginning of the cycle, and c is the detail enlargement at the end of the cycle. From Figure 6 It can be seen that the read-write-erase cycle test of the 20 nm-PAA / HfO2 (Example 1) device has a read voltage of V DS = -1 V, V GS = 0.8 V, a write voltage of V DS = 0 V, V GS = -30 V, and a time of 0.1 s. The current on-off ratio is greater than 10 4 at the beginning, and still has a current on-off ratio greater than 10 after 1000 cycles (about 2.3 s for one cycle).

[0076] Further, the 20 nm-PAA / HfO2 (Example 1) device is used to simulate the biological synapses between neurons, as shown in Figure 7 wherein a is a schematic diagram of the structure of the prepared 20 nm-PAA / HfO2 hetero-dielectric layer-based device and the biological synapse structure. First, the optical synapse performance is tested, the externally applied light pulse is similar to the presynaptic stimulation, and the output current of the device is similar to the postsynaptic current, and the results are shown in Figure 7 b-c, wherein b is the change in postsynaptic current when 6.26 mW / cm 2 of 450 nm light stimulation is applied for different times; and c is the change in postsynaptic current when 6.26 mW / cm 2 of 450 nm light is applied for different numbers of times. It can be seen that after the 20 nm-PAA / HfO2 (Example 1) device is subjected to 450 nm, 6.26 mW / cm 2 light pulse stimulation, the current increases significantly, showing a typical excitatory postsynaptic current behavior (EPSC). With the increase of the pulse stimulation from 5 s to 25 s, the current increases linearly, and after the light stimulation is removed, the current of the device decays very slowly, showing obvious long-term synaptic plasticity (LTP). When the pulse stimulation applied to the device is increased from 1 to 50, the postsynaptic current of the device still shows a very good linear increase, indicating the strong ability of the 20 nm-PAA / HfO2 (Example 1) device channel to generate photo-generated carriers.

[0077] The 20 nm-PAA / HfO2 (Example 1) device is used to simulate the biological synapses between neurons, and the electrical synapse performance is tested, and the results are shown in Figure 8 It can be seen that after the application of a pulse width of -2.5 V gate negative voltage for different times, the postsynaptic current shows inhibition, and after the application of a negative voltage to the device, the current can decay rapidly.

[0078] The energy consumption is the minimum energy required to complete a synaptic event, which is an important indicator to measure the synaptic device. The energy consumption of 20nm-PAA / HfO2 (Example 1) device at different operating voltages (V DS ) is shown in Figure 9 It can be seen that the energy consumption increases from 0.053fJ to 35.3fJ as V D increases from -1mV to -100mV.

[0079] To evaluate the ability of the device for neuromorphic computing, an artificial neural network (ANN) containing a simple three-layer neural network was constructed for neuromorphic computing for image recognition of handwritten digit "8". Long-term potentiation (LTP) and long-term depression (LTD) curves were obtained by 100 consecutive optical pulse stimulations (450nm, 0.22mW / cm 2 , 0.5s) and 100 consecutive electrical pulse inhibitions, respectively, to simulate the changes of synaptic weights. The results are shown in Figure 10 , where a is a schematic diagram of a multi-layer neural network for digit recognition; b is the long-term potentiation (LTP) and long-term depression (LTD) characteristic curves of the three devices; c is the recognition accuracy of handwritten digits with the change of training cycles. It can be seen that in the LTP-LTD curve, under the same stimulation conditions, the 20nm-PAA / HfO2 (Example 1) device has higher conductance value and better linearity and symmetry. After 120 training cycles, the recognition accuracy of the three devices of Bare HfO2 (Comparative Example 1), 20nm-PAA / HfO2 (Example 1), and 270nm-PAA / HfO2 (Example 2) devices is 92.15%, 94.64% and 93.75%, respectively.

[0080] Figure 11Figure 1. a) Schematic of OTFT driving LED array; b) Optical images of OTFT driven LED array in initial state, under applied light and after removal of light; c) Any row of the LED array can be controlled to light up by external light stimulus; d) Letters "T", "J", "U" are written into the LED array by writing and erasing; e) OTFT driven LED array undergoes switching cycles under external light and gate negative voltage control. OFETs with "sensor- storage- computation" characteristics can be utilized to endow OFET driven LED array with programmable ability using writing and erasing functions. Initially, OFETs are in off state and LEDs are in deactivated state. When exposed to light, writing process starts, resulting in a rapid increase of source-drain current in OFETs, thus activating LEDs. When light is deactivated, LEDs will remain lighted for a long time due to the storage characteristics of the device. Subsequently, a bias voltage is applied to erase the current, resulting in the LEDs being turned off. And even after the light pulse is stopped, the 20 nm-PAA / Hf02(Example 1) containing device can keep the LEDs in lighted state. In contrast, PAA only based device (or Bare Hf02device (Comparative Example 1)) will have a rapid decrease of photo current when external light is removed, resulting in a rapid deactivation of LEDs. Further, a 5x6 LED array controlled by OFETs was successfully fabricated (as shown in a) of Figure 2). Under external light illumination, source-drain current in OFET array increased, resulting in full activation of the LED array. Even after removal of external light source, LEDs remained lighted (as shown in b) of Figure 2). In addition, any row of the LED array can be arbitrarily activated or turned off by external illumination and a mask (as shown in c) of Figure 2). Meanwhile, imaging of different patterns can be achieved using various masks. As shown in d) of Figure 2, the process starts by writing the letter "T" into the array. By applying a negative gate voltage, the letter "T" can be erased and then the letter "J" is written. After erasing the letter "J", the letter "U" is written again. Further, the LED array can also be manipulated by writing and erasing processes (as shown in e) of Figure 2). Figure 11 Figure 11 Figure 11 Figure 11 Figure 11

[0081] The above, only for the preferred specific embodiments of the present application, but the scope of protection of the present application is not limited to this, any skilled in the art of the technical personnel in the technical range disclosed by the present application, can easily think of the changes or replacement, should be covered in the scope of protection of the present application. Therefore, the scope of protection of the present application should be subject to the scope of protection of claims.​​​​​

Claims

1. A transistor integrating inductance, storage, and computing based on an organic-inorganic heterodielectric layer, comprising, from bottom to top, a substrate, a dielectric layer, an organic small-molecule semiconductor layer, and source / drain electrodes, characterized in that, The dielectric layer is an organic-inorganic heterogeneous dielectric layer; The organic-inorganic heterodielectric layer is a bilayer structure consisting of a lower dielectric layer and an upper dielectric layer. The upper dielectric layer is a polyamic acid layer, and the lower dielectric layer is a hafnium oxide layer. The substrate is a silicon substrate, the organic small molecule semiconductor layer is a 2,9-didecylnaphtho[2,3B:2',3'F]thiopheno[3,2B]thiophene layer, and the source / drain electrode is a gold source / drain electrode; The thickness of the lower dielectric layer is 15 nm, and the thickness of the upper dielectric layer is 0–270 nm, and is not 0.

2. The integrated inductor-memory-computer transistor based on an organic-inorganic heterodielectric layer according to claim 1, characterized in that, The thickness of the lower dielectric layer is 15 nm, and the thickness of the upper dielectric layer is 20 nm.

3. The integrated inductor-memory-computer transistor based on an organic-inorganic heterodielectric layer according to claim 1, characterized in that, The thickness of the organic small molecule semiconductor layer is 20 nm, and the thickness of the source / drain electrode is 20 nm.

4. A method for fabricating an integrated inductor-memory-computer transistor based on an organic-inorganic heterodielectric layer as described in any one of claims 1 to 3, characterized in that, Includes the following steps: A hafnium oxide layer is prepared on a substrate using plasma-enhanced atomic layer deposition. A polyamic acid layer is then prepared on the hafnium oxide layer by spin coating. An organic-inorganic heterodielectric layer is formed on the substrate. Subsequently, an organic small molecule semiconductor layer is evaporated and deposited on the organic-inorganic heterodielectric layer, and source / drain electrodes are obtained by evaporation and deposition, thus obtaining the inductor-memory-computer integrated transistor based on the organic-inorganic heterodielectric layer.

5. The application of the integrated inductor-memory-computer transistor based on the organic-inorganic heterodielectric layer as described in any one of claims 1 to 3 in programmable display driving.

6. A programmable organic thin-film transistor driven light-emitting diode array, characterized in that, Including the integrated inductor-memory transistor based on an organic-inorganic heterodielectric layer as described in any one of claims 1 to 3.

7. The light-emitting diode array driven by a programmable organic thin-film transistor according to claim 6, characterized in that, The integrated inductive-memory-computer transistor based on the organic-inorganic heterodielectric layer is connected to the light-emitting diode through a circuit. The pattern is written by an external light source and a mask, and then erased by a negative gate voltage to obtain a light-emitting diode array driven by a programmable organic thin-film transistor.

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