Method for manufacturing stack of SiC-on-insulator materials
By spin coating and heating curing using hydrogen silsesquioxane adhesive, the problem of strict requirements on surface roughness of SiC and silicon oxide in the prior art is solved, and a high-quality and low-cost stacking of SiC materials on insulators is achieved, which is suitable for nanophotonic experiments and commercial production.
Patent Information
- Application Number
- CN202380064815.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-09-09
- Filing Date
- 2023-09-08
- Publication Date
- 2025-05-27
AI Technical Summary
The prior art strictly requires SiC and silicon oxide surface roughness when manufacturing SiC material stacking on insulators, which limits the size and industrial production of material stacking, making it difficult to achieve high-quality and low-cost nanophoton devices.
The SiC layer and silicon oxide layer surface are spin-coated to form an adhesive layer by using a flowable hydrogen silsesquioxane adhesive, and the SiC material stack on the insulator is formed by heating curing, which relaxes the requirements for surface smoothness and allows industrially manufactured wafer-sized material stacks.
A high-quality, low optical loss stacking of SiC materials on insulators is achieved, suitable for nanophotonic experiments, and can be mass-produced on commercial semiconductor wafers, reducing costs and improving the surface size and uniformity of material stacking.
Smart Images
Figure CN120051850A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a method for fabricating a wafer - sized SiC - on - insulator material stack by using an adhesive, which is used in nanophotonic experiments. Background Art
[0002] Research in the field of semiconductor SiC has received increasing attention. In the past, this material has been widely studied due to its well - known high - temperature, high - frequency, and high - performance electronic properties. Nowadays, the application of the optical properties of SiC in cutting - edge nanophotonic experiments is increasingly enhancing the importance of this material. Properties such as wide bandgap, high thermal conductivity, and large second - and third - order nonlinearities are key factors for developing applications in the fields of quantum transport experiments and nonlinear photonics.
[0003] In particular, hexagonal - close - packed 4H - SiC has attracted great interest. In recent years, the industrial mass production of ultra - high - purity 4H - SiC has been successfully achieved, which has paved the way for the wide application of SiC in current electronic and photonic systems. In particular, the properties of this material, such as a bandgap of 3.2 eV, low absorption loss at communication wavelengths, and the fabrication of high - quality wafers, are key properties for manufacturing next - generation photonic systems and circuits. Previous experiments have demonstrated the excellent performance of 4H - SiC in the form of high - Q - factor microring resonators or single - photon sources, thus showing the potential for its future applications in photonic integrated circuits, electronics, quantum electronics, or quantum photonic integrated circuits.
[0004] However, the refractive index of 4H - SiC (n = 2.646) requires a thin layer of silicon oxide as an optical insulator beside it for effective use in photonic circuits. This material stack is defined as a 4H - SiC - on - insulator stack and exhibits promising properties in applications in the field of nanophotonics.
[0005] Due to the complexity of fabricating 4H - SiC in the epitaxial process, the commonly adopted method for fabricating a 4H - SiC - on - insulator stack is to bond a 4H - SiC wafer on top of an oxidized silicon substrate. To achieve this, various methods have been tried in the past, such as plasma - activated bonding, anodic bonding, and direct bonding.
[0006] Previously, the fabrication of SiC-on-insulator material stacks typically relied on direct bonding methods, which required extremely smooth surfaces for both the silicon oxide layer and SiC prior to the bonding step. This requirement significantly affected the size of the resulting samples due to the inherent roughness of the two surfaces leading to imperfections. Additionally, there are currently no known industrial-scale manufacturing machines or devices for fabricating SiC-on-insulator material stacks. Relaxing any stringent requirements in the bonding method is an active area of current research. Thus, any progress in the industrial fabrication of 4H-SiC-on-insulator stacks would contribute to the development of better-quality and lower-cost nanophotonic devices to meet the needs of scientific research and commercial applications. Summary of the Invention
[0007] In view of the above prior art, an object of the present invention is to relax the requirements for the surface roughness of SiC and silicon oxide when fabricating 4H-SiC-on-insulator material stacks. At the same time, an object of the present invention is also to increase the surface size of the resulting material stacks.
[0008] The object can be achieved by a nanofabrication method for SiC-on-insulator material stacks, the method comprising the steps of: providing a SiC layer or SiC substrate comprising a first proximal surface and a first distal surface, and providing a first substrate comprising a second proximal surface.
[0009] The first substrate can be a low refractive index substrate, such as sapphire, and / or the first substrate can have a SiOx layer on the second proximal surface.
[0010] A first adhesive layer made of an adhesive material is deposited on the proximal surface of the SiC layer, the adhesive material preferably being flowable. A second adhesive layer made of the adhesive material is deposited on the second proximal surface. However, in accordance with the concepts of the present disclosure, the use of different adhesives on the SiC layer and the silicon oxide layer can also be considered. The first adhesive layer and the second adhesive layer are placed in contact with each other, after which a curing step can be performed on the stack to change the chemical composition of the adhesive layers and form a final SiC-on-insulator material stack.
[0011] Thus, the method enables the industrial fabrication of wafer-sized SiC-on-insulator material stacks without being limited by the initial materials or smoothness in the prior art.
[0012] Preferably, the adhesive material consists of hydrogen silsesquioxane. The physical and chemical properties of hydrogen silsesquioxane enable precise control of the thickness of the deposited layer while performing spin coating techniques. A particularly relevant chemical property of hydrogen silsesquioxane is that during the curing process by applying heat energy, the chemical composition of the compound changes. This property requires standard nanofabrication techniques and allows for the production of high-quality SiC-on-insulator stacks throughout a commercial semiconductor wafer. Description of the Drawings
[0013] The present invention will be described in more detail below with reference to the drawings: Figure 1 is a schematic diagram of a method for fabricating a SiC-on-insulator material stack using an adhesive.
[0014] Figure 2 is a graph depicting the relationship between the rotational speed used in the spin-coating step and the thickness of the formed hydrogen silsesquioxane (HSQ) layer. Detailed Description of the Invention
[0015] Figure 1 shows a schematic diagram of the method disclosed herein for fabricating a wafer-scale SiC-on-insulator stack. Figure 1 a shows a first step in which a layer or substrate of 4H-SiC 101 is provided with a first proximal surface 102. The SiC layer 101 may include wafers of 4 inches, 8 inches, or even 12 inches, which are common wafer sizes in the fields of semiconductors and integrated photonic circuits. The surface area of a substrate having a 12-inch diameter is approximately 700 cm 2 . Figure 1 b shows a second step in which droplets, such as small droplets of a flowable hydrogen silsesquioxane adhesive, may be deposited on the first proximal surface 102 of the SiC layer, thereby forming a first adhesive layer 111. The SiC layer may be placed in a spin-coating device 112, in which the layer is rotated at a high speed, as shown by the first arrow 113. Due to the centrifugal force experienced by the hydrogen silsesquioxane, the first adhesive layer is stretched to cover most or all of the first proximal surface; at the same time, the thickness of the first adhesive layer will decrease, and the first adhesive layer will become flat and uniform.
[0016] Other types of flowable adhesive materials may be used, such as benzocyclobutene, polymethyl methacrylate, or other types of ultraviolet, deep ultraviolet, thermal, or electron beam photoresists.
[0017] Figure 1c shows a third step, in which a first substrate 120 made of sapphire or semiconductor material with a second proximal surface 121 is provided. The semiconductor can be composed of, for example, II-VI semiconductors, III-V semiconductors, or IV group semiconductors. A layer of low refractive index insulator 122 can be deposited or formed on the second proximal surface of the first substrate 120. The insulator can be composed of, for example, silicon oxide (SiOx layer), sapphire, or quartz. If the first substrate is made of III-V semiconductor or Si, the silicon oxide layer will be preferred. III-V semiconductors can be, for example, GaAs, InAs, GaSb, InSb, InP, GaP, or AlAs. II-VI semiconductors can be, for example, ZnO, MgO, MgTe, ZnSe, CdTe, or CdS. If the first substrate is made of sapphire, the silicon oxide layer is optional. Additionally, it is also optional to provide a low refractive index layer on one or both sides of the SiC layer or substrate.
[0018] The silicon oxide layer 122 on the second proximal surface 121 of the first substrate 120 can be provided by industrial manufacturers or developed via any nanofabrication technology available for this purpose, such as thermal oxidation of Si for the first few hundred nanometers. The thickness of the silicon oxide layer can be controlled in the thermal oxidation step. The typical thickness of the silicon oxide can be in the range of several hundred nanometers. However, for achieving a 4H-SiC material stack on insulator, one may also be interested in ultra-thin films on the order of a few nanometers and thick films on the micron scale.
[0019] Similar to Figure 1 the second step shown in Figure 1 d shows a fourth step, in which droplets similar to a small amount of hydrogen silsesquioxane adhesive are deposited on the second proximal surface 121 of the first substrate 120 to form a second adhesive layer 131. The fourth step can be set or placed on a spin-coated photoresist 132 for performing a spin-coated photoresist step as shown by the first arrow 133 to reduce the thickness of the hydrogen silsesquioxane and form a uniform second adhesive layer 131 for covering most or all of the second proximal surface 121.
[0020] The third step can be carried out before, after, or simultaneously with the first step and / or the second step. The fourth step can also be carried out before, after, or simultaneously with the first step and / or the second step.
[0021] A baking step involving heating can be performed on the SiC layer and the first substrate to bake the first adhesive and the second adhesive. Whether this step is performed depends on the chemical arrangement of the hydrogen silsesquioxane desired before subsequent steps. Other adhesives may require different numbers and conditions of baking steps depending on the specific chemical properties of the compound.
[0022] Figure 1 Figure e shows the fifth step, in which the first proximal surface 102 and the second proximal surface 121 gradually approach until they contact. The first adhesive layer 111 of the SiC layer 101 contacts the second adhesive layer 131 of the first substrate 120. A force can be applied on the SiC layer 101 and the first substrate 120 to promote the distribution of the first adhesive layer and the second adhesive layer. The applied force can be uniformly distributed along the wafer, or uniformly or non-uniformly distributed at selected points on the substrate. The required force and the required temperature can be applied by a wafer bonding device. Wafer bonding can precisely control the bonding conditions between multiple wafers. Depending on the physical and chemical properties of the substrates and adhesives used, it can also apply a specific pressure and temperature profile along the wafer during the bonding process.
[0023] When a force in the opposite direction is applied on the substrate, the thickness of the hydrogen silsesquioxane layer will redistribute, and this process can smooth out the roughness originally present on any proximal surface of the substrate. Since the redistribution of the hydrogen silsesquioxane makes the interface between the substrates smooth, the requirement for a super-smooth surface required in manufacturing SiC-on-insulator material stacks in the prior art is reduced.
[0024] Figure 1 Figure f shows the sixth step, in which a curing step can be performed on the combined SiC layer 101 and the first substrate 120. Curing may mean applying thermal energy to raise the temperature of the hydrogen silsesquioxane to several hundred degrees Celsius over several hours or hours. The curing process can include heating the combined SiC layer and the first substrate to 450 °C and holding for 5 hours. Alternative curing processes can include heating the combined SiC layer and the first substrate to 250 °C and holding for 2 hours, or 650 °C and holding for 5 hours, or 850 °C and holding for 2 hours. During this process, the chemical composition of the hydrogen silsesquioxane becomes pure silica, thus transforming the material stack into a 4H SiC-silica-Si material stack including the first substrate 120, the silica layer 151, and the SiC layer 101, as Figure 1 shown in Figure f. Other adhesives may require different numbers of curing steps and conditions depending on the specific chemical properties of the compound.
[0025] In one embodiment, the SiC-on-insulator material stack may be configured such that the optical loss is less than 0.1 dB / cm. It may be advantageous for the material stack to have a low optical loss because this would mean it can be used for photonic applications. The reason this disclosure can achieve such a low optical loss is that the thickness of the SiC is reduced by mechanical means (such as polishing or saw milling) or chemical means (such as performing wet etching). After such a process, the SiC layer can have a higher thickness uniformity, surface smoothness, and fewer surface states due to surface passivation. The reduction of surface states is caused by radical hydrogen ions, which can terminate the dangling bonds that may exist in the material stack, thus effectively passivating the surface.
[0026] Surface passivation can be beneficial because it can prevent dangling bonds from causing surface states at the material interface. As mentioned previously, surface passivation can reduce the optical loss to less than 0.1 dB / cm, and surface passivation can be performed by wet or dry methods. For example, the dry method can be carried out by depositing a thin oxide layer (such as AlO x 、SiO 2 or HfO x )using atomic layer deposition technology. Another way to achieve surface passivation via the dry method is to anneal the SiC-on-insulator material stack in a furnace at an annealing temperature that reaches or remains at 400°C. The annealing process can also be carried out at higher temperatures, depending on the specifications of the SiC-on-insulator material stack. In one embodiment, surface passivation can be performed by the wet method, for example, by immersing the SiC-on-insulator material stack in chemicals that can treat the surface. For example, such chemicals can be polyethylene glycol (PEG), hyperbranched polyethyleneimine (PEI), or polypropionylethyleneimine-co-ethyleneimine (PPEI-EI).
[0027] The nanofabrication techniques mentioned in this disclosure can be applied to a whole semiconductor wafer with a typical size of 4 inches, thus allowing for the scalable manufacturing of large surface substrates.
[0028] The method can be used for SiC layers of different crystal forms, such as wurtzite, 15R, 6H, or preferably 4H. The differences between various crystal forms lie in the types of cubic and hexagonal bonds in the SiC layer.
[0029] Figure 2 Figure 200 is shown, which depicts the ability to control the thickness of hydrogen silsesquioxane during the spin-coating photoresist step. The y-axis 201 represents the final thickness of hydrogen silsesquioxane, and the x-axis 202 represents the revolutions per minute applied to the substrate during the spin coating process. The square data points 203 correspond to the experimental measurements of the final thickness of hydrogen silsesquioxane deposited on different first substrates at a given rotational speed. All data points were measured at a spin-coating photoresist time of 60 seconds. The black curve 204 corresponds to the situation at 2×2 cm2 Fitting data of the spin - coating experiment of hydrogen silsesquioxane performed on the first Si substrate. At higher rotation speeds, a saturation value of 750 nanometers for the thickness of hydrogen silsesquioxane was observed. The gray curve 205 corresponds to the fitting data of the spin - coating experiment of hydrogen silsesquioxane performed on a 4 - inch first Si substrate. In this case, as the rotation speed increases, the thickness tends to decrease, so that the thickness of hydrogen silsesquioxane can be controlled by controlling the rotation speed.
[0030] Figure 2 The measurement data shown in allows for fine - tuning the desired thickness of the hydrogen silsesquioxane adhesive between the SiC layer and the first Si substrate. Doing so can reduce the effect of possible flatness differences between the first proximal surface and the second proximal surface due to the redistribution of the adhesive, thereby forming a high - quality and continuous interface.
[0031] After the hydrogen silsesquioxane is cured, a final step can be performed. For some nanophotonic applications, it may be desirable to reduce the thickness of the SiC layer from its original thickness to a thin - film thickness of a few micrometers or even a few hundred nanometers. This thickness reduction can be achieved by mechanical means (such as polishing or sawing) or by chemical means (such as performing wet etching).
[0032] Some nanophotonic integrated circuit applications may require the use of a sapphire or III - V semiconductor substrate to replace the Si substrate. It is expected that the semiconductor will have similar performance when applying the disclosed manufacturing method, and those skilled in the art can understand that by replacing the Si substrate with another semiconductor substrate, a similar final material stack can be obtained. In the case of specifically applying the disclosed method to a sapphire substrate, due to the inherent optical properties of sapphire, a thin layer of i - silicon oxide is not required on the proximal surface of the first substrate.
[0033] An industrial - scale device for large - scale manufacturing of SiC - on - insulator material stacks can be defined as follows. The device may include a first spin - coater configured to hold and spin - coat a SiC substrate to form a first adhesive layer on its proximal surface. A second spin - coater is configured to hold and spin - coat the first substrate to form a second adhesive layer on its proximal surface. The spin - coater is configured to position the SiC layer on the first substrate such that the first proximal surface and the second proximal surface face each other, and vice versa. The device may also include a wafer bonder for applying pressure to the SiC layer and the substrate to press the first proximal surface and the second proximal surface against each other to achieve uniform adhesion. The device may also include a heating element for curing the first adhesive layer and the second adhesive layer to form a SiC - on - insulator material stack. The manufactured substrate can be of any standard size used in the semiconductor industry, such as 4 - inch, 8 - inch, or 12 - inch wafers.
Claims
1. A method for nanofabricating a SiC-on-insulator material stack for photonics, comprising the steps of: providing a SiC layer comprising a first proximal surface and a first distal surface, providing a first substrate comprising a second proximal surface, depositing a first adhesive layer and a second adhesive layer made of an adhesive material on the first proximal surface and the second proximal surface respectively, bringing the first adhesive layer and the second adhesive layer into contact with each other, and curing the first adhesive layer and the second adhesive layer to form a SiC-on-insulator material stack.
2. The method according to claim 1, wherein the method comprises the step of baking the first adhesive layer and the second adhesive layer, preferably before bringing the first adhesive layer and the second adhesive layer into contact with each other.
3. The method according to any one of the preceding claims 1-2, wherein the first substrate is a low refractive index substrate, such as sapphire or quartz, and / or a group II-VI, group IV or group III-V semiconductor, and / or a Si substrate.
4. The method according to any one of the preceding claims 1-3, wherein the first substrate has a SiOx layer or a quartz layer on the second proximal surface.
5. The method according to any one of the preceding claims 1-4, wherein the method comprises the step of reducing the thickness of the SiC layer, preferably after curing the first adhesive layer and the second adhesive layer.
6. The method according to any one of the preceding claims 1-5, wherein the SiC layer is of different crystal forms, such as wurtzite, 15R, 6H or preferably 4H.
7. The method according to any one of the preceding claims 1-6, wherein the SiOx layer is generated by a nanofabrication process, such as by thermal oxidation of Si or by chemical vapor deposition.
8. The method according to any one of the preceding claims 1-7, wherein the adhesive material is hydrogen silsesquioxane.
9. The method according to any one of the preceding claims 1-8, wherein the adhesive material is deposited and / or distributed on the first proximal surface and the second proximal surface by spin coating, preferably deposited and / or distributed uniformly on the first proximal surface and the second proximal surface.
10. The method according to any one of claims 2-9, wherein the step of baking the first adhesive layer and the second adhesive layer comprises a series of baking steps, wherein the first baking temperature of at least the first baking step in the baking steps is different from the second baking temperature of the second baking step, optionally, wherein the first baking duration of the first baking step in the baking steps is different from the second baking duration of the second baking step.
11. The method according to claim 10, wherein each baking step comprises a different baking temperature and optionally a different baking duration.
12. The method according to any one of the preceding claims 1-11, wherein the annealing step comprises a series of a plurality of annealing steps, wherein the first annealing temperature of at least the first annealing step among the annealing steps is different from the second annealing temperature of the second annealing step, optionally, wherein the first annealing duration of the first annealing step among the annealing steps is different from the second annealing duration of the second annealing step.
13. The method according to claim 12, wherein each step comprises a different annealing temperature and optionally a different annealing duration.
14. The method according to any one of the preceding claims 1-13, wherein the reduction in the thickness of the SiC layer is carried out by a polishing technique such as mechanical grinding, wet etching or dry etching.
15. The method according to any one of the preceding claims 1-14, wherein the step of curing the first adhesive layer and the second adhesive layer comprises heating the first adhesive layer and the second adhesive layer to a temperature not exceeding 450 °C, preferably less than 300 °C, more preferably less than 200 °C.
16. A SiC-on-insulator material stack includes a SiC layer on top of a SiOx layer on top of a first substrate, wherein the SiC-on-insulator material stack has a surface area greater than 10 cm 2 , preferably greater than 50 cm 2 , even more preferably greater than 100 cm 2 , and most preferably greater than 700 cm 2 .
17. The SiC-on-insulator material stack according to claim 16, wherein the first substrate is made of an element selected from group III-V or group IV elements, preferably made of Si.
18. The SiC-on-insulator material stack according to claim 16 or 17, wherein the SiC-on-insulator stack material has an optical loss of less than 0.1 dB / cm.
19. The SiC-on-insulator material stack according to claim 18, wherein the SiC material in the SiC-on-insulator stack has been surface passivated.
20. The SiC-on-insulator material stack according to any one of claims 16-19, wherein the SiC-on-insulator material stack is nanofabricated according to the method according to any one of claims 1-14.
21. The apparatus for manufacturing a SiC-on-insulator material stack for photonics according to any one of claims 16-20, wherein the apparatus comprises: a first spin coater configured to hold and spin coat a SiC layer to form a first adhesive layer on its first proximal surface, and a second spin coater configured to hold and spin coat a first substrate to form a second adhesive layer on its second proximal surface, wherein the first spin coater is configured to position the SiC layer on the first substrate such that the first proximal surface and the second proximal surface face each other, and / or the second spin coater is configured to position the first substrate in the SiC layer such that the first proximal surface and the second proximal surface face each other, wherein the apparatus comprises: a wafer bonder for applying pressure to the SiC layer and / or the first substrate to press the first proximal surface and the second proximal surface against each other, and a first heating element for curing the first adhesive layer and the second adhesive layer so as to form a SiC-on-insulator material stack.
22. The apparatus according to claim 21, wherein the apparatus has a second heating element for baking the first adhesive layer and the second adhesive layer, optionally, the first heating element and the second heating element are the same.